From: Ryan Chen <ryan_chen@aspeedtech.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v9 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Wed, 5 Apr 2023 10:28:24 +0800 [thread overview]
Message-ID: <20230405022825.333246-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20230405022825.333246-1-ryan_chen@aspeedtech.com>
Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
.../devicetree/bindings/i2c/aspeed,i2c.yaml | 52 +++++++++++++++++--
1 file changed, 49 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index f597f73ccd87..de252f6817ee 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings
maintainers:
- Rayn Chen <rayn_chen@aspeedtech.com>
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
enum:
@@ -49,6 +46,25 @@ properties:
description:
states that there is another master active on this bus
+ aspeed,enable-dma:
+ type: boolean
+ description: |
+ I2C bus enable dma mode transfer.
+
+ ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+ single DMA engine. DTS files can specify the data transfer mode to/from
+ the device, either DMA or programmed I/O. However, hardware limitations
+ may require a DTS to manually allocate which controller can use DMA mode.
+ The "aspeed,enable-dma" property allows control of this.
+
+ In cases where one the hardware design results in a specific
+ controller handling a larger amount of data, a DTS would likely
+ enable DMA mode for that one controller.
+
+ aspeed,global-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of i2c global register node.
+
required:
- reg
- compatible
@@ -57,6 +73,26 @@ required:
unevaluatedProperties: false
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: aspeed,ast2600-i2cv2
+
+ then:
+ properties:
+ reg:
+ minItems: 2
+ required:
+ - aspeed,global-regs
+ else:
+ properties:
+ aspeed,global-regs: false
+ aspeed,enable-dma: false
+
+
examples:
- |
#include <dt-bindings/clock/aspeed-clock.h>
@@ -71,3 +107,13 @@ examples:
interrupts = <0>;
interrupt-parent = <&i2c_ic>;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ i2c1: i2c at 80 {
+ compatible = "aspeed,ast2600-i2cv2";
+ reg = <0x80 0x80>, <0xc00 0x20>;
+ aspeed,global-regs = <&i2c_global>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ resets = <&syscon ASPEED_RESET_I2C>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Ryan Chen <ryan_chen@aspeedtech.com>
To: <jk@codeconstruct.com.au>, <openbmc@lists.ozlabs.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-i2c@vger.kernel.org>, ryan_chen <ryan_chen@aspeedtech.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-aspeed@lists.ozlabs.org>
Subject: [PATCH v9 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Wed, 5 Apr 2023 10:28:24 +0800 [thread overview]
Message-ID: <20230405022825.333246-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20230405022825.333246-1-ryan_chen@aspeedtech.com>
Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
.../devicetree/bindings/i2c/aspeed,i2c.yaml | 52 +++++++++++++++++--
1 file changed, 49 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index f597f73ccd87..de252f6817ee 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings
maintainers:
- Rayn Chen <rayn_chen@aspeedtech.com>
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
enum:
@@ -49,6 +46,25 @@ properties:
description:
states that there is another master active on this bus
+ aspeed,enable-dma:
+ type: boolean
+ description: |
+ I2C bus enable dma mode transfer.
+
+ ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+ single DMA engine. DTS files can specify the data transfer mode to/from
+ the device, either DMA or programmed I/O. However, hardware limitations
+ may require a DTS to manually allocate which controller can use DMA mode.
+ The "aspeed,enable-dma" property allows control of this.
+
+ In cases where one the hardware design results in a specific
+ controller handling a larger amount of data, a DTS would likely
+ enable DMA mode for that one controller.
+
+ aspeed,global-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of i2c global register node.
+
required:
- reg
- compatible
@@ -57,6 +73,26 @@ required:
unevaluatedProperties: false
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: aspeed,ast2600-i2cv2
+
+ then:
+ properties:
+ reg:
+ minItems: 2
+ required:
+ - aspeed,global-regs
+ else:
+ properties:
+ aspeed,global-regs: false
+ aspeed,enable-dma: false
+
+
examples:
- |
#include <dt-bindings/clock/aspeed-clock.h>
@@ -71,3 +107,13 @@ examples:
interrupts = <0>;
interrupt-parent = <&i2c_ic>;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ i2c1: i2c@80 {
+ compatible = "aspeed,ast2600-i2cv2";
+ reg = <0x80 0x80>, <0xc00 0x20>;
+ aspeed,global-regs = <&i2c_global>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ resets = <&syscon ASPEED_RESET_I2C>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Ryan Chen <ryan_chen@aspeedtech.com>
To: <jk@codeconstruct.com.au>, <openbmc@lists.ozlabs.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-i2c@vger.kernel.org>, ryan_chen <ryan_chen@aspeedtech.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-aspeed@lists.ozlabs.org>
Subject: [PATCH v9 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Wed, 5 Apr 2023 10:28:24 +0800 [thread overview]
Message-ID: <20230405022825.333246-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20230405022825.333246-1-ryan_chen@aspeedtech.com>
Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
.../devicetree/bindings/i2c/aspeed,i2c.yaml | 52 +++++++++++++++++--
1 file changed, 49 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index f597f73ccd87..de252f6817ee 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings
maintainers:
- Rayn Chen <rayn_chen@aspeedtech.com>
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
enum:
@@ -49,6 +46,25 @@ properties:
description:
states that there is another master active on this bus
+ aspeed,enable-dma:
+ type: boolean
+ description: |
+ I2C bus enable dma mode transfer.
+
+ ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+ single DMA engine. DTS files can specify the data transfer mode to/from
+ the device, either DMA or programmed I/O. However, hardware limitations
+ may require a DTS to manually allocate which controller can use DMA mode.
+ The "aspeed,enable-dma" property allows control of this.
+
+ In cases where one the hardware design results in a specific
+ controller handling a larger amount of data, a DTS would likely
+ enable DMA mode for that one controller.
+
+ aspeed,global-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of i2c global register node.
+
required:
- reg
- compatible
@@ -57,6 +73,26 @@ required:
unevaluatedProperties: false
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: aspeed,ast2600-i2cv2
+
+ then:
+ properties:
+ reg:
+ minItems: 2
+ required:
+ - aspeed,global-regs
+ else:
+ properties:
+ aspeed,global-regs: false
+ aspeed,enable-dma: false
+
+
examples:
- |
#include <dt-bindings/clock/aspeed-clock.h>
@@ -71,3 +107,13 @@ examples:
interrupts = <0>;
interrupt-parent = <&i2c_ic>;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ i2c1: i2c@80 {
+ compatible = "aspeed,ast2600-i2cv2";
+ reg = <0x80 0x80>, <0xc00 0x20>;
+ aspeed,global-regs = <&i2c_global>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ resets = <&syscon ASPEED_RESET_I2C>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.34.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-04-05 2:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-05 2:28 [PATCH v9 0/2] Add ASPEED AST2600 I2Cv2 controller driver Ryan Chen
2023-04-05 2:28 ` Ryan Chen
2023-04-05 2:28 ` Ryan Chen
2023-04-05 2:28 ` Ryan Chen [this message]
2023-04-05 2:28 ` [PATCH v9 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2 Ryan Chen
2023-04-05 2:28 ` Ryan Chen
2023-04-06 7:36 ` Krzysztof Kozlowski
2023-04-06 7:36 ` Krzysztof Kozlowski
2023-04-06 7:36 ` Krzysztof Kozlowski
2023-04-12 14:18 ` Krzysztof Kozlowski
2023-04-12 14:18 ` Krzysztof Kozlowski
2023-04-12 14:18 ` Krzysztof Kozlowski
2023-04-05 2:28 ` [PATCH v9 2/2] i2c: aspeed: support ast2600 i2c new register mode driver Ryan Chen
2023-04-05 2:28 ` Ryan Chen
2023-04-05 2:28 ` Ryan Chen
2023-04-11 2:24 ` csf0711
2023-04-11 2:24 ` csf0711
2023-04-11 2:24 ` csf0711
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