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* [PATCH] SMPDesign: Remove duplicate item
@ 2023-04-11 16:28 Alan Huang
  2023-04-12  0:16 ` Akira Yokosawa
  0 siblings, 1 reply; 5+ messages in thread
From: Alan Huang @ 2023-04-11 16:28 UTC (permalink / raw)
  To: paulmck, akiyks; +Cc: perfbook, Alan Huang

Signed-off-by: Alan Huang <mmpgouride@gmail.com>
---
 SMPdesign/criteria.tex | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/SMPdesign/criteria.tex b/SMPdesign/criteria.tex
index d3d84506..bc4d3a77 100644
--- a/SMPdesign/criteria.tex
+++ b/SMPdesign/criteria.tex
@@ -145,7 +145,7 @@ parallel program.
 	The larger the gap between the number of CPUs
 	and the actual speedup, the less efficiently the
 	CPUs will be used.
-	Similarly, the greater the desired efficiency, the smaller
+	Similarly, the greater the desired efficiency, the bigger
 	the achievable speedup.
 \item	If the available synchronization primitives have
 	high overhead compared to the critical sections
@@ -157,11 +157,6 @@ parallel program.
 	using asymmetric primitives
 	(see \cref{chp:Deferred Processing}),
 	or by using a coarse-grained design such as \IXh{code}{locking}.
-\item	If the critical sections have high overhead compared
-	to the primitives guarding them, the best way
-	to improve speedup is to increase parallelism
-	by moving to reader/writer locking, \IXh{data}{locking}, asymmetric,
-	or data ownership.
 \item	If the critical sections have high overhead compared
 	to the primitives guarding them and the data structure
 	being guarded is read much more often than modified,
-- 
2.34.1


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2023-04-11 16:28 [PATCH] SMPDesign: Remove duplicate item Alan Huang
2023-04-12  0:16 ` Akira Yokosawa
2023-04-12  1:15   ` Alan Huang
2023-04-12  2:51     ` Akira Yokosawa
2023-04-12 10:40       ` Alan Huang

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