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From: Qiming Yang <qiming.yang@intel.com>
To: dev@dpdk.org
Cc: qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,
	Jacob Keller <jacob.e.keller@intel.com>
Subject: [PATCH 03/30] net/ice/base: remove unnecessary control queue array
Date: Thu, 27 Apr 2023 06:19:34 +0000	[thread overview]
Message-ID: <20230427062001.478032-4-qiming.yang@intel.com> (raw)
In-Reply-To: <20230427062001.478032-1-qiming.yang@intel.com>

The driver allocates a cmd_buf array in addition to the desc_buf array.
This array stores an ice_sq_cd command details structure for each entry in
the control queue ring. And improve debug print for control queue messages.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_controlq.c | 107 +++++++++++++++-------------
 drivers/net/ice/base/ice_controlq.h |   3 -
 2 files changed, 56 insertions(+), 54 deletions(-)

diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index c34407b48c..acd6ad249b 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -101,13 +101,6 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	if (!cq->sq.desc_buf.va)
 		return ICE_ERR_NO_MEMORY;
 
-	cq->sq.cmd_buf = ice_calloc(hw, cq->num_sq_entries,
-				    sizeof(struct ice_sq_cd));
-	if (!cq->sq.cmd_buf) {
-		ice_free_dma_mem(hw, &cq->sq.desc_buf);
-		return ICE_ERR_NO_MEMORY;
-	}
-
 	return ICE_SUCCESS;
 }
 
@@ -176,7 +169,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 		if (cq->rq_buf_size > ICE_AQ_LG_BUF)
 			desc->flags |= CPU_TO_LE16(ICE_AQ_FLAG_LB);
 		desc->opcode = 0;
-		/* This is in accordance with Admin queue design, there is no
+		/* This is in accordance with control queue design, there is no
 		 * register for buffer size configuration
 		 */
 		desc->datalen = CPU_TO_LE16(bi->size);
@@ -309,9 +302,6 @@ do {									\
 				ice_free_dma_mem((hw),			\
 					&(qi)->ring.r.ring##_bi[i]);	\
 	}								\
-	/* free the buffer info list */					\
-	if ((qi)->ring.cmd_buf)						\
-		ice_free(hw, (qi)->ring.cmd_buf);			\
 	/* free DMA head */						\
 	ice_free(hw, (qi)->ring.dma_head);				\
 } while (0)
@@ -379,11 +369,11 @@ static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 }
 
 /**
- * ice_init_rq - initialize ARQ
+ * ice_init_rq - initialize receive side of a control queue
  * @hw: pointer to the hardware structure
  * @cq: pointer to the specific Control queue
  *
- * The main initialization routine for the Admin Receive (Event) Queue.
+ * The main initialization routine for Receive side of a control queue.
  * Prior to calling this function, the driver *MUST* set the following fields
  * in the cq->structure:
  *     - cq->num_rq_entries
@@ -441,7 +431,7 @@ static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 }
 
 /**
- * ice_shutdown_sq - shutdown the Control ATQ
+ * ice_shutdown_sq - shutdown the transmit side of a control queue
  * @hw: pointer to the hardware structure
  * @cq: pointer to the specific Control queue
  *
@@ -461,7 +451,7 @@ ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 		goto shutdown_sq_out;
 	}
 
-	/* Stop firmware AdminQ processing */
+	/* Stop processing of the control queue */
 	wr32(hw, cq->sq.head, 0);
 	wr32(hw, cq->sq.tail, 0);
 	wr32(hw, cq->sq.len, 0);
@@ -834,7 +824,7 @@ void ice_destroy_all_ctrlq(struct ice_hw *hw)
 }
 
 /**
- * ice_clean_sq - cleans Admin send queue (ATQ)
+ * ice_clean_sq - cleans send side of a control queue
  * @hw: pointer to the hardware structure
  * @cq: pointer to the specific Control queue
  *
@@ -844,21 +834,17 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 {
 	struct ice_ctl_q_ring *sq = &cq->sq;
 	u16 ntc = sq->next_to_clean;
-	struct ice_sq_cd *details;
 	struct ice_aq_desc *desc;
 
 	desc = ICE_CTL_Q_DESC(*sq, ntc);
-	details = ICE_CTL_Q_DETAILS(*sq, ntc);
 
 	while (rd32(hw, cq->sq.head) != ntc) {
 		ice_debug(hw, ICE_DBG_AQ_MSG, "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head));
 		ice_memset(desc, 0, sizeof(*desc), ICE_DMA_MEM);
-		ice_memset(details, 0, sizeof(*details), ICE_NONDMA_MEM);
 		ntc++;
 		if (ntc == sq->count)
 			ntc = 0;
 		desc = ICE_CTL_Q_DESC(*sq, ntc);
-		details = ICE_CTL_Q_DETAILS(*sq, ntc);
 	}
 
 	sq->next_to_clean = ntc;
@@ -866,16 +852,42 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	return ICE_CTL_Q_DESC_UNUSED(sq);
 }
 
+/**
+ * ice_ctl_q_str - Convert control queue type to string
+ * @qtype: the control queue type
+ *
+ * Returns: A string name for the given control queue type.
+ */
+static const char *ice_ctl_q_str(enum ice_ctl_q qtype)
+{
+	switch (qtype) {
+	case ICE_CTL_Q_UNKNOWN:
+		return "Unknown CQ";
+	case ICE_CTL_Q_ADMIN:
+		return "AQ";
+	case ICE_CTL_Q_MAILBOX:
+		return "MBXQ";
+	case ICE_CTL_Q_SB:
+		return "SBQ";
+	default:
+		return "Unrecognized CQ";
+	}
+}
+
 /**
  * ice_debug_cq
  * @hw: pointer to the hardware structure
+ * @cq: pointer to the specific Control queue
  * @desc: pointer to control queue descriptor
  * @buf: pointer to command buffer
  * @buf_len: max length of buf
+ * @response: true if this is the writeback response
  *
  * Dumps debug log about control command with descriptor contents.
  */
-static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)
+static void
+ice_debug_cq(struct ice_hw *hw, struct ice_ctl_q_info *cq,
+	     void *desc, void *buf, u16 buf_len, bool response)
 {
 	struct ice_aq_desc *cq_desc = (struct ice_aq_desc *)desc;
 	u16 datalen, flags;
@@ -889,7 +901,8 @@ static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)
 	datalen = LE16_TO_CPU(cq_desc->datalen);
 	flags = LE16_TO_CPU(cq_desc->flags);
 
-	ice_debug(hw, ICE_DBG_AQ_DESC, "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
+	ice_debug(hw, ICE_DBG_AQ_DESC, "%s %s: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
+		  ice_ctl_q_str(cq->qtype), response ? "Response" : "Command",
 		  LE16_TO_CPU(cq_desc->opcode), flags, datalen,
 		  LE16_TO_CPU(cq_desc->retval));
 	ice_debug(hw, ICE_DBG_AQ_DESC, "\tcookie (h,l) 0x%08X 0x%08X\n",
@@ -914,23 +927,23 @@ static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)
 }
 
 /**
- * ice_sq_done - check if FW has processed the Admin Send Queue (ATQ)
+ * ice_sq_done - check if the last send on a control queue has completed
  * @hw: pointer to the HW struct
  * @cq: pointer to the specific Control queue
  *
- * Returns true if the firmware has processed all descriptors on the
- * admin send queue. Returns false if there are still requests pending.
+ * Returns: true if all the descriptors on the send side of a control queue
+ *          are finished processing, false otherwise.
  */
 static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 {
-	/* AQ designers suggest use of head for better
+	/* control queue designers suggest use of head for better
 	 * timing reliability than DD bit
 	 */
 	return rd32(hw, cq->sq.head) == cq->sq.next_to_use;
 }
 
 /**
- * ice_sq_send_cmd_nolock - send command to Control Queue (ATQ)
+ * ice_sq_send_cmd_nolock - send command to a control queue
  * @hw: pointer to the HW struct
  * @cq: pointer to the specific Control queue
  * @desc: prefilled descriptor describing the command (non DMA mem)
@@ -938,8 +951,9 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
  * @buf_size: size of buffer for indirect commands (or 0 for direct commands)
  * @cd: pointer to command details structure
  *
- * This is the main send command routine for the ATQ. It runs the queue,
- * cleans the queue, etc.
+ * This is the main send command routine for a control queue. It prepares the
+ * command into a descriptor, bumps the send queue tail, waits for the command
+ * to complete, captures status and data for the command, etc.
  */
 enum ice_status
 ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
@@ -950,7 +964,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	struct ice_aq_desc *desc_on_ring;
 	bool cmd_completed = false;
 	enum ice_status status = ICE_SUCCESS;
-	struct ice_sq_cd *details;
 	u32 total_delay = 0;
 	u16 retval = 0;
 	u32 val = 0;
@@ -993,12 +1006,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 		goto sq_send_command_error;
 	}
 
-	details = ICE_CTL_Q_DETAILS(cq->sq, cq->sq.next_to_use);
-	if (cd)
-		*details = *cd;
-	else
-		ice_memset(details, 0, sizeof(*details), ICE_NONDMA_MEM);
-
 	/* Call clean and check queue available function to reclaim the
 	 * descriptors that were processed by FW/MBX; the function returns the
 	 * number of desc available. The clean function called here could be
@@ -1035,8 +1042,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	/* Debug desc and buffer */
 	ice_debug(hw, ICE_DBG_AQ_DESC, "ATQ: Control Send queue desc and buffer:\n");
-
-	ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size);
+	ice_debug_cq(hw, cq, (void *)desc_on_ring, buf, buf_size, false);
 
 	(cq->sq.next_to_use)++;
 	if (cq->sq.next_to_use == cq->sq.count)
@@ -1084,13 +1090,12 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	}
 
 	ice_debug(hw, ICE_DBG_AQ_MSG, "ATQ: desc and buffer writeback:\n");
-
-	ice_debug_cq(hw, (void *)desc, buf, buf_size);
+	ice_debug_cq(hw, cq, (void *)desc, buf, buf_size, true);
 
 	/* save writeback AQ if requested */
-	if (details->wb_desc)
-		ice_memcpy(details->wb_desc, desc_on_ring,
-			   sizeof(*details->wb_desc), ICE_DMA_TO_NONDMA);
+	if (cd && cd->wb_desc)
+		ice_memcpy(cd->wb_desc, desc_on_ring,
+			   sizeof(*cd->wb_desc), ICE_DMA_TO_NONDMA);
 
 	/* update the error if time out occurred */
 	if (!cmd_completed) {
@@ -1109,7 +1114,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 }
 
 /**
- * ice_sq_send_cmd - send command to Control Queue (ATQ)
+ * ice_sq_send_cmd - send command to a control queue
  * @hw: pointer to the HW struct
  * @cq: pointer to the specific Control queue
  * @desc: prefilled descriptor describing the command
@@ -1117,8 +1122,9 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
  * @buf_size: size of buffer for indirect commands (or 0 for direct commands)
  * @cd: pointer to command details structure
  *
- * This is the main send command routine for the ATQ. It runs the queue,
- * cleans the queue, etc.
+ * Main command for the transmit side of a control queue. It puts the command
+ * on the queue, bumps the tail, waits for processing of the command, captures
+ * command status and results, etc.
  */
 enum ice_status
 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
@@ -1160,9 +1166,9 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
  * @e: event info from the receive descriptor, includes any buffers
  * @pending: number of events that could be left to process
  *
- * This function cleans one Admin Receive Queue element and returns
- * the contents through e. It can also return how many events are
- * left to process through 'pending'.
+ * Clean one element from the receive side of a control queue. On return 'e'
+ * contains contents of the message, and 'pending' contains the number of
+ * events left to process.
  */
 enum ice_status
 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
@@ -1218,8 +1224,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 			   e->msg_len, ICE_DMA_TO_NONDMA);
 
 	ice_debug(hw, ICE_DBG_AQ_DESC, "ARQ: desc and buffer:\n");
-
-	ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size);
+	ice_debug_cq(hw, cq, (void *)desc, e->msg_buf, cq->rq_buf_size, true);
 
 	/* Restore the original datalen and buffer address in the desc,
 	 * FW updates datalen to indicate the event message size
diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h
index 986604ec3c..5c60469693 100644
--- a/drivers/net/ice/base/ice_controlq.h
+++ b/drivers/net/ice/base/ice_controlq.h
@@ -43,7 +43,6 @@ enum ice_ctl_q {
 struct ice_ctl_q_ring {
 	void *dma_head;			/* Virtual address to DMA head */
 	struct ice_dma_mem desc_buf;	/* descriptor ring memory */
-	void *cmd_buf;			/* command buffer memory */
 
 	union {
 		struct ice_dma_mem *sq_bi;
@@ -73,8 +72,6 @@ struct ice_sq_cd {
 	struct ice_aq_desc *wb_desc;
 };
 
-#define ICE_CTL_Q_DETAILS(R, i) (&(((struct ice_sq_cd *)((R).cmd_buf))[i]))
-
 /* rq event information */
 struct ice_rq_event_info {
 	struct ice_aq_desc desc;
-- 
2.25.1


  parent reply	other threads:[~2023-04-27  6:38 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-27  6:19 [PATCH 00/30] net/ice/base: share code update Qiming Yang
2023-04-27  6:19 ` [PATCH 01/30] net/ice/base: updated copyright Qiming Yang
2023-04-27  6:19 ` [PATCH 02/30] net/ice/base: add flex array safe allocations Qiming Yang
2023-04-27  6:19 ` Qiming Yang [this message]
2024-03-05 18:05   ` [**EXTERNAL**] [PATCH 03/30] net/ice/base: remove unnecessary control queue array Gudimetla, Leela Sankar
2023-04-27  6:19 ` [PATCH 04/30] net/ice/base: update flow seg fields to declared bitmaps Qiming Yang
2023-04-27  6:19 ` [PATCH 05/30] net/ice/base: clean up RSS LUT and fix media type Qiming Yang
2023-04-27  6:19 ` [PATCH 06/30] net/ice/base: add ability to set markid via switch filter Qiming Yang
2023-04-27  6:19 ` [PATCH 07/30] net/ice/base: add reading cap and ropo cap Qiming Yang
2023-04-27  6:19 ` [PATCH 08/30] net/ice/base: add function to read HW sensors Qiming Yang
2023-04-27  6:19 ` [PATCH 09/30] net/ice/base: add pre-allocate memory argument Qiming Yang
2023-04-27  6:19 ` [PATCH 10/30] net/ice/base: use coccinelle to instead macro Qiming Yang
2023-04-27  6:19 ` [PATCH 11/30] net/ice/base: add new fls function Qiming Yang
2023-04-27  6:19 ` [PATCH 12/30] net/ice/base: add E830 device ids Qiming Yang
2023-04-27  6:19 ` [PATCH 13/30] net/ice/base: add function to get rxq context Qiming Yang
2023-04-27  6:19 ` [PATCH 14/30] net/ice/base: removed no need 56G releated code Qiming Yang
2023-04-27  6:19 ` [PATCH 15/30] net/ice/base: allow skip main timer Qiming Yang
2023-04-27  6:19 ` [PATCH 16/30] net/ice/base: add E830 PTP init Qiming Yang
2023-04-27  6:19 ` [PATCH 17/30] net/ice/base: add C825X device support Qiming Yang
2023-04-27  6:19 ` [PATCH 18/30] net/ice/base: add VLAN TPID in switchdev Qiming Yang
2023-04-27  6:19 ` [PATCH 19/30] net/ice/base: reduce time to read Option ROM CIVD Qiming Yang
2023-04-27  6:19 ` [PATCH 20/30] net/ice/base: add L2TPv3 support for adv rules Qiming Yang
2023-04-27  6:19 ` [PATCH 21/30] net/ice/base: add PHY OFFSET READY register clear Qiming Yang
2023-04-27  6:19 ` [PATCH 22/30] net/ice/base: return CGU PLL config function params Qiming Yang
2023-04-27  6:19 ` [PATCH 23/30] net/ice/base: change method to get pca9575 handle Qiming Yang
2023-04-27  6:19 ` [PATCH 24/30] net/ice/base: cleanup timestamp registers correct Qiming Yang
2023-04-27  6:19 ` [PATCH 25/30] net/ice/base: add PPPoE hardware offload Qiming Yang
2023-04-27  6:19 ` [PATCH 26/30] net/ice/base: remove bypass mode Qiming Yang
2023-04-27  6:19 ` [PATCH 27/30] net/ice/base: support inner etype in switchdev Qiming Yang
2023-04-27  6:19 ` [PATCH 28/30] net/ice/base: use const array to store link modes Qiming Yang
2023-04-27  6:20 ` [PATCH 29/30] net/ice/base: introduce a new ID for E810 NIC Qiming Yang
2023-04-27  6:20 ` [PATCH 30/30] net/ice/base: fix Generic Checksum acronym Qiming Yang
2023-04-27 21:18   ` Greenwalt, Paul
2023-05-18 15:16 ` [PATCH v2 00/20] net/ice/base: code update Qiming Yang
2023-05-18 15:16   ` [PATCH v2 01/20] net/ice/base: updated copyright Qiming Yang
2023-05-18 15:16   ` [PATCH v2 02/20] net/ice/base: add NAC Topology device capability parser Qiming Yang
2023-05-18 15:16   ` [PATCH v2 03/20] net/ice/base: add new device for E810 Qiming Yang
2023-05-18 15:16   ` [PATCH v2 04/20] net/ice/base: fix incorrect defines for DCBx Qiming Yang
2023-05-18 15:16   ` [PATCH v2 05/20] net/ice/base: introduce a non-atomic function Qiming Yang
2023-05-18 15:16   ` [PATCH v2 06/20] net/ice/base: add missing AQ flag to AQ command Qiming Yang
2023-05-18 15:16   ` [PATCH v2 07/20] net/ice/base: add support for inner etype in switchdev Qiming Yang
2023-05-18 15:16   ` [PATCH v2 08/20] net/ice/base: add support for PPPoE hardware offload Qiming Yang
2023-05-18 15:16   ` [PATCH v2 09/20] net/ice/base: remove direction metadata for switchdev Qiming Yang
2023-05-18 15:16   ` [PATCH v2 10/20] net/ice/base: reduce time to read Option data Qiming Yang
2023-05-18 17:08     ` Keller, Jacob E
2023-05-18 15:16   ` [PATCH v2 11/20] net/ice/base: add support for VLAN TPID filters Qiming Yang
2023-05-18 15:16   ` [PATCH v2 12/20] net/ice/base: add C825-X device ID Qiming Yang
2023-05-18 15:16   ` [PATCH v2 13/20] net/ice/base: add function to get rxq context Qiming Yang
2023-05-18 15:16   ` [PATCH v2 14/20] net/ice/base: modify tunnel match mask Qiming Yang
2023-05-18 15:16   ` [PATCH v2 15/20] net/ice/base: check VSIG before disassociating VSI Qiming Yang
2023-05-18 15:16   ` [PATCH v2 16/20] net/ice/base: delete get field vector function Qiming Yang
2023-05-18 15:16   ` [PATCH v2 17/20] net/ice/base: update 3k-sign DDP support for E825C Qiming Yang
2023-05-18 15:16   ` [PATCH v2 18/20] net/ice/base: fix static analyzer bug Qiming Yang
2023-05-18 15:16   ` [PATCH v2 19/20] net/ice/base: offer memory config for schedual node Qiming Yang
2023-05-18 15:16   ` [PATCH v2 20/20] net/ice/base: add new AQ ro read HW sensors Qiming Yang
2023-05-23  2:12   ` [PATCH v2 00/20] net/ice/base: code update Zhang, Qi Z

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