From: fei.yang@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
Chris Wilson <chris.p.wilson@linux.intel.com>,
dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v4 3/3] drm/i915: make sure correct pte encode is used
Date: Mon, 1 May 2023 21:12:00 -0700 [thread overview]
Message-ID: <20230502041200.2170424-4-fei.yang@intel.com> (raw)
In-Reply-To: <20230502041200.2170424-1-fei.yang@intel.com>
From: Fei Yang <fei.yang@intel.com>
PTE encode is platform dependent. After replacing cache_level with
pat_index, the newly introduced mtl_pte_encode is actually generic
for all gen12 platforms, thus rename it to gen12_pte_encode and
apply it to all gen12 platforms.
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f2334a713c4e..d1e3d3b90e95 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -55,9 +55,9 @@ static u64 gen8_pte_encode(dma_addr_t addr,
return pte;
}
-static u64 mtl_pte_encode(dma_addr_t addr,
- unsigned int pat_index,
- u32 flags)
+static u64 gen12_pte_encode(dma_addr_t addr,
+ unsigned int pat_index,
+ u32 flags)
{
gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
@@ -995,8 +995,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
*/
ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
- if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
- ppgtt->vm.pte_encode = mtl_pte_encode;
+ if (GRAPHICS_VER(gt->i915) >= 12)
+ ppgtt->vm.pte_encode = gen12_pte_encode;
else
ppgtt->vm.pte_encode = gen8_pte_encode;
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: fei.yang@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>,
Chris Wilson <chris.p.wilson@linux.intel.com>,
Fei Yang <fei.yang@intel.com>,
dri-devel@lists.freedesktop.org,
Andi Shyti <andi.shyti@linux.intel.com>
Subject: [PATCH v4 3/3] drm/i915: make sure correct pte encode is used
Date: Mon, 1 May 2023 21:12:00 -0700 [thread overview]
Message-ID: <20230502041200.2170424-4-fei.yang@intel.com> (raw)
In-Reply-To: <20230502041200.2170424-1-fei.yang@intel.com>
From: Fei Yang <fei.yang@intel.com>
PTE encode is platform dependent. After replacing cache_level with
pat_index, the newly introduced mtl_pte_encode is actually generic
for all gen12 platforms, thus rename it to gen12_pte_encode and
apply it to all gen12 platforms.
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index f2334a713c4e..d1e3d3b90e95 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -55,9 +55,9 @@ static u64 gen8_pte_encode(dma_addr_t addr,
return pte;
}
-static u64 mtl_pte_encode(dma_addr_t addr,
- unsigned int pat_index,
- u32 flags)
+static u64 gen12_pte_encode(dma_addr_t addr,
+ unsigned int pat_index,
+ u32 flags)
{
gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
@@ -995,8 +995,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
*/
ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
- if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
- ppgtt->vm.pte_encode = mtl_pte_encode;
+ if (GRAPHICS_VER(gt->i915) >= 12)
+ ppgtt->vm.pte_encode = gen12_pte_encode;
else
ppgtt->vm.pte_encode = gen8_pte_encode;
--
2.25.1
next prev parent reply other threads:[~2023-05-02 4:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-02 4:11 [Intel-gfx] [PATCH v4 0/3] drm/i915: use pat_index instead of cache_level fei.yang
2023-05-02 4:11 ` fei.yang
2023-05-02 4:11 ` [Intel-gfx] [PATCH v4 1/3] drm/i915: preparation for using PAT index fei.yang
2023-05-02 4:11 ` fei.yang
2023-05-02 4:11 ` [Intel-gfx] [PATCH v4 2/3] drm/i915: use pat_index instead of cache_level fei.yang
2023-05-02 4:11 ` fei.yang
2023-05-03 13:40 ` [Intel-gfx] " Tvrtko Ursulin
2023-05-03 20:39 ` Yang, Fei
2023-05-03 20:39 ` Yang, Fei
2023-05-04 13:11 ` Tvrtko Ursulin
2023-05-02 4:12 ` fei.yang [this message]
2023-05-02 4:12 ` [PATCH v4 3/3] drm/i915: make sure correct pte encode is used fei.yang
2023-05-02 4:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: use pat_index instead of cache_level (rev2) Patchwork
2023-05-02 4:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-02 6:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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