* drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR'
@ 2023-04-30 19:17 kernel test robot
0 siblings, 0 replies; 3+ messages in thread
From: kernel test robot @ 2023-04-30 19:17 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp, Dan Carpenter
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
CC: linux-kernel@vger.kernel.org
TO: Christian Eggers <ceggers@arri.de>
CC: Arun Ramadoss <arun.ramadoss@microchip.com>
CC: Vladimir Oltean <olteanv@gmail.com>
CC: Florian Fainelli <f.fainelli@gmail.com>
CC: Jacob Keller <jacob.e.keller@intel.com>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 825a0714d2b3883d4f8ff64f6933fb73ee3f1834
commit: eac1ea20261e1fac8ffbfb3b7da2d5e6b7c159e3 net: dsa: microchip: ptp: add the posix clock support
date: 4 months ago
:::::: branch date: 18 hours ago
:::::: commit date: 4 months ago
config: m68k-randconfig-m031-20230430 (https://download.01.org/0day-ci/archive/20230501/202305010323.AQvNYSnW-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Link: https://lore.kernel.org/r/202305010323.AQvNYSnW-lkp@intel.com/
smatch warnings:
drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR'
vim +/PTR_ERR +217 drivers/net/dsa/microchip/ksz_ptp.c
eac1ea20261e1f Christian Eggers 2023-01-10 185
eac1ea20261e1f Christian Eggers 2023-01-10 186 int ksz_ptp_clock_register(struct dsa_switch *ds)
eac1ea20261e1f Christian Eggers 2023-01-10 187 {
eac1ea20261e1f Christian Eggers 2023-01-10 188 struct ksz_device *dev = ds->priv;
eac1ea20261e1f Christian Eggers 2023-01-10 189 struct ksz_ptp_data *ptp_data;
eac1ea20261e1f Christian Eggers 2023-01-10 190 int ret;
eac1ea20261e1f Christian Eggers 2023-01-10 191
eac1ea20261e1f Christian Eggers 2023-01-10 192 ptp_data = &dev->ptp_data;
eac1ea20261e1f Christian Eggers 2023-01-10 193 mutex_init(&ptp_data->lock);
eac1ea20261e1f Christian Eggers 2023-01-10 194
eac1ea20261e1f Christian Eggers 2023-01-10 195 ptp_data->caps.owner = THIS_MODULE;
eac1ea20261e1f Christian Eggers 2023-01-10 196 snprintf(ptp_data->caps.name, 16, "Microchip Clock");
eac1ea20261e1f Christian Eggers 2023-01-10 197 ptp_data->caps.max_adj = KSZ_MAX_DRIFT_CORR;
eac1ea20261e1f Christian Eggers 2023-01-10 198 ptp_data->caps.gettime64 = ksz_ptp_gettime;
eac1ea20261e1f Christian Eggers 2023-01-10 199 ptp_data->caps.settime64 = ksz_ptp_settime;
eac1ea20261e1f Christian Eggers 2023-01-10 200 ptp_data->caps.adjfine = ksz_ptp_adjfine;
eac1ea20261e1f Christian Eggers 2023-01-10 201 ptp_data->caps.adjtime = ksz_ptp_adjtime;
eac1ea20261e1f Christian Eggers 2023-01-10 202
eac1ea20261e1f Christian Eggers 2023-01-10 203 ret = ksz_ptp_start_clock(dev);
eac1ea20261e1f Christian Eggers 2023-01-10 204 if (ret)
eac1ea20261e1f Christian Eggers 2023-01-10 205 return ret;
eac1ea20261e1f Christian Eggers 2023-01-10 206
eac1ea20261e1f Christian Eggers 2023-01-10 207 /* Currently only P2P mode is supported. When 802_1AS bit is set, it
eac1ea20261e1f Christian Eggers 2023-01-10 208 * forwards all PTP packets to host port and none to other ports.
eac1ea20261e1f Christian Eggers 2023-01-10 209 */
eac1ea20261e1f Christian Eggers 2023-01-10 210 ret = ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_TC_P2P | PTP_802_1AS,
eac1ea20261e1f Christian Eggers 2023-01-10 211 PTP_TC_P2P | PTP_802_1AS);
eac1ea20261e1f Christian Eggers 2023-01-10 212 if (ret)
eac1ea20261e1f Christian Eggers 2023-01-10 213 return ret;
eac1ea20261e1f Christian Eggers 2023-01-10 214
eac1ea20261e1f Christian Eggers 2023-01-10 215 ptp_data->clock = ptp_clock_register(&ptp_data->caps, dev->dev);
eac1ea20261e1f Christian Eggers 2023-01-10 216 if (IS_ERR_OR_NULL(ptp_data->clock))
eac1ea20261e1f Christian Eggers 2023-01-10 @217 return PTR_ERR(ptp_data->clock);
eac1ea20261e1f Christian Eggers 2023-01-10 218
eac1ea20261e1f Christian Eggers 2023-01-10 219 return 0;
eac1ea20261e1f Christian Eggers 2023-01-10 220 }
eac1ea20261e1f Christian Eggers 2023-01-10 221
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 3+ messages in thread
* drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR'
@ 2023-05-04 4:53 kernel test robot
0 siblings, 0 replies; 3+ messages in thread
From: kernel test robot @ 2023-05-04 4:53 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp, Dan Carpenter
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
CC: linux-kernel@vger.kernel.org
TO: Christian Eggers <ceggers@arri.de>
CC: Arun Ramadoss <arun.ramadoss@microchip.com>
CC: Vladimir Oltean <olteanv@gmail.com>
CC: Florian Fainelli <f.fainelli@gmail.com>
CC: Jacob Keller <jacob.e.keller@intel.com>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: fa31fc82fb775445c176e576304c4098222f47f2
commit: eac1ea20261e1fac8ffbfb3b7da2d5e6b7c159e3 net: dsa: microchip: ptp: add the posix clock support
date: 4 months ago
:::::: branch date: 10 hours ago
:::::: commit date: 4 months ago
config: openrisc-randconfig-m031-20230430 (https://download.01.org/0day-ci/archive/20230504/202305041244.tDo9luPw-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Link: https://lore.kernel.org/r/202305041244.tDo9luPw-lkp@intel.com/
smatch warnings:
drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR'
vim +/PTR_ERR +217 drivers/net/dsa/microchip/ksz_ptp.c
eac1ea20261e1f Christian Eggers 2023-01-10 185
eac1ea20261e1f Christian Eggers 2023-01-10 186 int ksz_ptp_clock_register(struct dsa_switch *ds)
eac1ea20261e1f Christian Eggers 2023-01-10 187 {
eac1ea20261e1f Christian Eggers 2023-01-10 188 struct ksz_device *dev = ds->priv;
eac1ea20261e1f Christian Eggers 2023-01-10 189 struct ksz_ptp_data *ptp_data;
eac1ea20261e1f Christian Eggers 2023-01-10 190 int ret;
eac1ea20261e1f Christian Eggers 2023-01-10 191
eac1ea20261e1f Christian Eggers 2023-01-10 192 ptp_data = &dev->ptp_data;
eac1ea20261e1f Christian Eggers 2023-01-10 193 mutex_init(&ptp_data->lock);
eac1ea20261e1f Christian Eggers 2023-01-10 194
eac1ea20261e1f Christian Eggers 2023-01-10 195 ptp_data->caps.owner = THIS_MODULE;
eac1ea20261e1f Christian Eggers 2023-01-10 196 snprintf(ptp_data->caps.name, 16, "Microchip Clock");
eac1ea20261e1f Christian Eggers 2023-01-10 197 ptp_data->caps.max_adj = KSZ_MAX_DRIFT_CORR;
eac1ea20261e1f Christian Eggers 2023-01-10 198 ptp_data->caps.gettime64 = ksz_ptp_gettime;
eac1ea20261e1f Christian Eggers 2023-01-10 199 ptp_data->caps.settime64 = ksz_ptp_settime;
eac1ea20261e1f Christian Eggers 2023-01-10 200 ptp_data->caps.adjfine = ksz_ptp_adjfine;
eac1ea20261e1f Christian Eggers 2023-01-10 201 ptp_data->caps.adjtime = ksz_ptp_adjtime;
eac1ea20261e1f Christian Eggers 2023-01-10 202
eac1ea20261e1f Christian Eggers 2023-01-10 203 ret = ksz_ptp_start_clock(dev);
eac1ea20261e1f Christian Eggers 2023-01-10 204 if (ret)
eac1ea20261e1f Christian Eggers 2023-01-10 205 return ret;
eac1ea20261e1f Christian Eggers 2023-01-10 206
eac1ea20261e1f Christian Eggers 2023-01-10 207 /* Currently only P2P mode is supported. When 802_1AS bit is set, it
eac1ea20261e1f Christian Eggers 2023-01-10 208 * forwards all PTP packets to host port and none to other ports.
eac1ea20261e1f Christian Eggers 2023-01-10 209 */
eac1ea20261e1f Christian Eggers 2023-01-10 210 ret = ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_TC_P2P | PTP_802_1AS,
eac1ea20261e1f Christian Eggers 2023-01-10 211 PTP_TC_P2P | PTP_802_1AS);
eac1ea20261e1f Christian Eggers 2023-01-10 212 if (ret)
eac1ea20261e1f Christian Eggers 2023-01-10 213 return ret;
eac1ea20261e1f Christian Eggers 2023-01-10 214
eac1ea20261e1f Christian Eggers 2023-01-10 215 ptp_data->clock = ptp_clock_register(&ptp_data->caps, dev->dev);
eac1ea20261e1f Christian Eggers 2023-01-10 216 if (IS_ERR_OR_NULL(ptp_data->clock))
eac1ea20261e1f Christian Eggers 2023-01-10 @217 return PTR_ERR(ptp_data->clock);
eac1ea20261e1f Christian Eggers 2023-01-10 218
eac1ea20261e1f Christian Eggers 2023-01-10 219 return 0;
eac1ea20261e1f Christian Eggers 2023-01-10 220 }
eac1ea20261e1f Christian Eggers 2023-01-10 221
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 3+ messages in thread
* drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR'
@ 2023-05-04 6:48 Dan Carpenter
0 siblings, 0 replies; 3+ messages in thread
From: Dan Carpenter @ 2023-05-04 6:48 UTC (permalink / raw)
To: oe-kbuild, Christian Eggers
Cc: lkp, oe-kbuild-all, linux-kernel, Arun Ramadoss, Vladimir Oltean,
Florian Fainelli, Jacob Keller
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: fa31fc82fb775445c176e576304c4098222f47f2
commit: eac1ea20261e1fac8ffbfb3b7da2d5e6b7c159e3 net: dsa: microchip: ptp: add the posix clock support
config: openrisc-randconfig-m031-20230430 (https://download.01.org/0day-ci/archive/20230504/202305041244.tDo9luPw-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>
| Link: https://lore.kernel.org/r/202305041244.tDo9luPw-lkp@intel.com/
smatch warnings:
drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR'
vim +/PTR_ERR +217 drivers/net/dsa/microchip/ksz_ptp.c
eac1ea20261e1f Christian Eggers 2023-01-10 186 int ksz_ptp_clock_register(struct dsa_switch *ds)
eac1ea20261e1f Christian Eggers 2023-01-10 187 {
eac1ea20261e1f Christian Eggers 2023-01-10 188 struct ksz_device *dev = ds->priv;
eac1ea20261e1f Christian Eggers 2023-01-10 189 struct ksz_ptp_data *ptp_data;
eac1ea20261e1f Christian Eggers 2023-01-10 190 int ret;
eac1ea20261e1f Christian Eggers 2023-01-10 191
eac1ea20261e1f Christian Eggers 2023-01-10 192 ptp_data = &dev->ptp_data;
eac1ea20261e1f Christian Eggers 2023-01-10 193 mutex_init(&ptp_data->lock);
eac1ea20261e1f Christian Eggers 2023-01-10 194
eac1ea20261e1f Christian Eggers 2023-01-10 195 ptp_data->caps.owner = THIS_MODULE;
eac1ea20261e1f Christian Eggers 2023-01-10 196 snprintf(ptp_data->caps.name, 16, "Microchip Clock");
eac1ea20261e1f Christian Eggers 2023-01-10 197 ptp_data->caps.max_adj = KSZ_MAX_DRIFT_CORR;
eac1ea20261e1f Christian Eggers 2023-01-10 198 ptp_data->caps.gettime64 = ksz_ptp_gettime;
eac1ea20261e1f Christian Eggers 2023-01-10 199 ptp_data->caps.settime64 = ksz_ptp_settime;
eac1ea20261e1f Christian Eggers 2023-01-10 200 ptp_data->caps.adjfine = ksz_ptp_adjfine;
eac1ea20261e1f Christian Eggers 2023-01-10 201 ptp_data->caps.adjtime = ksz_ptp_adjtime;
eac1ea20261e1f Christian Eggers 2023-01-10 202
eac1ea20261e1f Christian Eggers 2023-01-10 203 ret = ksz_ptp_start_clock(dev);
eac1ea20261e1f Christian Eggers 2023-01-10 204 if (ret)
eac1ea20261e1f Christian Eggers 2023-01-10 205 return ret;
eac1ea20261e1f Christian Eggers 2023-01-10 206
eac1ea20261e1f Christian Eggers 2023-01-10 207 /* Currently only P2P mode is supported. When 802_1AS bit is set, it
eac1ea20261e1f Christian Eggers 2023-01-10 208 * forwards all PTP packets to host port and none to other ports.
eac1ea20261e1f Christian Eggers 2023-01-10 209 */
eac1ea20261e1f Christian Eggers 2023-01-10 210 ret = ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_TC_P2P | PTP_802_1AS,
eac1ea20261e1f Christian Eggers 2023-01-10 211 PTP_TC_P2P | PTP_802_1AS);
eac1ea20261e1f Christian Eggers 2023-01-10 212 if (ret)
eac1ea20261e1f Christian Eggers 2023-01-10 213 return ret;
eac1ea20261e1f Christian Eggers 2023-01-10 214
eac1ea20261e1f Christian Eggers 2023-01-10 215 ptp_data->clock = ptp_clock_register(&ptp_data->caps, dev->dev);
eac1ea20261e1f Christian Eggers 2023-01-10 216 if (IS_ERR_OR_NULL(ptp_data->clock))
eac1ea20261e1f Christian Eggers 2023-01-10 @217 return PTR_ERR(ptp_data->clock);
PTR_ERR(NULL) is success.
This code suggests that ptp_clock_register() is required. If it is
required then it should be enforced by the .config instead of leaving
the user with a module that can never be probed.
However, if it's not absolutely required and the user is allowed to
disable it in their .config then the way to write it is:
ptp_data->clock = ptp_clock_register(&ptp_data->caps, dev->dev);
if (IS_ERR(ptp_data->clock))
return PTR_ERR(ptp_data->clock);
Just add NULL checks before every ptp_data->clock dereference inside the
driver. (All the clock functions will be no-ops at that point so don't
worry about them).
See my blog for more info:
https://staticthinking.wordpress.com/2022/08/01/mixing-error-pointers-and-null/
eac1ea20261e1f Christian Eggers 2023-01-10 218
eac1ea20261e1f Christian Eggers 2023-01-10 219 return 0;
eac1ea20261e1f Christian Eggers 2023-01-10 220 }
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-05-04 6:49 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2023-05-04 4:53 drivers/net/dsa/microchip/ksz_ptp.c:217 ksz_ptp_clock_register() warn: passing zero to 'PTR_ERR' kernel test robot
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2023-05-04 6:48 Dan Carpenter
2023-04-30 19:17 kernel test robot
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