From: Alejandro Vallejo <alejandro.vallejo@cloud.com>
To: Xen-devel <xen-devel@lists.xenproject.org>
Cc: "Alejandro Vallejo" <alejandro.vallejo@cloud.com>,
"Jan Beulich" <jbeulich@suse.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>
Subject: [PATCH 3/3] x86: Use CpuidUserDis if an AMD HVM guest toggles CPUID faulting
Date: Fri, 5 May 2023 18:57:05 +0100 [thread overview]
Message-ID: <20230505175705.18098-4-alejandro.vallejo@cloud.com> (raw)
In-Reply-To: <20230505175705.18098-1-alejandro.vallejo@cloud.com>
This is in order to aid guests of AMD hardware that we have exposed
CPUID faulting to. If they try to modify the Intel MSR that enables
the feature, trigger levelling so AMD's version of it (CpuidUserDis)
is used instead.
Signed-off-by: Alejandro Vallejo <alejandro.vallejo@cloud.com>
---
xen/arch/x86/msr.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index ecf126566d..984aedf180 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -431,6 +431,13 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
{
bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting;
+ /*
+ * The boot CPU must support Intel's CPUID faulting _or_
+ * AMD's CpuidUserDis.
+ */
+ bool can_fault_cpuid = cpu_has_cpuid_faulting ||
+ boot_cpu_has(X86_FEATURE_CPUID_USER_DIS);
+
rsvd = ~0ull;
if ( cp->platform_info.cpuid_faulting )
rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING;
@@ -440,7 +447,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
msrs->misc_features_enables.raw = val;
- if ( v == curr && is_hvm_domain(d) && cpu_has_cpuid_faulting &&
+ if ( v == curr && is_hvm_domain(d) && can_fault_cpuid &&
(old_cpuid_faulting ^ msrs->misc_features_enables.cpuid_faulting) )
ctxt_switch_levelling(v);
break;
--
2.34.1
next prev parent reply other threads:[~2023-05-05 17:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 17:57 [PATCH 0/3] Add CpuidUserDis support Alejandro Vallejo
2023-05-05 17:57 ` [PATCH 1/3] x86: Add AMD's CpuidUserDis bit definitions Alejandro Vallejo
2023-05-05 17:57 ` [PATCH 2/3] x86: Add support for CpuidUserDis Alejandro Vallejo
2023-05-08 9:17 ` Jan Beulich
2023-05-05 17:57 ` Alejandro Vallejo [this message]
2023-05-08 13:18 ` [PATCH 3/3] x86: Use CpuidUserDis if an AMD HVM guest toggles CPUID faulting Jan Beulich
2023-05-09 10:05 ` Andrew Cooper
2023-05-09 14:41 ` Jan Beulich
2023-05-09 14:57 ` Alejandro Vallejo
2023-05-10 8:15 ` Jan Beulich
2023-05-10 10:52 ` Alejandro Vallejo
2023-05-10 13:17 ` Jan Beulich
2023-05-08 9:06 ` [PATCH 0/3] Add CpuidUserDis support Jan Beulich
2023-05-10 11:28 ` Alejandro Vallejo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230505175705.18098-4-alejandro.vallejo@cloud.com \
--to=alejandro.vallejo@cloud.com \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=roger.pau@citrix.com \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.