From: Alejandro Vallejo <alejandro.vallejo@cloud.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
Xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH 3/3] x86: Use CpuidUserDis if an AMD HVM guest toggles CPUID faulting
Date: Tue, 9 May 2023 15:57:17 +0100 [thread overview]
Message-ID: <645a5f50.df0a0220.9d880.f133@mx.google.com> (raw)
In-Reply-To: <b8e8132e-0cd7-8d1e-308a-afb1963d6b2a@suse.com>
On Tue, May 09, 2023 at 04:41:49PM +0200, Jan Beulich wrote:
> > I asked Alejandro to do it like this.
> >
> > Advertising this to guests requires plumbing another MSR into the
> > infrastructure which isn't quite set up properly let, and is in flux
> > from my work.
> >
> > For now, this just lets Xen enforce the policy over PV guests, which is
> > an improvement in and of itself.
>
> But as per the title this patch is about HVM guests (aiui the PV aspect
> is taken care of already without the patch here). In any event - if the
> omissions are intentional (for the time being), then I think that wants
> mentioning in the description.
>
> Jan
HVM guests are always exposed the Intel interface (emulated if not natively
available). The HVM max policy forces it on, and I don't see anything in
the default policy overriding it. My attempt here was to let AMD guests use
the emulated Intel MSR and trigger levellling that would itself rely on
AMD's CpuidUserDis without guest intervention. That said, several cans of
worms exist in mantaining this internal routing. I'll get rid of that last
patch and leave HVM guests alone for the time being. They are functionally
correct (albeit their CPUID take 2 faults, whereas 1 would suffice).
Alejandro
next prev parent reply other threads:[~2023-05-09 14:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 17:57 [PATCH 0/3] Add CpuidUserDis support Alejandro Vallejo
2023-05-05 17:57 ` [PATCH 1/3] x86: Add AMD's CpuidUserDis bit definitions Alejandro Vallejo
2023-05-05 17:57 ` [PATCH 2/3] x86: Add support for CpuidUserDis Alejandro Vallejo
2023-05-08 9:17 ` Jan Beulich
2023-05-05 17:57 ` [PATCH 3/3] x86: Use CpuidUserDis if an AMD HVM guest toggles CPUID faulting Alejandro Vallejo
2023-05-08 13:18 ` Jan Beulich
2023-05-09 10:05 ` Andrew Cooper
2023-05-09 14:41 ` Jan Beulich
2023-05-09 14:57 ` Alejandro Vallejo [this message]
2023-05-10 8:15 ` Jan Beulich
2023-05-10 10:52 ` Alejandro Vallejo
2023-05-10 13:17 ` Jan Beulich
2023-05-08 9:06 ` [PATCH 0/3] Add CpuidUserDis support Jan Beulich
2023-05-10 11:28 ` Alejandro Vallejo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=645a5f50.df0a0220.9d880.f133@mx.google.com \
--to=alejandro.vallejo@cloud.com \
--cc=andrew.cooper3@citrix.com \
--cc=jbeulich@suse.com \
--cc=roger.pau@citrix.com \
--cc=wl@xen.org \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.