From: Andre Przywara <andre.przywara@arm.com>
To: Maksim Kiselev <bigunclemax@gmail.com>
Cc: Icenowy Zheng <icenowy@aosc.io>, Mark Brown <broonie@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>,
Maxime Ripard <mripard@kernel.org>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 6/6] riscv: dts: allwinner: d1: Add SPI0 controller node
Date: Sat, 6 May 2023 22:59:42 +0100 [thread overview]
Message-ID: <20230506225942.017a968f@slackpad.lan> (raw)
In-Reply-To: <20230506073018.1411583-7-bigunclemax@gmail.com>
On Sat, 6 May 2023 10:30:14 +0300
Maksim Kiselev <bigunclemax@gmail.com> wrote:
Hi,
> Some boards form the MangoPi family (MQ\MQ-Dual\MQ-R) may have
> an optional SPI flash that connects to the SPI0 controller.
>
> This controller is the same for R329/D1/R528/T113s SoCs and
> should be supported by the sun50i-r329-spi driver.
>
> So let's add its DT node.
>
> Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
> ---
> .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index 922e8e0e2c09..a52999240a8e 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -108,6 +108,12 @@ rmii_pe_pins: rmii-pe-pins {
> function = "emac";
> };
>
> + /omit-if-no-ref/
> + spi0_pins: spi0-pins {
> + pins = "PC2", "PC3", "PC4", "PC5";
> + function = "spi0";
> + };
> +
> /omit-if-no-ref/
> uart1_pg6_pins: uart1-pg6-pins {
> pins = "PG6", "PG7";
> @@ -447,6 +453,21 @@ mmc2: mmc@4022000 {
> #size-cells = <0>;
> };
>
> + spi0: spi@4025000 {
> + compatible = "allwinner,sun20i-d1-spi",
> + "allwinner,sun50i-r329-spi";
> + reg = <0x04025000 0x300>;
The manual (and the other DTs) use 4K, so please use that here as well.
> + interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> + clock-names = "ahb", "mod";
> + dmas = <&dma 22>, <&dma 22>;
> + dma-names = "rx", "tx";
> + resets = <&ccu RST_BUS_SPI0>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
I think we should add the second SPI controller here as well, using
that DBI fallback compatible string.
Above looks correct when compared to the manual.
Thanks,
Andre
> +
> usb_otg: usb@4100000 {
> compatible = "allwinner,sun20i-d1-musb",
> "allwinner,sun8i-a33-musb";
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Maksim Kiselev <bigunclemax@gmail.com>
Cc: Icenowy Zheng <icenowy@aosc.io>, Mark Brown <broonie@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>,
Maxime Ripard <mripard@kernel.org>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 6/6] riscv: dts: allwinner: d1: Add SPI0 controller node
Date: Sat, 6 May 2023 22:59:42 +0100 [thread overview]
Message-ID: <20230506225942.017a968f@slackpad.lan> (raw)
In-Reply-To: <20230506073018.1411583-7-bigunclemax@gmail.com>
On Sat, 6 May 2023 10:30:14 +0300
Maksim Kiselev <bigunclemax@gmail.com> wrote:
Hi,
> Some boards form the MangoPi family (MQ\MQ-Dual\MQ-R) may have
> an optional SPI flash that connects to the SPI0 controller.
>
> This controller is the same for R329/D1/R528/T113s SoCs and
> should be supported by the sun50i-r329-spi driver.
>
> So let's add its DT node.
>
> Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
> ---
> .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index 922e8e0e2c09..a52999240a8e 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -108,6 +108,12 @@ rmii_pe_pins: rmii-pe-pins {
> function = "emac";
> };
>
> + /omit-if-no-ref/
> + spi0_pins: spi0-pins {
> + pins = "PC2", "PC3", "PC4", "PC5";
> + function = "spi0";
> + };
> +
> /omit-if-no-ref/
> uart1_pg6_pins: uart1-pg6-pins {
> pins = "PG6", "PG7";
> @@ -447,6 +453,21 @@ mmc2: mmc@4022000 {
> #size-cells = <0>;
> };
>
> + spi0: spi@4025000 {
> + compatible = "allwinner,sun20i-d1-spi",
> + "allwinner,sun50i-r329-spi";
> + reg = <0x04025000 0x300>;
The manual (and the other DTs) use 4K, so please use that here as well.
> + interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> + clock-names = "ahb", "mod";
> + dmas = <&dma 22>, <&dma 22>;
> + dma-names = "rx", "tx";
> + resets = <&ccu RST_BUS_SPI0>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
I think we should add the second SPI controller here as well, using
that DBI fallback compatible string.
Above looks correct when compared to the manual.
Thanks,
Andre
> +
> usb_otg: usb@4100000 {
> compatible = "allwinner,sun20i-d1-musb",
> "allwinner,sun8i-a33-musb";
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Maksim Kiselev <bigunclemax@gmail.com>
Cc: Icenowy Zheng <icenowy@aosc.io>, Mark Brown <broonie@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>,
Maxime Ripard <mripard@kernel.org>,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 6/6] riscv: dts: allwinner: d1: Add SPI0 controller node
Date: Sat, 6 May 2023 22:59:42 +0100 [thread overview]
Message-ID: <20230506225942.017a968f@slackpad.lan> (raw)
In-Reply-To: <20230506073018.1411583-7-bigunclemax@gmail.com>
On Sat, 6 May 2023 10:30:14 +0300
Maksim Kiselev <bigunclemax@gmail.com> wrote:
Hi,
> Some boards form the MangoPi family (MQ\MQ-Dual\MQ-R) may have
> an optional SPI flash that connects to the SPI0 controller.
>
> This controller is the same for R329/D1/R528/T113s SoCs and
> should be supported by the sun50i-r329-spi driver.
>
> So let's add its DT node.
>
> Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
> ---
> .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index 922e8e0e2c09..a52999240a8e 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -108,6 +108,12 @@ rmii_pe_pins: rmii-pe-pins {
> function = "emac";
> };
>
> + /omit-if-no-ref/
> + spi0_pins: spi0-pins {
> + pins = "PC2", "PC3", "PC4", "PC5";
> + function = "spi0";
> + };
> +
> /omit-if-no-ref/
> uart1_pg6_pins: uart1-pg6-pins {
> pins = "PG6", "PG7";
> @@ -447,6 +453,21 @@ mmc2: mmc@4022000 {
> #size-cells = <0>;
> };
>
> + spi0: spi@4025000 {
> + compatible = "allwinner,sun20i-d1-spi",
> + "allwinner,sun50i-r329-spi";
> + reg = <0x04025000 0x300>;
The manual (and the other DTs) use 4K, so please use that here as well.
> + interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> + clock-names = "ahb", "mod";
> + dmas = <&dma 22>, <&dma 22>;
> + dma-names = "rx", "tx";
> + resets = <&ccu RST_BUS_SPI0>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
I think we should add the second SPI controller here as well, using
that DBI fallback compatible string.
Above looks correct when compared to the manual.
Thanks,
Andre
> +
> usb_otg: usb@4100000 {
> compatible = "allwinner,sun20i-d1-musb",
> "allwinner,sun8i-a33-musb";
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-05-06 22:00 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-06 7:30 [PATCH v2 0/6] Allwinner R329/D1/R528/T113s SPI support Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` [PATCH v2 1/6] dt-bindings: spi: sun6i: add DT bindings for Allwinner R329 SPI Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 10:45 ` Conor Dooley
2023-05-06 10:45 ` Conor Dooley
2023-05-06 10:45 ` Conor Dooley
2023-05-06 10:53 ` Krzysztof Kozlowski
2023-05-06 10:53 ` Krzysztof Kozlowski
2023-05-06 10:53 ` Krzysztof Kozlowski
2023-05-06 12:59 ` Maxim Kiselev
2023-05-06 12:59 ` Maxim Kiselev
2023-05-06 12:59 ` Maxim Kiselev
2023-05-07 7:42 ` Krzysztof Kozlowski
2023-05-07 7:42 ` Krzysztof Kozlowski
2023-05-07 7:42 ` Krzysztof Kozlowski
2023-05-06 21:58 ` Andre Przywara
2023-05-06 21:58 ` Andre Przywara
2023-05-06 21:58 ` Andre Przywara
2023-05-06 7:30 ` [PATCH v2 2/6] spi: sun6i: change OF match data to a struct Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 21:58 ` Andre Przywara
2023-05-06 21:58 ` Andre Przywara
2023-05-06 21:58 ` Andre Przywara
2023-05-06 7:30 ` [PATCH v2 3/6] spi: sun6i: add quirk for in-controller clock divider Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 21:58 ` Andre Przywara
2023-05-06 21:58 ` Andre Przywara
2023-05-06 21:58 ` Andre Przywara
2023-05-06 23:34 ` Maxim Kiselev
2023-05-06 23:34 ` Maxim Kiselev
2023-05-06 23:34 ` Maxim Kiselev
2023-05-06 7:30 ` [PATCH v2 4/6] spi: sun6i: add support for R329 SPI controllers Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 21:59 ` Andre Przywara
2023-05-06 21:59 ` Andre Przywara
2023-05-06 21:59 ` Andre Przywara
2023-05-06 7:30 ` [PATCH v2 5/6] dt-bindings: spi: sun6i: add DT bindings for Allwinner D1/R528/T113s SPI Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 10:49 ` Conor Dooley
2023-05-06 10:49 ` Conor Dooley
2023-05-06 10:49 ` Conor Dooley
2023-05-06 21:59 ` Andre Przywara
2023-05-06 21:59 ` Andre Przywara
2023-05-06 21:59 ` Andre Przywara
2023-05-06 7:30 ` [PATCH v2 6/6] riscv: dts: allwinner: d1: Add SPI0 controller node Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 7:30 ` Maksim Kiselev
2023-05-06 10:46 ` Conor Dooley
2023-05-06 10:46 ` Conor Dooley
2023-05-06 10:46 ` Conor Dooley
2023-05-06 21:59 ` Andre Przywara [this message]
2023-05-06 21:59 ` Andre Przywara
2023-05-06 21:59 ` Andre Przywara
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