From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>, intel-xe@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/5] drm/i915/display: Move display device info to header under display/
Date: Wed, 17 May 2023 20:18:00 -0700 [thread overview]
Message-ID: <20230518031804.3133486-2-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20230518031804.3133486-1-matthew.d.roper@intel.com>
Moving display-specific substruture definitions will help keep display
more self-contained and make it easier to re-use in other drivers (i.e.,
Xe) in the future.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
.../drm/i915/display/intel_display_device.h | 60 +++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 49 +--------------
2 files changed, 62 insertions(+), 47 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_display_device.h
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
new file mode 100644
index 000000000000..c689d582dbf1
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_DEVICE_H__
+#define __INTEL_DISPLAY_DEVICE_H__
+
+#include <linux/types.h>
+
+#include "display/intel_display_limits.h"
+
+#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
+ /* Keep in alphabetical order */ \
+ func(cursor_needs_physical); \
+ func(has_cdclk_crawl); \
+ func(has_cdclk_squash); \
+ func(has_ddi); \
+ func(has_dp_mst); \
+ func(has_dsb); \
+ func(has_fpga_dbg); \
+ func(has_gmch); \
+ func(has_hotplug); \
+ func(has_hti); \
+ func(has_ipc); \
+ func(has_overlay); \
+ func(has_psr); \
+ func(has_psr_hw_tracking); \
+ func(overlay_needs_physical); \
+ func(supports_tv);
+
+struct intel_display_device_info {
+ u8 abox_mask;
+
+ struct {
+ u16 size; /* in blocks */
+ u8 slice_mask;
+ } dbuf;
+
+#define DEFINE_FLAG(name) u8 name:1
+ DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
+#undef DEFINE_FLAG
+
+ /* Global register offset for the display engine */
+ u32 mmio_offset;
+
+ /* Register offsets for the various display pipes and transcoders */
+ u32 pipe_offsets[I915_MAX_TRANSCODERS];
+ u32 trans_offsets[I915_MAX_TRANSCODERS];
+ u32 cursor_offsets[I915_MAX_PIPES];
+
+ struct {
+ u32 degamma_lut_size;
+ u32 gamma_lut_size;
+ u32 degamma_lut_tests;
+ u32 gamma_lut_tests;
+ } color;
+};
+
+#endif
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 959a4080840c..96f6bdb04b1b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -29,7 +29,7 @@
#include "intel_step.h"
-#include "display/intel_display_limits.h"
+#include "display/intel_display_device.h"
#include "gt/intel_engine_types.h"
#include "gt/intel_context_types.h"
@@ -182,25 +182,6 @@ enum intel_ppgtt_type {
func(unfenced_needs_alignment); \
func(hws_needs_physical);
-#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
- /* Keep in alphabetical order */ \
- func(cursor_needs_physical); \
- func(has_cdclk_crawl); \
- func(has_cdclk_squash); \
- func(has_ddi); \
- func(has_dp_mst); \
- func(has_dsb); \
- func(has_fpga_dbg); \
- func(has_gmch); \
- func(has_hotplug); \
- func(has_hti); \
- func(has_ipc); \
- func(has_overlay); \
- func(has_psr); \
- func(has_psr_hw_tracking); \
- func(overlay_needs_physical); \
- func(supports_tv);
-
struct intel_ip_version {
u8 ver;
u8 rel;
@@ -278,33 +259,7 @@ struct intel_device_info {
DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
#undef DEFINE_FLAG
- struct {
- u8 abox_mask;
-
- struct {
- u16 size; /* in blocks */
- u8 slice_mask;
- } dbuf;
-
-#define DEFINE_FLAG(name) u8 name:1
- DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
-#undef DEFINE_FLAG
-
- /* Global register offset for the display engine */
- u32 mmio_offset;
-
- /* Register offsets for the various display pipes and transcoders */
- u32 pipe_offsets[I915_MAX_TRANSCODERS];
- u32 trans_offsets[I915_MAX_TRANSCODERS];
- u32 cursor_offsets[I915_MAX_PIPES];
-
- struct {
- u32 degamma_lut_size;
- u32 gamma_lut_size;
- u32 degamma_lut_tests;
- u32 gamma_lut_tests;
- } color;
- } display;
+ struct intel_display_device_info display;
/*
* Initial runtime info. Do not access outside of i915_driver_create().
--
2.40.0
WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>, intel-xe@lists.freedesktop.org
Subject: [Intel-xe] [PATCH 1/5] drm/i915/display: Move display device info to header under display/
Date: Wed, 17 May 2023 20:18:00 -0700 [thread overview]
Message-ID: <20230518031804.3133486-2-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20230518031804.3133486-1-matthew.d.roper@intel.com>
Moving display-specific substruture definitions will help keep display
more self-contained and make it easier to re-use in other drivers (i.e.,
Xe) in the future.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
.../drm/i915/display/intel_display_device.h | 60 +++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 49 +--------------
2 files changed, 62 insertions(+), 47 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_display_device.h
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
new file mode 100644
index 000000000000..c689d582dbf1
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_DEVICE_H__
+#define __INTEL_DISPLAY_DEVICE_H__
+
+#include <linux/types.h>
+
+#include "display/intel_display_limits.h"
+
+#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
+ /* Keep in alphabetical order */ \
+ func(cursor_needs_physical); \
+ func(has_cdclk_crawl); \
+ func(has_cdclk_squash); \
+ func(has_ddi); \
+ func(has_dp_mst); \
+ func(has_dsb); \
+ func(has_fpga_dbg); \
+ func(has_gmch); \
+ func(has_hotplug); \
+ func(has_hti); \
+ func(has_ipc); \
+ func(has_overlay); \
+ func(has_psr); \
+ func(has_psr_hw_tracking); \
+ func(overlay_needs_physical); \
+ func(supports_tv);
+
+struct intel_display_device_info {
+ u8 abox_mask;
+
+ struct {
+ u16 size; /* in blocks */
+ u8 slice_mask;
+ } dbuf;
+
+#define DEFINE_FLAG(name) u8 name:1
+ DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
+#undef DEFINE_FLAG
+
+ /* Global register offset for the display engine */
+ u32 mmio_offset;
+
+ /* Register offsets for the various display pipes and transcoders */
+ u32 pipe_offsets[I915_MAX_TRANSCODERS];
+ u32 trans_offsets[I915_MAX_TRANSCODERS];
+ u32 cursor_offsets[I915_MAX_PIPES];
+
+ struct {
+ u32 degamma_lut_size;
+ u32 gamma_lut_size;
+ u32 degamma_lut_tests;
+ u32 gamma_lut_tests;
+ } color;
+};
+
+#endif
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 959a4080840c..96f6bdb04b1b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -29,7 +29,7 @@
#include "intel_step.h"
-#include "display/intel_display_limits.h"
+#include "display/intel_display_device.h"
#include "gt/intel_engine_types.h"
#include "gt/intel_context_types.h"
@@ -182,25 +182,6 @@ enum intel_ppgtt_type {
func(unfenced_needs_alignment); \
func(hws_needs_physical);
-#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
- /* Keep in alphabetical order */ \
- func(cursor_needs_physical); \
- func(has_cdclk_crawl); \
- func(has_cdclk_squash); \
- func(has_ddi); \
- func(has_dp_mst); \
- func(has_dsb); \
- func(has_fpga_dbg); \
- func(has_gmch); \
- func(has_hotplug); \
- func(has_hti); \
- func(has_ipc); \
- func(has_overlay); \
- func(has_psr); \
- func(has_psr_hw_tracking); \
- func(overlay_needs_physical); \
- func(supports_tv);
-
struct intel_ip_version {
u8 ver;
u8 rel;
@@ -278,33 +259,7 @@ struct intel_device_info {
DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
#undef DEFINE_FLAG
- struct {
- u8 abox_mask;
-
- struct {
- u16 size; /* in blocks */
- u8 slice_mask;
- } dbuf;
-
-#define DEFINE_FLAG(name) u8 name:1
- DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
-#undef DEFINE_FLAG
-
- /* Global register offset for the display engine */
- u32 mmio_offset;
-
- /* Register offsets for the various display pipes and transcoders */
- u32 pipe_offsets[I915_MAX_TRANSCODERS];
- u32 trans_offsets[I915_MAX_TRANSCODERS];
- u32 cursor_offsets[I915_MAX_PIPES];
-
- struct {
- u32 degamma_lut_size;
- u32 gamma_lut_size;
- u32 degamma_lut_tests;
- u32 gamma_lut_tests;
- } color;
- } display;
+ struct intel_display_device_info display;
/*
* Initial runtime info. Do not access outside of i915_driver_create().
--
2.40.0
next prev parent reply other threads:[~2023-05-18 3:18 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 3:17 [Intel-gfx] [PATCH 0/5] i915: Move display identification/probing under display/ Matt Roper
2023-05-18 3:17 ` [Intel-xe] " Matt Roper
2023-05-18 3:18 ` Matt Roper [this message]
2023-05-18 3:18 ` [Intel-xe] [PATCH 1/5] drm/i915/display: Move display device info to header " Matt Roper
2023-05-18 5:19 ` [Intel-gfx] " Lucas De Marchi
2023-05-18 5:19 ` Lucas De Marchi
2023-05-18 6:18 ` [Intel-gfx] " Andrzej Hajda
2023-05-18 6:18 ` [Intel-xe] " Andrzej Hajda
2023-05-18 3:18 ` [Intel-gfx] [PATCH 2/5] drm/i915: Convert INTEL_INFO()->display to a pointer Matt Roper
2023-05-18 3:18 ` [Intel-xe] " Matt Roper
2023-05-18 5:24 ` [Intel-gfx] " Lucas De Marchi
2023-05-18 5:24 ` Lucas De Marchi
2023-05-18 6:44 ` [Intel-gfx] " Andrzej Hajda
2023-05-18 6:44 ` [Intel-xe] " Andrzej Hajda
2023-05-18 3:18 ` [Intel-gfx] [PATCH 3/5] drm/i915/display: Move display runtime info to display structure Matt Roper
2023-05-18 3:18 ` [Intel-xe] " Matt Roper
2023-05-18 7:56 ` [Intel-gfx] " Andrzej Hajda
2023-05-18 7:56 ` [Intel-xe] " Andrzej Hajda
2023-05-22 16:41 ` Matt Roper
2023-05-22 16:41 ` [Intel-xe] " Matt Roper
2023-05-18 3:18 ` [Intel-gfx] [PATCH 4/5] drm/i915/display: Make display responsible for probing its own IP Matt Roper
2023-05-18 3:18 ` [Intel-xe] " Matt Roper
2023-05-18 10:01 ` [Intel-gfx] " Andrzej Hajda
2023-05-18 10:01 ` [Intel-xe] " Andrzej Hajda
2023-05-18 3:18 ` [Intel-gfx] [PATCH 5/5] drm/i915/display: Handle GMD_ID identification in display code Matt Roper
2023-05-18 3:18 ` [Intel-xe] " Matt Roper
2023-05-18 7:53 ` [Intel-gfx] " kernel test robot
2023-05-18 7:53 ` kernel test robot
2023-05-18 7:53 ` [Intel-xe] " kernel test robot
2023-05-18 9:28 ` kernel test robot
2023-05-18 9:28 ` kernel test robot
2023-05-18 9:28 ` [Intel-xe] " kernel test robot
2023-05-18 10:44 ` Andrzej Hajda
2023-05-18 10:44 ` [Intel-xe] " Andrzej Hajda
2023-05-22 19:10 ` Matt Roper
2023-05-22 19:10 ` [Intel-xe] " Matt Roper
2023-05-18 3:21 ` [Intel-xe] ✗ CI.Patch_applied: failure for i915: Move display identification/probing under display/ Patchwork
2023-05-18 4:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2023-05-18 4:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-18 4:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-18 15:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230518031804.3133486-2-matthew.d.roper@intel.com \
--to=matthew.d.roper@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.