From: Matt Roper <matthew.d.roper@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>, matthew.d.roper@intel.com
Subject: [Intel-xe] [PATCH v2 03/30] drm/xe: Add backpointer from gt to tile
Date: Fri, 19 May 2023 16:18:00 -0700 [thread overview]
Message-ID: <20230519231827.3572452-4-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20230519231827.3572452-1-matthew.d.roper@intel.com>
Rather than a backpointer to the xe_device, a GT should have a
backpointer to its tile (which can then be used to lookup the device if
necessary).
The gt_to_xe() helper macro (which moves from xe_gt.h to xe_gt_types.h)
can and should still be used to jump directly from an xe_gt to
xe_device.
v2:
- Fix kunit test build
- Move a couple changes to the previous patch. (Lucas)
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/xe/tests/xe_bo.c | 2 +-
drivers/gpu/drm/xe/xe_bb.c | 2 +-
drivers/gpu/drm/xe/xe_gt.h | 5 -----
drivers/gpu/drm/xe/xe_gt_printk.h | 6 +++---
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 4 ++--
drivers/gpu/drm/xe/xe_gt_types.h | 14 ++++++++++++--
drivers/gpu/drm/xe/xe_mocs.c | 14 +++++++-------
drivers/gpu/drm/xe/xe_pci.c | 2 +-
drivers/gpu/drm/xe/xe_pt.c | 2 +-
9 files changed, 28 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
index 6075f12a1962..8f3afdc6cca6 100644
--- a/drivers/gpu/drm/xe/tests/xe_bo.c
+++ b/drivers/gpu/drm/xe/tests/xe_bo.c
@@ -90,7 +90,7 @@ static int ccs_test_migrate(struct xe_gt *gt, struct xe_bo *bo,
}
/* Check last CCS value, or at least last value in page. */
- offset = xe_device_ccs_bytes(gt->xe, bo->size);
+ offset = xe_device_ccs_bytes(gt_to_xe(gt), bo->size);
offset = min_t(u32, offset, PAGE_SIZE) / sizeof(u64) - 1;
if (cpu_map[offset] != get_val) {
KUNIT_FAIL(test,
diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
index 3deb2d55f421..bf7c94b769d7 100644
--- a/drivers/gpu/drm/xe/xe_bb.c
+++ b/drivers/gpu/drm/xe/xe_bb.c
@@ -16,7 +16,7 @@
static int bb_prefetch(struct xe_gt *gt)
{
- struct xe_device *xe = gt->xe;
+ struct xe_device *xe = gt_to_xe(gt);
if (GRAPHICS_VERx100(xe) >= 1250 && !xe_gt_is_media_type(gt))
/*
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 086369f7ee6d..f4e98f499b36 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -49,11 +49,6 @@ static inline bool xe_gt_is_media_type(struct xe_gt *gt)
return gt->info.type == XE_GT_TYPE_MEDIA;
}
-#define gt_to_xe(gt__) \
- _Generic(gt__, \
- const struct xe_gt *: (const struct xe_device *)((gt__)->xe), \
- struct xe_gt *: (gt__)->xe)
-
static inline bool xe_gt_is_usm_hwe(struct xe_gt *gt, struct xe_hw_engine *hwe)
{
struct xe_device *xe = gt_to_xe(gt);
diff --git a/drivers/gpu/drm/xe/xe_gt_printk.h b/drivers/gpu/drm/xe/xe_gt_printk.h
index 0b801429cf1a..5991bcadd47e 100644
--- a/drivers/gpu/drm/xe/xe_gt_printk.h
+++ b/drivers/gpu/drm/xe/xe_gt_printk.h
@@ -11,7 +11,7 @@
#include "xe_device_types.h"
#define xe_gt_printk(_gt, _level, _fmt, ...) \
- drm_##_level(&(_gt)->xe->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
+ drm_##_level(>_to_xe(_gt)->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
#define xe_gt_err(_gt, _fmt, ...) \
xe_gt_printk((_gt), err, _fmt, ##__VA_ARGS__)
@@ -32,10 +32,10 @@
xe_gt_printk((_gt), err_ratelimited, _fmt, ##__VA_ARGS__)
#define xe_gt_WARN(_gt, _condition, _fmt, ...) \
- drm_WARN(&(_gt)->xe->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
+ drm_WARN(>_to_xe(_gt)->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
#define xe_gt_WARN_ONCE(_gt, _condition, _fmt, ...) \
- drm_WARN_ONCE(&(_gt)->xe->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
+ drm_WARN_ONCE(>_to_xe(_gt)->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
#define xe_gt_WARN_ON(_gt, _condition) \
xe_gt_WARN((_gt), _condition, "%s(%s)", "gt_WARN_ON", __stringify(_condition))
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
index c815a42e2cdb..c9e8825c02aa 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
@@ -322,8 +322,8 @@ int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
TLB_INVALIDATION_SEQNO_MAX;
if (!expected_seqno)
expected_seqno = 1;
- if (drm_WARN_ON(>->xe->drm, expected_seqno != msg[0])) {
- drm_err(>->xe->drm, "TLB expected_seqno(%d) != msg(%u)\n",
+ if (drm_WARN_ON(>_to_xe(gt)->drm, expected_seqno != msg[0])) {
+ drm_err(>_to_xe(gt)->drm, "TLB expected_seqno(%d) != msg(%u)\n",
expected_seqno, msg[0]);
}
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index cac676353ac6..2bc88696af77 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -76,6 +76,16 @@ enum xe_steering_type {
NUM_STEERING_TYPES
};
+#define gt_to_tile(gt__) \
+ _Generic(gt__, \
+ const struct xe_gt *: (const struct xe_tile *)((gt__)->tile), \
+ struct xe_gt *: (gt__)->tile)
+
+#define gt_to_xe(gt__) \
+ _Generic(gt__, \
+ const struct xe_gt *: (const struct xe_device *)(gt_to_tile(gt__)->xe), \
+ struct xe_gt *: gt_to_tile(gt__)->xe)
+
/**
* struct xe_gt - A "Graphics Technology" unit of the GPU
*
@@ -90,8 +100,8 @@ enum xe_steering_type {
* separate GTs within a tile.
*/
struct xe_gt {
- /** @xe: backpointer to XE device */
- struct xe_device *xe;
+ /** @tile: Backpointer to GT's tile */
+ struct xe_tile *tile;
/** @info: GT info */
struct {
diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
index c7a9e733ef3b..86277ecb749b 100644
--- a/drivers/gpu/drm/xe/xe_mocs.c
+++ b/drivers/gpu/drm/xe/xe_mocs.c
@@ -472,7 +472,7 @@ static void __init_mocs_table(struct xe_gt *gt,
unsigned int i;
u32 mocs;
- mocs_dbg(>->xe->drm, "entries:%d\n", info->n_entries);
+ mocs_dbg(>_to_xe(gt)->drm, "entries:%d\n", info->n_entries);
drm_WARN_ONCE(&xe->drm, !info->unused_entries_index,
"Unused entries index should have been defined\n");
for (i = 0;
@@ -480,7 +480,7 @@ static void __init_mocs_table(struct xe_gt *gt,
i++) {
struct xe_reg reg = XE_REG(addr + i * 4);
- mocs_dbg(>->xe->drm, "%d 0x%x 0x%x\n", i, reg.addr, mocs);
+ mocs_dbg(>_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, reg.addr, mocs);
xe_mmio_write32(gt, reg, mocs);
}
}
@@ -509,13 +509,13 @@ static void init_l3cc_table(struct xe_gt *gt,
unsigned int i;
u32 l3cc;
- mocs_dbg(>->xe->drm, "entries:%d\n", info->n_entries);
+ mocs_dbg(>_to_xe(gt)->drm, "entries:%d\n", info->n_entries);
for (i = 0;
i < (info->n_entries + 1) / 2 ?
(l3cc = l3cc_combine(get_entry_l3cc(info, 2 * i),
get_entry_l3cc(info, 2 * i + 1))), 1 : 0;
i++) {
- mocs_dbg(>->xe->drm, "%d 0x%x 0x%x\n", i, LNCFCMOCS(i).addr,
+ mocs_dbg(>_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, LNCFCMOCS(i).addr,
l3cc);
xe_mmio_write32(gt, LNCFCMOCS(i), l3cc);
}
@@ -525,7 +525,7 @@ void xe_mocs_init_early(struct xe_gt *gt)
{
struct xe_mocs_info table;
- get_mocs_settings(gt->xe, &table);
+ get_mocs_settings(gt_to_xe(gt), &table);
gt->mocs.uc_index = table.uc_index;
gt->mocs.wb_index = table.wb_index;
}
@@ -538,8 +538,8 @@ void xe_mocs_init(struct xe_gt *gt)
/*
* LLC and eDRAM control values are not applicable to dgfx
*/
- flags = get_mocs_settings(gt->xe, &table);
- mocs_dbg(>->xe->drm, "flag:0x%x\n", flags);
+ flags = get_mocs_settings(gt_to_xe(gt), &table);
+ mocs_dbg(>_to_xe(gt)->drm, "flag:0x%x\n", flags);
if (flags & HAS_GLOBAL_MOCS)
__init_mocs_table(gt, &table, GLOBAL_MOCS(0).addr);
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index fc7984e4b40c..1e1e401b25ae 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -556,7 +556,7 @@ static int xe_info_init(struct xe_device *xe,
gt = &tile->primary_gt;
gt->info.id = id;
- gt->xe = xe;
+ gt->tile = tile;
if (id == 0) {
gt->info.type = XE_GT_TYPE_MAIN;
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index f15282996c3b..61126cefe0b5 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -695,7 +695,7 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
* TODO: Suballocate the pt bo to avoid wasting a lot of
* memory.
*/
- if (GRAPHICS_VERx100(xe_walk->gt->xe) >= 1250 && level == 1 &&
+ if (GRAPHICS_VERx100(gt_to_xe(xe_walk->gt)) >= 1250 && level == 1 &&
covers && xe_pt_scan_64K(addr, next, xe_walk)) {
walk->shifts = xe_compact_pt_shifts;
flags |= XE_PDE_64K;
--
2.40.0
next prev parent reply other threads:[~2023-05-19 23:19 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-19 23:17 [Intel-xe] [PATCH v2 00/30] Separate GT and tile Matt Roper
2023-05-19 23:17 ` [Intel-xe] [PATCH v2 01/30] drm/xe/mtl: Disable media GT Matt Roper
2023-05-20 5:50 ` Lucas De Marchi
2023-05-19 23:17 ` [Intel-xe] [PATCH v2 02/30] drm/xe: Introduce xe_tile Matt Roper
2023-05-19 23:18 ` Matt Roper [this message]
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 04/30] drm/xe: Add for_each_tile iterator Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 05/30] drm/xe: Move register MMIO into xe_tile Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 06/30] fixup! drm/xe/display: Implement display support Matt Roper
2023-05-20 5:52 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 07/30] drm/xe: Move GGTT from GT to tile Matt Roper
2023-05-25 23:29 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 08/30] fixup! drm/xe/display: Implement display support Matt Roper
2023-05-25 23:30 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 09/30] drm/xe: Move VRAM from GT to tile Matt Roper
2023-05-26 21:11 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 10/30] fixup! drm/xe/display: Implement display support Matt Roper
2023-05-26 21:12 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 11/30] drm/xe: Memory allocations are tile-based, not GT-based Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 12/30] fixup! drm/xe/display: Implement display support Matt Roper
2023-05-26 21:14 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 13/30] drm/xe: Move migration from GT to tile Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 14/30] drm/xe: Clarify 'gt' retrieval for primary tile Matt Roper
2023-05-22 11:47 ` Das, Nirmoy
2023-05-26 21:33 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 15/30] drm/xe: Drop vram_id Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 16/30] drm/xe: Drop extra_gts[] declarations and XE_GT_TYPE_REMOTE Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 17/30] drm/xe: Allocate GT dynamically Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 18/30] drm/xe: Add media GT to tile Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 19/30] drm/xe: Move display IRQ postinstall out of GT function Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 20/30] drm/xe: Interrupts are delivered per-tile, not per-GT Matt Roper
2023-05-26 22:16 ` Lucas De Marchi
2023-05-30 6:36 ` Iddamsetty, Aravind
2023-05-30 15:58 ` Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 21/30] drm/xe/irq: Handle ASLE backlight interrupts at same time as display Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 22/30] drm/xe/irq: Ensure primary GuC won't clobber media GuC's interrupt mask Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 23/30] drm/xe/irq: Untangle postinstall functions Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 24/30] drm/xe: Replace xe_gt_irq_postinstall with xe_irq_enable_hwe Matt Roper
2023-05-26 22:20 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 25/30] drm/xe: Invalidate TLB on all affected GTs during GGTT updates Matt Roper
2023-05-22 9:02 ` Das, Nirmoy
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 26/30] drm/xe/tlb: Obtain forcewake when doing GGTT TLB invalidations Matt Roper
2023-05-22 11:47 ` Das, Nirmoy
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 27/30] drm/xe: Allow GT looping and lookup on standalone media Matt Roper
2023-05-26 22:37 ` Lucas De Marchi
2023-05-30 16:41 ` Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 28/30] drm/xe: Update query uapi to support " Matt Roper
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 29/30] drm/xe: Reinstate media GT support Matt Roper
2023-05-26 22:46 ` Lucas De Marchi
2023-05-19 23:18 ` [Intel-xe] [PATCH v2 30/30] drm/xe: Add kerneldoc description of multi-tile devices Matt Roper
2023-05-26 22:52 ` Lucas De Marchi
2023-05-27 0:22 ` Matt Roper
2023-05-19 23:23 ` [Intel-xe] ✓ CI.Patch_applied: success for Separate GT and tile (rev3) Patchwork
2023-05-19 23:26 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-05-19 23:29 ` [Intel-xe] ✓ CI.Build: " Patchwork
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