* [PATCH 1/4] arm64: dts: imx8mp: add HDMI power-domains @ 2022-08-26 19:29 ` Lucas Stach 0 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel This adds the PGC and HDMI blk-ctrl nodes providing power control for HDMI subsystem peripherals. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index fe178b7d063c..a6df80092fbd 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -577,6 +577,23 @@ pgc_mediamix: power-domain@10 { <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; }; + pgc_hdmimix: power-domains@14 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>; + clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, + <&clk IMX8MP_SYS_PLL1_133M>; + assigned-clock-rates = <500000000>, <133000000>; + }; + + pgc_hdmi_phy: power-domains@15 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HDMI_PHY>; + }; + pgc_mipi_phy2: power-domain@16 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>; @@ -1097,6 +1114,24 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { "usb-phy2", "pcie", "pcie-phy"; #power-domain-cells = <1>; }; + + hdmi_blk_ctrl: blk-ctrl@32fc0000 { + compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; + reg = <0x32fc0000 0x23c>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "axi", "ref_266m", "ref_24m"; + power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmi_phy>; + power-domain-names = "bus", "irqsteer", "lcdif", + "pai", "pvi", "trng", + "hdmi-tx", "hdmi-tx-phy"; + #power-domain-cells = <1>; + }; }; gpu3d: gpu@38000000 { -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 1/4] arm64: dts: imx8mp: add HDMI power-domains @ 2022-08-26 19:29 ` Lucas Stach 0 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel This adds the PGC and HDMI blk-ctrl nodes providing power control for HDMI subsystem peripherals. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index fe178b7d063c..a6df80092fbd 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -577,6 +577,23 @@ pgc_mediamix: power-domain@10 { <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; }; + pgc_hdmimix: power-domains@14 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>; + clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, + <&clk IMX8MP_CLK_HDMI_APB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, + <&clk IMX8MP_SYS_PLL1_133M>; + assigned-clock-rates = <500000000>, <133000000>; + }; + + pgc_hdmi_phy: power-domains@15 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_HDMI_PHY>; + }; + pgc_mipi_phy2: power-domain@16 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>; @@ -1097,6 +1114,24 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { "usb-phy2", "pcie", "pcie-phy"; #power-domain-cells = <1>; }; + + hdmi_blk_ctrl: blk-ctrl@32fc0000 { + compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; + reg = <0x32fc0000 0x23c>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "axi", "ref_266m", "ref_24m"; + power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmimix>, + <&pgc_hdmimix>, <&pgc_hdmi_phy>; + power-domain-names = "bus", "irqsteer", "lcdif", + "pai", "pvi", "trng", + "hdmi-tx", "hdmi-tx-phy"; + #power-domain-cells = <1>; + }; }; gpu3d: gpu@38000000 { -- 2.30.2 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/4] arm64: dts: imx8mp: add HDMI irqsteer 2022-08-26 19:29 ` Lucas Stach @ 2022-08-26 19:29 ` Lucas Stach -1 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel The HDMI irqsteer is a secondary interrupt controller within the HDMI subsystem that maps all HDMI peripheral IRQs into a single upstream IRQ line. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index a6df80092fbd..71c2397bf7c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1132,6 +1132,19 @@ hdmi_blk_ctrl: blk-ctrl@32fc0000 { "hdmi-tx", "hdmi-tx-phy"; #power-domain-cells = <1>; }; + + irqsteer_hdmi: interrupt-controller@32fc2000 { + compatible = "fsl,imx-irqsteer"; + reg = <0x32fc2000 0x44>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + fsl,channel = <1>; + fsl,num-irqs = <64>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>; + clock-names = "ipg"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; + }; }; gpu3d: gpu@38000000 { -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/4] arm64: dts: imx8mp: add HDMI irqsteer @ 2022-08-26 19:29 ` Lucas Stach 0 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel The HDMI irqsteer is a secondary interrupt controller within the HDMI subsystem that maps all HDMI peripheral IRQs into a single upstream IRQ line. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index a6df80092fbd..71c2397bf7c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1132,6 +1132,19 @@ hdmi_blk_ctrl: blk-ctrl@32fc0000 { "hdmi-tx", "hdmi-tx-phy"; #power-domain-cells = <1>; }; + + irqsteer_hdmi: interrupt-controller@32fc2000 { + compatible = "fsl,imx-irqsteer"; + reg = <0x32fc2000 0x44>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + fsl,channel = <1>; + fsl,num-irqs = <64>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>; + clock-names = "ipg"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; + }; }; gpu3d: gpu@38000000 { -- 2.30.2 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline 2022-08-26 19:29 ` Lucas Stach @ 2022-08-26 19:29 ` Lucas Stach -1 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel This adds the DT nodes for all the peripherals that make up the HDMI display pipeline. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 71c2397bf7c2..254d610b93b7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { clock-names = "ipg"; power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; }; + + hdmi_pvi: display-bridge@32fc4000 { + compatible = "fsl,imx8mp-hdmi-pvi"; + reg = <0x32fc4000 0x40>; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pvi_from_lcdif3: endpoint { + remote-endpoint = <&lcdif3_to_pvi>; + }; + }; + + port@1 { + reg = <1>; + pvi_to_hdmi_tx: endpoint { + remote-endpoint = <&hdmi_tx_from_pvi>; + }; + }; + }; + }; + + lcdif3: display-controller@32fc6000 { + compatible = "fsl,imx8mp-lcdif"; + reg = <0x32fc6000 0x238>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_hdmi>; + clocks = <&hdmi_tx_phy>, + <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>; + clock-names = "pix", "axi", "disp_axi"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; + status = "disabled"; + + port { + lcdif3_to_pvi: endpoint { + remote-endpoint = <&pvi_from_lcdif3>; + }; + }; + }; + + hdmi_tx: hdmi@32fd8000 { + compatible = "fsl,imx8mp-hdmi"; + reg = <0x32fd8000 0x7eff>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_hdmi>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_FDCC_TST>, + <&clk IMX8MP_CLK_32K>, + <&hdmi_tx_phy>; + clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; + reg-io-width = <1>; + status = "disabled"; + + port { + hdmi_tx_from_pvi: endpoint { + remote-endpoint = <&pvi_to_hdmi_tx>; + }; + }; + }; + + hdmi_tx_phy: phy@32fdff00 { + compatible = "fsl,imx8mp-hdmi-phy"; + reg = <0x32fdff00 0x100>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "ref"; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; }; gpu3d: gpu@38000000 { -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline @ 2022-08-26 19:29 ` Lucas Stach 0 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel This adds the DT nodes for all the peripherals that make up the HDMI display pipeline. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 71c2397bf7c2..254d610b93b7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { clock-names = "ipg"; power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; }; + + hdmi_pvi: display-bridge@32fc4000 { + compatible = "fsl,imx8mp-hdmi-pvi"; + reg = <0x32fc4000 0x40>; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pvi_from_lcdif3: endpoint { + remote-endpoint = <&lcdif3_to_pvi>; + }; + }; + + port@1 { + reg = <1>; + pvi_to_hdmi_tx: endpoint { + remote-endpoint = <&hdmi_tx_from_pvi>; + }; + }; + }; + }; + + lcdif3: display-controller@32fc6000 { + compatible = "fsl,imx8mp-lcdif"; + reg = <0x32fc6000 0x238>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_hdmi>; + clocks = <&hdmi_tx_phy>, + <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_ROOT>; + clock-names = "pix", "axi", "disp_axi"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; + status = "disabled"; + + port { + lcdif3_to_pvi: endpoint { + remote-endpoint = <&pvi_from_lcdif3>; + }; + }; + }; + + hdmi_tx: hdmi@32fd8000 { + compatible = "fsl,imx8mp-hdmi"; + reg = <0x32fd8000 0x7eff>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_hdmi>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_REF_266M>, + <&clk IMX8MP_CLK_HDMI_FDCC_TST>, + <&clk IMX8MP_CLK_32K>, + <&hdmi_tx_phy>; + clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; + reg-io-width = <1>; + status = "disabled"; + + port { + hdmi_tx_from_pvi: endpoint { + remote-endpoint = <&pvi_to_hdmi_tx>; + }; + }; + }; + + hdmi_tx_phy: phy@32fdff00 { + compatible = "fsl,imx8mp-hdmi-phy"; + reg = <0x32fdff00 0x100>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "ref"; + assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; }; gpu3d: gpu@38000000 { -- 2.30.2 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline 2022-08-26 19:29 ` Lucas Stach @ 2022-08-29 6:37 ` Alexander Stein -1 siblings, 0 replies; 24+ messages in thread From: Alexander Stein @ 2022-08-29 6:37 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, linux-arm-kernel, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Hello Lucas, thanks for that update. Am Freitag, 26. August 2022, 21:29:31 CEST schrieb Lucas Stach: > This adds the DT nodes for all the peripherals that make up the > HDMI display pipeline. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > 71c2397bf7c2..254d610b93b7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { > clock-names = "ipg"; > power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; > }; > + > + hdmi_pvi: display-bridge@32fc4000 { > + compatible = "fsl,imx8mp-hdmi- pvi"; > + reg = <0x32fc4000 0x40>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + pvi_from_lcdif3: endpoint { > + remote-endpoint = <&lcdif3_to_pvi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pvi_to_hdmi_tx: endpoint { > + remote-endpoint = <&hdmi_tx_from_pvi>; > + }; > + }; > + }; > + }; > + > + lcdif3: display-controller@32fc6000 { > + compatible = "fsl,imx8mp-lcdif"; > + reg = <0x32fc6000 0x238>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; Shouldn't this just be 'interrupts = <8>;'? The irqsteer_hdmi has #interrupt- cells = <1>; Best regards, Alexander > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&hdmi_tx_phy>, > + <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_ROOT>; > + clock-names = "pix", "axi", "disp_axi"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; > + status = "disabled"; > + > + port { > + lcdif3_to_pvi: endpoint { > + remote- endpoint = <&pvi_from_lcdif3>; > + }; > + }; > + }; > + > + hdmi_tx: hdmi@32fd8000 { > + compatible = "fsl,imx8mp-hdmi"; > + reg = <0x32fd8000 0x7eff>; > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_REF_266M>, > + <&clk IMX8MP_CLK_HDMI_FDCC_TST>, > + <&clk IMX8MP_CLK_32K>, > + <&hdmi_tx_phy>; > + clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; > + reg-io-width = <1>; > + status = "disabled"; > + > + port { > + hdmi_tx_from_pvi: endpoint { > + remote- endpoint = <&pvi_to_hdmi_tx>; > + }; > + }; > + }; > + > + hdmi_tx_phy: phy@32fdff00 { > + compatible = "fsl,imx8mp-hdmi- phy"; > + reg = <0x32fdff00 0x100>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_24M>; > + clock-names = "apb", "ref"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; > + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; > + #clock-cells = <0>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > > gpu3d: gpu@38000000 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline @ 2022-08-29 6:37 ` Alexander Stein 0 siblings, 0 replies; 24+ messages in thread From: Alexander Stein @ 2022-08-29 6:37 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, linux-arm-kernel, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Hello Lucas, thanks for that update. Am Freitag, 26. August 2022, 21:29:31 CEST schrieb Lucas Stach: > This adds the DT nodes for all the peripherals that make up the > HDMI display pipeline. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > 71c2397bf7c2..254d610b93b7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { > clock-names = "ipg"; > power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; > }; > + > + hdmi_pvi: display-bridge@32fc4000 { > + compatible = "fsl,imx8mp-hdmi- pvi"; > + reg = <0x32fc4000 0x40>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + pvi_from_lcdif3: endpoint { > + remote-endpoint = <&lcdif3_to_pvi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pvi_to_hdmi_tx: endpoint { > + remote-endpoint = <&hdmi_tx_from_pvi>; > + }; > + }; > + }; > + }; > + > + lcdif3: display-controller@32fc6000 { > + compatible = "fsl,imx8mp-lcdif"; > + reg = <0x32fc6000 0x238>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; Shouldn't this just be 'interrupts = <8>;'? The irqsteer_hdmi has #interrupt- cells = <1>; Best regards, Alexander > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&hdmi_tx_phy>, > + <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_ROOT>; > + clock-names = "pix", "axi", "disp_axi"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; > + status = "disabled"; > + > + port { > + lcdif3_to_pvi: endpoint { > + remote- endpoint = <&pvi_from_lcdif3>; > + }; > + }; > + }; > + > + hdmi_tx: hdmi@32fd8000 { > + compatible = "fsl,imx8mp-hdmi"; > + reg = <0x32fd8000 0x7eff>; > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_REF_266M>, > + <&clk IMX8MP_CLK_HDMI_FDCC_TST>, > + <&clk IMX8MP_CLK_32K>, > + <&hdmi_tx_phy>; > + clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; > + reg-io-width = <1>; > + status = "disabled"; > + > + port { > + hdmi_tx_from_pvi: endpoint { > + remote- endpoint = <&pvi_to_hdmi_tx>; > + }; > + }; > + }; > + > + hdmi_tx_phy: phy@32fdff00 { > + compatible = "fsl,imx8mp-hdmi- phy"; > + reg = <0x32fdff00 0x100>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_24M>; > + clock-names = "apb", "ref"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; > + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; > + #clock-cells = <0>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > > gpu3d: gpu@38000000 { ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline 2022-08-26 19:29 ` Lucas Stach @ 2022-09-05 2:04 ` Shawn Guo -1 siblings, 0 replies; 24+ messages in thread From: Shawn Guo @ 2022-09-05 2:04 UTC (permalink / raw) To: Lucas Stach Cc: Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel On Fri, Aug 26, 2022 at 09:29:31PM +0200, Lucas Stach wrote: > This adds the DT nodes for all the peripherals that make up the > HDMI display pipeline. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 71c2397bf7c2..254d610b93b7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { > clock-names = "ipg"; > power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; > }; > + > + hdmi_pvi: display-bridge@32fc4000 { > + compatible = "fsl,imx8mp-hdmi-pvi"; > + reg = <0x32fc4000 0x40>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; Newline between properties and child node. Shawn > + pvi_from_lcdif3: endpoint { > + remote-endpoint = <&lcdif3_to_pvi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pvi_to_hdmi_tx: endpoint { > + remote-endpoint = <&hdmi_tx_from_pvi>; > + }; > + }; > + }; > + }; > + > + lcdif3: display-controller@32fc6000 { > + compatible = "fsl,imx8mp-lcdif"; > + reg = <0x32fc6000 0x238>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&hdmi_tx_phy>, > + <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_ROOT>; > + clock-names = "pix", "axi", "disp_axi"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; > + status = "disabled"; > + > + port { > + lcdif3_to_pvi: endpoint { > + remote-endpoint = <&pvi_from_lcdif3>; > + }; > + }; > + }; > + > + hdmi_tx: hdmi@32fd8000 { > + compatible = "fsl,imx8mp-hdmi"; > + reg = <0x32fd8000 0x7eff>; > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_REF_266M>, > + <&clk IMX8MP_CLK_HDMI_FDCC_TST>, > + <&clk IMX8MP_CLK_32K>, > + <&hdmi_tx_phy>; > + clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; > + reg-io-width = <1>; > + status = "disabled"; > + > + port { > + hdmi_tx_from_pvi: endpoint { > + remote-endpoint = <&pvi_to_hdmi_tx>; > + }; > + }; > + }; > + > + hdmi_tx_phy: phy@32fdff00 { > + compatible = "fsl,imx8mp-hdmi-phy"; > + reg = <0x32fdff00 0x100>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_24M>; > + clock-names = "apb", "ref"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; > + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; > + #clock-cells = <0>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > > gpu3d: gpu@38000000 { > -- > 2.30.2 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline @ 2022-09-05 2:04 ` Shawn Guo 0 siblings, 0 replies; 24+ messages in thread From: Shawn Guo @ 2022-09-05 2:04 UTC (permalink / raw) To: Lucas Stach Cc: Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel On Fri, Aug 26, 2022 at 09:29:31PM +0200, Lucas Stach wrote: > This adds the DT nodes for all the peripherals that make up the > HDMI display pipeline. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 71c2397bf7c2..254d610b93b7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { > clock-names = "ipg"; > power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; > }; > + > + hdmi_pvi: display-bridge@32fc4000 { > + compatible = "fsl,imx8mp-hdmi-pvi"; > + reg = <0x32fc4000 0x40>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; Newline between properties and child node. Shawn > + pvi_from_lcdif3: endpoint { > + remote-endpoint = <&lcdif3_to_pvi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pvi_to_hdmi_tx: endpoint { > + remote-endpoint = <&hdmi_tx_from_pvi>; > + }; > + }; > + }; > + }; > + > + lcdif3: display-controller@32fc6000 { > + compatible = "fsl,imx8mp-lcdif"; > + reg = <0x32fc6000 0x238>; > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&hdmi_tx_phy>, > + <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_ROOT>; > + clock-names = "pix", "axi", "disp_axi"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; > + status = "disabled"; > + > + port { > + lcdif3_to_pvi: endpoint { > + remote-endpoint = <&pvi_from_lcdif3>; > + }; > + }; > + }; > + > + hdmi_tx: hdmi@32fd8000 { > + compatible = "fsl,imx8mp-hdmi"; > + reg = <0x32fd8000 0x7eff>; > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_REF_266M>, > + <&clk IMX8MP_CLK_HDMI_FDCC_TST>, > + <&clk IMX8MP_CLK_32K>, > + <&hdmi_tx_phy>; > + clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; > + reg-io-width = <1>; > + status = "disabled"; > + > + port { > + hdmi_tx_from_pvi: endpoint { > + remote-endpoint = <&pvi_to_hdmi_tx>; > + }; > + }; > + }; > + > + hdmi_tx_phy: phy@32fdff00 { > + compatible = "fsl,imx8mp-hdmi-phy"; > + reg = <0x32fdff00 0x100>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_24M>; > + clock-names = "apb", "ref"; > + assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; > + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; > + #clock-cells = <0>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > > gpu3d: gpu@38000000 { > -- > 2.30.2 > ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline 2022-08-26 19:29 ` Lucas Stach @ 2023-03-03 17:26 ` Luca Ceresoli -1 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2023-03-03 17:26 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Hello Lucas, On Fri, 26 Aug 2022 21:29:31 +0200 Lucas Stach <l.stach@pengutronix.de> wrote: > This adds the DT nodes for all the peripherals that make up the > HDMI display pipeline. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 71c2397bf7c2..254d610b93b7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { > clock-names = "ipg"; > power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; > }; > + > + hdmi_pvi: display-bridge@32fc4000 { > + compatible = "fsl,imx8mp-hdmi-pvi"; > + reg = <0x32fc4000 0x40>; Should be <... 0x44>, there is a register at offset 0x40. > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + pvi_from_lcdif3: endpoint { > + remote-endpoint = <&lcdif3_to_pvi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pvi_to_hdmi_tx: endpoint { > + remote-endpoint = <&hdmi_tx_from_pvi>; > + }; > + }; > + }; > + }; > + > + lcdif3: display-controller@32fc6000 { > + compatible = "fsl,imx8mp-lcdif"; > + reg = <0x32fc6000 0x238>; Same here: 0x238 -> 0x23c > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&hdmi_tx_phy>, > + <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_ROOT>; > + clock-names = "pix", "axi", "disp_axi"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; > + status = "disabled"; > + > + port { > + lcdif3_to_pvi: endpoint { > + remote-endpoint = <&pvi_from_lcdif3>; > + }; > + }; > + }; > + > + hdmi_tx: hdmi@32fd8000 { > + compatible = "fsl,imx8mp-hdmi"; > + reg = <0x32fd8000 0x7eff>; And here: 0x7f00, even though good sense would suggest 0x8000 I guess. I haven't gone in more depth in reviewing this patch, but it is definitely working so with the above fixed you can add: Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline @ 2023-03-03 17:26 ` Luca Ceresoli 0 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2023-03-03 17:26 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Hello Lucas, On Fri, 26 Aug 2022 21:29:31 +0200 Lucas Stach <l.stach@pengutronix.de> wrote: > This adds the DT nodes for all the peripherals that make up the > HDMI display pipeline. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 83 +++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 71c2397bf7c2..254d610b93b7 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1145,6 +1145,89 @@ irqsteer_hdmi: interrupt-controller@32fc2000 { > clock-names = "ipg"; > power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; > }; > + > + hdmi_pvi: display-bridge@32fc4000 { > + compatible = "fsl,imx8mp-hdmi-pvi"; > + reg = <0x32fc4000 0x40>; Should be <... 0x44>, there is a register at offset 0x40. > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + pvi_from_lcdif3: endpoint { > + remote-endpoint = <&lcdif3_to_pvi>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pvi_to_hdmi_tx: endpoint { > + remote-endpoint = <&hdmi_tx_from_pvi>; > + }; > + }; > + }; > + }; > + > + lcdif3: display-controller@32fc6000 { > + compatible = "fsl,imx8mp-lcdif"; > + reg = <0x32fc6000 0x238>; Same here: 0x238 -> 0x23c > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&irqsteer_hdmi>; > + clocks = <&hdmi_tx_phy>, > + <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_ROOT>; > + clock-names = "pix", "axi", "disp_axi"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; > + status = "disabled"; > + > + port { > + lcdif3_to_pvi: endpoint { > + remote-endpoint = <&pvi_from_lcdif3>; > + }; > + }; > + }; > + > + hdmi_tx: hdmi@32fd8000 { > + compatible = "fsl,imx8mp-hdmi"; > + reg = <0x32fd8000 0x7eff>; And here: 0x7f00, even though good sense would suggest 0x8000 I guess. I haven't gone in more depth in reviewing this patch, but it is definitely working so with the above fixed you can add: Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2022-08-26 19:29 ` Lucas Stach @ 2022-08-26 19:29 ` Lucas Stach -1 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few involved pins that are configurable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 27 ++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index f6b017ab5f53..f3180c90709e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -213,6 +213,20 @@ &flexcan2 { status = "disabled";/* can2 pin conflict with pdm */ }; +&hdmi_pvi { + status = "okay"; +}; + +&hdmi_tx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -350,6 +364,10 @@ &i2c5 { */ }; +&lcdif3 { + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -481,6 +499,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 >; }; + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI @ 2022-08-26 19:29 ` Lucas Stach 0 siblings, 0 replies; 24+ messages in thread From: Lucas Stach @ 2022-08-26 19:29 UTC (permalink / raw) To: Shawn Guo, Rob Herring, Krzysztof Kozlowski Cc: Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few involved pins that are configurable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 27 ++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index f6b017ab5f53..f3180c90709e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -213,6 +213,20 @@ &flexcan2 { status = "disabled";/* can2 pin conflict with pdm */ }; +&hdmi_pvi { + status = "okay"; +}; + +&hdmi_tx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -350,6 +364,10 @@ &i2c5 { */ }; +&lcdif3 { + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -481,6 +499,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 >; }; + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 -- 2.30.2 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2022-08-26 19:29 ` Lucas Stach @ 2023-03-02 15:35 ` Luca Ceresoli -1 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2023-03-02 15:35 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Hello Lucas, On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach <l.stach@pengutronix.de> wrote: > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > involved pins that are configurable. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> I'm joining late to this party... Is this the latest version of this series? I haven't found any more recent, but if it is not the case would you point me to the most recent one please? > + pinctrl_hdmi: hdmigrp { > + fsl,pins = < > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 Is the low nibble (0x3) right?BIT(0) is reserved according too the reference manual. Also, all the non-reserved bits in that nibble are bits 1 and 2, which set the drive strength. For an I2C line it seems that the minimum drive strength (0x0) should be enough for an I2C line: with any drive strength setting the supported frequency is >= 65 MHz. > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 Here as well, bits 0 and 3 are reserved. Best regards, Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI @ 2023-03-02 15:35 ` Luca Ceresoli 0 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2023-03-02 15:35 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel Hello Lucas, On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach <l.stach@pengutronix.de> wrote: > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > involved pins that are configurable. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> I'm joining late to this party... Is this the latest version of this series? I haven't found any more recent, but if it is not the case would you point me to the most recent one please? > + pinctrl_hdmi: hdmigrp { > + fsl,pins = < > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 Is the low nibble (0x3) right?BIT(0) is reserved according too the reference manual. Also, all the non-reserved bits in that nibble are bits 1 and 2, which set the drive strength. For an I2C line it seems that the minimum drive strength (0x0) should be enough for an I2C line: with any drive strength setting the supported frequency is >= 65 MHz. > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 Here as well, bits 0 and 3 are reserved. Best regards, Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2023-03-02 15:35 ` Luca Ceresoli @ 2023-05-25 10:26 ` Luca Ceresoli -1 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2023-05-25 10:26 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford Hello Lucas, On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli <luca.ceresoli@bootlin.com> wrote: > Hello Lucas, > > On Fri, 26 Aug 2022 21:29:32 +0200 > Lucas Stach <l.stach@pengutronix.de> wrote: > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > involved pins that are configurable. > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Any updates to these patches? I haven't found any v2 on the list. > I'm joining late to this party... Is this the latest version of this > series? I haven't found any more recent, but if it is not the case > would you point me to the most recent one please? > > > + pinctrl_hdmi: hdmigrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 > > Is the low nibble (0x3) right?BIT(0) is reserved according too the > reference manual. > > Also, all the non-reserved bits in that nibble are bits 1 and 2, which > set the drive strength. For an I2C line it seems that the minimum drive > strength (0x0) should be enough for an I2C line: with any drive > strength setting the supported frequency is >= 65 MHz. > > > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 > > Here as well, bits 0 and 3 are reserved. About these pinctrls, I am using these settings on the MSC SM2-MB-EP1 board and they appear to be working just as those you are using (but I haven't tested CEC): MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10 Best regards, Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI @ 2023-05-25 10:26 ` Luca Ceresoli 0 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2023-05-25 10:26 UTC (permalink / raw) To: Lucas Stach Cc: Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford Hello Lucas, On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli <luca.ceresoli@bootlin.com> wrote: > Hello Lucas, > > On Fri, 26 Aug 2022 21:29:32 +0200 > Lucas Stach <l.stach@pengutronix.de> wrote: > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > involved pins that are configurable. > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Any updates to these patches? I haven't found any v2 on the list. > I'm joining late to this party... Is this the latest version of this > series? I haven't found any more recent, but if it is not the case > would you point me to the most recent one please? > > > + pinctrl_hdmi: hdmigrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 > > Is the low nibble (0x3) right?BIT(0) is reserved according too the > reference manual. > > Also, all the non-reserved bits in that nibble are bits 1 and 2, which > set the drive strength. For an I2C line it seems that the minimum drive > strength (0x0) should be enough for an I2C line: with any drive > strength setting the supported frequency is >= 65 MHz. > > > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 > > Here as well, bits 0 and 3 are reserved. About these pinctrls, I am using these settings on the MSC SM2-MB-EP1 board and they appear to be working just as those you are using (but I haven't tested CEC): MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10 Best regards, Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2023-05-25 10:26 ` Luca Ceresoli @ 2024-06-08 15:06 ` Laurent Pinchart -1 siblings, 0 replies; 24+ messages in thread From: Laurent Pinchart @ 2024-06-08 15:06 UTC (permalink / raw) To: Luca Ceresoli Cc: Lucas Stach, Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > involved pins that are configurable. > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > Any updates to these patches? I haven't found any v2 on the list. This is the last patch in the series that hasn't made it upstream It would be really nice to get a new version that could be merged in v6.11. Pretty please :-) > > I'm joining late to this party... Is this the latest version of this > > series? I haven't found any more recent, but if it is not the case > > would you point me to the most recent one please? > > > > > + pinctrl_hdmi: hdmigrp { > > > + fsl,pins = < > > > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > > > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 > > > > Is the low nibble (0x3) right?BIT(0) is reserved according too the > > reference manual. > > > > Also, all the non-reserved bits in that nibble are bits 1 and 2, which > > set the drive strength. For an I2C line it seems that the minimum drive > > strength (0x0) should be enough for an I2C line: with any drive > > strength setting the supported frequency is >= 65 MHz. > > > > > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > > > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 > > > > Here as well, bits 0 and 3 are reserved. > > About these pinctrls, I am using these settings on the MSC SM2-MB-EP1 > board and they appear to be working just as those you are using (but I > haven't tested CEC): > > MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 > MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 > MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 > MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10 -- Regards, Laurent Pinchart _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI @ 2024-06-08 15:06 ` Laurent Pinchart 0 siblings, 0 replies; 24+ messages in thread From: Laurent Pinchart @ 2024-06-08 15:06 UTC (permalink / raw) To: Luca Ceresoli Cc: Lucas Stach, Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > involved pins that are configurable. > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > Any updates to these patches? I haven't found any v2 on the list. This is the last patch in the series that hasn't made it upstream It would be really nice to get a new version that could be merged in v6.11. Pretty please :-) > > I'm joining late to this party... Is this the latest version of this > > series? I haven't found any more recent, but if it is not the case > > would you point me to the most recent one please? > > > > > + pinctrl_hdmi: hdmigrp { > > > + fsl,pins = < > > > + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 > > > + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 > > > > Is the low nibble (0x3) right?BIT(0) is reserved according too the > > reference manual. > > > > Also, all the non-reserved bits in that nibble are bits 1 and 2, which > > set the drive strength. For an I2C line it seems that the minimum drive > > strength (0x0) should be enough for an I2C line: with any drive > > strength setting the supported frequency is >= 65 MHz. > > > > > + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 > > > + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 > > > > Here as well, bits 0 and 3 are reserved. > > About these pinctrls, I am using these settings on the MSC SM2-MB-EP1 > board and they appear to be working just as those you are using (but I > haven't tested CEC): > > MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 > MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 > MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 > MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10 -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2024-06-08 15:06 ` Laurent Pinchart @ 2024-06-10 8:31 ` Luca Ceresoli -1 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2024-06-10 8:31 UTC (permalink / raw) To: Laurent Pinchart Cc: Lucas Stach, Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford Hi Laurent, On Sat, 8 Jun 2024 18:06:13 +0300 Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > involved pins that are configurable. > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > Any updates to these patches? I haven't found any v2 on the list. > > This is the last patch in the series that hasn't made it upstream It > would be really nice to get a new version that could be merged in v6.11. > Pretty please :-) It will be my pleasure to rebase, test and resend this week! :) Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI @ 2024-06-10 8:31 ` Luca Ceresoli 0 siblings, 0 replies; 24+ messages in thread From: Luca Ceresoli @ 2024-06-10 8:31 UTC (permalink / raw) To: Laurent Pinchart Cc: Lucas Stach, Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford Hi Laurent, On Sat, 8 Jun 2024 18:06:13 +0300 Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > involved pins that are configurable. > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > Any updates to these patches? I haven't found any v2 on the list. > > This is the last patch in the series that hasn't made it upstream It > would be really nice to get a new version that could be merged in v6.11. > Pretty please :-) It will be my pleasure to rebase, test and resend this week! :) Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2024-06-10 8:31 ` Luca Ceresoli (?) @ 2024-06-12 10:25 ` Luca Ceresoli 2024-06-12 21:15 ` Laurent Pinchart -1 siblings, 1 reply; 24+ messages in thread From: Luca Ceresoli @ 2024-06-12 10:25 UTC (permalink / raw) To: Laurent Pinchart Cc: Lucas Stach, Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford Hi again Laurent, On Mon, 10 Jun 2024 10:31:36 +0200 Luca Ceresoli <luca.ceresoli@bootlin.com> wrote: > Hi Laurent, > > On Sat, 8 Jun 2024 18:06:13 +0300 > Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > > > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > > involved pins that are configurable. > > > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > > > Any updates to these patches? I haven't found any v2 on the list. > > > > This is the last patch in the series that hasn't made it upstream It > > would be really nice to get a new version that could be merged in v6.11. > > Pretty please :-) > > It will be my pleasure to rebase, test and resend this week! :) Oops, I clearly had misread your e-mail! :) You was of course referring to Lucas' patch for the imx8mp-evk and not mine for the imx8mp-msc-sm2s, which I thought I had sent previously. It must have been the similarity between 'Luca' and 'Lucas' along with the 'To:' header, the board names being somewhat similar and the actual patch content being almost identical... But turns out I hadn't sent that patch yet. Sent it right now: https://lore.kernel.org/linux-devicetree/20240612-imx8mp-msc-sm2s-hdmi-v1-1-6c808df5205d@bootlin.com/T/#u Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI 2024-06-12 10:25 ` Luca Ceresoli @ 2024-06-12 21:15 ` Laurent Pinchart 0 siblings, 0 replies; 24+ messages in thread From: Laurent Pinchart @ 2024-06-12 21:15 UTC (permalink / raw) To: Luca Ceresoli Cc: Lucas Stach, Shawn Guo, Rob Herring, Krzysztof Kozlowski, Fabio Estevam, NXP Linux Team, Marek Vasut, Kieran Bingham, devicetree, linux-arm-kernel, patchwork-lst, kernel, Adam Ford On Wed, Jun 12, 2024 at 12:25:02PM +0200, Luca Ceresoli wrote: > On Mon, 10 Jun 2024 10:31:36 +0200 Luca Ceresoli wrote: > > On Sat, 8 Jun 2024 18:06:13 +0300 Laurent Pinchart wrote: > > > On Thu, May 25, 2023 at 12:26:28PM +0200, Luca Ceresoli wrote: > > > > On Thu, 2 Mar 2023 16:35:25 +0100 Luca Ceresoli wrote: > > > > > On Fri, 26 Aug 2022 21:29:32 +0200 Lucas Stach wrote: > > > > > > > > > > > Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few > > > > > > involved pins that are configurable. > > > > > > > > > > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > > > > > > > Any updates to these patches? I haven't found any v2 on the list. > > > > > > This is the last patch in the series that hasn't made it upstream It > > > would be really nice to get a new version that could be merged in v6.11. > > > Pretty please :-) > > > > It will be my pleasure to rebase, test and resend this week! :) > > Oops, I clearly had misread your e-mail! :) > > You was of course referring to Lucas' patch for the imx8mp-evk and not > mine for the imx8mp-msc-sm2s, which I thought I had sent previously. That's right, I was referring to the EVK patch. Luca*s*, would you consider resubmitting it in time for v6.11 ? > It must have been the similarity between 'Luca' and 'Lucas' along with > the 'To:' header, the board names being somewhat similar and the actual > patch content being almost identical... So which of you will change his name ? :-) > But turns out I hadn't sent that patch yet. Sent it right now: > https://lore.kernel.org/linux-devicetree/20240612-imx8mp-msc-sm2s-hdmi-v1-1-6c808df5205d@bootlin.com/T/#u -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2024-06-12 21:15 UTC | newest] Thread overview: 24+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-08-26 19:29 [PATCH 1/4] arm64: dts: imx8mp: add HDMI power-domains Lucas Stach 2022-08-26 19:29 ` Lucas Stach 2022-08-26 19:29 ` [PATCH 2/4] arm64: dts: imx8mp: add HDMI irqsteer Lucas Stach 2022-08-26 19:29 ` Lucas Stach 2022-08-26 19:29 ` [PATCH 3/4] arm64: dts: imx8mp: add HDMI display pipeline Lucas Stach 2022-08-26 19:29 ` Lucas Stach 2022-08-29 6:37 ` Alexander Stein 2022-08-29 6:37 ` Alexander Stein 2022-09-05 2:04 ` Shawn Guo 2022-09-05 2:04 ` Shawn Guo 2023-03-03 17:26 ` Luca Ceresoli 2023-03-03 17:26 ` Luca Ceresoli 2022-08-26 19:29 ` [PATCH 4/4] arm64: dts: imx8mp-evk: enable HDMI Lucas Stach 2022-08-26 19:29 ` Lucas Stach 2023-03-02 15:35 ` Luca Ceresoli 2023-03-02 15:35 ` Luca Ceresoli 2023-05-25 10:26 ` Luca Ceresoli 2023-05-25 10:26 ` Luca Ceresoli 2024-06-08 15:06 ` Laurent Pinchart 2024-06-08 15:06 ` Laurent Pinchart 2024-06-10 8:31 ` Luca Ceresoli 2024-06-10 8:31 ` Luca Ceresoli 2024-06-12 10:25 ` Luca Ceresoli 2024-06-12 21:15 ` Laurent Pinchart
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