From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Quentin Perret <qperret@google.com>,
Will Deacon <will@kernel.org>, Fuad Tabba <tabba@google.com>
Subject: [PATCH v2 14/17] KVM: arm64: Program the timer traps with VHE layout in hVHE mode
Date: Fri, 26 May 2023 15:33:45 +0100 [thread overview]
Message-ID: <20230526143348.4072074-15-maz@kernel.org> (raw)
In-Reply-To: <20230526143348.4072074-1-maz@kernel.org>
Just like the rest of the timer code, we need to shift the enable
bits around when HCR_EL2.E2H is set, which is the case in hVHE mode.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/hyp/nvhe/timer-sr.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/hyp/nvhe/timer-sr.c b/arch/arm64/kvm/hyp/nvhe/timer-sr.c
index b185ac0dbd47..3aaab20ae5b4 100644
--- a/arch/arm64/kvm/hyp/nvhe/timer-sr.c
+++ b/arch/arm64/kvm/hyp/nvhe/timer-sr.c
@@ -17,21 +17,24 @@ void __kvm_timer_set_cntvoff(u64 cntvoff)
}
/*
- * Should only be called on non-VHE systems.
+ * Should only be called on non-VHE or hVHE setups.
* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
*/
void __timer_disable_traps(struct kvm_vcpu *vcpu)
{
- u64 val;
+ u64 val, shift = 0;
+
+ if (has_hvhe())
+ shift = 10;
/* Allow physical timer/counter access for the host */
val = read_sysreg(cnthctl_el2);
- val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
+ val |= (CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN) << shift;
write_sysreg(val, cnthctl_el2);
}
/*
- * Should only be called on non-VHE systems.
+ * Should only be called on non-VHE or hVHE setups.
* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
*/
void __timer_enable_traps(struct kvm_vcpu *vcpu)
@@ -50,5 +53,10 @@ void __timer_enable_traps(struct kvm_vcpu *vcpu)
else
clr |= CNTHCTL_EL1PCTEN;
+ if (has_hvhe()) {
+ clr <<= 10;
+ set <<= 10;
+ }
+
sysreg_clear_set(cnthctl_el2, clr, set);
}
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Quentin Perret <qperret@google.com>,
Will Deacon <will@kernel.org>, Fuad Tabba <tabba@google.com>
Subject: [PATCH v2 14/17] KVM: arm64: Program the timer traps with VHE layout in hVHE mode
Date: Fri, 26 May 2023 15:33:45 +0100 [thread overview]
Message-ID: <20230526143348.4072074-15-maz@kernel.org> (raw)
In-Reply-To: <20230526143348.4072074-1-maz@kernel.org>
Just like the rest of the timer code, we need to shift the enable
bits around when HCR_EL2.E2H is set, which is the case in hVHE mode.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/hyp/nvhe/timer-sr.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/hyp/nvhe/timer-sr.c b/arch/arm64/kvm/hyp/nvhe/timer-sr.c
index b185ac0dbd47..3aaab20ae5b4 100644
--- a/arch/arm64/kvm/hyp/nvhe/timer-sr.c
+++ b/arch/arm64/kvm/hyp/nvhe/timer-sr.c
@@ -17,21 +17,24 @@ void __kvm_timer_set_cntvoff(u64 cntvoff)
}
/*
- * Should only be called on non-VHE systems.
+ * Should only be called on non-VHE or hVHE setups.
* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
*/
void __timer_disable_traps(struct kvm_vcpu *vcpu)
{
- u64 val;
+ u64 val, shift = 0;
+
+ if (has_hvhe())
+ shift = 10;
/* Allow physical timer/counter access for the host */
val = read_sysreg(cnthctl_el2);
- val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
+ val |= (CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN) << shift;
write_sysreg(val, cnthctl_el2);
}
/*
- * Should only be called on non-VHE systems.
+ * Should only be called on non-VHE or hVHE setups.
* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
*/
void __timer_enable_traps(struct kvm_vcpu *vcpu)
@@ -50,5 +53,10 @@ void __timer_enable_traps(struct kvm_vcpu *vcpu)
else
clr |= CNTHCTL_EL1PCTEN;
+ if (has_hvhe()) {
+ clr <<= 10;
+ set <<= 10;
+ }
+
sysreg_clear_set(cnthctl_el2, clr, set);
}
--
2.34.1
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next prev parent reply other threads:[~2023-05-26 14:46 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-26 14:33 [PATCH v2 00/17] KVM: arm64: Allow using VHE in the nVHE hypervisor Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 01/17] KVM: arm64: Drop is_kernel_in_hyp_mode() from __invalidate_icache_guest_page() Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 02/17] arm64: Prevent the use of is_kernel_in_hyp_mode() in hypervisor code Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-30 19:54 ` Oliver Upton
2023-05-30 19:54 ` Oliver Upton
2023-05-31 7:17 ` Marc Zyngier
2023-05-31 7:17 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 03/17] arm64: Turn kaslr_feature_override into a generic SW feature override Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 04/17] arm64: Add KVM_HVHE capability and has_hvhe() predicate Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-06-01 7:06 ` Oliver Upton
2023-06-01 7:06 ` Oliver Upton
2023-06-01 12:27 ` Marc Zyngier
2023-06-01 12:27 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 05/17] arm64: Don't enable VHE for the kernel if OVERRIDE_HVHE is set Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-06-01 7:32 ` Oliver Upton
2023-06-01 7:32 ` Oliver Upton
2023-06-01 12:48 ` Marc Zyngier
2023-06-01 12:48 ` Marc Zyngier
2023-06-01 20:10 ` Oliver Upton
2023-06-01 20:10 ` Oliver Upton
2023-05-26 14:33 ` [PATCH v2 06/17] arm64: Allow EL1 physical timer access when running VHE Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-06-01 6:34 ` Oliver Upton
2023-06-01 6:34 ` Oliver Upton
2023-06-01 11:59 ` Marc Zyngier
2023-06-01 11:59 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 07/17] arm64: Use CPACR_EL1 format to set CPTR_EL2 when E2H is set Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 08/17] KVM: arm64: Remove alternatives from sysreg accessors in VHE hypervisor context Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 09/17] KVM: arm64: Key use of VHE instructions in nVHE code off ARM64_KVM_HVHE Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 10/17] KVM: arm64: Force HCR_EL2.E2H when ARM64_KVM_HVHE is set Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 11/17] KVM: arm64: Disable TTBR1_EL2 when using ARM64_KVM_HVHE Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 12/17] KVM: arm64: Adjust EL2 stage-1 leaf AP bits when ARM64_KVM_HVHE is set Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 13/17] KVM: arm64: Rework CPTR_EL2 programming for HVHE configuration Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier [this message]
2023-05-26 14:33 ` [PATCH v2 14/17] KVM: arm64: Program the timer traps with VHE layout in hVHE mode Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 15/17] KVM: arm64: Force HCR_E2H in guest context when ARM64_KVM_HVHE is set Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 16/17] arm64: Allow arm64_sw.hvhe on command line Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
2023-05-26 14:33 ` [PATCH v2 17/17] KVM: arm64: Terrible timer hack for M1 with hVHE Marc Zyngier
2023-05-26 14:33 ` Marc Zyngier
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