[PATCH 0/3] riscv: some CMO alternative related clean up

[PATCH 0/3] riscv: some CMO alternative related clean up

[Jisheng Zhang]

This series consists of clean up patches of the "riscv: Reduce
ARCH_KMALLOC_MINALIGN to 8" series[1]. Per Catalin suggestion, I will
submit the enabling of riscv ARCH_KMALLOC_MINALIGN 8 in next
development window. However, the cleanups are good for submitting
now.

PS: Conor's reviewed-by tag is included.

[1] https://lore.kernel.org/linux-riscv/20230526165958.908-1-jszhang@kernel.org/

Jisheng Zhang (3):
  riscv: errata: thead: only set cbom size & noncoherent during boot
  riscv: mm: mark CBO relate initialization funcs as __init
  riscv: mm: mark noncoherent_supported as __ro_after_init

 arch/riscv/errata/thead/errata.c    | 7 +++++--
 arch/riscv/mm/cacheflush.c          | 8 ++++----
 arch/riscv/mm/dma-noncoherent.c     | 2 +-
 3 files changed, 10 insertions(+), 7 deletions(-)

-- 
2.40.1


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[PATCH 0/3] riscv: some CMO alternative related clean up

[Jisheng Zhang]

This series consists of clean up patches of the "riscv: Reduce
ARCH_KMALLOC_MINALIGN to 8" series[1]. Per Catalin suggestion, I will
submit the enabling of riscv ARCH_KMALLOC_MINALIGN 8 in next
development window. However, the cleanups are good for submitting
now.

PS: Conor's reviewed-by tag is included.

[1] https://lore.kernel.org/linux-riscv/20230526165958.908-1-jszhang@kernel.org/

Jisheng Zhang (3):
  riscv: errata: thead: only set cbom size & noncoherent during boot
  riscv: mm: mark CBO relate initialization funcs as __init
  riscv: mm: mark noncoherent_supported as __ro_after_init

 arch/riscv/errata/thead/errata.c    | 7 +++++--
 arch/riscv/mm/cacheflush.c          | 8 ++++----
 arch/riscv/mm/dma-noncoherent.c     | 2 +-
 3 files changed, 10 insertions(+), 7 deletions(-)

-- 
2.40.1

[PATCH 1/3] riscv: errata: thead: only set cbom size & noncoherent during boot

[Jisheng Zhang]

The CBOM size and whether the HW is noncoherent is known and
determined during booting and won't change after that.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/errata/thead/errata.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index c259dc925ec1..be84b14f0118 100644
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -45,8 +45,11 @@ static bool errata_probe_cmo(unsigned int stage,
 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
 		return false;
 
-	riscv_cbom_block_size = L1_CACHE_BYTES;
-	riscv_noncoherent_supported();
+	if (stage == RISCV_ALTERNATIVES_BOOT) {
+		riscv_cbom_block_size = L1_CACHE_BYTES;
+		riscv_noncoherent_supported();
+	}
+
 	return true;
 }
 
-- 
2.40.1


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[PATCH 1/3] riscv: errata: thead: only set cbom size & noncoherent during boot

[Jisheng Zhang]

The CBOM size and whether the HW is noncoherent is known and
determined during booting and won't change after that.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/errata/thead/errata.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
index c259dc925ec1..be84b14f0118 100644
--- a/arch/riscv/errata/thead/errata.c
+++ b/arch/riscv/errata/thead/errata.c
@@ -45,8 +45,11 @@ static bool errata_probe_cmo(unsigned int stage,
 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
 		return false;
 
-	riscv_cbom_block_size = L1_CACHE_BYTES;
-	riscv_noncoherent_supported();
+	if (stage == RISCV_ALTERNATIVES_BOOT) {
+		riscv_cbom_block_size = L1_CACHE_BYTES;
+		riscv_noncoherent_supported();
+	}
+
 	return true;
 }
 
-- 
2.40.1

[PATCH 2/3] riscv: mm: mark CBO relate initialization funcs as __init

[Jisheng Zhang]

The two functions cbo_get_block_size() and riscv_init_cbo_blocksizes()
are only called during booting, mark them as __init.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/mm/cacheflush.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index fca532ddf3ec..fbc59b3f69f2 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -104,9 +104,9 @@ EXPORT_SYMBOL_GPL(riscv_cbom_block_size);
 unsigned int riscv_cboz_block_size;
 EXPORT_SYMBOL_GPL(riscv_cboz_block_size);
 
-static void cbo_get_block_size(struct device_node *node,
-			       const char *name, u32 *block_size,
-			       unsigned long *first_hartid)
+static void __init cbo_get_block_size(struct device_node *node,
+				      const char *name, u32 *block_size,
+				      unsigned long *first_hartid)
 {
 	unsigned long hartid;
 	u32 val;
@@ -126,7 +126,7 @@ static void cbo_get_block_size(struct device_node *node,
 	}
 }
 
-void riscv_init_cbo_blocksizes(void)
+void __init riscv_init_cbo_blocksizes(void)
 {
 	unsigned long cbom_hartid, cboz_hartid;
 	u32 cbom_block_size = 0, cboz_block_size = 0;
-- 
2.40.1


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[PATCH 2/3] riscv: mm: mark CBO relate initialization funcs as __init

[Jisheng Zhang]

The two functions cbo_get_block_size() and riscv_init_cbo_blocksizes()
are only called during booting, mark them as __init.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/mm/cacheflush.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index fca532ddf3ec..fbc59b3f69f2 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -104,9 +104,9 @@ EXPORT_SYMBOL_GPL(riscv_cbom_block_size);
 unsigned int riscv_cboz_block_size;
 EXPORT_SYMBOL_GPL(riscv_cboz_block_size);
 
-static void cbo_get_block_size(struct device_node *node,
-			       const char *name, u32 *block_size,
-			       unsigned long *first_hartid)
+static void __init cbo_get_block_size(struct device_node *node,
+				      const char *name, u32 *block_size,
+				      unsigned long *first_hartid)
 {
 	unsigned long hartid;
 	u32 val;
@@ -126,7 +126,7 @@ static void cbo_get_block_size(struct device_node *node,
 	}
 }
 
-void riscv_init_cbo_blocksizes(void)
+void __init riscv_init_cbo_blocksizes(void)
 {
 	unsigned long cbom_hartid, cboz_hartid;
 	u32 cbom_block_size = 0, cboz_block_size = 0;
-- 
2.40.1

[PATCH 3/3] riscv: mm: mark noncoherent_supported as __ro_after_init

[Jisheng Zhang]

The noncoherent_supported indicates whether the HW is coherent or not,
it won't change after booting, mark it as __ro_after_init.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/mm/dma-noncoherent.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index d919efab6eba..d51a75864e53 100644
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -10,7 +10,7 @@
 #include <linux/mm.h>
 #include <asm/cacheflush.h>
 
-static bool noncoherent_supported;
+static bool noncoherent_supported __ro_after_init;
 
 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 			      enum dma_data_direction dir)
-- 
2.40.1


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[PATCH 3/3] riscv: mm: mark noncoherent_supported as __ro_after_init

[Jisheng Zhang]

The noncoherent_supported indicates whether the HW is coherent or not,
it won't change after booting, mark it as __ro_after_init.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/mm/dma-noncoherent.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index d919efab6eba..d51a75864e53 100644
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -10,7 +10,7 @@
 #include <linux/mm.h>
 #include <asm/cacheflush.h>
 
-static bool noncoherent_supported;
+static bool noncoherent_supported __ro_after_init;
 
 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 			      enum dma_data_direction dir)
-- 
2.40.1

Re: [PATCH 0/3] riscv: some CMO alternative related clean up

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Thu, 15 Jun 2023 00:55:01 +0800 you wrote:
> This series consists of clean up patches of the "riscv: Reduce
> ARCH_KMALLOC_MINALIGN to 8" series[1]. Per Catalin suggestion, I will
> submit the enabling of riscv ARCH_KMALLOC_MINALIGN 8 in next
> development window. However, the cleanups are good for submitting
> now.
> 
> PS: Conor's reviewed-by tag is included.
> 
> [...]

Here is the summary with links:
  - [1/3] riscv: errata: thead: only set cbom size & noncoherent during boot
    https://git.kernel.org/riscv/c/31ca5d49264b
  - [2/3] riscv: mm: mark CBO relate initialization funcs as __init
    https://git.kernel.org/riscv/c/3b472f860c5c
  - [3/3] riscv: mm: mark noncoherent_supported as __ro_after_init
    https://git.kernel.org/riscv/c/8500808a991f

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



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Re: [PATCH 0/3] riscv: some CMO alternative related clean up

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Thu, 15 Jun 2023 00:55:01 +0800 you wrote:
> This series consists of clean up patches of the "riscv: Reduce
> ARCH_KMALLOC_MINALIGN to 8" series[1]. Per Catalin suggestion, I will
> submit the enabling of riscv ARCH_KMALLOC_MINALIGN 8 in next
> development window. However, the cleanups are good for submitting
> now.
> 
> PS: Conor's reviewed-by tag is included.
> 
> [...]

Here is the summary with links:
  - [1/3] riscv: errata: thead: only set cbom size & noncoherent during boot
    https://git.kernel.org/riscv/c/31ca5d49264b
  - [2/3] riscv: mm: mark CBO relate initialization funcs as __init
    https://git.kernel.org/riscv/c/3b472f860c5c
  - [3/3] riscv: mm: mark noncoherent_supported as __ro_after_init
    https://git.kernel.org/riscv/c/8500808a991f

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html