Re: [PATCH v2 00/17] Prevent NAND chip unevaluated properties

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@linaro.org>,
	Pratyush Yadav <pratyush@kernel.org>,
	Michael Walle <michael@walle.cc>,
	linux-mtd@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	devicetree@vger.kernel.org,
	Chris Packham <Chris.Packham@alliedtelesis.co.nz>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Brian Norris <computersforpeace@gmail.com>,
	Chen-Yu Tsai <wens@csie.org>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Kamal Dasu <kdasu.kdev@gmail.com>,
	Liang Yang <liang.yang@amlogic.com>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Maxime Ripard <mripard@kernel.org>,
	Paul Cercueil <paul@crapouillou.net>,
	Samuel Holland <samuel@sholland.org>,
	Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>,
	Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Subject: Re: [PATCH v2 00/17] Prevent NAND chip unevaluated properties
Date: Thu, 15 Jun 2023 10:26:09 +0200	[thread overview]
Message-ID: <20230615102609.0aeea6ab@xps-13> (raw)
In-Reply-To: <20230613134350.3cab6780@xps-13>

Hi Krzysztof,

miquel.raynal@bootlin.com wrote on Tue, 13 Jun 2023 13:43:50 +0200:

> Hi Krzysztof,
> 
> krzk@kernel.org wrote on Sat, 10 Jun 2023 11:27:55 +0200:
> 
> > On 06/06/2023 19:52, Miquel Raynal wrote:  
> > > As discussed with Krzysztof and Chris, it seems like each NAND
> > > controller binding should actually restrain the properties allowed in
> > > the NAND chip node with its own "unevaluatedProperties: false". This
> > > only works if we reference a yaml schema which contains all the possible
> > > properties *in the NAND chip node*. Indeed, the NAND controller yaml
> > > schema contains properties for the NAND chip which are not evaluated
> > > with this construction.
> > > 
> > > Link: https://lore.kernel.org/all/a23dd485-a3d9-e31f-be3e-0ab293fcfc4a@linaro.org/    
> > 
> > Please rebase on latest kernel. This is some very old tree if you CC
> > this address.  
> 
> Sorry for the trouble, it was a hardcoded address on my side. I've
> updated the address to
> 
> 	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> 
> The series is based on v6.4-rc1. Against what branch/tag do you want it
> to be rebased?

When I asked this question I forgot I usually apply mtd bindings in my
own tree :) I usually do it after receiving at least one R-by on the
whole series, but here as I'm the author I would just like to get
confirmation from you Krzysztof that I can go ahead (or if you prefer
to take it, or maybe want to give this another look later).

Thanks,
Miquèl

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