From: Rob Herring <robh@kernel.org>
To: Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@amd.com>
Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, krzysztof.kozlowski+dt@linaro.org,
sbhatta@marvell.com, linux@armlinux.org.uk, michal.simek@amd.com,
radhey.shyam.pandey@amd.com, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, anirudha.sarangi@amd.com,
harini.katakam@amd.com, git@amd.com
Subject: Re: [PATCH net-next V4 1/3] dt-bindings: net: xlnx,axi-ethernet: Introduce DMA support
Date: Fri, 30 Jun 2023 10:46:59 -0600 [thread overview]
Message-ID: <20230630164659.GA1877117-robh@kernel.org> (raw)
In-Reply-To: <20230630053844.1366171-2-sarath.babu.naidu.gaddam@amd.com>
On Fri, Jun 30, 2023 at 11:08:42AM +0530, Sarath Babu Naidu Gaddam wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>
> The axiethernet will use dmaengine framework to communicate
> with dma controller IP instead of built-in dma programming sequence.
What's dmaengine framework? This is a binding patch about the h/w.
>
> To request dma transmit and receive channels the axiethernet uses
> generic dmas, dma-names properties.
>
> Axiethernet may use AXI DMA or MCDMA. DMA has only two channels
> where as MCDMA has 16 Tx, 16 Rx channels. To uniquely identify each
> channel, we are using 'chan' suffix. Depending on the usecase AXI
> ethernet driver can request any combination of multichannel DMA
> channels.
The DMA provider is outside the scope of the binding. Instead, describe
how Axiethernet can use 2 or 32 channels.
>
> Example:
> dma-names = tx_chan0, rx_chan0, tx_chan1, rx_chan1;
>
> Also to support the backward compatibility, use "dmas" property to
> identify as it should use dmaengine framework or legacy
> driver(built-in dma programming).
>
> At this point it is recommended to use dmaengine framework but it's
> optional. Once the solution is stable will make dmas as
> required properties.
>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@amd.com>
>
> ---
> Changes in V4:
> 1) Updated commit description about tx/rx channels name.
> 2) Removed "dt-bindings" and "dmaengine" strings in subject.
> 3) Extended dmas and dma-names to support MCDMA channel names.
> 1) Remove "driver" from commit message.
> 2) Use pattern/regex for dma-names property.
>
> Changes in V3:
> 1) Reverted reg and interrupts property to support backward compatibility.
> 2) Moved dmas and dma-names properties from Required properties.
>
> Changes in V2:
> - None.
> ---
> .../bindings/net/xlnx,axi-ethernet.yaml | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> index 1d33d80af11c..ea203504b8d4 100644
> --- a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> +++ b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> @@ -122,6 +122,20 @@ properties:
> and "phy-handle" should point to an external PHY if exists.
> maxItems: 1
>
> + dmas:
> + minItems: 2
> + maxItems: 32
> + description: DMA Channel phandle and DMA request line number
Drop this description. That's every 'dmas' property. Instead define what
each entry is.
> +
> + dma-names:
> + items:
> + pattern: "^[tr]x_chan[0-9]|1[0-5]$"
I think you need some parentheses. Does a channel 10 or higher name
validate?
> + description:
> + Should be "tx_chan0", "tx_chan1" ... "tx_chan15" for DMA Tx channel
> + Should be "rx_chan0", "rx_chan1" ... "rx_chan15" for DMA Rx channel
> + minItems: 2
> + maxItems: 32
> +
> required:
> - compatible
> - interrupts
> @@ -143,6 +157,8 @@ examples:
> clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>;
> phy-mode = "mii";
> reg = <0x40c00000 0x40000>,<0x50c00000 0x40000>;
> + dmas = <&xilinx_dma 0>, <&xilinx_dma 1>;
> + dma-names = "tx_chan0", "rx_chan0";
> xlnx,rxcsum = <0x2>;
> xlnx,rxmem = <0x800>;
> xlnx,txcsum = <0x2>;
> --
> 2.25.1
>
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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@amd.com>
Cc: davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, krzysztof.kozlowski+dt@linaro.org,
sbhatta@marvell.com, linux@armlinux.org.uk, michal.simek@amd.com,
radhey.shyam.pandey@amd.com, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, anirudha.sarangi@amd.com,
harini.katakam@amd.com, git@amd.com
Subject: Re: [PATCH net-next V4 1/3] dt-bindings: net: xlnx,axi-ethernet: Introduce DMA support
Date: Fri, 30 Jun 2023 10:46:59 -0600 [thread overview]
Message-ID: <20230630164659.GA1877117-robh@kernel.org> (raw)
In-Reply-To: <20230630053844.1366171-2-sarath.babu.naidu.gaddam@amd.com>
On Fri, Jun 30, 2023 at 11:08:42AM +0530, Sarath Babu Naidu Gaddam wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
>
> The axiethernet will use dmaengine framework to communicate
> with dma controller IP instead of built-in dma programming sequence.
What's dmaengine framework? This is a binding patch about the h/w.
>
> To request dma transmit and receive channels the axiethernet uses
> generic dmas, dma-names properties.
>
> Axiethernet may use AXI DMA or MCDMA. DMA has only two channels
> where as MCDMA has 16 Tx, 16 Rx channels. To uniquely identify each
> channel, we are using 'chan' suffix. Depending on the usecase AXI
> ethernet driver can request any combination of multichannel DMA
> channels.
The DMA provider is outside the scope of the binding. Instead, describe
how Axiethernet can use 2 or 32 channels.
>
> Example:
> dma-names = tx_chan0, rx_chan0, tx_chan1, rx_chan1;
>
> Also to support the backward compatibility, use "dmas" property to
> identify as it should use dmaengine framework or legacy
> driver(built-in dma programming).
>
> At this point it is recommended to use dmaengine framework but it's
> optional. Once the solution is stable will make dmas as
> required properties.
>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Sarath Babu Naidu Gaddam <sarath.babu.naidu.gaddam@amd.com>
>
> ---
> Changes in V4:
> 1) Updated commit description about tx/rx channels name.
> 2) Removed "dt-bindings" and "dmaengine" strings in subject.
> 3) Extended dmas and dma-names to support MCDMA channel names.
> 1) Remove "driver" from commit message.
> 2) Use pattern/regex for dma-names property.
>
> Changes in V3:
> 1) Reverted reg and interrupts property to support backward compatibility.
> 2) Moved dmas and dma-names properties from Required properties.
>
> Changes in V2:
> - None.
> ---
> .../bindings/net/xlnx,axi-ethernet.yaml | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> index 1d33d80af11c..ea203504b8d4 100644
> --- a/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> +++ b/Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
> @@ -122,6 +122,20 @@ properties:
> and "phy-handle" should point to an external PHY if exists.
> maxItems: 1
>
> + dmas:
> + minItems: 2
> + maxItems: 32
> + description: DMA Channel phandle and DMA request line number
Drop this description. That's every 'dmas' property. Instead define what
each entry is.
> +
> + dma-names:
> + items:
> + pattern: "^[tr]x_chan[0-9]|1[0-5]$"
I think you need some parentheses. Does a channel 10 or higher name
validate?
> + description:
> + Should be "tx_chan0", "tx_chan1" ... "tx_chan15" for DMA Tx channel
> + Should be "rx_chan0", "rx_chan1" ... "rx_chan15" for DMA Rx channel
> + minItems: 2
> + maxItems: 32
> +
> required:
> - compatible
> - interrupts
> @@ -143,6 +157,8 @@ examples:
> clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>;
> phy-mode = "mii";
> reg = <0x40c00000 0x40000>,<0x50c00000 0x40000>;
> + dmas = <&xilinx_dma 0>, <&xilinx_dma 1>;
> + dma-names = "tx_chan0", "rx_chan0";
> xlnx,rxcsum = <0x2>;
> xlnx,rxmem = <0x800>;
> xlnx,txcsum = <0x2>;
> --
> 2.25.1
>
next prev parent reply other threads:[~2023-06-30 16:47 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 5:38 [PATCH net-next V4 0/3] net: axienet: Introduce dmaengine Sarath Babu Naidu Gaddam
2023-06-30 5:38 ` Sarath Babu Naidu Gaddam
2023-06-30 5:38 ` [PATCH net-next V4 1/3] dt-bindings: net: xlnx,axi-ethernet: Introduce DMA support Sarath Babu Naidu Gaddam
2023-06-30 5:38 ` Sarath Babu Naidu Gaddam
2023-06-30 16:46 ` Rob Herring [this message]
2023-06-30 16:46 ` Rob Herring
2023-06-30 5:38 ` [PATCH net-next V4 2/3] net: axienet: Preparatory changes for dmaengine support Sarath Babu Naidu Gaddam
2023-06-30 5:38 ` Sarath Babu Naidu Gaddam
2023-06-30 5:38 ` [PATCH net-next V4 3/3] net: axienet: Introduce " Sarath Babu Naidu Gaddam
2023-06-30 5:38 ` Sarath Babu Naidu Gaddam
2023-06-30 11:56 ` [PATCH net-next V4 0/3] net: axienet: Introduce dmaengine Simon Horman
2023-06-30 11:56 ` Simon Horman
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