* [PATCH 2/2] accel/ivpu: Clear specific interrupt status bits on C0
2023-07-03 8:07 [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable Stanislaw Gruszka
@ 2023-07-03 8:07 ` Stanislaw Gruszka
2023-07-05 8:26 ` Jacek Lawrynowicz
2023-07-05 8:26 ` [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable Jacek Lawrynowicz
2023-07-05 10:38 ` Stanislaw Gruszka
2 siblings, 1 reply; 5+ messages in thread
From: Stanislaw Gruszka @ 2023-07-03 8:07 UTC (permalink / raw)
To: dri-devel
Cc: Karol Wachowski, Oded Gabbay, Jeffrey Hugo, Jacek Lawrynowicz,
Stanislaw Gruszka
From: Karol Wachowski <karol.wachowski@linux.intel.com>
MTL C0 stepping fixed issue related to butrress interrupt status clearing,
to clear an interrupt status it is required to write 1 to specific
status bit field. This allows to execute read, modify and write routine.
Writing 0 will not clear the interrupt and will cause interrupt storm.
Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
Cc: stable@vger.kernel.org # 6.3.x
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
---
drivers/accel/ivpu/ivpu_drv.h | 1 +
drivers/accel/ivpu/ivpu_hw_mtl.c | 18 ++++++++++++------
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
index 315180dd72ce..8fe8cda2e39d 100644
--- a/drivers/accel/ivpu/ivpu_drv.h
+++ b/drivers/accel/ivpu/ivpu_drv.h
@@ -75,6 +75,7 @@ struct ivpu_wa_table {
bool punit_disabled;
bool clear_runtime_mem;
bool d3hot_after_power_off;
+ bool interrupt_clear_with_0;
};
struct ivpu_hw_info;
diff --git a/drivers/accel/ivpu/ivpu_hw_mtl.c b/drivers/accel/ivpu/ivpu_hw_mtl.c
index d3ba633daaa0..f1211e74017d 100644
--- a/drivers/accel/ivpu/ivpu_hw_mtl.c
+++ b/drivers/accel/ivpu/ivpu_hw_mtl.c
@@ -101,6 +101,9 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev)
vdev->wa.punit_disabled = ivpu_is_fpga(vdev);
vdev->wa.clear_runtime_mem = false;
vdev->wa.d3hot_after_power_off = true;
+
+ if (ivpu_device_id(vdev) == PCI_DEVICE_ID_MTL && ivpu_revision(vdev) < 4)
+ vdev->wa.interrupt_clear_with_0 = true;
}
static void ivpu_hw_timeouts_init(struct ivpu_device *vdev)
@@ -962,12 +965,15 @@ static u32 ivpu_hw_mtl_irqb_handler(struct ivpu_device *vdev, int irq)
schedule_recovery = true;
}
- /*
- * Clear local interrupt status by writing 0 to all bits.
- * This must be done after interrupts are cleared at the source.
- * Writing 1 triggers an interrupt, so we can't perform read update write.
- */
- REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, 0x0);
+ /* This must be done after interrupts are cleared at the source. */
+ if (IVPU_WA(interrupt_clear_with_0))
+ /*
+ * Writing 1 triggers an interrupt, so we can't perform read update write.
+ * Clear local interrupt status by writing 0 to all bits.
+ */
+ REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, 0x0);
+ else
+ REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, status);
/* Re-enable global interrupt */
REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x0);
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] accel/ivpu: Clear specific interrupt status bits on C0
2023-07-03 8:07 ` [PATCH 2/2] accel/ivpu: Clear specific interrupt status bits on C0 Stanislaw Gruszka
@ 2023-07-05 8:26 ` Jacek Lawrynowicz
0 siblings, 0 replies; 5+ messages in thread
From: Jacek Lawrynowicz @ 2023-07-05 8:26 UTC (permalink / raw)
To: Stanislaw Gruszka, dri-devel; +Cc: Karol Wachowski, Oded Gabbay, Jeffrey Hugo
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
On 03.07.2023 10:07, Stanislaw Gruszka wrote:
> From: Karol Wachowski <karol.wachowski@linux.intel.com>
>
> MTL C0 stepping fixed issue related to butrress interrupt status clearing,
> to clear an interrupt status it is required to write 1 to specific
> status bit field. This allows to execute read, modify and write routine.
>
> Writing 0 will not clear the interrupt and will cause interrupt storm.
>
> Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
> Cc: stable@vger.kernel.org # 6.3.x
> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
> ---
> drivers/accel/ivpu/ivpu_drv.h | 1 +
> drivers/accel/ivpu/ivpu_hw_mtl.c | 18 ++++++++++++------
> 2 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
> index 315180dd72ce..8fe8cda2e39d 100644
> --- a/drivers/accel/ivpu/ivpu_drv.h
> +++ b/drivers/accel/ivpu/ivpu_drv.h
> @@ -75,6 +75,7 @@ struct ivpu_wa_table {
> bool punit_disabled;
> bool clear_runtime_mem;
> bool d3hot_after_power_off;
> + bool interrupt_clear_with_0;
> };
>
> struct ivpu_hw_info;
> diff --git a/drivers/accel/ivpu/ivpu_hw_mtl.c b/drivers/accel/ivpu/ivpu_hw_mtl.c
> index d3ba633daaa0..f1211e74017d 100644
> --- a/drivers/accel/ivpu/ivpu_hw_mtl.c
> +++ b/drivers/accel/ivpu/ivpu_hw_mtl.c
> @@ -101,6 +101,9 @@ static void ivpu_hw_wa_init(struct ivpu_device *vdev)
> vdev->wa.punit_disabled = ivpu_is_fpga(vdev);
> vdev->wa.clear_runtime_mem = false;
> vdev->wa.d3hot_after_power_off = true;
> +
> + if (ivpu_device_id(vdev) == PCI_DEVICE_ID_MTL && ivpu_revision(vdev) < 4)
> + vdev->wa.interrupt_clear_with_0 = true;
> }
>
> static void ivpu_hw_timeouts_init(struct ivpu_device *vdev)
> @@ -962,12 +965,15 @@ static u32 ivpu_hw_mtl_irqb_handler(struct ivpu_device *vdev, int irq)
> schedule_recovery = true;
> }
>
> - /*
> - * Clear local interrupt status by writing 0 to all bits.
> - * This must be done after interrupts are cleared at the source.
> - * Writing 1 triggers an interrupt, so we can't perform read update write.
> - */
> - REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, 0x0);
> + /* This must be done after interrupts are cleared at the source. */
> + if (IVPU_WA(interrupt_clear_with_0))
> + /*
> + * Writing 1 triggers an interrupt, so we can't perform read update write.
> + * Clear local interrupt status by writing 0 to all bits.
> + */
> + REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, 0x0);
> + else
> + REGB_WR32(MTL_BUTTRESS_INTERRUPT_STAT, status);
>
> /* Re-enable global interrupt */
> REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x0);
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable
2023-07-03 8:07 [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable Stanislaw Gruszka
2023-07-03 8:07 ` [PATCH 2/2] accel/ivpu: Clear specific interrupt status bits on C0 Stanislaw Gruszka
@ 2023-07-05 8:26 ` Jacek Lawrynowicz
2023-07-05 10:38 ` Stanislaw Gruszka
2 siblings, 0 replies; 5+ messages in thread
From: Jacek Lawrynowicz @ 2023-07-05 8:26 UTC (permalink / raw)
To: Stanislaw Gruszka, dri-devel; +Cc: Karol Wachowski, Oded Gabbay, Jeffrey Hugo
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
On 03.07.2023 10:07, Stanislaw Gruszka wrote:
> From: Karol Wachowski <karol.wachowski@linux.intel.com>
>
> Incorrect REGB_WR32() macro was used to access VPUIP register.
> Use correct REGV_WR32().
>
> Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
> Cc: stable@vger.kernel.org # 6.3.x
> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
> ---
> drivers/accel/ivpu/ivpu_hw_mtl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/accel/ivpu/ivpu_hw_mtl.c b/drivers/accel/ivpu/ivpu_hw_mtl.c
> index 3ff60fbbc8d9..d3ba633daaa0 100644
> --- a/drivers/accel/ivpu/ivpu_hw_mtl.c
> +++ b/drivers/accel/ivpu/ivpu_hw_mtl.c
> @@ -874,7 +874,7 @@ static void ivpu_hw_mtl_irq_disable(struct ivpu_device *vdev)
> REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x1);
> REGB_WR32(MTL_BUTTRESS_LOCAL_INT_MASK, BUTTRESS_IRQ_DISABLE_MASK);
> REGV_WR64(MTL_VPU_HOST_SS_ICB_ENABLE_0, 0x0ull);
> - REGB_WR32(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, 0x0);
> + REGV_WR32(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, 0x0);
> }
>
> static void ivpu_hw_mtl_irq_wdt_nce_handler(struct ivpu_device *vdev)
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable
2023-07-03 8:07 [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable Stanislaw Gruszka
2023-07-03 8:07 ` [PATCH 2/2] accel/ivpu: Clear specific interrupt status bits on C0 Stanislaw Gruszka
2023-07-05 8:26 ` [PATCH 1/2] accel/ivpu: Fix VPU register access in irq disable Jacek Lawrynowicz
@ 2023-07-05 10:38 ` Stanislaw Gruszka
2 siblings, 0 replies; 5+ messages in thread
From: Stanislaw Gruszka @ 2023-07-05 10:38 UTC (permalink / raw)
To: dri-devel; +Cc: Karol Wachowski, Oded Gabbay, Jeffrey Hugo, Jacek Lawrynowicz
Applied to drm-misc-fixes
Thanks
Stanislaw
On Mon, Jul 03, 2023 at 10:07:24AM +0200, Stanislaw Gruszka wrote:
> From: Karol Wachowski <karol.wachowski@linux.intel.com>
>
> Incorrect REGB_WR32() macro was used to access VPUIP register.
> Use correct REGV_WR32().
>
> Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
> Cc: stable@vger.kernel.org # 6.3.x
> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
> Signed-off-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
> ---
> drivers/accel/ivpu/ivpu_hw_mtl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/accel/ivpu/ivpu_hw_mtl.c b/drivers/accel/ivpu/ivpu_hw_mtl.c
> index 3ff60fbbc8d9..d3ba633daaa0 100644
> --- a/drivers/accel/ivpu/ivpu_hw_mtl.c
> +++ b/drivers/accel/ivpu/ivpu_hw_mtl.c
> @@ -874,7 +874,7 @@ static void ivpu_hw_mtl_irq_disable(struct ivpu_device *vdev)
> REGB_WR32(MTL_BUTTRESS_GLOBAL_INT_MASK, 0x1);
> REGB_WR32(MTL_BUTTRESS_LOCAL_INT_MASK, BUTTRESS_IRQ_DISABLE_MASK);
> REGV_WR64(MTL_VPU_HOST_SS_ICB_ENABLE_0, 0x0ull);
> - REGB_WR32(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, 0x0);
> + REGV_WR32(MTL_VPU_HOST_SS_FW_SOC_IRQ_EN, 0x0);
> }
>
> static void ivpu_hw_mtl_irq_wdt_nce_handler(struct ivpu_device *vdev)
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread