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From: Ryan Chen <ryan_chen@aspeedtech.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Fri, 14 Jul 2023 15:45:21 +0800	[thread overview]
Message-ID: <20230714074522.23827-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20230714074522.23827-1-ryan_chen@aspeedtech.com>

Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/i2c/aspeed,i2c.yaml   | 51 +++++++++++++++++--
 1 file changed, 48 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index 6df27b47b922..6c16fc76c978 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
 maintainers:
   - Rayn Chen <rayn_chen@aspeedtech.com>
 
-allOf:
-  - $ref: /schemas/i2c/i2c-controller.yaml#
-
 properties:
   compatible:
     enum:
@@ -49,12 +46,50 @@ properties:
     description:
       states that there is another master active on this bus
 
+  aspeed,enable-dma:
+    type: boolean
+    description: |
+      I2C bus enable dma mode transfer.
+
+      ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+      single DMA engine. DTS files can specify the data transfer mode to/from
+      the device, either DMA or programmed I/O. However, hardware limitations
+      may require a DTS to manually allocate which controller can use DMA mode.
+      The "aspeed,enable-dma" property allows control of this.
+
+      In cases where one the hardware design results in a specific
+      controller handling a larger amount of data, a DTS would likely
+      enable DMA mode for that one controller.
+
+  aspeed,global-regs:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: The phandle of i2c global register node.
+
 required:
   - reg
   - compatible
   - clocks
   - resets
 
+allOf:
+  - $ref: /schemas/i2c/i2c-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: aspeed,ast2600-i2cv2
+
+    then:
+      properties:
+        reg:
+          minItems: 2
+      required:
+        - aspeed,global-regs
+    else:
+      properties:
+        aspeed,global-regs: false
+        aspeed,enable-dma: false
+
 unevaluatedProperties: false
 
 examples:
@@ -71,3 +106,13 @@ examples:
       interrupts = <0>;
       interrupt-parent = <&i2c_ic>;
     };
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    i2c1: i2c at 80 {
+      compatible = "aspeed,ast2600-i2cv2";
+      reg = <0x80 0x80>, <0xc00 0x20>;
+      aspeed,global-regs = <&i2c_global>;
+      clocks = <&syscon ASPEED_CLK_APB>;
+      resets = <&syscon ASPEED_RESET_I2C>;
+      interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Ryan Chen <ryan_chen@aspeedtech.com>
To: <jk@codeconstruct.com.au>,
	Brendan Higgins <brendan.higgins@linux.dev>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andrew Jeffery <andrew@aj.id.au>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Wolfram Sang <wsa@kernel.org>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	<linux-i2c@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Jean Delvare <jdelvare@suse.de>,
	William Zhang <william.zhang@broadcom.com>,
	Tyrone Ting <kfting@nuvoton.com>,
	Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	"Phil Edworthy" <phil.edworthy@renesas.com>,
	<openbmc@lists.ozlabs.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>, <=linux-kernel@vger.kernel.org>,
	Andi Shyti <andi.shyti@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Fri, 14 Jul 2023 15:45:21 +0800	[thread overview]
Message-ID: <20230714074522.23827-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20230714074522.23827-1-ryan_chen@aspeedtech.com>

Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/i2c/aspeed,i2c.yaml   | 51 +++++++++++++++++--
 1 file changed, 48 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index 6df27b47b922..6c16fc76c978 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
 maintainers:
   - Rayn Chen <rayn_chen@aspeedtech.com>
 
-allOf:
-  - $ref: /schemas/i2c/i2c-controller.yaml#
-
 properties:
   compatible:
     enum:
@@ -49,12 +46,50 @@ properties:
     description:
       states that there is another master active on this bus
 
+  aspeed,enable-dma:
+    type: boolean
+    description: |
+      I2C bus enable dma mode transfer.
+
+      ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+      single DMA engine. DTS files can specify the data transfer mode to/from
+      the device, either DMA or programmed I/O. However, hardware limitations
+      may require a DTS to manually allocate which controller can use DMA mode.
+      The "aspeed,enable-dma" property allows control of this.
+
+      In cases where one the hardware design results in a specific
+      controller handling a larger amount of data, a DTS would likely
+      enable DMA mode for that one controller.
+
+  aspeed,global-regs:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: The phandle of i2c global register node.
+
 required:
   - reg
   - compatible
   - clocks
   - resets
 
+allOf:
+  - $ref: /schemas/i2c/i2c-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: aspeed,ast2600-i2cv2
+
+    then:
+      properties:
+        reg:
+          minItems: 2
+      required:
+        - aspeed,global-regs
+    else:
+      properties:
+        aspeed,global-regs: false
+        aspeed,enable-dma: false
+
 unevaluatedProperties: false
 
 examples:
@@ -71,3 +106,13 @@ examples:
       interrupts = <0>;
       interrupt-parent = <&i2c_ic>;
     };
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    i2c1: i2c@80 {
+      compatible = "aspeed,ast2600-i2cv2";
+      reg = <0x80 0x80>, <0xc00 0x20>;
+      aspeed,global-regs = <&i2c_global>;
+      clocks = <&syscon ASPEED_CLK_APB>;
+      resets = <&syscon ASPEED_RESET_I2C>;
+      interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Ryan Chen <ryan_chen@aspeedtech.com>
To: <jk@codeconstruct.com.au>,
	Brendan Higgins <brendan.higgins@linux.dev>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andrew Jeffery <andrew@aj.id.au>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Wolfram Sang <wsa@kernel.org>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	<linux-i2c@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Jean Delvare <jdelvare@suse.de>,
	William Zhang <william.zhang@broadcom.com>,
	Tyrone Ting <kfting@nuvoton.com>,
	Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	"Phil Edworthy" <phil.edworthy@renesas.com>,
	<openbmc@lists.ozlabs.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-aspeed@lists.ozlabs.org>, <=linux-kernel@vger.kernel.org>,
	Andi Shyti <andi.shyti@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Fri, 14 Jul 2023 15:45:21 +0800	[thread overview]
Message-ID: <20230714074522.23827-2-ryan_chen@aspeedtech.com> (raw)
In-Reply-To: <20230714074522.23827-1-ryan_chen@aspeedtech.com>

Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/i2c/aspeed,i2c.yaml   | 51 +++++++++++++++++--
 1 file changed, 48 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index 6df27b47b922..6c16fc76c978 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
 maintainers:
   - Rayn Chen <rayn_chen@aspeedtech.com>
 
-allOf:
-  - $ref: /schemas/i2c/i2c-controller.yaml#
-
 properties:
   compatible:
     enum:
@@ -49,12 +46,50 @@ properties:
     description:
       states that there is another master active on this bus
 
+  aspeed,enable-dma:
+    type: boolean
+    description: |
+      I2C bus enable dma mode transfer.
+
+      ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+      single DMA engine. DTS files can specify the data transfer mode to/from
+      the device, either DMA or programmed I/O. However, hardware limitations
+      may require a DTS to manually allocate which controller can use DMA mode.
+      The "aspeed,enable-dma" property allows control of this.
+
+      In cases where one the hardware design results in a specific
+      controller handling a larger amount of data, a DTS would likely
+      enable DMA mode for that one controller.
+
+  aspeed,global-regs:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: The phandle of i2c global register node.
+
 required:
   - reg
   - compatible
   - clocks
   - resets
 
+allOf:
+  - $ref: /schemas/i2c/i2c-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: aspeed,ast2600-i2cv2
+
+    then:
+      properties:
+        reg:
+          minItems: 2
+      required:
+        - aspeed,global-regs
+    else:
+      properties:
+        aspeed,global-regs: false
+        aspeed,enable-dma: false
+
 unevaluatedProperties: false
 
 examples:
@@ -71,3 +106,13 @@ examples:
       interrupts = <0>;
       interrupt-parent = <&i2c_ic>;
     };
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    i2c1: i2c@80 {
+      compatible = "aspeed,ast2600-i2cv2";
+      reg = <0x80 0x80>, <0xc00 0x20>;
+      aspeed,global-regs = <&i2c_global>;
+      clocks = <&syscon ASPEED_CLK_APB>;
+      resets = <&syscon ASPEED_RESET_I2C>;
+      interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Ryan Chen <ryan_chen@aspeedtech.com>
To: jk@codeconstruct.com.au,
	Brendan Higgins <brendan.higgins@linux.dev>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Joel Stanley <joel@jms.id.au>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Andrew Jeffery <andrew@aj.id.au>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Wolfram Sang <wsa@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	linux-i2c@vger.kernel.org,
	Florian Fainelli <f.fainelli@gmail.com>,
	Jean Delvare <jdelvare@suse.de>,
	William Zhang <william.zhang@broadcom.com>,
	Tyrone Ting <kfting@nuvoton.com>,
	Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	openbmc@lists.ozlabs.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, =linux-kernel@vger.kernel.org,
	Andi Shyti <andi.shyti@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2
Date: Fri, 14 Jul 2023 15:45:21 +0800	[thread overview]
Message-ID: <20230714074522.23827-2-ryan_chen@aspeedtech.com> (raw)
Message-ID: <20230714074521.QI9YM2iN-v0-HOAuNgUCx7dS-CQHDoGJxArVtiuHyhI@z> (raw)
In-Reply-To: <20230714074522.23827-1-ryan_chen@aspeedtech.com>

Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma
and description for ast2600-i2cv2.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/i2c/aspeed,i2c.yaml   | 51 +++++++++++++++++--
 1 file changed, 48 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index 6df27b47b922..6c16fc76c978 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs
 maintainers:
   - Rayn Chen <rayn_chen@aspeedtech.com>
 
-allOf:
-  - $ref: /schemas/i2c/i2c-controller.yaml#
-
 properties:
   compatible:
     enum:
@@ -49,12 +46,50 @@ properties:
     description:
       states that there is another master active on this bus
 
+  aspeed,enable-dma:
+    type: boolean
+    description: |
+      I2C bus enable dma mode transfer.
+
+      ASPEED ast2600 platform equipped with 16 I2C controllers that share a
+      single DMA engine. DTS files can specify the data transfer mode to/from
+      the device, either DMA or programmed I/O. However, hardware limitations
+      may require a DTS to manually allocate which controller can use DMA mode.
+      The "aspeed,enable-dma" property allows control of this.
+
+      In cases where one the hardware design results in a specific
+      controller handling a larger amount of data, a DTS would likely
+      enable DMA mode for that one controller.
+
+  aspeed,global-regs:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: The phandle of i2c global register node.
+
 required:
   - reg
   - compatible
   - clocks
   - resets
 
+allOf:
+  - $ref: /schemas/i2c/i2c-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: aspeed,ast2600-i2cv2
+
+    then:
+      properties:
+        reg:
+          minItems: 2
+      required:
+        - aspeed,global-regs
+    else:
+      properties:
+        aspeed,global-regs: false
+        aspeed,enable-dma: false
+
 unevaluatedProperties: false
 
 examples:
@@ -71,3 +106,13 @@ examples:
       interrupts = <0>;
       interrupt-parent = <&i2c_ic>;
     };
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    i2c1: i2c@80 {
+      compatible = "aspeed,ast2600-i2cv2";
+      reg = <0x80 0x80>, <0xc00 0x20>;
+      aspeed,global-regs = <&i2c_global>;
+      clocks = <&syscon ASPEED_CLK_APB>;
+      resets = <&syscon ASPEED_RESET_I2C>;
+      interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-07-14  7:45 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-14  7:45 [PATCH v12 0/2] Add ASPEED AST2600 I2Cv2 controller driver Ryan Chen
2023-07-14  7:45 ` Ryan Chen
2023-07-14  7:45 ` Ryan Chen
2023-07-14  7:45 ` Ryan Chen
2023-07-14  7:45 ` Ryan Chen [this message]
2023-07-14  7:45   ` [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2 Ryan Chen
2023-07-14  7:45   ` Ryan Chen
2023-07-14  7:45   ` Ryan Chen
2023-07-14  7:45 ` [PATCH v12 2/2] i2c: aspeed: support ast2600 i2c new register mode driver Ryan Chen
2023-07-14  7:45   ` Ryan Chen
2023-07-14  7:45   ` Ryan Chen
2023-07-14  7:45   ` Ryan Chen
2023-07-14  8:03   ` Krzysztof Kozlowski
2023-07-14  8:03     ` Krzysztof Kozlowski
2023-07-14  8:03     ` Krzysztof Kozlowski
2023-07-14  8:08     ` Ryan Chen
2023-07-14  8:08       ` Ryan Chen
2023-07-14  8:08       ` Ryan Chen
2023-07-14  8:56       ` Andy Shevchenko
2023-07-14  8:56         ` Andy Shevchenko
2023-07-14  8:56         ` Andy Shevchenko
2023-07-14  8:56         ` Andy Shevchenko
2023-07-14  8:57       ` Krzysztof Kozlowski
2023-07-14  8:57         ` Krzysztof Kozlowski
2023-07-14  8:57         ` Krzysztof Kozlowski
2023-07-14  9:26         ` Ryan Chen
2023-07-14  9:26           ` Ryan Chen
2023-07-26  3:38           ` Ryan Chen
2023-07-26  3:38             ` Ryan Chen
2023-07-26  6:31             ` Krzysztof Kozlowski
2023-07-26  6:31               ` Krzysztof Kozlowski
2023-07-26  6:19           ` Ryan Chen
2023-07-26  6:19             ` Ryan Chen
2023-07-14  8:55   ` Andy Shevchenko
2023-07-14  8:55     ` Andy Shevchenko
2023-07-14  8:55     ` Andy Shevchenko
2023-07-14  8:55     ` Andy Shevchenko
2023-08-31  6:04     ` Ryan Chen
2023-08-31  6:04       ` Ryan Chen
2023-08-31  6:04       ` Ryan Chen
2023-08-31  6:04       ` Ryan Chen
2023-08-31 14:18       ` Andy Shevchenko
2023-08-31 14:18         ` Andy Shevchenko
2023-08-31 14:18         ` Andy Shevchenko
2023-08-31 14:18         ` Andy Shevchenko
2023-09-05  6:52     ` Ryan Chen
2023-09-05  6:52       ` Ryan Chen
2023-09-05  6:52       ` Ryan Chen
2023-09-05  6:52       ` Ryan Chen
2023-09-05 11:55       ` Andy Shevchenko
2023-09-05 11:55         ` Andy Shevchenko
2023-09-05 11:55         ` Andy Shevchenko
2023-09-05 11:55         ` Andy Shevchenko
2023-10-05  6:21         ` Ryan Chen
2023-10-05  6:21           ` Ryan Chen
2023-10-05  6:21           ` Ryan Chen
2023-10-05  6:21           ` Ryan Chen
2023-10-05 11:56           ` Andy Shevchenko
2023-10-05 11:56             ` Andy Shevchenko
2023-10-05 11:56             ` Andy Shevchenko
2023-10-05 11:56             ` Andy Shevchenko
2023-10-11  7:36             ` Ryan Chen
2023-10-11  7:36               ` Ryan Chen
2023-10-11  7:36               ` Ryan Chen
2023-10-11  7:36               ` Ryan Chen
2023-10-11  8:17               ` Ryan Chen
2023-10-11  8:17                 ` Ryan Chen
2023-10-11  8:17                 ` Ryan Chen
2023-10-11  8:17                 ` Ryan Chen

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