From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v2 3/6] RISC-V: KVM: Enable Smstateen accesses
Date: Fri, 21 Jul 2023 10:54:31 +0200 [thread overview]
Message-ID: <20230721-06dfa28577ca906d6aaa5951@orel> (raw)
In-Reply-To: <20230721075439.454473-4-mchitale@ventanamicro.com>
On Fri, Jul 21, 2023 at 01:24:36PM +0530, Mayuresh Chitale wrote:
> Configure hstateen0 register so that the AIA state and envcfg are
> accessible to the vcpus. This includes registers such as siselect,
> sireg, siph, sieh and all the IMISC registers.
>
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> ---
> arch/riscv/include/asm/csr.h | 16 ++++++++++++++++
> arch/riscv/include/asm/kvm_host.h | 1 +
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu.c | 16 ++++++++++++++++
> 4 files changed, 34 insertions(+)
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Mayuresh Chitale <mchitale@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 3/6] RISC-V: KVM: Enable Smstateen accesses
Date: Fri, 21 Jul 2023 10:54:31 +0200 [thread overview]
Message-ID: <20230721-06dfa28577ca906d6aaa5951@orel> (raw)
In-Reply-To: <20230721075439.454473-4-mchitale@ventanamicro.com>
On Fri, Jul 21, 2023 at 01:24:36PM +0530, Mayuresh Chitale wrote:
> Configure hstateen0 register so that the AIA state and envcfg are
> accessible to the vcpus. This includes registers such as siselect,
> sireg, siph, sieh and all the IMISC registers.
>
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> ---
> arch/riscv/include/asm/csr.h | 16 ++++++++++++++++
> arch/riscv/include/asm/kvm_host.h | 1 +
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu.c | 16 ++++++++++++++++
> 4 files changed, 34 insertions(+)
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
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next prev parent reply other threads:[~2023-07-21 8:54 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-21 7:54 [PATCH v2 0/6] Risc-V Kvm Smstateen Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 7:54 ` [PATCH v2 1/6] RISC-V: Detect Smstateen extension Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 8:49 ` Andrew Jones
2023-07-21 8:49 ` Andrew Jones
2023-07-21 9:07 ` Conor Dooley
2023-07-21 9:07 ` Conor Dooley
2023-07-21 10:11 ` Krzysztof Kozlowski
2023-07-21 10:11 ` Krzysztof Kozlowski
2023-07-21 7:54 ` [PATCH v2 2/6] RISC-V: KVM: Add kvm_vcpu_config Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 8:53 ` Andrew Jones
2023-07-21 8:53 ` Andrew Jones
2023-07-21 7:54 ` [PATCH v2 3/6] RISC-V: KVM: Enable Smstateen accesses Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 8:54 ` Andrew Jones [this message]
2023-07-21 8:54 ` Andrew Jones
2023-07-21 7:54 ` [PATCH v2 4/6] RISCV: KVM: Add senvcfg context save/restore Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 8:55 ` Andrew Jones
2023-07-21 8:55 ` Andrew Jones
2023-07-21 7:54 ` [PATCH v2 5/6] RISCV: KVM: Add sstateen0 " Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 9:04 ` Andrew Jones
2023-07-21 9:04 ` Andrew Jones
2023-07-21 7:54 ` [PATCH v2 6/6] RISCV: KVM: Add sstateen0 to ONE_REG Mayuresh Chitale
2023-07-21 7:54 ` Mayuresh Chitale
2023-07-21 9:13 ` Andrew Jones
2023-07-21 9:13 ` Andrew Jones
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