diff for duplicates of <20230726084352.2136377-1-mchitale@ventanamicro.com>

diff --git a/a/1.txt b/N1/1.txt
index d428707..223266a 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -8,7 +8,7 @@ The motivation behind Smstateen from the spec
 covert channels between separate user threads, or between separate guest OSes
 running under a hypervisor. The problem occurs when an extension adds processor
 state---usually explicit registers, but possibly other forms of state---that
-the main OS or hypervisor is unaware of (and hence won?t context-switch) but
+the main OS or hypervisor is unaware of (and hence won’t context-switch) but
 that can be modified/written by one user thread or guest OS and perceived/
 examined/read by another."
 
@@ -47,3 +47,9 @@ Mayuresh Chitale (7):
 
 -- 
 2.34.1
+
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index 323892f..8539101 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,7 +1,19 @@
  "From\0Mayuresh Chitale <mchitale@ventanamicro.com>\0"
  "Subject\0[PATCH v4 0/7] Risc-V Kvm Smstateen\0"
  "Date\0Wed, 26 Jul 2023 14:13:45 +0530\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0Palmer Dabbelt <palmer@dabbelt.com>"
+ " Anup Patel <anup@brainfault.org>\0"
+ "Cc\0Mayuresh Chitale <mchitale@ventanamicro.com>"
+  Andrew Jones <ajones@ventanamicro.com>
+  Atish Patra <atishp@atishpatra.org>
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Albert Ou <aou@eecs.berkeley.edu>
+  linux-riscv@lists.infradead.org
+  kvm-riscv@lists.infradead.org
+  Conor Dooley <conor@kernel.org>
+  Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
+  Rob Herring <robh+dt@kernel.org>
+ " devicetree@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "This series adds support to detect the Smstateen extension for both, the\n"
@@ -14,7 +26,7 @@
  "covert channels between separate user threads, or between separate guest OSes\n"
  "running under a hypervisor. The problem occurs when an extension adds processor\n"
  "state---usually explicit registers, but possibly other forms of state---that\n"
- "the main OS or hypervisor is unaware of (and hence won?t context-switch) but\n"
+ "the main OS or hypervisor is unaware of (and hence won\342\200\231t context-switch) but\n"
  "that can be modified/written by one user thread or guest OS and perceived/\n"
  "examined/read by another.\"\n"
  "\n"
@@ -52,6 +64,12 @@
  " 9 files changed, 154 insertions(+), 13 deletions(-)\n"
  "\n"
  "-- \n"
- 2.34.1
+ "2.34.1\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-2fb453eca9c0c04be5a03a2fc107f60a3ef5d3386063cc9a0f81ffd5f69ef539
+8a942acd9f709ae96ecc8a5c1574385b50f2e489b9048fbbddcdcd60ceef470f
