From: Shawn Guo <shawnguo@kernel.org>
To: Marek Vasut <marex@denx.de>
Cc: linux-arm-kernel@lists.infradead.org,
Adam Ford <aford173@gmail.com>,
Conor Dooley <conor+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Li Jun <jun.li@nxp.com>, Marco Felsch <m.felsch@pengutronix.de>,
NXP Linux Team <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Richard Cochran <richardcochran@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mn: Drop CSI1 PHY reference clock configuration
Date: Sun, 30 Jul 2023 21:29:57 +0800 [thread overview]
Message-ID: <20230730132957.GT151430@dragon> (raw)
In-Reply-To: <20230724222247.162806-1-marex@denx.de>
On Tue, Jul 25, 2023 at 12:22:47AM +0200, Marek Vasut wrote:
> The CSI1 PHY reference clock are limited to 125 MHz according to:
> i.MX 8M Nano Applications Processor Reference Manual, Rev. 2, 07/2022
> Table 5-1. Clock Root Table (continued) / page 319
> Slice Index n = 123 .
>
> Currently those IMX8MN_CLK_CSI1_PHY_REF clock are configured to be
> fed directly from 1 GHz PLL2 , which overclocks them . Instead, drop
> the configuration altogether, which defaults the clock to 24 MHz REF
> clock input, which for the PHY reference clock is just fine.
>
> Fixes: ae9279f301b5 ("arm64: dts: imx8mn: Add CSI and ISI Nodes")
> Signed-off-by: Marek Vasut <marex@denx.de>
Applied, thanks!
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WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Marek Vasut <marex@denx.de>
Cc: linux-arm-kernel@lists.infradead.org,
Adam Ford <aford173@gmail.com>,
Conor Dooley <conor+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Li Jun <jun.li@nxp.com>, Marco Felsch <m.felsch@pengutronix.de>,
NXP Linux Team <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Richard Cochran <richardcochran@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
devicetree@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mn: Drop CSI1 PHY reference clock configuration
Date: Sun, 30 Jul 2023 21:29:57 +0800 [thread overview]
Message-ID: <20230730132957.GT151430@dragon> (raw)
In-Reply-To: <20230724222247.162806-1-marex@denx.de>
On Tue, Jul 25, 2023 at 12:22:47AM +0200, Marek Vasut wrote:
> The CSI1 PHY reference clock are limited to 125 MHz according to:
> i.MX 8M Nano Applications Processor Reference Manual, Rev. 2, 07/2022
> Table 5-1. Clock Root Table (continued) / page 319
> Slice Index n = 123 .
>
> Currently those IMX8MN_CLK_CSI1_PHY_REF clock are configured to be
> fed directly from 1 GHz PLL2 , which overclocks them . Instead, drop
> the configuration altogether, which defaults the clock to 24 MHz REF
> clock input, which for the PHY reference clock is just fine.
>
> Fixes: ae9279f301b5 ("arm64: dts: imx8mn: Add CSI and ISI Nodes")
> Signed-off-by: Marek Vasut <marex@denx.de>
Applied, thanks!
next prev parent reply other threads:[~2023-07-30 13:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-24 22:22 [PATCH] arm64: dts: imx8mn: Drop CSI1 PHY reference clock configuration Marek Vasut
2023-07-25 7:41 ` Marco Felsch
2023-07-25 13:01 ` Adam Ford
2023-07-25 13:02 ` Fabio Estevam
2023-07-30 13:29 ` Shawn Guo [this message]
2023-07-30 13:29 ` Shawn Guo
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