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From: Rob Herring <robh@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Saravana Kannan <saravanak@google.com>,
	Marc Zyngier <maz@kernel.org>, Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Frank Rowand <frowand.list@gmail.com>,
	linux-riscv@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v7 02/15] of: property: Add fw_devlink support for msi-parent
Date: Fri, 11 Aug 2023 13:39:24 -0600	[thread overview]
Message-ID: <20230811193924.GA3997669-robh@kernel.org> (raw)
In-Reply-To: <20230802150018.327079-3-apatel@ventanamicro.com>

On Wed, Aug 02, 2023 at 08:30:05PM +0530, Anup Patel wrote:
> This allows fw_devlink to create device links between consumers of
> a MSI and the supplier of the MSI.
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  drivers/of/property.c | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/of/property.c b/drivers/of/property.c
> index ddc75cd50825..bc20535deed7 100644
> --- a/drivers/of/property.c
> +++ b/drivers/of/property.c
> @@ -1325,6 +1325,37 @@ static struct device_node *parse_interrupts(struct device_node *np,
>  	return of_irq_parse_one(np, index, &sup_args) ? NULL : sup_args.np;
>  }
>  
> +static struct device_node *parse_msi_parent(struct device_node *np,
> +					    const char *prop_name, int index)
> +{
> +	struct of_phandle_args sup_args;
> +	struct device_node *msi_np;
> +
> +	if (IS_ENABLED(CONFIG_SPARC))
> +		return NULL;
> +
> +	if (strcmp(prop_name, "msi-parent"))
> +		return NULL;
> +
> +	msi_np = of_parse_phandle(np, prop_name, 0);
> +	if (msi_np) {
> +		if (!of_property_read_bool(msi_np, "#msi-cells")) {

Use of_property_present() to check presence.

However, this check is wrong. #msi-cells is optional and assumed to be 0 
if not present. There's another flavor of of_parse_phandle_with_args() 
that allows specifying a default cell count, so I think you can get rid 
of all this checking.

> +			if (index) {
> +				of_node_put(msi_np);
> +				return NULL;
> +			}
> +			return msi_np;
> +		}
> +		of_node_put(msi_np);
> +	}
> +
> +	if (of_parse_phandle_with_args(np, prop_name, "#msi-cells", index,
> +				       &sup_args))
> +		return NULL;
> +
> +	return sup_args.np;
> +}
> +
>  static const struct supplier_bindings of_supplier_bindings[] = {
>  	{ .parse_prop = parse_clocks, },
>  	{ .parse_prop = parse_interconnects, },
> @@ -1359,6 +1390,7 @@ static const struct supplier_bindings of_supplier_bindings[] = {
>  	{ .parse_prop = parse_regulators, },
>  	{ .parse_prop = parse_gpio, },
>  	{ .parse_prop = parse_gpios, },
> +	{ .parse_prop = parse_msi_parent, },
>  	{}
>  };
>  
> -- 
> 2.34.1
> 

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Saravana Kannan <saravanak@google.com>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v7 02/15] of: property: Add fw_devlink support for msi-parent
Date: Fri, 11 Aug 2023 13:39:24 -0600	[thread overview]
Message-ID: <20230811193924.GA3997669-robh@kernel.org> (raw)
In-Reply-To: <20230802150018.327079-3-apatel@ventanamicro.com>

On Wed, Aug 02, 2023 at 08:30:05PM +0530, Anup Patel wrote:
> This allows fw_devlink to create device links between consumers of
> a MSI and the supplier of the MSI.
> 
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  drivers/of/property.c | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/of/property.c b/drivers/of/property.c
> index ddc75cd50825..bc20535deed7 100644
> --- a/drivers/of/property.c
> +++ b/drivers/of/property.c
> @@ -1325,6 +1325,37 @@ static struct device_node *parse_interrupts(struct device_node *np,
>  	return of_irq_parse_one(np, index, &sup_args) ? NULL : sup_args.np;
>  }
>  
> +static struct device_node *parse_msi_parent(struct device_node *np,
> +					    const char *prop_name, int index)
> +{
> +	struct of_phandle_args sup_args;
> +	struct device_node *msi_np;
> +
> +	if (IS_ENABLED(CONFIG_SPARC))
> +		return NULL;
> +
> +	if (strcmp(prop_name, "msi-parent"))
> +		return NULL;
> +
> +	msi_np = of_parse_phandle(np, prop_name, 0);
> +	if (msi_np) {
> +		if (!of_property_read_bool(msi_np, "#msi-cells")) {

Use of_property_present() to check presence.

However, this check is wrong. #msi-cells is optional and assumed to be 0 
if not present. There's another flavor of of_parse_phandle_with_args() 
that allows specifying a default cell count, so I think you can get rid 
of all this checking.

> +			if (index) {
> +				of_node_put(msi_np);
> +				return NULL;
> +			}
> +			return msi_np;
> +		}
> +		of_node_put(msi_np);
> +	}
> +
> +	if (of_parse_phandle_with_args(np, prop_name, "#msi-cells", index,
> +				       &sup_args))
> +		return NULL;
> +
> +	return sup_args.np;
> +}
> +
>  static const struct supplier_bindings of_supplier_bindings[] = {
>  	{ .parse_prop = parse_clocks, },
>  	{ .parse_prop = parse_interconnects, },
> @@ -1359,6 +1390,7 @@ static const struct supplier_bindings of_supplier_bindings[] = {
>  	{ .parse_prop = parse_regulators, },
>  	{ .parse_prop = parse_gpio, },
>  	{ .parse_prop = parse_gpios, },
> +	{ .parse_prop = parse_msi_parent, },
>  	{}
>  };
>  
> -- 
> 2.34.1
> 

  reply	other threads:[~2023-08-11 19:39 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-02 15:00 [PATCH v7 00/15] Linux RISC-V AIA Support Anup Patel
2023-08-02 15:00 ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 01/15] RISC-V: Add riscv_get_intc_hartid() function Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 17:09   ` Andrew Jones
2023-08-02 17:09     ` Andrew Jones
2023-08-02 17:18     ` Conor Dooley
2023-08-02 17:18       ` Conor Dooley
2023-08-03  4:12     ` Anup Patel
2023-08-03  4:12       ` Anup Patel
2023-08-02 17:20   ` Conor Dooley
2023-08-02 17:20     ` Conor Dooley
2023-08-03  4:35     ` Anup Patel
2023-08-03  4:35       ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 02/15] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-11 19:39   ` Rob Herring [this message]
2023-08-11 19:39     ` Rob Herring
2023-08-11 20:59     ` Saravana Kannan
2023-08-11 20:59       ` Saravana Kannan
2023-08-12  2:49     ` Anup Patel
2023-08-12  2:49       ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 03/15] drivers: irqchip/riscv-intc: Mark all INTC nodes as initialized Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 04/15] irqchip/sifive-plic: Fix syscore registration for multi-socket systems Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 05/15] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 06/15] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 07/15] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 08/15] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 09/15] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 10/15] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 11/15] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-08-02 15:00   ` Anup Patel
     [not found]   ` <CABvJ_xi5r-NL=22tJWfyQQSti4XgUwsx94B8mQ3LJU29kiQC8w@mail.gmail.com>
2023-08-10  8:08     ` Anup Patel
2023-08-10  8:08       ` Anup Patel
     [not found]       ` <CABvJ_xiZY5RGMXOq0bWKRdkzD=b4ar6cFiujmPbUYmHUzSW5Qw@mail.gmail.com>
2023-08-12  2:59         ` Anup Patel
2023-08-12  2:59           ` Anup Patel
2023-08-14  6:43           ` Vincent Chen
2023-08-14  6:43             ` Vincent Chen
2023-08-02 15:00 ` [PATCH v7 12/15] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 13/15] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 14/15] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-08-02 15:00   ` Anup Patel
2023-08-02 15:00 ` [PATCH v7 15/15] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2023-08-02 15:00   ` Anup Patel

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