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From: Sui Jingfeng <sui.jingfeng@linux.dev>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jocelyn Falempe <jfalempe@redhat.com>,
	Sui Jingfeng <suijingfeng@loongson.cn>,
	nouveau@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	amd-gfx@lists.freedesktop.org,
	Thomas Zimmermann <tzimmermann@suse.de>,
	linux-pci@vger.kernel.org
Subject: [RFC, drm-misc-next v4 7/9] drm/ast: Register as a VGA client by calling vga_client_register()
Date: Tue,  5 Sep 2023 03:57:22 +0800	[thread overview]
Message-ID: <20230904195724.633404-8-sui.jingfeng@linux.dev> (raw)
In-Reply-To: <20230904195724.633404-1-sui.jingfeng@linux.dev>

From: Sui Jingfeng <suijingfeng@loongson.cn>

Becasuse the display controller in the ASpeed BMC chip is a VGA-compatible
device, the software programming guide of AST2400 say that it is fully
IBM VGA compliant. Thus, it should also participate in the arbitration.

Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
---
 drivers/gpu/drm/ast/ast_drv.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index e1224ef4ad83..1349f7bb5dfb 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -28,6 +28,7 @@
 
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/vgaarb.h>
 
 #include <drm/drm_aperture.h>
 #include <drm/drm_atomic_helper.h>
@@ -89,6 +90,34 @@ static const struct pci_device_id ast_pciidlist[] = {
 
 MODULE_DEVICE_TABLE(pci, ast_pciidlist);
 
+static bool ast_want_to_be_primary(struct pci_dev *pdev)
+{
+	if (ast_modeset == 10)
+		return true;
+
+	return false;
+}
+
+static unsigned int ast_vga_set_decode(struct pci_dev *pdev, bool state)
+{
+	struct drm_device *drm = pci_get_drvdata(pdev);
+	struct ast_device *ast = to_ast_device(drm);
+	unsigned int decode;
+
+	if (state) {
+		/* Enable standard VGA decode and Enable normal VGA decode */
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04);
+
+		decode = VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+			 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	} else {
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x07);
+		decode = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	}
+
+	return decode;
+}
+
 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	struct ast_device *ast;
@@ -112,6 +141,8 @@ static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret)
 		return ret;
 
+	vga_client_register(pdev, ast_vga_set_decode, ast_want_to_be_primary);
+
 	drm_fbdev_generic_setup(dev, 32);
 
 	return 0;
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Sui Jingfeng <sui.jingfeng@linux.dev>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jocelyn Falempe <jfalempe@redhat.com>,
	Sui Jingfeng <suijingfeng@loongson.cn>,
	nouveau@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	amd-gfx@lists.freedesktop.org,
	Thomas Zimmermann <tzimmermann@suse.de>,
	linux-pci@vger.kernel.org
Subject: [Intel-gfx] [RFC, drm-misc-next v4 7/9] drm/ast: Register as a VGA client by calling vga_client_register()
Date: Tue,  5 Sep 2023 03:57:22 +0800	[thread overview]
Message-ID: <20230904195724.633404-8-sui.jingfeng@linux.dev> (raw)
In-Reply-To: <20230904195724.633404-1-sui.jingfeng@linux.dev>

From: Sui Jingfeng <suijingfeng@loongson.cn>

Becasuse the display controller in the ASpeed BMC chip is a VGA-compatible
device, the software programming guide of AST2400 say that it is fully
IBM VGA compliant. Thus, it should also participate in the arbitration.

Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
---
 drivers/gpu/drm/ast/ast_drv.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index e1224ef4ad83..1349f7bb5dfb 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -28,6 +28,7 @@
 
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/vgaarb.h>
 
 #include <drm/drm_aperture.h>
 #include <drm/drm_atomic_helper.h>
@@ -89,6 +90,34 @@ static const struct pci_device_id ast_pciidlist[] = {
 
 MODULE_DEVICE_TABLE(pci, ast_pciidlist);
 
+static bool ast_want_to_be_primary(struct pci_dev *pdev)
+{
+	if (ast_modeset == 10)
+		return true;
+
+	return false;
+}
+
+static unsigned int ast_vga_set_decode(struct pci_dev *pdev, bool state)
+{
+	struct drm_device *drm = pci_get_drvdata(pdev);
+	struct ast_device *ast = to_ast_device(drm);
+	unsigned int decode;
+
+	if (state) {
+		/* Enable standard VGA decode and Enable normal VGA decode */
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04);
+
+		decode = VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+			 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	} else {
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x07);
+		decode = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	}
+
+	return decode;
+}
+
 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	struct ast_device *ast;
@@ -112,6 +141,8 @@ static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret)
 		return ret;
 
+	vga_client_register(pdev, ast_vga_set_decode, ast_want_to_be_primary);
+
 	drm_fbdev_generic_setup(dev, 32);
 
 	return 0;
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Sui Jingfeng <sui.jingfeng@linux.dev>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org,
	nouveau@lists.freedesktop.org, linux-pci@vger.kernel.org,
	Sui Jingfeng <suijingfeng@loongson.cn>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Jocelyn Falempe <jfalempe@redhat.com>
Subject: [RFC,drm-misc-next v4 7/9] drm/ast: Register as a VGA client by calling vga_client_register()
Date: Tue,  5 Sep 2023 03:57:22 +0800	[thread overview]
Message-ID: <20230904195724.633404-8-sui.jingfeng@linux.dev> (raw)
In-Reply-To: <20230904195724.633404-1-sui.jingfeng@linux.dev>

From: Sui Jingfeng <suijingfeng@loongson.cn>

Becasuse the display controller in the ASpeed BMC chip is a VGA-compatible
device, the software programming guide of AST2400 say that it is fully
IBM VGA compliant. Thus, it should also participate in the arbitration.

Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
---
 drivers/gpu/drm/ast/ast_drv.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index e1224ef4ad83..1349f7bb5dfb 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -28,6 +28,7 @@
 
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/vgaarb.h>
 
 #include <drm/drm_aperture.h>
 #include <drm/drm_atomic_helper.h>
@@ -89,6 +90,34 @@ static const struct pci_device_id ast_pciidlist[] = {
 
 MODULE_DEVICE_TABLE(pci, ast_pciidlist);
 
+static bool ast_want_to_be_primary(struct pci_dev *pdev)
+{
+	if (ast_modeset == 10)
+		return true;
+
+	return false;
+}
+
+static unsigned int ast_vga_set_decode(struct pci_dev *pdev, bool state)
+{
+	struct drm_device *drm = pci_get_drvdata(pdev);
+	struct ast_device *ast = to_ast_device(drm);
+	unsigned int decode;
+
+	if (state) {
+		/* Enable standard VGA decode and Enable normal VGA decode */
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04);
+
+		decode = VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+			 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	} else {
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x07);
+		decode = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	}
+
+	return decode;
+}
+
 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	struct ast_device *ast;
@@ -112,6 +141,8 @@ static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret)
 		return ret;
 
+	vga_client_register(pdev, ast_vga_set_decode, ast_want_to_be_primary);
+
 	drm_fbdev_generic_setup(dev, 32);
 
 	return 0;
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Sui Jingfeng <sui.jingfeng@linux.dev>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jocelyn Falempe <jfalempe@redhat.com>,
	Sui Jingfeng <suijingfeng@loongson.cn>,
	nouveau@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	amd-gfx@lists.freedesktop.org, linux-pci@vger.kernel.org
Subject: [Nouveau] [RFC, drm-misc-next v4 7/9] drm/ast: Register as a VGA client by calling vga_client_register()
Date: Tue,  5 Sep 2023 03:57:22 +0800	[thread overview]
Message-ID: <20230904195724.633404-8-sui.jingfeng@linux.dev> (raw)
In-Reply-To: <20230904195724.633404-1-sui.jingfeng@linux.dev>

From: Sui Jingfeng <suijingfeng@loongson.cn>

Becasuse the display controller in the ASpeed BMC chip is a VGA-compatible
device, the software programming guide of AST2400 say that it is fully
IBM VGA compliant. Thus, it should also participate in the arbitration.

Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Jocelyn Falempe <jfalempe@redhat.com>
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
---
 drivers/gpu/drm/ast/ast_drv.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index e1224ef4ad83..1349f7bb5dfb 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -28,6 +28,7 @@
 
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/vgaarb.h>
 
 #include <drm/drm_aperture.h>
 #include <drm/drm_atomic_helper.h>
@@ -89,6 +90,34 @@ static const struct pci_device_id ast_pciidlist[] = {
 
 MODULE_DEVICE_TABLE(pci, ast_pciidlist);
 
+static bool ast_want_to_be_primary(struct pci_dev *pdev)
+{
+	if (ast_modeset == 10)
+		return true;
+
+	return false;
+}
+
+static unsigned int ast_vga_set_decode(struct pci_dev *pdev, bool state)
+{
+	struct drm_device *drm = pci_get_drvdata(pdev);
+	struct ast_device *ast = to_ast_device(drm);
+	unsigned int decode;
+
+	if (state) {
+		/* Enable standard VGA decode and Enable normal VGA decode */
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04);
+
+		decode = VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+			 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	} else {
+		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x07);
+		decode = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+	}
+
+	return decode;
+}
+
 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	struct ast_device *ast;
@@ -112,6 +141,8 @@ static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret)
 		return ret;
 
+	vga_client_register(pdev, ast_vga_set_decode, ast_want_to_be_primary);
+
 	drm_fbdev_generic_setup(dev, 32);
 
 	return 0;
-- 
2.34.1


  parent reply	other threads:[~2023-09-05  7:47 UTC|newest]

Thread overview: 186+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-04 19:57 [RFC, drm-misc-next v4 0/9] PCI/VGA: Allowing the user to select the primary video adapter at boot time Sui Jingfeng
2023-09-04 19:57 ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57 ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 1/9] " Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-05  0:37   ` [RFC,drm-misc-next " kernel test robot
2023-09-04 19:57 ` [RFC, drm-misc-next v4 2/9] drm/nouveau: Implement .be_primary() callback Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 3/9] drm/radeon: " Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-05  5:50   ` [RFC,drm-misc-next " Christian König
2023-09-05  5:50     ` [Nouveau] [RFC, drm-misc-next " Christian König
2023-09-05  5:50     ` [RFC,drm-misc-next " Christian König
2023-09-05  5:50     ` [Intel-gfx] [RFC, drm-misc-next " Christian König
2023-09-05 17:24     ` [RFC,drm-misc-next " suijingfeng
2023-09-05 17:24       ` [Nouveau] [RFC, drm-misc-next " suijingfeng
2023-09-05 17:24       ` [RFC,drm-misc-next " suijingfeng
2023-09-05 17:24       ` [Intel-gfx] [RFC, drm-misc-next " suijingfeng
2023-09-06 16:00       ` Alex Deucher
2023-09-06 16:00         ` [Nouveau] " Alex Deucher
2023-09-06 16:00         ` [RFC,drm-misc-next " Alex Deucher
2023-09-06 16:00         ` [Intel-gfx] [RFC, drm-misc-next " Alex Deucher
2023-09-07  1:40         ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-07  1:40           ` [Nouveau] [RFC, drm-misc-next " Sui Jingfeng
2023-09-07  1:40           ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-07  1:40           ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 4/9] drm/amdgpu: " Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 5/9] drm/i915: " Sui Jingfeng
2023-09-04 19:57   ` Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 6/9] drm/loongson: " Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` Sui Jingfeng [this message]
2023-09-04 19:57   ` [Nouveau] [RFC, drm-misc-next v4 7/9] drm/ast: Register as a VGA client by calling vga_client_register() Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 8/9] drm/hibmc: " Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 19:57 ` [RFC, drm-misc-next v4 9/9] drm/gma500: " Sui Jingfeng
2023-09-04 19:57   ` [Nouveau] " Sui Jingfeng
2023-09-04 19:57   ` [RFC,drm-misc-next " Sui Jingfeng
2023-09-04 19:57   ` [Intel-gfx] [RFC, drm-misc-next " Sui Jingfeng
2023-09-04 20:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for PCI/VGA: Allowing the user to select the primary video adapter at boot time Patchwork
2023-09-04 20:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-04 22:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-05 10:38 ` [RFC, drm-misc-next v4 0/9] " Jani Nikula
2023-09-05 10:38   ` [Nouveau] " Jani Nikula
2023-09-05 10:38   ` Jani Nikula
2023-09-05 10:38   ` [Intel-gfx] " Jani Nikula
2023-09-05 13:28   ` Christian König
2023-09-05 13:28     ` [Nouveau] " Christian König
2023-09-05 13:28     ` Christian König
2023-09-05 13:28     ` [Intel-gfx] " Christian König
2023-09-05 14:28     ` Sui Jingfeng
2023-09-05 14:28       ` [Nouveau] " Sui Jingfeng
2023-09-05 14:28       ` Sui Jingfeng
2023-09-05 14:28       ` [Intel-gfx] " Sui Jingfeng
2023-09-06  6:47       ` Christian König
2023-09-06  6:47         ` [Nouveau] " Christian König
2023-09-06  6:47         ` Christian König
2023-09-06  6:47         ` [Intel-gfx] " Christian König
2023-09-05 10:45 ` [Nouveau] " Thomas Zimmermann
2023-09-05 10:45   ` Thomas Zimmermann
2023-09-05 10:45   ` [Intel-gfx] " Thomas Zimmermann
2023-09-05 13:30   ` suijingfeng
2023-09-05 13:30     ` suijingfeng
2023-09-05 13:30     ` [Intel-gfx] " suijingfeng
2023-09-05 15:05     ` Thomas Zimmermann
2023-09-05 15:05       ` Thomas Zimmermann
2023-09-05 15:05       ` [Intel-gfx] " Thomas Zimmermann
2023-09-06  2:14       ` suijingfeng
2023-09-06  2:14         ` suijingfeng
2023-09-06  2:14         ` [Intel-gfx] " suijingfeng
2023-09-06  7:00         ` Thomas Zimmermann
2023-09-06  7:00           ` Thomas Zimmermann
2023-09-06  7:00           ` [Intel-gfx] " Thomas Zimmermann
2023-09-06  2:34       ` suijingfeng
2023-09-06  2:34         ` suijingfeng
2023-09-06  2:34         ` [Intel-gfx] " suijingfeng
2023-09-06  7:18         ` Thomas Zimmermann
2023-09-06  7:18           ` Thomas Zimmermann
2023-09-06  7:18           ` [Intel-gfx] " Thomas Zimmermann
2023-09-06  3:08       ` suijingfeng
2023-09-06  3:08         ` suijingfeng
2023-09-06  3:08         ` [Intel-gfx] " suijingfeng
2023-09-06  7:46         ` Thomas Zimmermann
2023-09-06  7:46           ` Thomas Zimmermann
2023-09-06  7:46           ` [Intel-gfx] " Thomas Zimmermann
2023-09-06  4:14       ` Sui Jingfeng
2023-09-06  4:14         ` Sui Jingfeng
2023-09-06  4:14         ` [Intel-gfx] " Sui Jingfeng
2023-09-06  6:45     ` Christian König
2023-09-06  6:45       ` Christian König
2023-09-06  6:45       ` [Intel-gfx] " Christian König
2023-09-06  9:08       ` suijingfeng
2023-09-06  9:08         ` suijingfeng
2023-09-06  9:08         ` [Intel-gfx] " suijingfeng
2023-09-06  9:40         ` Christian König
2023-09-06  9:40           ` Christian König
2023-09-06  9:40           ` [Intel-gfx] " Christian König
2023-09-07  2:30           ` Sui Jingfeng
2023-09-07  2:30             ` Sui Jingfeng
2023-09-07  2:30             ` [Intel-gfx] " Sui Jingfeng
2023-09-07  9:08             ` Christian König
2023-09-07  9:08               ` Christian König
2023-09-07  9:08               ` [Intel-gfx] " Christian König
2023-09-07 12:32               ` suijingfeng
2023-09-07 12:32                 ` suijingfeng
2023-09-07 12:32                 ` [Intel-gfx] " suijingfeng
2023-09-07 12:43                 ` Christian König
2023-09-07 12:43                   ` Christian König
2023-09-07 12:43                   ` [Intel-gfx] " Christian König
2023-09-07 15:26                   ` suijingfeng
2023-09-07 15:26                     ` suijingfeng
2023-09-07 15:26                     ` [Intel-gfx] " suijingfeng
2023-09-07 15:32                     ` Christian König
2023-09-07 15:32                       ` Christian König
2023-09-07 15:32                       ` [Intel-gfx] " Christian König
2023-09-07 16:33               ` suijingfeng
2023-09-07 16:33                 ` suijingfeng
2023-09-07 16:33                 ` [Intel-gfx] " suijingfeng
2023-09-08  6:59                 ` Christian König
2023-09-08  6:59                   ` Christian König
2023-09-08  6:59                   ` [Intel-gfx] " Christian König
2023-09-06 10:31       ` Sui Jingfeng
2023-09-06 10:31         ` Sui Jingfeng
2023-09-06 10:31         ` [Intel-gfx] " Sui Jingfeng
2023-09-06 10:50         ` Christian König
2023-09-06 10:50           ` Christian König
2023-09-06 10:50           ` [Intel-gfx] " Christian König
2023-09-05 10:49 ` Thomas Zimmermann
2023-09-05 10:49   ` Thomas Zimmermann
2023-09-05 10:49   ` [Intel-gfx] " Thomas Zimmermann
2023-09-05 15:59   ` suijingfeng
2023-09-05 15:59     ` suijingfeng
2023-09-05 15:59     ` [Intel-gfx] " suijingfeng
2023-09-06  8:05     ` Thomas Zimmermann
2023-09-06  8:05       ` Thomas Zimmermann
2023-09-06  8:05       ` [Intel-gfx] " Thomas Zimmermann
2023-09-06  9:48       ` suijingfeng
2023-09-06  9:48         ` suijingfeng
2023-09-06  9:48         ` [Intel-gfx] " suijingfeng
2023-09-06 11:06         ` Thomas Zimmermann
2023-09-06 11:06           ` Thomas Zimmermann
2023-09-06 11:06           ` [Intel-gfx] " Thomas Zimmermann
2023-09-07  9:43         ` Jani Nikula
2023-09-07  9:43           ` Jani Nikula
2023-09-07  9:43           ` [Intel-gfx] " Jani Nikula
2023-09-05 14:52 ` Alex Williamson
2023-09-05 14:52   ` [Nouveau] " Alex Williamson
2023-09-05 14:52   ` Alex Williamson
2023-09-05 14:52   ` [Intel-gfx] " Alex Williamson
2023-09-05 16:21   ` suijingfeng
2023-09-05 16:21     ` [Nouveau] " suijingfeng
2023-09-05 16:21     ` suijingfeng
2023-09-05 16:21     ` [Intel-gfx] " suijingfeng
2023-09-05 16:39     ` Alex Williamson
2023-09-05 16:39       ` [Nouveau] " Alex Williamson
2023-09-05 16:39       ` Alex Williamson
2023-09-05 16:39       ` [Intel-gfx] " Alex Williamson
2023-09-06  3:51   ` Sui Jingfeng
2023-09-06  3:51     ` Sui Jingfeng
2023-09-06  3:51     ` [Nouveau] " Sui Jingfeng
2023-09-06  3:51     ` Sui Jingfeng
2023-09-06  3:51     ` [Intel-gfx] " Sui Jingfeng
2023-09-06 19:29     ` Alex Williamson
2023-09-06 19:29       ` [Nouveau] " Alex Williamson
2023-09-06 19:29       ` Alex Williamson
2023-09-06 19:29       ` [Intel-gfx] " Alex Williamson
2023-09-06  0:52 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for PCI/VGA: Allowing the user to select the primary video adapter at boot time (rev2) Patchwork

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