From: Puranjay Mohan <puranjay12@gmail.com>
To: Alexei Starovoitov <ast@kernel.org>,
Daniel Borkmann <daniel@iogearbox.net>,
Andrii Nakryiko <andrii@kernel.org>,
Martin KaFai Lau <martin.lau@linux.dev>,
Song Liu <song@kernel.org>,
Yonghong Song <yonghong.song@linux.dev>,
John Fastabend <john.fastabend@gmail.com>,
KP Singh <kpsingh@kernel.org>,
Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>,
Jiri Olsa <jolsa@kernel.org>,
Shubham Bansal <illusionist.neo@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
Helge Deller <deller@gmx.de>,
"Naveen N. Rao" <naveen.n.rao@linux.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Luke Nelson <luke.r.nels@gmail.com>, Xi Wang <xi.wang@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Wang YanQing <udknight@gmail.com>,
bpf@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-parisc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
netdev@vger.kernel.org
Cc: puranjay12@gmail.com
Subject: [PATCH bpf-next 1/6] bpf, riscv32: Always zero extend for LDX with B/W/H
Date: Tue, 12 Sep 2023 22:46:49 +0000 [thread overview]
Message-ID: <20230912224654.6556-2-puranjay12@gmail.com> (raw)
In-Reply-To: <20230912224654.6556-1-puranjay12@gmail.com>
The JITs should not depend on the verifier for zero extending the upper
32 bits of the destination register when loading a byte, half-word, or
word.
A following patch will make the verifier stop patching zext instructions
after LDX.
Signed-off-by: Puranjay Mohan <puranjay12@gmail.com>
---
arch/riscv/net/bpf_jit_comp32.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/net/bpf_jit_comp32.c b/arch/riscv/net/bpf_jit_comp32.c
index 529a83b85c1c..8f8255519ba1 100644
--- a/arch/riscv/net/bpf_jit_comp32.c
+++ b/arch/riscv/net/bpf_jit_comp32.c
@@ -847,18 +847,15 @@ static int emit_load_r64(const s8 *dst, const s8 *src, s16 off,
switch (size) {
case BPF_B:
emit(rv_lbu(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_H:
emit(rv_lhu(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_W:
emit(rv_lw(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_DW:
emit(rv_lw(lo(rd), 0, RV_REG_T0), ctx);
--
2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Puranjay Mohan <puranjay12@gmail.com>
To: Alexei Starovoitov <ast@kernel.org>,
Daniel Borkmann <daniel@iogearbox.net>,
Andrii Nakryiko <andrii@kernel.org>,
Martin KaFai Lau <martin.lau@linux.dev>,
Song Liu <song@kernel.org>,
Yonghong Song <yonghong.song@linux.dev>,
John Fastabend <john.fastabend@gmail.com>,
KP Singh <kpsingh@kernel.org>,
Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>,
Jiri Olsa <jolsa@kernel.org>,
Shubham Bansal <illusionist.neo@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
Helge Deller <deller@gmx.de>,
"Naveen N. Rao" <naveen.n.rao@linux.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Luke Nelson <luke.r.nels@gmail.com>, Xi Wang <xi.wang@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Wang YanQing <udknight@gmail.com>,
bpf@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-parisc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
netdev@vger.kernel.org
Cc: puranjay12@gmail.com
Subject: [PATCH bpf-next 1/6] bpf, riscv32: Always zero extend for LDX with B/W/H
Date: Tue, 12 Sep 2023 22:46:49 +0000 [thread overview]
Message-ID: <20230912224654.6556-2-puranjay12@gmail.com> (raw)
In-Reply-To: <20230912224654.6556-1-puranjay12@gmail.com>
The JITs should not depend on the verifier for zero extending the upper
32 bits of the destination register when loading a byte, half-word, or
word.
A following patch will make the verifier stop patching zext instructions
after LDX.
Signed-off-by: Puranjay Mohan <puranjay12@gmail.com>
---
arch/riscv/net/bpf_jit_comp32.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/net/bpf_jit_comp32.c b/arch/riscv/net/bpf_jit_comp32.c
index 529a83b85c1c..8f8255519ba1 100644
--- a/arch/riscv/net/bpf_jit_comp32.c
+++ b/arch/riscv/net/bpf_jit_comp32.c
@@ -847,18 +847,15 @@ static int emit_load_r64(const s8 *dst, const s8 *src, s16 off,
switch (size) {
case BPF_B:
emit(rv_lbu(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_H:
emit(rv_lhu(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_W:
emit(rv_lw(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_DW:
emit(rv_lw(lo(rd), 0, RV_REG_T0), ctx);
--
2.39.2
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Puranjay Mohan <puranjay12@gmail.com>
To: Alexei Starovoitov <ast@kernel.org>,
Daniel Borkmann <daniel@iogearbox.net>,
Andrii Nakryiko <andrii@kernel.org>,
Martin KaFai Lau <martin.lau@linux.dev>,
Song Liu <song@kernel.org>,
Yonghong Song <yonghong.song@linux.dev>,
John Fastabend <john.fastabend@gmail.com>,
KP Singh <kpsingh@kernel.org>,
Stanislav Fomichev <sdf@google.com>, Hao Luo <haoluo@google.com>,
Jiri Olsa <jolsa@kernel.org>,
Shubham Bansal <illusionist.neo@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>,
Helge Deller <deller@gmx.de>,
"Naveen N. Rao" <naveen.n.rao@linux.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Nicholas Piggin <npiggin@gmail.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Luke Nelson <luke.r.nels@gmail.com>, Xi Wang <xi.wang@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Wang YanQing <udknight@gmail.com>,
bpf@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-parisc@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
netdev@vger.kernel.org
Cc: puranjay12@gmail.com
Subject: [PATCH bpf-next 1/6] bpf, riscv32: Always zero extend for LDX with B/W/H
Date: Tue, 12 Sep 2023 22:46:49 +0000 [thread overview]
Message-ID: <20230912224654.6556-2-puranjay12@gmail.com> (raw)
In-Reply-To: <20230912224654.6556-1-puranjay12@gmail.com>
The JITs should not depend on the verifier for zero extending the upper
32 bits of the destination register when loading a byte, half-word, or
word.
A following patch will make the verifier stop patching zext instructions
after LDX.
Signed-off-by: Puranjay Mohan <puranjay12@gmail.com>
---
arch/riscv/net/bpf_jit_comp32.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/net/bpf_jit_comp32.c b/arch/riscv/net/bpf_jit_comp32.c
index 529a83b85c1c..8f8255519ba1 100644
--- a/arch/riscv/net/bpf_jit_comp32.c
+++ b/arch/riscv/net/bpf_jit_comp32.c
@@ -847,18 +847,15 @@ static int emit_load_r64(const s8 *dst, const s8 *src, s16 off,
switch (size) {
case BPF_B:
emit(rv_lbu(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_H:
emit(rv_lhu(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_W:
emit(rv_lw(lo(rd), 0, RV_REG_T0), ctx);
- if (!ctx->prog->aux->verifier_zext)
- emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
+ emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);
break;
case BPF_DW:
emit(rv_lw(lo(rd), 0, RV_REG_T0), ctx);
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-09-12 22:47 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-12 22:46 [PATCH bpf-next 0/6] bpf: verifier: stop emitting zext for LDX Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan [this message]
2023-09-12 22:46 ` [PATCH bpf-next 1/6] bpf, riscv32: Always zero extend for LDX with B/W/H Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` [PATCH bpf-next 2/6] bpf, x86-32: " Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` [PATCH bpf-next 3/6] bpf, parisc32: " Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` [PATCH bpf-next 4/6] bpf, powerpc32: Always zero extend for LDX Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` [PATCH bpf-next 5/6] bpf, arm32: Always zero extend for LDX with B/H/W Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 23:03 ` Russell King (Oracle)
2023-09-12 23:03 ` Russell King (Oracle)
2023-09-12 23:03 ` Russell King (Oracle)
2023-09-12 23:03 ` Russell King (Oracle)
2023-09-12 23:16 ` Puranjay Mohan
2023-09-12 23:16 ` Puranjay Mohan
2023-09-12 23:16 ` Puranjay Mohan
2023-09-12 23:16 ` Puranjay Mohan
2023-09-13 0:10 ` Alexei Starovoitov
2023-09-13 0:10 ` Alexei Starovoitov
2023-09-13 0:10 ` Alexei Starovoitov
2023-09-13 0:10 ` Alexei Starovoitov
2023-09-12 22:46 ` [PATCH bpf-next 6/6] bpf, verifier: always mark destination of LDX as 64-bit Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
2023-09-12 22:46 ` Puranjay Mohan
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