From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH 1/4] RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
Date: Wed, 20 Sep 2023 07:03:12 +0200 [thread overview]
Message-ID: <20230920-6ef044ecc94ec729f2f6ca37@orel> (raw)
In-Reply-To: <20230918180646.1398384-2-apatel@ventanamicro.com>
On Mon, Sep 18, 2023 at 11:36:43PM +0530, Anup Patel wrote:
> The ISA_EXT registers to enabled/disable ISA extensions for VCPU
> are always available when underlying host has the corresponding
> ISA extension. The copy_isa_ext_reg_indices() called by the
> KVM_GET_REG_LIST API does not align with this expectation so
> let's fix it.
>
> Fixes: 031f9efafc08 ("KVM: riscv: Add KVM_GET_REG_LIST API support")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/kvm/vcpu_onereg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 1b7e9fa265cb..e7e833ced91b 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -842,7 +842,7 @@ static int copy_isa_ext_reg_indices(const struct kvm_vcpu *vcpu,
> u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_ISA_EXT | i;
>
> isa_ext = kvm_isa_ext_arr[i];
> - if (!__riscv_isa_extension_available(vcpu->arch.isa, isa_ext))
> + if (!__riscv_isa_extension_available(NULL, isa_ext))
> continue;
>
> if (uindices) {
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH 1/4] RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
Date: Wed, 20 Sep 2023 07:03:12 +0200 [thread overview]
Message-ID: <20230920-6ef044ecc94ec729f2f6ca37@orel> (raw)
In-Reply-To: <20230918180646.1398384-2-apatel@ventanamicro.com>
On Mon, Sep 18, 2023 at 11:36:43PM +0530, Anup Patel wrote:
> The ISA_EXT registers to enabled/disable ISA extensions for VCPU
> are always available when underlying host has the corresponding
> ISA extension. The copy_isa_ext_reg_indices() called by the
> KVM_GET_REG_LIST API does not align with this expectation so
> let's fix it.
>
> Fixes: 031f9efafc08 ("KVM: riscv: Add KVM_GET_REG_LIST API support")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/kvm/vcpu_onereg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 1b7e9fa265cb..e7e833ced91b 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -842,7 +842,7 @@ static int copy_isa_ext_reg_indices(const struct kvm_vcpu *vcpu,
> u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_ISA_EXT | i;
>
> isa_ext = kvm_isa_ext_arr[i];
> - if (!__riscv_isa_extension_available(vcpu->arch.isa, isa_ext))
> + if (!__riscv_isa_extension_available(NULL, isa_ext))
> continue;
>
> if (uindices) {
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH 1/4] RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
Date: Wed, 20 Sep 2023 07:03:12 +0200 [thread overview]
Message-ID: <20230920-6ef044ecc94ec729f2f6ca37@orel> (raw)
In-Reply-To: <20230918180646.1398384-2-apatel@ventanamicro.com>
On Mon, Sep 18, 2023 at 11:36:43PM +0530, Anup Patel wrote:
> The ISA_EXT registers to enabled/disable ISA extensions for VCPU
> are always available when underlying host has the corresponding
> ISA extension. The copy_isa_ext_reg_indices() called by the
> KVM_GET_REG_LIST API does not align with this expectation so
> let's fix it.
>
> Fixes: 031f9efafc08 ("KVM: riscv: Add KVM_GET_REG_LIST API support")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/kvm/vcpu_onereg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 1b7e9fa265cb..e7e833ced91b 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -842,7 +842,7 @@ static int copy_isa_ext_reg_indices(const struct kvm_vcpu *vcpu,
> u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_ISA_EXT | i;
>
> isa_ext = kvm_isa_ext_arr[i];
> - if (!__riscv_isa_extension_available(vcpu->arch.isa, isa_ext))
> + if (!__riscv_isa_extension_available(NULL, isa_ext))
> continue;
>
> if (uindices) {
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
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next prev parent reply other threads:[~2023-09-20 5:03 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-18 18:06 [PATCH 0/4] KVM RISC-V fixes for ONE_REG interface Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-18 18:06 ` [PATCH 1/4] RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-19 18:57 ` Atish Patra
2023-09-19 18:57 ` Atish Patra
2023-09-19 18:57 ` Atish Patra
2023-09-20 5:03 ` Andrew Jones [this message]
2023-09-20 5:03 ` Andrew Jones
2023-09-20 5:03 ` Andrew Jones
2023-09-18 18:06 ` [PATCH 2/4] RISC-V: KVM: Fix riscv_vcpu_get_isa_ext_single() for missing extensions Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-19 18:59 ` Atish Patra
2023-09-19 18:59 ` Atish Patra
2023-09-19 18:59 ` Atish Patra
2023-09-20 5:04 ` Andrew Jones
2023-09-20 5:04 ` Andrew Jones
2023-09-20 5:04 ` Andrew Jones
2023-09-18 18:06 ` [PATCH 3/4] KVM: riscv: selftests: Fix ISA_EXT register handling in get-reg-list Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-19 19:54 ` Atish Patra
2023-09-19 19:54 ` Atish Patra
2023-09-19 19:54 ` Atish Patra
2023-09-20 13:56 ` Anup Patel
2023-09-20 13:56 ` Anup Patel
2023-09-20 13:56 ` Anup Patel
2023-09-20 23:01 ` Atish Patra
2023-09-20 23:01 ` Atish Patra
2023-09-20 23:01 ` Atish Patra
2023-09-21 5:12 ` Anup Patel
2023-09-21 5:12 ` Anup Patel
2023-09-21 5:12 ` Anup Patel
2023-09-20 5:13 ` Andrew Jones
2023-09-20 5:13 ` Andrew Jones
2023-09-20 5:13 ` Andrew Jones
2023-09-18 18:06 ` [PATCH 4/4] KVM: riscv: selftests: Selectively filter-out AIA registers Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-18 18:06 ` Anup Patel
2023-09-19 20:12 ` Atish Patra
2023-09-19 20:12 ` Atish Patra
2023-09-19 20:12 ` Atish Patra
2023-09-20 4:48 ` Andrew Jones
2023-09-20 4:48 ` Andrew Jones
2023-09-20 4:48 ` Andrew Jones
2023-09-20 5:26 ` Andrew Jones
2023-09-20 5:26 ` Andrew Jones
2023-09-20 5:26 ` Andrew Jones
2023-09-20 13:51 ` Anup Patel
2023-09-20 13:51 ` Anup Patel
2023-09-20 13:51 ` Anup Patel
2023-09-20 5:24 ` Andrew Jones
2023-09-20 5:24 ` Andrew Jones
2023-09-20 5:24 ` Andrew Jones
2023-09-20 7:10 ` Andrew Jones
2023-09-20 7:10 ` Andrew Jones
2023-09-20 7:10 ` Andrew Jones
2023-09-20 13:49 ` Anup Patel
2023-09-20 13:49 ` Anup Patel
2023-09-20 13:49 ` Anup Patel
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