All of lore.kernel.org
 help / color / mirror / Atom feed
From: Manivannan Sadhasivam <mani@kernel.org>
To: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Cc: agross@kernel.org, andersson@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	konrad.dybcio@linaro.org, quic_shazhuss@quicinc.com,
	quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com,
	quic_nayiluri@quicinc.com, quic_krichai@quicinc.com,
	quic_vbadigan@quicinc.com, quic_parass@quicinc.com,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Vinod Koul" <vkoul@kernel.org>,
	linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	mhi@lists.linux.dev, linux-phy@lists.infradead.org
Subject: Re: [PATCH v1 4/5] PCI: epf-mhi: Add support for SA8775P
Date: Thu, 21 Sep 2023 10:40:55 +0200	[thread overview]
Message-ID: <20230921084055.GD2891@thinkpad> (raw)
In-Reply-To: <1695218113-31198-5-git-send-email-quic_msarkar@quicinc.com>

On Wed, Sep 20, 2023 at 07:25:11PM +0530, Mrinmay Sarkar wrote:
> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
> no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> ---
>  drivers/pci/endpoint/functions/pci-epf-mhi.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> index b7b9d3e..4b349fd 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> @@ -114,6 +114,23 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
>  	.flags = MHI_EPF_USE_DMA,
>  };
>  
> +static struct pci_epf_header sa8775p_header = {

static const struct...

> +	.vendorid = PCI_VENDOR_ID_QCOM,
> +	.deviceid = 0x0306,

Why are you not using a distinct device id?

- Mani

> +	.baseclass_code = PCI_CLASS_OTHERS,
> +	.interrupt_pin = PCI_INTERRUPT_INTA,
> +};
> +
> +static const struct pci_epf_mhi_ep_info sa8775p_info = {
> +	.config = &mhi_v1_config,
> +	.epf_header = &sa8775p_header,
> +	.bar_num = BAR_0,
> +	.epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
> +	.msi_count = 32,
> +	.mru = 0x8000,
> +	.flags = MHI_EPF_USE_DMA,
> +};
> +
>  struct pci_epf_mhi {
>  	const struct pci_epc_features *epc_features;
>  	const struct pci_epf_mhi_ep_info *info;
> @@ -677,6 +694,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf,
>  }
>  
>  static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
> +	{ .name = "sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
>  	{ .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
>  	{ .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
>  	{},
> -- 
> 2.7.4
> 

-- 
மணிவண்ணன் சதாசிவம்

WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <mani@kernel.org>
To: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Cc: agross@kernel.org, andersson@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	konrad.dybcio@linaro.org, quic_shazhuss@quicinc.com,
	quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com,
	quic_nayiluri@quicinc.com, quic_krichai@quicinc.com,
	quic_vbadigan@quicinc.com, quic_parass@quicinc.com,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Vinod Koul" <vkoul@kernel.org>,
	linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	mhi@lists.linux.dev, linux-phy@lists.infradead.org
Subject: Re: [PATCH v1 4/5] PCI: epf-mhi: Add support for SA8775P
Date: Thu, 21 Sep 2023 10:40:55 +0200	[thread overview]
Message-ID: <20230921084055.GD2891@thinkpad> (raw)
In-Reply-To: <1695218113-31198-5-git-send-email-quic_msarkar@quicinc.com>

On Wed, Sep 20, 2023 at 07:25:11PM +0530, Mrinmay Sarkar wrote:
> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
> no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> ---
>  drivers/pci/endpoint/functions/pci-epf-mhi.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> index b7b9d3e..4b349fd 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> @@ -114,6 +114,23 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
>  	.flags = MHI_EPF_USE_DMA,
>  };
>  
> +static struct pci_epf_header sa8775p_header = {

static const struct...

> +	.vendorid = PCI_VENDOR_ID_QCOM,
> +	.deviceid = 0x0306,

Why are you not using a distinct device id?

- Mani

> +	.baseclass_code = PCI_CLASS_OTHERS,
> +	.interrupt_pin = PCI_INTERRUPT_INTA,
> +};
> +
> +static const struct pci_epf_mhi_ep_info sa8775p_info = {
> +	.config = &mhi_v1_config,
> +	.epf_header = &sa8775p_header,
> +	.bar_num = BAR_0,
> +	.epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
> +	.msi_count = 32,
> +	.mru = 0x8000,
> +	.flags = MHI_EPF_USE_DMA,
> +};
> +
>  struct pci_epf_mhi {
>  	const struct pci_epc_features *epc_features;
>  	const struct pci_epf_mhi_ep_info *info;
> @@ -677,6 +694,7 @@ static int pci_epf_mhi_probe(struct pci_epf *epf,
>  }
>  
>  static const struct pci_epf_device_id pci_epf_mhi_ids[] = {
> +	{ .name = "sa8775p", .driver_data = (kernel_ulong_t)&sa8775p_info },
>  	{ .name = "sdx55", .driver_data = (kernel_ulong_t)&sdx55_info },
>  	{ .name = "sm8450", .driver_data = (kernel_ulong_t)&sm8450_info },
>  	{},
> -- 
> 2.7.4
> 

-- 
மணிவண்ணன் சதாசிவம்

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  parent reply	other threads:[~2023-09-21 17:28 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-20 13:55 [PATCH v1 0/5] arm64: qcom: sa8775p: add support for EP PCIe Mrinmay Sarkar
2023-09-20 13:55 ` Mrinmay Sarkar
2023-09-20 13:55 ` [PATCH v1 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Mrinmay Sarkar
2023-09-20 13:55   ` Mrinmay Sarkar
2023-09-21  8:11   ` Manivannan Sadhasivam
2023-09-21  8:11     ` Manivannan Sadhasivam
2023-09-21 18:38   ` Rob Herring
2023-09-21 18:38     ` Rob Herring
2023-10-06 10:54     ` Shazad Hussain
2023-10-06 10:54       ` Shazad Hussain
2023-10-11 11:13       ` Mrinmay Sarkar
2023-10-11 11:13         ` Mrinmay Sarkar
2023-10-11 11:43         ` Dmitry Baryshkov
2023-10-11 11:43           ` Dmitry Baryshkov
2023-10-13 12:55           ` Mrinmay Sarkar
2023-10-13 12:55             ` Mrinmay Sarkar
2023-10-13 16:38             ` Dmitry Baryshkov
2023-10-13 16:38               ` Dmitry Baryshkov
2023-10-16  4:24               ` Mrinmay Sarkar
2023-10-16  4:24                 ` Mrinmay Sarkar
2023-10-16  5:19             ` Dmitry Baryshkov
2023-10-16  5:19               ` Dmitry Baryshkov
2023-09-20 13:55 ` [PATCH v1 2/5] " Mrinmay Sarkar
2023-09-20 13:55   ` Mrinmay Sarkar
2023-09-20 14:24   ` Konrad Dybcio
2023-09-20 14:24     ` Konrad Dybcio
2023-09-21  8:17     ` Manivannan Sadhasivam
2023-09-21  8:17       ` Manivannan Sadhasivam
2023-10-13 13:03     ` Mrinmay Sarkar
2023-10-13 13:03       ` Mrinmay Sarkar
2023-09-20 13:55 ` [PATCH v1 3/5] phy: qcom-qmp-pcie: add endpoint support for sa8775p Mrinmay Sarkar
2023-09-20 13:55   ` Mrinmay Sarkar
2023-09-21  8:39   ` Manivannan Sadhasivam
2023-09-21  8:39     ` Manivannan Sadhasivam
2023-09-20 13:55 ` [PATCH v1 4/5] PCI: epf-mhi: Add support for SA8775P Mrinmay Sarkar
2023-09-20 13:55   ` Mrinmay Sarkar
2023-09-20 14:28   ` Konrad Dybcio
2023-09-20 14:28     ` Konrad Dybcio
2023-09-21  8:40   ` Manivannan Sadhasivam [this message]
2023-09-21  8:40     ` Manivannan Sadhasivam
2023-10-11 10:39     ` Mrinmay Sarkar
2023-10-11 10:39       ` Mrinmay Sarkar
2023-09-20 13:55 ` [PATCH v1 5/5] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Mrinmay Sarkar
2023-09-20 13:55   ` Mrinmay Sarkar
2023-09-21  9:48   ` Manivannan Sadhasivam
2023-09-21  9:48     ` Manivannan Sadhasivam
2023-10-11 10:44     ` Mrinmay Sarkar
2023-10-11 10:44       ` Mrinmay Sarkar
2023-10-11 11:35       ` Konrad Dybcio
2023-10-11 11:35         ` Konrad Dybcio

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230921084055.GD2891@thinkpad \
    --to=mani@kernel.org \
    --cc=agross@kernel.org \
    --cc=andersson@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=kishon@kernel.org \
    --cc=konrad.dybcio@linaro.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=kw@linux.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=mhi@lists.linux.dev \
    --cc=quic_krichai@quicinc.com \
    --cc=quic_msarkar@quicinc.com \
    --cc=quic_nayiluri@quicinc.com \
    --cc=quic_nitegupt@quicinc.com \
    --cc=quic_parass@quicinc.com \
    --cc=quic_ramkri@quicinc.com \
    --cc=quic_shazhuss@quicinc.com \
    --cc=quic_vbadigan@quicinc.com \
    --cc=robh@kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.