All of lore.kernel.org
 help / color / mirror / Atom feed
From: Conor Dooley <conor@kernel.org>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry
Date: Fri, 22 Sep 2023 10:28:04 +0100	[thread overview]
Message-ID: <20230922-bagel-hyphen-aae5b1b88b21@spud> (raw)
In-Reply-To: <20230922085701.3164-3-yongxuan.wang@sifive.com>

On Fri, Sep 22, 2023 at 08:56:48AM +0000, Yong-Xuan Wang wrote:
> Add an entry for the Svadu extension to the riscv,isa-extensions property.
> 
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index cc1f546fdbdc..b5a0aed0165b 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -147,6 +147,12 @@ properties:
>              ratified at commit 3f9ed34 ("Add ability to manually trigger
>              workflow. (#2)") of riscv-time-compare.
>  
> +        - const: svadu
> +          description: |
> +            The standard Svadu supervisor-level extension for hardware updating
> +            of PTE A/D bits as frozen at commit b65e07c ("move to Frozen
> +            state") of riscv-svadu.
> +
>          - const: svinval
>            description:
>              The standard Svinval supervisor-level extension for fine-grained
> -- 
> 2.17.1
> 
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/kvm-riscv/attachments/20230922/2510c39f/attachment.sig>

WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org,
	greentime.hu@sifive.com, vincent.chen@sifive.com,
	tjytimi@163.com, alex@ghiti.fr, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry
Date: Fri, 22 Sep 2023 10:28:04 +0100	[thread overview]
Message-ID: <20230922-bagel-hyphen-aae5b1b88b21@spud> (raw)
In-Reply-To: <20230922085701.3164-3-yongxuan.wang@sifive.com>


[-- Attachment #1.1: Type: text/plain, Size: 1298 bytes --]

On Fri, Sep 22, 2023 at 08:56:48AM +0000, Yong-Xuan Wang wrote:
> Add an entry for the Svadu extension to the riscv,isa-extensions property.
> 
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index cc1f546fdbdc..b5a0aed0165b 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -147,6 +147,12 @@ properties:
>              ratified at commit 3f9ed34 ("Add ability to manually trigger
>              workflow. (#2)") of riscv-time-compare.
>  
> +        - const: svadu
> +          description: |
> +            The standard Svadu supervisor-level extension for hardware updating
> +            of PTE A/D bits as frozen at commit b65e07c ("move to Frozen
> +            state") of riscv-svadu.
> +
>          - const: svinval
>            description:
>              The standard Svinval supervisor-level extension for fine-grained
> -- 
> 2.17.1
> 

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org,
	greentime.hu@sifive.com, vincent.chen@sifive.com,
	tjytimi@163.com, alex@ghiti.fr, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry
Date: Fri, 22 Sep 2023 10:28:04 +0100	[thread overview]
Message-ID: <20230922-bagel-hyphen-aae5b1b88b21@spud> (raw)
In-Reply-To: <20230922085701.3164-3-yongxuan.wang@sifive.com>

[-- Attachment #1: Type: text/plain, Size: 1298 bytes --]

On Fri, Sep 22, 2023 at 08:56:48AM +0000, Yong-Xuan Wang wrote:
> Add an entry for the Svadu extension to the riscv,isa-extensions property.
> 
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index cc1f546fdbdc..b5a0aed0165b 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -147,6 +147,12 @@ properties:
>              ratified at commit 3f9ed34 ("Add ability to manually trigger
>              workflow. (#2)") of riscv-time-compare.
>  
> +        - const: svadu
> +          description: |
> +            The standard Svadu supervisor-level extension for hardware updating
> +            of PTE A/D bits as frozen at commit b65e07c ("move to Frozen
> +            state") of riscv-svadu.
> +
>          - const: svinval
>            description:
>              The standard Svinval supervisor-level extension for fine-grained
> -- 
> 2.17.1
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

  reply	other threads:[~2023-09-22  9:28 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-22  8:56 [PATCH v2 0/3] Add Svadu Extension Support Yong-Xuan Wang
2023-09-22  8:56 ` Yong-Xuan Wang
2023-09-22  8:56 ` [PATCH v2 1/3] RISC-V: Detect and Enable " Yong-Xuan Wang
2023-09-22  8:56   ` Yong-Xuan Wang
2023-09-22  8:56   ` Yong-Xuan Wang
2023-09-22  9:38   ` Conor Dooley
2023-09-22  9:38     ` Conor Dooley
2023-09-22  9:38     ` Conor Dooley
2023-09-27  7:03   ` Andrew Jones
2023-09-27  7:03     ` Andrew Jones
2023-09-27  7:03     ` Andrew Jones
2023-09-27 11:02     ` Yong-Xuan Wang
2023-09-27 11:02       ` Yong-Xuan Wang
2023-09-27 11:02       ` Yong-Xuan Wang
2023-09-27  7:16   ` Matthew Wilcox
2023-09-27  7:16     ` Matthew Wilcox
2023-09-27  7:16     ` Matthew Wilcox
2023-09-22  8:56 ` [PATCH v2 2/3] dt-bindings: riscv: Add Svadu Entry Yong-Xuan Wang
2023-09-22  8:56   ` Yong-Xuan Wang
2023-09-22  8:56   ` Yong-Xuan Wang
2023-09-22  9:28   ` Conor Dooley [this message]
2023-09-22  9:28     ` Conor Dooley
2023-09-22  9:28     ` Conor Dooley
2023-09-27  7:04   ` Andrew Jones
2023-09-27  7:04     ` Andrew Jones
2023-09-27  7:04     ` Andrew Jones
2023-09-27 17:24   ` Stefan O'Rear
2023-09-27 17:24     ` Stefan O'Rear
2023-09-27 17:24     ` Stefan O'Rear
2023-09-27 18:44     ` Jessica Clarke
2023-09-27 18:44       ` Jessica Clarke
2023-09-27 18:44       ` Jessica Clarke
2023-09-22  8:56 ` [PATCH v2 3/3] RISC-V: KVM: Add Svadu Extension Support for Guest/VM Yong-Xuan Wang
2023-09-22  8:56   ` Yong-Xuan Wang
2023-09-22  8:56   ` Yong-Xuan Wang
2023-09-27  7:27   ` Andrew Jones
2023-09-27  7:27     ` Andrew Jones
2023-09-27  7:27     ` Andrew Jones

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230922-bagel-hyphen-aae5b1b88b21@spud \
    --to=conor@kernel.org \
    --cc=kvm-riscv@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.