[PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform

All of lore.kernel.org
 help / color / mirror / Atom feed

* [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform
@ 2023-09-22  9:50 ` shravan chippa
  0 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa

From: Shravan Chippa <shravan.chippa@microchip.com>

This series does the following
1. Adds a PolarFire SoC specific compatible and code to support for
out-of-order dma transfers 

2. Adds generic device tree bindings support by using 
of_dma_controller_register()

Shravan Chippa (3):
  dmaengine: sf-pdma: Support of_dma_controller_register()
  dt-bindings: dma: sf-pdma: add new compatible name
  dmaengine: sf-pdma: add mpfs-pdma compatible name

 .../bindings/dma/sifive,fu540-c000-pdma.yaml  | 12 ++--
 drivers/dma/sf-pdma/sf-pdma.c                 | 68 ++++++++++++++++++-
 drivers/dma/sf-pdma/sf-pdma.h                 |  6 ++
 3 files changed, 79 insertions(+), 7 deletions(-)

-- 
2.34.1


^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform
@ 2023-09-22  9:50 ` shravan chippa
  0 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa

From: Shravan Chippa <shravan.chippa@microchip.com>

This series does the following
1. Adds a PolarFire SoC specific compatible and code to support for
out-of-order dma transfers 

2. Adds generic device tree bindings support by using 
of_dma_controller_register()

Shravan Chippa (3):
  dmaengine: sf-pdma: Support of_dma_controller_register()
  dt-bindings: dma: sf-pdma: add new compatible name
  dmaengine: sf-pdma: add mpfs-pdma compatible name

 .../bindings/dma/sifive,fu540-c000-pdma.yaml  | 12 ++--
 drivers/dma/sf-pdma/sf-pdma.c                 | 68 ++++++++++++++++++-
 drivers/dma/sf-pdma/sf-pdma.h                 |  6 ++
 3 files changed, 79 insertions(+), 7 deletions(-)

-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register()
  2023-09-22  9:50 ` shravan chippa
@ 2023-09-22  9:50   ` shravan chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa

From: Shravan Chippa <shravan.chippa@microchip.com>

Update sf-pdma driver to adopt generic DMA device tree bindings.
It calls of_dma_controller_register() with sf-pdma specific
of_dma_xlate to get the generic DMA device tree helper support
and the DMA clients can look up the sf-pdma controller using
standard APIs.

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
 drivers/dma/sf-pdma/sf-pdma.c | 41 +++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index d1c6956af452..c7558c9f9ac3 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -20,6 +20,7 @@
 #include <linux/mod_devicetable.h>
 #include <linux/dma-mapping.h>
 #include <linux/of.h>
+#include <linux/of_dma.h>
 #include <linux/slab.h>
 
 #include "sf-pdma.h"
@@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
 	}
 }
 
+static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
+					 struct of_dma *ofdma)
+{
+	struct sf_pdma *pdma = ofdma->of_dma_data;
+	struct device *dev = pdma->dma_dev.dev;
+	struct sf_pdma_chan  *chan;
+	struct dma_chan *c;
+	u32 channel_id;
+
+	if (dma_spec->args_count != 1) {
+		dev_err(dev, "Bad number of cells\n");
+		return NULL;
+	}
+
+	channel_id = dma_spec->args[0];
+
+	chan = &pdma->chans[channel_id];
+
+	c = dma_get_slave_channel(&chan->vchan.chan);
+	if (!c) {
+		dev_err(dev, "No more channels available\n");
+		return NULL;
+	}
+
+	return c;
+}
+
 static int sf_pdma_probe(struct platform_device *pdev)
 {
 	struct sf_pdma *pdma;
@@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = of_dma_controller_register(pdev->dev.of_node,
+					 sf_pdma_of_xlate, pdma);
+	if (ret < 0) {
+		dev_err(&pdev->dev,
+			"Can't register SiFive Platform OF_DMA. (%d)\n", ret);
+		goto err_unregister;
+	}
+
 	return 0;
+
+err_unregister:
+	dma_async_device_unregister(&pdma->dma_dev);
+
+	return ret;
 }
 
 static int sf_pdma_remove(struct platform_device *pdev)
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-09-22  9:50   ` shravan chippa
  0 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa

From: Shravan Chippa <shravan.chippa@microchip.com>

Update sf-pdma driver to adopt generic DMA device tree bindings.
It calls of_dma_controller_register() with sf-pdma specific
of_dma_xlate to get the generic DMA device tree helper support
and the DMA clients can look up the sf-pdma controller using
standard APIs.

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
---
 drivers/dma/sf-pdma/sf-pdma.c | 41 +++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index d1c6956af452..c7558c9f9ac3 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -20,6 +20,7 @@
 #include <linux/mod_devicetable.h>
 #include <linux/dma-mapping.h>
 #include <linux/of.h>
+#include <linux/of_dma.h>
 #include <linux/slab.h>
 
 #include "sf-pdma.h"
@@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
 	}
 }
 
+static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
+					 struct of_dma *ofdma)
+{
+	struct sf_pdma *pdma = ofdma->of_dma_data;
+	struct device *dev = pdma->dma_dev.dev;
+	struct sf_pdma_chan  *chan;
+	struct dma_chan *c;
+	u32 channel_id;
+
+	if (dma_spec->args_count != 1) {
+		dev_err(dev, "Bad number of cells\n");
+		return NULL;
+	}
+
+	channel_id = dma_spec->args[0];
+
+	chan = &pdma->chans[channel_id];
+
+	c = dma_get_slave_channel(&chan->vchan.chan);
+	if (!c) {
+		dev_err(dev, "No more channels available\n");
+		return NULL;
+	}
+
+	return c;
+}
+
 static int sf_pdma_probe(struct platform_device *pdev)
 {
 	struct sf_pdma *pdma;
@@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = of_dma_controller_register(pdev->dev.of_node,
+					 sf_pdma_of_xlate, pdma);
+	if (ret < 0) {
+		dev_err(&pdev->dev,
+			"Can't register SiFive Platform OF_DMA. (%d)\n", ret);
+		goto err_unregister;
+	}
+
 	return 0;
+
+err_unregister:
+	dma_async_device_unregister(&pdma->dma_dev);
+
+	return ret;
 }
 
 static int sf_pdma_remove(struct platform_device *pdev)
-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register()
  2023-09-22  9:50   ` shravan chippa
@ 2023-09-22 10:46     ` Emil Renner Berthing
  -1 siblings, 0 replies; 26+ messages in thread
From: Emil Renner Berthing @ 2023-09-22 10:46 UTC (permalink / raw)
  To: shravan chippa, green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt,
	palmer, paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar

shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Update sf-pdma driver to adopt generic DMA device tree bindings.
> It calls of_dma_controller_register() with sf-pdma specific
> of_dma_xlate to get the generic DMA device tree helper support
> and the DMA clients can look up the sf-pdma controller using
> standard APIs.
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
>  drivers/dma/sf-pdma/sf-pdma.c | 41 +++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index d1c6956af452..c7558c9f9ac3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -20,6 +20,7 @@
>  #include <linux/mod_devicetable.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/of.h>
> +#include <linux/of_dma.h>
>  #include <linux/slab.h>
>
>  #include "sf-pdma.h"
> @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
>  	}
>  }
>
> +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
> +					 struct of_dma *ofdma)
> +{
> +	struct sf_pdma *pdma = ofdma->of_dma_data;
> +	struct device *dev = pdma->dma_dev.dev;
> +	struct sf_pdma_chan  *chan;
> +	struct dma_chan *c;
> +	u32 channel_id;
> +
> +	if (dma_spec->args_count != 1) {
> +		dev_err(dev, "Bad number of cells\n");
> +		return NULL;
> +	}
> +
> +	channel_id = dma_spec->args[0];
> +
> +	chan = &pdma->chans[channel_id];
> +
> +	c = dma_get_slave_channel(&chan->vchan.chan);
> +	if (!c) {
> +		dev_err(dev, "No more channels available\n");
> +		return NULL;
> +	}
> +
> +	return c;
> +}
> +
>  static int sf_pdma_probe(struct platform_device *pdev)
>  {
>  	struct sf_pdma *pdma;
> @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>
> +	ret = of_dma_controller_register(pdev->dev.of_node,
> +					 sf_pdma_of_xlate, pdma);
> +	if (ret < 0) {
> +		dev_err(&pdev->dev,
> +			"Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> +		goto err_unregister;
> +	}
> +

Hi Shrivan,

Doesn't this need a matching unregister/free call in the
sf_pdma_remove function?

/Emil

>  	return 0;
> +
> +err_unregister:
> +	dma_async_device_unregister(&pdma->dma_dev);
> +
> +	return ret;
>  }
>
>  static int sf_pdma_remove(struct platform_device *pdev)
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-09-22 10:46     ` Emil Renner Berthing
  0 siblings, 0 replies; 26+ messages in thread
From: Emil Renner Berthing @ 2023-09-22 10:46 UTC (permalink / raw)
  To: shravan chippa, green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt,
	palmer, paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar

shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
>
> Update sf-pdma driver to adopt generic DMA device tree bindings.
> It calls of_dma_controller_register() with sf-pdma specific
> of_dma_xlate to get the generic DMA device tree helper support
> and the DMA clients can look up the sf-pdma controller using
> standard APIs.
>
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> ---
>  drivers/dma/sf-pdma/sf-pdma.c | 41 +++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index d1c6956af452..c7558c9f9ac3 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -20,6 +20,7 @@
>  #include <linux/mod_devicetable.h>
>  #include <linux/dma-mapping.h>
>  #include <linux/of.h>
> +#include <linux/of_dma.h>
>  #include <linux/slab.h>
>
>  #include "sf-pdma.h"
> @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
>  	}
>  }
>
> +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
> +					 struct of_dma *ofdma)
> +{
> +	struct sf_pdma *pdma = ofdma->of_dma_data;
> +	struct device *dev = pdma->dma_dev.dev;
> +	struct sf_pdma_chan  *chan;
> +	struct dma_chan *c;
> +	u32 channel_id;
> +
> +	if (dma_spec->args_count != 1) {
> +		dev_err(dev, "Bad number of cells\n");
> +		return NULL;
> +	}
> +
> +	channel_id = dma_spec->args[0];
> +
> +	chan = &pdma->chans[channel_id];
> +
> +	c = dma_get_slave_channel(&chan->vchan.chan);
> +	if (!c) {
> +		dev_err(dev, "No more channels available\n");
> +		return NULL;
> +	}
> +
> +	return c;
> +}
> +
>  static int sf_pdma_probe(struct platform_device *pdev)
>  {
>  	struct sf_pdma *pdma;
> @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev)
>  		return ret;
>  	}
>
> +	ret = of_dma_controller_register(pdev->dev.of_node,
> +					 sf_pdma_of_xlate, pdma);
> +	if (ret < 0) {
> +		dev_err(&pdev->dev,
> +			"Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> +		goto err_unregister;
> +	}
> +

Hi Shrivan,

Doesn't this need a matching unregister/free call in the
sf_pdma_remove function?

/Emil

>  	return 0;
> +
> +err_unregister:
> +	dma_async_device_unregister(&pdma->dma_dev);
> +
> +	return ret;
>  }
>
>  static int sf_pdma_remove(struct platform_device *pdev)
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register()
  2023-09-22 10:46     ` Emil Renner Berthing
@ 2023-09-22 10:59       ` Shravan.Chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-22 10:59 UTC (permalink / raw)
  To: emil.renner.berthing, green.wan, vkoul, robh+dt,
	krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	Nagasuresh.Relli, Praveen.Kumar



> -----Original Message-----
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Sent: Friday, September 22, 2023 4:16 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v1 1/3] dmaengine: sf-pdma: Support
> of_dma_controller_register()
> 
> [You don't often get email from emil.renner.berthing@canonical.com. Learn
> why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Update sf-pdma driver to adopt generic DMA device tree bindings.
> > It calls of_dma_controller_register() with sf-pdma specific
> > of_dma_xlate to get the generic DMA device tree helper support and the
> > DMA clients can look up the sf-pdma controller using standard APIs.
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 41
> > +++++++++++++++++++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..c7558c9f9ac3
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -20,6 +20,7 @@
> >  #include <linux/mod_devicetable.h>
> >  #include <linux/dma-mapping.h>
> >  #include <linux/of.h>
> > +#include <linux/of_dma.h>
> >  #include <linux/slab.h>
> >
> >  #include "sf-pdma.h"
> > @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma
> *pdma)
> >       }
> >  }
> >
> > +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args
> *dma_spec,
> > +                                      struct of_dma *ofdma) {
> > +     struct sf_pdma *pdma = ofdma->of_dma_data;
> > +     struct device *dev = pdma->dma_dev.dev;
> > +     struct sf_pdma_chan  *chan;
> > +     struct dma_chan *c;
> > +     u32 channel_id;
> > +
> > +     if (dma_spec->args_count != 1) {
> > +             dev_err(dev, "Bad number of cells\n");
> > +             return NULL;
> > +     }
> > +
> > +     channel_id = dma_spec->args[0];
> > +
> > +     chan = &pdma->chans[channel_id];
> > +
> > +     c = dma_get_slave_channel(&chan->vchan.chan);
> > +     if (!c) {
> > +             dev_err(dev, "No more channels available\n");
> > +             return NULL;
> > +     }
> > +
> > +     return c;
> > +}
> > +
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> >       struct sf_pdma *pdma;
> > @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> >               return ret;
> >       }
> >
> > +     ret = of_dma_controller_register(pdev->dev.of_node,
> > +                                      sf_pdma_of_xlate, pdma);
> > +     if (ret < 0) {
> > +             dev_err(&pdev->dev,
> > +                     "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> > +             goto err_unregister;
> > +     }
> > +
> 
> Hi Shrivan,
> 
> Doesn't this need a matching unregister/free call in the sf_pdma_remove
> function?
> 
> /Emil
> 

Will add of_dma_controller_free(np) call in the sf_pdma_remove().

> >       return 0;
> > +
> > +err_unregister:
> > +     dma_async_device_unregister(&pdma->dma_dev);
> > +
> > +     return ret;
> >  }
> >
> >  static int sf_pdma_remove(struct platform_device *pdev)
> > --
> > 2.34.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register()
@ 2023-09-22 10:59       ` Shravan.Chippa
  0 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-22 10:59 UTC (permalink / raw)
  To: emil.renner.berthing, green.wan, vkoul, robh+dt,
	krzysztof.kozlowski+dt, palmer, paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	Nagasuresh.Relli, Praveen.Kumar



> -----Original Message-----
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Sent: Friday, September 22, 2023 4:16 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>;
> green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com
> Cc: dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v1 1/3] dmaengine: sf-pdma: Support
> of_dma_controller_register()
> 
> [You don't often get email from emil.renner.berthing@canonical.com. Learn
> why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Update sf-pdma driver to adopt generic DMA device tree bindings.
> > It calls of_dma_controller_register() with sf-pdma specific
> > of_dma_xlate to get the generic DMA device tree helper support and the
> > DMA clients can look up the sf-pdma controller using standard APIs.
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 41
> > +++++++++++++++++++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..c7558c9f9ac3
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -20,6 +20,7 @@
> >  #include <linux/mod_devicetable.h>
> >  #include <linux/dma-mapping.h>
> >  #include <linux/of.h>
> > +#include <linux/of_dma.h>
> >  #include <linux/slab.h>
> >
> >  #include "sf-pdma.h"
> > @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma
> *pdma)
> >       }
> >  }
> >
> > +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args
> *dma_spec,
> > +                                      struct of_dma *ofdma) {
> > +     struct sf_pdma *pdma = ofdma->of_dma_data;
> > +     struct device *dev = pdma->dma_dev.dev;
> > +     struct sf_pdma_chan  *chan;
> > +     struct dma_chan *c;
> > +     u32 channel_id;
> > +
> > +     if (dma_spec->args_count != 1) {
> > +             dev_err(dev, "Bad number of cells\n");
> > +             return NULL;
> > +     }
> > +
> > +     channel_id = dma_spec->args[0];
> > +
> > +     chan = &pdma->chans[channel_id];
> > +
> > +     c = dma_get_slave_channel(&chan->vchan.chan);
> > +     if (!c) {
> > +             dev_err(dev, "No more channels available\n");
> > +             return NULL;
> > +     }
> > +
> > +     return c;
> > +}
> > +
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> >       struct sf_pdma *pdma;
> > @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device
> *pdev)
> >               return ret;
> >       }
> >
> > +     ret = of_dma_controller_register(pdev->dev.of_node,
> > +                                      sf_pdma_of_xlate, pdma);
> > +     if (ret < 0) {
> > +             dev_err(&pdev->dev,
> > +                     "Can't register SiFive Platform OF_DMA. (%d)\n", ret);
> > +             goto err_unregister;
> > +     }
> > +
> 
> Hi Shrivan,
> 
> Doesn't this need a matching unregister/free call in the sf_pdma_remove
> function?
> 
> /Emil
> 

Will add of_dma_controller_free(np) call in the sf_pdma_remove().

> >       return 0;
> > +
> > +err_unregister:
> > +     dma_async_device_unregister(&pdma->dma_dev);
> > +
> > +     return ret;
> >  }
> >
> >  static int sf_pdma_remove(struct platform_device *pdev)
> > --
> > 2.34.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name
  2023-09-22  9:50 ` shravan chippa
@ 2023-09-22  9:50   ` shravan chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa, Conor Dooley

From: Shravan Chippa <shravan.chippa@microchip.com>

add new compatible name microchip,mpfs-pdma to support out of order dma
transfers this will improve the dma throughput for mem-to-mem transfer

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
index a1af0b906365..974467c4bacb 100644
--- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -27,10 +27,14 @@ allOf:
 
 properties:
   compatible:
-    items:
-      - enum:
-          - sifive,fu540-c000-pdma
-      - const: sifive,pdma0
+    oneOf:
+      - items:
+          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
+          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
+      - items:
+          - enum:
+              - sifive,fu540-c000-pdma
+          - const: sifive,pdma0
     description:
       Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
       Supported compatible strings are -
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-09-22  9:50   ` shravan chippa
  0 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa, Conor Dooley

From: Shravan Chippa <shravan.chippa@microchip.com>

add new compatible name microchip,mpfs-pdma to support out of order dma
transfers this will improve the dma throughput for mem-to-mem transfer

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
index a1af0b906365..974467c4bacb 100644
--- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
+++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
@@ -27,10 +27,14 @@ allOf:
 
 properties:
   compatible:
-    items:
-      - enum:
-          - sifive,fu540-c000-pdma
-      - const: sifive,pdma0
+    oneOf:
+      - items:
+          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
+          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
+      - items:
+          - enum:
+              - sifive,fu540-c000-pdma
+          - const: sifive,pdma0
     description:
       Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
       Supported compatible strings are -
-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name
  2023-09-22  9:50   ` shravan chippa
@ 2023-09-22  9:59     ` Conor Dooley
  -1 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22  9:59 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar,
	Conor Dooley

[-- Attachment #1: Type: text/plain, Size: 1808 bytes --]

Hey Shravan,

On Fri, Sep 22, 2023 at 03:20:38PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> add new compatible name microchip,mpfs-pdma to support out of order dma
> transfers this will improve the dma throughput for mem-to-mem transfer
> 
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

I would appreciate if you would drop any vendor tree related tags when
submitting patches upstream, especially for dt-bindings where it
actually means something to have my R-b on them.

Cheers,
Conor.

> ---
>  .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> index a1af0b906365..974467c4bacb 100644
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -27,10 +27,14 @@ allOf:
>  
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - sifive,fu540-c000-pdma
> -      - const: sifive,pdma0
> +    oneOf:
> +      - items:
> +          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> +          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
> +      - items:
> +          - enum:
> +              - sifive,fu540-c000-pdma
> +          - const: sifive,pdma0
>      description:
>        Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
>        Supported compatible strings are -
> -- 
> 2.34.1
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-09-22  9:59     ` Conor Dooley
  0 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22  9:59 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar,
	Conor Dooley


[-- Attachment #1.1: Type: text/plain, Size: 1808 bytes --]

Hey Shravan,

On Fri, Sep 22, 2023 at 03:20:38PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> add new compatible name microchip,mpfs-pdma to support out of order dma
> transfers this will improve the dma throughput for mem-to-mem transfer
> 
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

I would appreciate if you would drop any vendor tree related tags when
submitting patches upstream, especially for dt-bindings where it
actually means something to have my R-b on them.

Cheers,
Conor.

> ---
>  .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> index a1af0b906365..974467c4bacb 100644
> --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> @@ -27,10 +27,14 @@ allOf:
>  
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - sifive,fu540-c000-pdma
> -      - const: sifive,pdma0
> +    oneOf:
> +      - items:
> +          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> +          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer
> +      - items:
> +          - enum:
> +              - sifive,fu540-c000-pdma
> +          - const: sifive,pdma0
>      description:
>        Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
>        Supported compatible strings are -
> -- 
> 2.34.1
> 

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name
  2023-09-22  9:59     ` Conor Dooley
@ 2023-09-22 10:06       ` Conor Dooley
  -1 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22 10:06 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar,
	Conor Dooley

[-- Attachment #1: Type: text/plain, Size: 2244 bytes --]

Me again,

On Fri, Sep 22, 2023 at 10:59:52AM +0100, Conor Dooley wrote:
> On Fri, Sep 22, 2023 at 03:20:38PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> > 
> > add new compatible name microchip,mpfs-pdma to support out of order dma
> > transfers this will improve the dma throughput for mem-to-mem transfer
> > 
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> I would appreciate if you would drop any vendor tree related tags when
> submitting patches upstream, especially for dt-bindings where it
> actually means something to have my R-b on them.

> > ---
> >  .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
> >  1 file changed, 8 insertions(+), 4 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > index a1af0b906365..974467c4bacb 100644
> > --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > @@ -27,10 +27,14 @@ allOf:
> >  
> >  properties:
> >    compatible:
> > -    items:
> > -      - enum:
> > -          - sifive,fu540-c000-pdma
> > -      - const: sifive,pdma0
> > +    oneOf:
> > +      - items:
> > +          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > +          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer

Whoops, I meant to say - I'm okay with the soc-specific compatible being
added (we should have done that from the start), but I think the
comments here about software behaviour should be removed. With that, you
can re-add
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> > +      - items:
> > +          - enum:
> > +              - sifive,fu540-c000-pdma
> > +          - const: sifive,pdma0
> >      description:
> >        Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
> >        Supported compatible strings are -
> > -- 
> > 2.34.1
> > 



[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name
@ 2023-09-22 10:06       ` Conor Dooley
  0 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22 10:06 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar,
	Conor Dooley


[-- Attachment #1.1: Type: text/plain, Size: 2244 bytes --]

Me again,

On Fri, Sep 22, 2023 at 10:59:52AM +0100, Conor Dooley wrote:
> On Fri, Sep 22, 2023 at 03:20:38PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> > 
> > add new compatible name microchip,mpfs-pdma to support out of order dma
> > transfers this will improve the dma throughput for mem-to-mem transfer
> > 
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> 
> I would appreciate if you would drop any vendor tree related tags when
> submitting patches upstream, especially for dt-bindings where it
> actually means something to have my R-b on them.

> > ---
> >  .../bindings/dma/sifive,fu540-c000-pdma.yaml         | 12 ++++++++----
> >  1 file changed, 8 insertions(+), 4 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > index a1af0b906365..974467c4bacb 100644
> > --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
> > @@ -27,10 +27,14 @@ allOf:
> >  
> >  properties:
> >    compatible:
> > -    items:
> > -      - enum:
> > -          - sifive,fu540-c000-pdma
> > -      - const: sifive,pdma0
> > +    oneOf:
> > +      - items:
> > +          - const: microchip,mpfs-pdma # Microchip out of order DMA transfer
> > +          - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer

Whoops, I meant to say - I'm okay with the soc-specific compatible being
added (we should have done that from the start), but I think the
comments here about software behaviour should be removed. With that, you
can re-add
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> > +      - items:
> > +          - enum:
> > +              - sifive,fu540-c000-pdma
> > +          - const: sifive,pdma0
> >      description:
> >        Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
> >        Supported compatible strings are -
> > -- 
> > 2.34.1
> > 



[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
  2023-09-22  9:50 ` shravan chippa
@ 2023-09-22  9:50   ` shravan chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa, Conor Dooley

From: Shravan Chippa <shravan.chippa@microchip.com>

Sifive platform dma does not allow out-of-order transfers,
buf out-of-order dma has a significant performance advantage.
Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
 drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index c7558c9f9ac3..992a804166d5 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -21,6 +21,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/of.h>
 #include <linux/of_dma.h>
+#include <linux/of_device.h>
 #include <linux/slab.h>
 
 #include "sf-pdma.h"
@@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
 static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
 			      u64 dst, u64 src, u64 size)
 {
-	desc->xfer_type = PDMA_FULL_SPEED;
+	desc->xfer_type =  desc->chan->pdma->transfer_type;
 	desc->xfer_size = size;
 	desc->dst_addr = dst;
 	desc->src_addr = src;
@@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
 
 static int sf_pdma_probe(struct platform_device *pdev)
 {
+	const struct sf_pdma_driver_platdata *ddata;
 	struct sf_pdma *pdma;
 	int ret, n_chans;
 	const enum dma_slave_buswidth widths =
@@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
 
 	pdma->n_chans = n_chans;
 
+	pdma->transfer_type = PDMA_FULL_SPEED;
+
+	ddata  = of_device_get_match_data(&pdev->dev);
+	if (ddata) {
+		if (ddata->quirks & NO_STRICT_ORDERING)
+			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
+	}
+
 	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(pdma->membase))
 		return PTR_ERR(pdma->membase);
@@ -629,11 +639,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static const struct sf_pdma_driver_platdata mpfs_pdma = {
+	.quirks = NO_STRICT_ORDERING,
+};
+
 static const struct of_device_id sf_pdma_dt_ids[] = {
-	{ .compatible = "sifive,fu540-c000-pdma" },
-	{ .compatible = "sifive,pdma0" },
+	{
+		.compatible = "sifive,fu540-c000-pdma",
+	}, {
+		.compatible = "sifive,pdma0",
+	}, {
+		.compatible = "microchip,mpfs-pdma",
+		.data	    = &mpfs_pdma,
+	},
 	{},
 };
+
 MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
 
 static struct platform_driver sf_pdma_driver = {
diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 5c398a83b491..3b16db4daa0b 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -49,6 +49,7 @@
 
 /* Transfer Type */
 #define PDMA_FULL_SPEED					0xFF000008
+#define NO_STRICT_ORDERING				BIT(3)
 
 /* Error Recovery */
 #define MAX_RETRY					1
@@ -112,8 +113,13 @@ struct sf_pdma {
 	struct dma_device       dma_dev;
 	void __iomem            *membase;
 	void __iomem            *mappedbase;
+	u32			transfer_type;
 	u32			n_chans;
 	struct sf_pdma_chan	chans[];
 };
 
+struct sf_pdma_driver_platdata {
+	u32 quirks;
+};
+
 #endif /* _SF_PDMA_H */
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-09-22  9:50   ` shravan chippa
  0 siblings, 0 replies; 26+ messages in thread
From: shravan chippa @ 2023-09-22  9:50 UTC (permalink / raw)
  To: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer
  Cc: dmaengine, devicetree, linux-riscv, linux-kernel,
	nagasuresh.relli, praveen.kumar, shravan.chippa, Conor Dooley

From: Shravan Chippa <shravan.chippa@microchip.com>

Sifive platform dma does not allow out-of-order transfers,
buf out-of-order dma has a significant performance advantage.
Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
 drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index c7558c9f9ac3..992a804166d5 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -21,6 +21,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/of.h>
 #include <linux/of_dma.h>
+#include <linux/of_device.h>
 #include <linux/slab.h>
 
 #include "sf-pdma.h"
@@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
 static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
 			      u64 dst, u64 src, u64 size)
 {
-	desc->xfer_type = PDMA_FULL_SPEED;
+	desc->xfer_type =  desc->chan->pdma->transfer_type;
 	desc->xfer_size = size;
 	desc->dst_addr = dst;
 	desc->src_addr = src;
@@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
 
 static int sf_pdma_probe(struct platform_device *pdev)
 {
+	const struct sf_pdma_driver_platdata *ddata;
 	struct sf_pdma *pdma;
 	int ret, n_chans;
 	const enum dma_slave_buswidth widths =
@@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
 
 	pdma->n_chans = n_chans;
 
+	pdma->transfer_type = PDMA_FULL_SPEED;
+
+	ddata  = of_device_get_match_data(&pdev->dev);
+	if (ddata) {
+		if (ddata->quirks & NO_STRICT_ORDERING)
+			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
+	}
+
 	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(pdma->membase))
 		return PTR_ERR(pdma->membase);
@@ -629,11 +639,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static const struct sf_pdma_driver_platdata mpfs_pdma = {
+	.quirks = NO_STRICT_ORDERING,
+};
+
 static const struct of_device_id sf_pdma_dt_ids[] = {
-	{ .compatible = "sifive,fu540-c000-pdma" },
-	{ .compatible = "sifive,pdma0" },
+	{
+		.compatible = "sifive,fu540-c000-pdma",
+	}, {
+		.compatible = "sifive,pdma0",
+	}, {
+		.compatible = "microchip,mpfs-pdma",
+		.data	    = &mpfs_pdma,
+	},
 	{},
 };
+
 MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
 
 static struct platform_driver sf_pdma_driver = {
diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 5c398a83b491..3b16db4daa0b 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -49,6 +49,7 @@
 
 /* Transfer Type */
 #define PDMA_FULL_SPEED					0xFF000008
+#define NO_STRICT_ORDERING				BIT(3)
 
 /* Error Recovery */
 #define MAX_RETRY					1
@@ -112,8 +113,13 @@ struct sf_pdma {
 	struct dma_device       dma_dev;
 	void __iomem            *membase;
 	void __iomem            *mappedbase;
+	u32			transfer_type;
 	u32			n_chans;
 	struct sf_pdma_chan	chans[];
 };
 
+struct sf_pdma_driver_platdata {
+	u32 quirks;
+};
+
 #endif /* _SF_PDMA_H */
-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
  2023-09-22  9:50   ` shravan chippa
@ 2023-09-22 10:03     ` Conor Dooley
  -1 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22 10:03 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar,
	Conor Dooley

[-- Attachment #1: Type: text/plain, Size: 3981 bytes --]

Hey Shravan,

On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> Sifive platform dma does not allow out-of-order transfers,

Can you remind me why we determined that this was the case?
IOW, why could we not enable the out-of-order transfers and get a
performance benefit for everyone? It's been a year or so (I think) and I
have forgotten.

Cheers,
Conor.

> buf out-of-order dma has a significant performance advantage.
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
> 
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
>  drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
>  2 files changed, 30 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index c7558c9f9ac3..992a804166d5 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
>  #include <linux/dma-mapping.h>
>  #include <linux/of.h>
>  #include <linux/of_dma.h>
> +#include <linux/of_device.h>
>  #include <linux/slab.h>
>  
>  #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
>  static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
>  			      u64 dst, u64 src, u64 size)
>  {
> -	desc->xfer_type = PDMA_FULL_SPEED;
> +	desc->xfer_type =  desc->chan->pdma->transfer_type;
>  	desc->xfer_size = size;
>  	desc->dst_addr = dst;
>  	desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>  
>  static int sf_pdma_probe(struct platform_device *pdev)
>  {
> +	const struct sf_pdma_driver_platdata *ddata;
>  	struct sf_pdma *pdma;
>  	int ret, n_chans;
>  	const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>  
>  	pdma->n_chans = n_chans;
>  
> +	pdma->transfer_type = PDMA_FULL_SPEED;
> +
> +	ddata  = of_device_get_match_data(&pdev->dev);
> +	if (ddata) {
> +		if (ddata->quirks & NO_STRICT_ORDERING)
> +			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> +	}
> +
>  	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
>  	if (IS_ERR(pdma->membase))
>  		return PTR_ERR(pdma->membase);
> @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
>  	return 0;
>  }
>  
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> +	.quirks = NO_STRICT_ORDERING,
> +};
> +
>  static const struct of_device_id sf_pdma_dt_ids[] = {
> -	{ .compatible = "sifive,fu540-c000-pdma" },
> -	{ .compatible = "sifive,pdma0" },
> +	{
> +		.compatible = "sifive,fu540-c000-pdma",
> +	}, {
> +		.compatible = "sifive,pdma0",
> +	}, {
> +		.compatible = "microchip,mpfs-pdma",
> +		.data	    = &mpfs_pdma,
> +	},
>  	{},
>  };
> +
>  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>  
>  static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>  
>  /* Transfer Type */
>  #define PDMA_FULL_SPEED					0xFF000008
> +#define NO_STRICT_ORDERING				BIT(3)
>  
>  /* Error Recovery */
>  #define MAX_RETRY					1
> @@ -112,8 +113,13 @@ struct sf_pdma {
>  	struct dma_device       dma_dev;
>  	void __iomem            *membase;
>  	void __iomem            *mappedbase;
> +	u32			transfer_type;
>  	u32			n_chans;
>  	struct sf_pdma_chan	chans[];
>  };
>  
> +struct sf_pdma_driver_platdata {
> +	u32 quirks;
> +};
> +
>  #endif /* _SF_PDMA_H */
> -- 
> 2.34.1
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-09-22 10:03     ` Conor Dooley
  0 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22 10:03 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar,
	Conor Dooley


[-- Attachment #1.1: Type: text/plain, Size: 3981 bytes --]

Hey Shravan,

On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> Sifive platform dma does not allow out-of-order transfers,

Can you remind me why we determined that this was the case?
IOW, why could we not enable the out-of-order transfers and get a
performance benefit for everyone? It's been a year or so (I think) and I
have forgotten.

Cheers,
Conor.

> buf out-of-order dma has a significant performance advantage.
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
> 
> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
>  drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
>  2 files changed, 30 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index c7558c9f9ac3..992a804166d5 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -21,6 +21,7 @@
>  #include <linux/dma-mapping.h>
>  #include <linux/of.h>
>  #include <linux/of_dma.h>
> +#include <linux/of_device.h>
>  #include <linux/slab.h>
>  
>  #include "sf-pdma.h"
> @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
>  static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
>  			      u64 dst, u64 src, u64 size)
>  {
> -	desc->xfer_type = PDMA_FULL_SPEED;
> +	desc->xfer_type =  desc->chan->pdma->transfer_type;
>  	desc->xfer_size = size;
>  	desc->dst_addr = dst;
>  	desc->src_addr = src;
> @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>  
>  static int sf_pdma_probe(struct platform_device *pdev)
>  {
> +	const struct sf_pdma_driver_platdata *ddata;
>  	struct sf_pdma *pdma;
>  	int ret, n_chans;
>  	const enum dma_slave_buswidth widths =
> @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>  
>  	pdma->n_chans = n_chans;
>  
> +	pdma->transfer_type = PDMA_FULL_SPEED;
> +
> +	ddata  = of_device_get_match_data(&pdev->dev);
> +	if (ddata) {
> +		if (ddata->quirks & NO_STRICT_ORDERING)
> +			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> +	}
> +
>  	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
>  	if (IS_ERR(pdma->membase))
>  		return PTR_ERR(pdma->membase);
> @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct platform_device *pdev)
>  	return 0;
>  }
>  
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> +	.quirks = NO_STRICT_ORDERING,
> +};
> +
>  static const struct of_device_id sf_pdma_dt_ids[] = {
> -	{ .compatible = "sifive,fu540-c000-pdma" },
> -	{ .compatible = "sifive,pdma0" },
> +	{
> +		.compatible = "sifive,fu540-c000-pdma",
> +	}, {
> +		.compatible = "sifive,pdma0",
> +	}, {
> +		.compatible = "microchip,mpfs-pdma",
> +		.data	    = &mpfs_pdma,
> +	},
>  	{},
>  };
> +
>  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
>  
>  static struct platform_driver sf_pdma_driver = {
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..3b16db4daa0b 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -49,6 +49,7 @@
>  
>  /* Transfer Type */
>  #define PDMA_FULL_SPEED					0xFF000008
> +#define NO_STRICT_ORDERING				BIT(3)
>  
>  /* Error Recovery */
>  #define MAX_RETRY					1
> @@ -112,8 +113,13 @@ struct sf_pdma {
>  	struct dma_device       dma_dev;
>  	void __iomem            *membase;
>  	void __iomem            *mappedbase;
> +	u32			transfer_type;
>  	u32			n_chans;
>  	struct sf_pdma_chan	chans[];
>  };
>  
> +struct sf_pdma_driver_platdata {
> +	u32 quirks;
> +};
> +
>  #endif /* _SF_PDMA_H */
> -- 
> 2.34.1
> 

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
  2023-09-22 10:03     ` Conor Dooley
@ 2023-09-25  5:22       ` Shravan.Chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-25  5:22 UTC (permalink / raw)
  To: conor
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, Nagasuresh.Relli, Praveen.Kumar,
	Conor.Dooley



> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Friday, September 22, 2023 3:34 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> <Conor.Dooley@microchip.com>
> Subject: Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
> 
> Hey Shravan,
> 
> On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers,
> 
> Can you remind me why we determined that this was the case?
> IOW, why could we not enable the out-of-order transfers and get a
> performance benefit for everyone? It's been a year or so (I think) and I have
> forgotten.
> 

I will try to modify the commit message.

Thanks,
Shravan

> Cheers,
> Conor.
> 
> > buf out-of-order dma has a significant performance advantage.
> > Add a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
> >  2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index c7558c9f9ac3..992a804166d5
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> >  #include <linux/dma-mapping.h>
> >  #include <linux/of.h>
> >  #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> >  #include <linux/slab.h>
> >
> >  #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)  static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> >  			      u64 dst, u64 src, u64 size)
> >  {
> > -	desc->xfer_type = PDMA_FULL_SPEED;
> > +	desc->xfer_type =  desc->chan->pdma->transfer_type;
> >  	desc->xfer_size = size;
> >  	desc->dst_addr = dst;
> >  	desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> > +	const struct sf_pdma_driver_platdata *ddata;
> >  	struct sf_pdma *pdma;
> >  	int ret, n_chans;
> >  	const enum dma_slave_buswidth widths = @@ -545,6 +547,14 @@
> static
> > int sf_pdma_probe(struct platform_device *pdev)
> >
> >  	pdma->n_chans = n_chans;
> >
> > +	pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > +	ddata  = of_device_get_match_data(&pdev->dev);
> > +	if (ddata) {
> > +		if (ddata->quirks & NO_STRICT_ORDERING)
> > +			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > +	}
> > +
> >  	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> >  	if (IS_ERR(pdma->membase))
> >  		return PTR_ERR(pdma->membase);
> > @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct
> platform_device *pdev)
> >  	return 0;
> >  }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > +	.quirks = NO_STRICT_ORDERING,
> > +};
> > +
> >  static const struct of_device_id sf_pdma_dt_ids[] = {
> > -	{ .compatible = "sifive,fu540-c000-pdma" },
> > -	{ .compatible = "sifive,pdma0" },
> > +	{
> > +		.compatible = "sifive,fu540-c000-pdma",
> > +	}, {
> > +		.compatible = "sifive,pdma0",
> > +	}, {
> > +		.compatible = "microchip,mpfs-pdma",
> > +		.data	    = &mpfs_pdma,
> > +	},
> >  	{},
> >  };
> > +
> >  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> >  static struct platform_driver sf_pdma_driver = { diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> >  /* Transfer Type */
> >  #define PDMA_FULL_SPEED					0xFF000008
> > +#define NO_STRICT_ORDERING				BIT(3)
> >
> >  /* Error Recovery */
> >  #define MAX_RETRY					1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> >  	struct dma_device       dma_dev;
> >  	void __iomem            *membase;
> >  	void __iomem            *mappedbase;
> > +	u32			transfer_type;
> >  	u32			n_chans;
> >  	struct sf_pdma_chan	chans[];
> >  };
> >
> > +struct sf_pdma_driver_platdata {
> > +	u32 quirks;
> > +};
> > +
> >  #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
> >

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-09-25  5:22       ` Shravan.Chippa
  0 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-25  5:22 UTC (permalink / raw)
  To: conor
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, Nagasuresh.Relli, Praveen.Kumar,
	Conor.Dooley



> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Friday, September 22, 2023 3:34 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> <Conor.Dooley@microchip.com>
> Subject: Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
> 
> Hey Shravan,
> 
> On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers,
> 
> Can you remind me why we determined that this was the case?
> IOW, why could we not enable the out-of-order transfers and get a
> performance benefit for everyone? It's been a year or so (I think) and I have
> forgotten.
> 

I will try to modify the commit message.

Thanks,
Shravan

> Cheers,
> Conor.
> 
> > buf out-of-order dma has a significant performance advantage.
> > Add a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
> >  2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index c7558c9f9ac3..992a804166d5
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> >  #include <linux/dma-mapping.h>
> >  #include <linux/of.h>
> >  #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> >  #include <linux/slab.h>
> >
> >  #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)  static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> >  			      u64 dst, u64 src, u64 size)
> >  {
> > -	desc->xfer_type = PDMA_FULL_SPEED;
> > +	desc->xfer_type =  desc->chan->pdma->transfer_type;
> >  	desc->xfer_size = size;
> >  	desc->dst_addr = dst;
> >  	desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> > +	const struct sf_pdma_driver_platdata *ddata;
> >  	struct sf_pdma *pdma;
> >  	int ret, n_chans;
> >  	const enum dma_slave_buswidth widths = @@ -545,6 +547,14 @@
> static
> > int sf_pdma_probe(struct platform_device *pdev)
> >
> >  	pdma->n_chans = n_chans;
> >
> > +	pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > +	ddata  = of_device_get_match_data(&pdev->dev);
> > +	if (ddata) {
> > +		if (ddata->quirks & NO_STRICT_ORDERING)
> > +			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > +	}
> > +
> >  	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> >  	if (IS_ERR(pdma->membase))
> >  		return PTR_ERR(pdma->membase);
> > @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct
> platform_device *pdev)
> >  	return 0;
> >  }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > +	.quirks = NO_STRICT_ORDERING,
> > +};
> > +
> >  static const struct of_device_id sf_pdma_dt_ids[] = {
> > -	{ .compatible = "sifive,fu540-c000-pdma" },
> > -	{ .compatible = "sifive,pdma0" },
> > +	{
> > +		.compatible = "sifive,fu540-c000-pdma",
> > +	}, {
> > +		.compatible = "sifive,pdma0",
> > +	}, {
> > +		.compatible = "microchip,mpfs-pdma",
> > +		.data	    = &mpfs_pdma,
> > +	},
> >  	{},
> >  };
> > +
> >  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> >  static struct platform_driver sf_pdma_driver = { diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> >  /* Transfer Type */
> >  #define PDMA_FULL_SPEED					0xFF000008
> > +#define NO_STRICT_ORDERING				BIT(3)
> >
> >  /* Error Recovery */
> >  #define MAX_RETRY					1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> >  	struct dma_device       dma_dev;
> >  	void __iomem            *membase;
> >  	void __iomem            *mappedbase;
> > +	u32			transfer_type;
> >  	u32			n_chans;
> >  	struct sf_pdma_chan	chans[];
> >  };
> >
> > +struct sf_pdma_driver_platdata {
> > +	u32 quirks;
> > +};
> > +
> >  #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
> >

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
  2023-09-22 10:03     ` Conor Dooley
@ 2023-09-26  7:04       ` Shravan.Chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-26  7:04 UTC (permalink / raw)
  To: conor
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, Nagasuresh.Relli, Praveen.Kumar,
	Conor.Dooley

Hi,

> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Friday, September 22, 2023 3:34 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> <Conor.Dooley@microchip.com>
> Subject: Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
> 
> Hey Shravan,
> 
> On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers,
> 
> Can you remind me why we determined that this was the case?
> IOW, why could we not enable the out-of-order transfers and get a
> performance benefit for everyone? It's been a year or so (I think) and I have
> forgotten.

sf-dma is used for all Sifive RISC-V chipsets, but we will not be able to test on all of them
in the microchip polar-fire FPGA SOC (RISC-V) platform we got good throughput with out-off-order transfers.
so we thought of having a separate compatible name for sf-dma driver to use out-of-order transfers. 

Thanks,
Shravan

> 
> Cheers,
> Conor.
> 
> > buf out-of-order dma has a significant performance advantage.
> > Add a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
> >  2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index c7558c9f9ac3..992a804166d5
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> >  #include <linux/dma-mapping.h>
> >  #include <linux/of.h>
> >  #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> >  #include <linux/slab.h>
> >
> >  #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)  static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> >  			      u64 dst, u64 src, u64 size)
> >  {
> > -	desc->xfer_type = PDMA_FULL_SPEED;
> > +	desc->xfer_type =  desc->chan->pdma->transfer_type;
> >  	desc->xfer_size = size;
> >  	desc->dst_addr = dst;
> >  	desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> > +	const struct sf_pdma_driver_platdata *ddata;
> >  	struct sf_pdma *pdma;
> >  	int ret, n_chans;
> >  	const enum dma_slave_buswidth widths = @@ -545,6 +547,14 @@
> static
> > int sf_pdma_probe(struct platform_device *pdev)
> >
> >  	pdma->n_chans = n_chans;
> >
> > +	pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > +	ddata  = of_device_get_match_data(&pdev->dev);
> > +	if (ddata) {
> > +		if (ddata->quirks & NO_STRICT_ORDERING)
> > +			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > +	}
> > +
> >  	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> >  	if (IS_ERR(pdma->membase))
> >  		return PTR_ERR(pdma->membase);
> > @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct
> platform_device *pdev)
> >  	return 0;
> >  }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > +	.quirks = NO_STRICT_ORDERING,
> > +};
> > +
> >  static const struct of_device_id sf_pdma_dt_ids[] = {
> > -	{ .compatible = "sifive,fu540-c000-pdma" },
> > -	{ .compatible = "sifive,pdma0" },
> > +	{
> > +		.compatible = "sifive,fu540-c000-pdma",
> > +	}, {
> > +		.compatible = "sifive,pdma0",
> > +	}, {
> > +		.compatible = "microchip,mpfs-pdma",
> > +		.data	    = &mpfs_pdma,
> > +	},
> >  	{},
> >  };
> > +
> >  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> >  static struct platform_driver sf_pdma_driver = { diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> >  /* Transfer Type */
> >  #define PDMA_FULL_SPEED					0xFF000008
> > +#define NO_STRICT_ORDERING				BIT(3)
> >
> >  /* Error Recovery */
> >  #define MAX_RETRY					1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> >  	struct dma_device       dma_dev;
> >  	void __iomem            *membase;
> >  	void __iomem            *mappedbase;
> > +	u32			transfer_type;
> >  	u32			n_chans;
> >  	struct sf_pdma_chan	chans[];
> >  };
> >
> > +struct sf_pdma_driver_platdata {
> > +	u32 quirks;
> > +};
> > +
> >  #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
> >

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
@ 2023-09-26  7:04       ` Shravan.Chippa
  0 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-26  7:04 UTC (permalink / raw)
  To: conor
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, Nagasuresh.Relli, Praveen.Kumar,
	Conor.Dooley

Hi,

> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Friday, September 22, 2023 3:34 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>; Conor Dooley - M52691
> <Conor.Dooley@microchip.com>
> Subject: Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
> 
> Hey Shravan,
> 
> On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers,
> 
> Can you remind me why we determined that this was the case?
> IOW, why could we not enable the out-of-order transfers and get a
> performance benefit for everyone? It's been a year or so (I think) and I have
> forgotten.

sf-dma is used for all Sifive RISC-V chipsets, but we will not be able to test on all of them
in the microchip polar-fire FPGA SOC (RISC-V) platform we got good throughput with out-off-order transfers.
so we thought of having a separate compatible name for sf-dma driver to use out-of-order transfers. 

Thanks,
Shravan

> 
> Cheers,
> Conor.
> 
> > buf out-of-order dma has a significant performance advantage.
> > Add a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h |  6 ++++++
> >  2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index c7558c9f9ac3..992a804166d5
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> >  #include <linux/dma-mapping.h>
> >  #include <linux/of.h>
> >  #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> >  #include <linux/slab.h>
> >
> >  #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)  static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> >  			      u64 dst, u64 src, u64 size)
> >  {
> > -	desc->xfer_type = PDMA_FULL_SPEED;
> > +	desc->xfer_type =  desc->chan->pdma->transfer_type;
> >  	desc->xfer_size = size;
> >  	desc->dst_addr = dst;
> >  	desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> >  static int sf_pdma_probe(struct platform_device *pdev)  {
> > +	const struct sf_pdma_driver_platdata *ddata;
> >  	struct sf_pdma *pdma;
> >  	int ret, n_chans;
> >  	const enum dma_slave_buswidth widths = @@ -545,6 +547,14 @@
> static
> > int sf_pdma_probe(struct platform_device *pdev)
> >
> >  	pdma->n_chans = n_chans;
> >
> > +	pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > +	ddata  = of_device_get_match_data(&pdev->dev);
> > +	if (ddata) {
> > +		if (ddata->quirks & NO_STRICT_ORDERING)
> > +			pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > +	}
> > +
> >  	pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> >  	if (IS_ERR(pdma->membase))
> >  		return PTR_ERR(pdma->membase);
> > @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct
> platform_device *pdev)
> >  	return 0;
> >  }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > +	.quirks = NO_STRICT_ORDERING,
> > +};
> > +
> >  static const struct of_device_id sf_pdma_dt_ids[] = {
> > -	{ .compatible = "sifive,fu540-c000-pdma" },
> > -	{ .compatible = "sifive,pdma0" },
> > +	{
> > +		.compatible = "sifive,fu540-c000-pdma",
> > +	}, {
> > +		.compatible = "sifive,pdma0",
> > +	}, {
> > +		.compatible = "microchip,mpfs-pdma",
> > +		.data	    = &mpfs_pdma,
> > +	},
> >  	{},
> >  };
> > +
> >  MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> >  static struct platform_driver sf_pdma_driver = { diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> >  /* Transfer Type */
> >  #define PDMA_FULL_SPEED					0xFF000008
> > +#define NO_STRICT_ORDERING				BIT(3)
> >
> >  /* Error Recovery */
> >  #define MAX_RETRY					1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> >  	struct dma_device       dma_dev;
> >  	void __iomem            *membase;
> >  	void __iomem            *mappedbase;
> > +	u32			transfer_type;
> >  	u32			n_chans;
> >  	struct sf_pdma_chan	chans[];
> >  };
> >
> > +struct sf_pdma_driver_platdata {
> > +	u32 quirks;
> > +};
> > +
> >  #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
> >

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform
  2023-09-22  9:50 ` shravan chippa
@ 2023-09-22 10:10   ` Conor Dooley
  -1 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22 10:10 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar

[-- Attachment #1: Type: text/plain, Size: 684 bytes --]

Hey,

On Fri, Sep 22, 2023 at 03:20:36PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> This series does the following
> 1. Adds a PolarFire SoC specific compatible and code to support for
> out-of-order dma transfers 
> 
> 2. Adds generic device tree bindings support by using 
> of_dma_controller_register()
> 
> Shravan Chippa (3):
>   dmaengine: sf-pdma: Support of_dma_controller_register()
>   dt-bindings: dma: sf-pdma: add new compatible name
>   dmaengine: sf-pdma: add mpfs-pdma compatible name

It looks like you're missing a patch here that adds this new set of
compatibles to the devicetree?

Thanks,
Conor.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform
@ 2023-09-22 10:10   ` Conor Dooley
  0 siblings, 0 replies; 26+ messages in thread
From: Conor Dooley @ 2023-09-22 10:10 UTC (permalink / raw)
  To: shravan chippa
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, nagasuresh.relli, praveen.kumar


[-- Attachment #1.1: Type: text/plain, Size: 684 bytes --]

Hey,

On Fri, Sep 22, 2023 at 03:20:36PM +0530, shravan chippa wrote:
> From: Shravan Chippa <shravan.chippa@microchip.com>
> 
> This series does the following
> 1. Adds a PolarFire SoC specific compatible and code to support for
> out-of-order dma transfers 
> 
> 2. Adds generic device tree bindings support by using 
> of_dma_controller_register()
> 
> Shravan Chippa (3):
>   dmaengine: sf-pdma: Support of_dma_controller_register()
>   dt-bindings: dma: sf-pdma: add new compatible name
>   dmaengine: sf-pdma: add mpfs-pdma compatible name

It looks like you're missing a patch here that adds this new set of
compatibles to the devicetree?

Thanks,
Conor.

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform
  2023-09-22 10:10   ` Conor Dooley
@ 2023-09-22 10:42     ` Shravan.Chippa
  -1 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-22 10:42 UTC (permalink / raw)
  To: conor
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, Nagasuresh.Relli, Praveen.Kumar



> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Friday, September 22, 2023 3:40 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the
> mpfs platform
> 
> Hey,
> 
> On Fri, Sep 22, 2023 at 03:20:36PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > This series does the following
> > 1. Adds a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > 2. Adds generic device tree bindings support by using
> > of_dma_controller_register()
> >
> > Shravan Chippa (3):
> >   dmaengine: sf-pdma: Support of_dma_controller_register()
> >   dt-bindings: dma: sf-pdma: add new compatible name
> >   dmaengine: sf-pdma: add mpfs-pdma compatible name
> 
> It looks like you're missing a patch here that adds this new set of compatibles
> to the devicetree?

I will add a new patch for this.

Thanks,
Shravan

> 
> Thanks,
> Conor.

^ permalink raw reply	[flat|nested] 26+ messages in thread

* RE: [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform
@ 2023-09-22 10:42     ` Shravan.Chippa
  0 siblings, 0 replies; 26+ messages in thread
From: Shravan.Chippa @ 2023-09-22 10:42 UTC (permalink / raw)
  To: conor
  Cc: green.wan, vkoul, robh+dt, krzysztof.kozlowski+dt, palmer,
	paul.walmsley, conor+dt, palmer, dmaengine, devicetree,
	linux-riscv, linux-kernel, Nagasuresh.Relli, Praveen.Kumar



> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Friday, September 22, 2023 3:40 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@microchip.com>
> Cc: green.wan@sifive.com; vkoul@kernel.org; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; palmer@dabbelt.com;
> paul.walmsley@sifive.com; conor+dt@kernel.org; palmer@sifive.com;
> dmaengine@vger.kernel.org; devicetree@vger.kernel.org; linux-
> riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@microchip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@microchip.com>
> Subject: Re: [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the
> mpfs platform
> 
> Hey,
> 
> On Fri, Sep 22, 2023 at 03:20:36PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@microchip.com>
> >
> > This series does the following
> > 1. Adds a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > 2. Adds generic device tree bindings support by using
> > of_dma_controller_register()
> >
> > Shravan Chippa (3):
> >   dmaengine: sf-pdma: Support of_dma_controller_register()
> >   dt-bindings: dma: sf-pdma: add new compatible name
> >   dmaengine: sf-pdma: add mpfs-pdma compatible name
> 
> It looks like you're missing a patch here that adds this new set of compatibles
> to the devicetree?

I will add a new patch for this.

Thanks,
Shravan

> 
> Thanks,
> Conor.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 26+ messages in thread

end of thread, other threads:[~2023-09-26  7:04 UTC | newest]

Thread overview: 26+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-09-22  9:50 [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform shravan chippa
2023-09-22  9:50 ` shravan chippa
2023-09-22  9:50 ` [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register() shravan chippa
2023-09-22  9:50   ` shravan chippa
2023-09-22 10:46   ` Emil Renner Berthing
2023-09-22 10:46     ` Emil Renner Berthing
2023-09-22 10:59     ` Shravan.Chippa
2023-09-22 10:59       ` Shravan.Chippa
2023-09-22  9:50 ` [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name shravan chippa
2023-09-22  9:50   ` shravan chippa
2023-09-22  9:59   ` Conor Dooley
2023-09-22  9:59     ` Conor Dooley
2023-09-22 10:06     ` Conor Dooley
2023-09-22 10:06       ` Conor Dooley
2023-09-22  9:50 ` [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma " shravan chippa
2023-09-22  9:50   ` shravan chippa
2023-09-22 10:03   ` Conor Dooley
2023-09-22 10:03     ` Conor Dooley
2023-09-25  5:22     ` Shravan.Chippa
2023-09-25  5:22       ` Shravan.Chippa
2023-09-26  7:04     ` Shravan.Chippa
2023-09-26  7:04       ` Shravan.Chippa
2023-09-22 10:10 ` [PATCH v1 0/3] dma: sf-pdma: various sf-pdma updates for the mpfs platform Conor Dooley
2023-09-22 10:10   ` Conor Dooley
2023-09-22 10:42   ` Shravan.Chippa
2023-09-22 10:42     ` Shravan.Chippa

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.