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From: Conor Dooley <conor@kernel.org>
To: Chen Wang <unicornxw@gmail.com>
Cc: aou@eecs.berkeley.edu, chao.wei@sophgo.com,
	devicetree@vger.kernel.org, guoren@kernel.org,
	jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
	xiaoguang.xing@sophgo.com, apatel@ventanamicro.com,
	Inochi Amaoto <inochiama@outlook.com>,
	Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v3 07/11] dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi
Date: Wed, 27 Sep 2023 17:01:38 +0100	[thread overview]
Message-ID: <20230927-panic-android-a83f1658b44e@spud> (raw)
In-Reply-To: <4dcfca1b0fa736a226bd01c796e4d8986ce49e63.1695804418.git.unicornxw@gmail.com>


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On Wed, Sep 27, 2023 at 05:01:56PM +0800, Chen Wang wrote:
> From: Inochi Amaoto <inochiama@outlook.com>
> 
> Like the timer of Sophgo sg2042 clint. The machine-level software
> interrupt device (mswi) of sg2042 clint have the same problem when
> dealing with the standard sifive clint.
> 
> To avoid the same conficts as the timer of sg2042 clint, also add the
> vendor specific compatible string to identify the mswi of sg2042 clint.
> 
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
> Signed-off-by: Chen Wang <unicornxw@gmail.com>

All of the same comments apply here.

Thanks,
Conor.

> ---
>  .../sophgo,sg2042-clint-mswi.yaml             | 42 +++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml
> new file mode 100644
> index 000000000000..a79c4c3db3b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-clint-mswi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo sg2042 CLINT Machine-level Software Interrupt Device
> +
> +maintainers:
> +  - Inochi Amaoto <inochiama@outlook.com>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: sophgo,sg2042-clint-mswi
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts-extended:
> +    minItems: 1
> +    maxItems: 4095
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts-extended
> +
> +examples:
> +  - |
> +    interrupt-controller@94000000 {
> +      compatible = "sophgo,sg2042-clint-mswi";
> +      interrupts-extended = <&cpu1intc 3>,
> +                            <&cpu2intc 3>,
> +                            <&cpu3intc 3>,
> +                            <&cpu4intc 3>;
> +      reg = <0x94000000 0x00010000>;
> +    };
> +...
> -- 
> 2.25.1
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Chen Wang <unicornxw@gmail.com>
Cc: aou@eecs.berkeley.edu, chao.wei@sophgo.com,
	devicetree@vger.kernel.org, guoren@kernel.org,
	jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org,
	xiaoguang.xing@sophgo.com, apatel@ventanamicro.com,
	Inochi Amaoto <inochiama@outlook.com>,
	Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v3 07/11] dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi
Date: Wed, 27 Sep 2023 17:01:38 +0100	[thread overview]
Message-ID: <20230927-panic-android-a83f1658b44e@spud> (raw)
In-Reply-To: <4dcfca1b0fa736a226bd01c796e4d8986ce49e63.1695804418.git.unicornxw@gmail.com>

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On Wed, Sep 27, 2023 at 05:01:56PM +0800, Chen Wang wrote:
> From: Inochi Amaoto <inochiama@outlook.com>
> 
> Like the timer of Sophgo sg2042 clint. The machine-level software
> interrupt device (mswi) of sg2042 clint have the same problem when
> dealing with the standard sifive clint.
> 
> To avoid the same conficts as the timer of sg2042 clint, also add the
> vendor specific compatible string to identify the mswi of sg2042 clint.
> 
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
> Signed-off-by: Chen Wang <unicornxw@gmail.com>

All of the same comments apply here.

Thanks,
Conor.

> ---
>  .../sophgo,sg2042-clint-mswi.yaml             | 42 +++++++++++++++++++
>  1 file changed, 42 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml
> new file mode 100644
> index 000000000000..a79c4c3db3b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-clint-mswi.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-clint-mswi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sophgo sg2042 CLINT Machine-level Software Interrupt Device
> +
> +maintainers:
> +  - Inochi Amaoto <inochiama@outlook.com>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: sophgo,sg2042-clint-mswi
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts-extended:
> +    minItems: 1
> +    maxItems: 4095
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts-extended
> +
> +examples:
> +  - |
> +    interrupt-controller@94000000 {
> +      compatible = "sophgo,sg2042-clint-mswi";
> +      interrupts-extended = <&cpu1intc 3>,
> +                            <&cpu2intc 3>,
> +                            <&cpu3intc 3>,
> +                            <&cpu4intc 3>;
> +      reg = <0x94000000 0x00010000>;
> +    };
> +...
> -- 
> 2.25.1
> 

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  reply	other threads:[~2023-09-27 16:01 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-27  8:54 [PATCH v3 00/11] Add Milk-V Pioneer RISC-V board support Chen Wang
2023-09-27  8:54 ` Chen Wang
2023-09-27  8:58 ` [PATCH v3 01/11] riscv: Add SOPHGO SOC family Kconfig support Chen Wang
2023-09-27  8:58   ` Chen Wang
2023-09-27  9:00 ` [PATCH v3 02/11] dt-bindings: vendor-prefixes: add milkv/sophgo Chen Wang
2023-09-27  9:00   ` Chen Wang
2023-09-27  9:00 ` [PATCH v3 03/11] dt-bindings: riscv: add sophgo sg2042 bindings Chen Wang
2023-09-27  9:00   ` Chen Wang
2023-09-27  9:01 ` [PATCH v3 04/11] dt-bindings: riscv: Add T-HEAD C920 compatibles Chen Wang
2023-09-27  9:01   ` Chen Wang
2023-09-27  9:01 ` [PATCH v3 05/11] dt-bindings: interrupt-controller: Add Sophgo SG2042 PLIC Chen Wang
2023-09-27  9:01   ` Chen Wang
2023-09-27  9:01 ` [PATCH v3 06/11] dt-bindings: timer: Add Sophgo sg2042 CLINT timer Chen Wang
2023-09-27  9:01   ` Chen Wang
2023-09-27 16:01   ` Conor Dooley
2023-09-27 16:01     ` Conor Dooley
2023-09-28  0:34     ` Inochi Amaoto
2023-09-28  0:34       ` Inochi Amaoto
2023-09-28  6:27       ` Conor Dooley
2023-09-28  6:27         ` Conor Dooley
2023-09-28  8:24         ` Inochi Amaoto
2023-09-28  8:24           ` Inochi Amaoto
2023-09-28  9:03           ` Conor Dooley
2023-09-28  9:03             ` Conor Dooley
2023-09-28  9:39             ` Inochi Amaoto
2023-09-28  9:39               ` Inochi Amaoto
2023-09-28  9:55               ` Conor Dooley
2023-09-28  9:55                 ` Conor Dooley
2023-09-27  9:01 ` [PATCH v3 07/11] dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi Chen Wang
2023-09-27  9:01   ` Chen Wang
2023-09-27 16:01   ` Conor Dooley [this message]
2023-09-27 16:01     ` Conor Dooley
2023-09-27  9:02 ` [PATCH v3 08/11] MAINTAINERS: add two files to sophgo devicetrees entry Chen Wang
2023-09-27  9:02   ` Chen Wang
2023-09-27  9:02 ` [PATCH v3 09/11] riscv: dts: add initial Sophgo SG2042 SoC device tree Chen Wang
2023-09-27  9:02   ` Chen Wang
2023-09-27 16:07   ` Conor Dooley
2023-09-27 16:07     ` Conor Dooley
2023-09-27  9:02 ` [PATCH v3 10/11] riscv: dts: sophgo: add Milk-V Pioneer board " Chen Wang
2023-09-27  9:02   ` Chen Wang
2023-09-27  9:02 ` [PATCH v3 11/11] riscv: defconfig: enable SOPHGO SoC Chen Wang
2023-09-27  9:02   ` Chen Wang
2023-09-27 16:09 ` [PATCH v3 00/11] Add Milk-V Pioneer RISC-V board support Conor Dooley
2023-09-27 16:09   ` Conor Dooley
2023-09-27 23:39   ` Chen Wang
2023-09-27 23:39     ` Chen Wang
2023-09-28  7:48     ` Chen Wang
2023-09-28  7:48       ` Chen Wang
2023-09-28  7:54       ` Conor Dooley
2023-09-28  7:54         ` Conor Dooley

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