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From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Andrew Lunn <andrew@lunn.ch>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Lee Jones <lee@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
	Takashi Iwai <tiwai@suse.com>,
	Shengjiu Wang <shengjiu.wang@gmail.com>,
	Xiubo Li <Xiubo.Lee@gmail.com>,
	Fabio Estevam <festevam@gmail.com>,
	Nicolin Chen <nicoleotsuka@gmail.com>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Randy Dunlap <rdunlap@infradead.org>,
	netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	alsa-devel@alsa-project.org, Simon Horman <horms@kernel.org>,
	Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v6 08/30] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC
Date: Wed, 27 Sep 2023 09:24:18 +0200	[thread overview]
Message-ID: <20230927092418.6a5326ce@bootlin.com> (raw)
In-Reply-To: <e8ee6529-b194-4588-96c0-1459f214d005@linaro.org>

Hi Krzysztof,

On Tue, 26 Sep 2023 22:59:14 +0200
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:

> On 25/09/2023 15:50, Herve Codina wrote:
> >>>>> With these details, do you still think I need to change the child (channel)
> >>>>> compatible ?      
> >>>>
> >>>> From OS point of view, you have a driver binding to this child-level
> >>>> compatible. How do you enforce Linux driver binding based on parent
> >>>> compatible? I looked at your next patch and I did not see it.    
> >>>
> >>> We do not need to have the child driver binding based on parent.    
> >>
> >> Exactly, that's what I said.
> >>  
> >>> We have to ensure that the child handles a QMC channel and the parent provides
> >>> a QMC channel.
> >>>
> >>> A QMC controller (parent) has to implement the QMC API (include/soc/fsl/qe/qmc.h)
> >>> and a QMC channel driver (child) has to use the QMC API.    
> >>
> >> How does this solve my concerns? Sorry, I do not understand. Your driver
> >> is a platform driver and binds to the generic compatible. How do you
> >> solve regular compatibility issues (need for quirks) if parent
> >> compatible is not used?
> >>
> >> How does being QMC compliant affects driver binding and
> >> compatibility/quirks?
> >>
> >> We are back to my original question and I don't think you answered to
> >> any of the concerns.  
> > 
> > Well, to be sure that I understand correctly, do you mean that I should
> > provide a compatible for the child (HDLC) with something like this:
> > --- 8< ---
> >   compatible:
> >     items:
> >       - enum:
> >           - fsl,mpc885-qmc-hdlc
> >           - fsl,mpc866-qmc-hdlc
> >       - const: fsl,cpm1-qmc-hdlc
> >       - const: fsl,qmc-hdlc
> > --- 8< ---  
> 
> Yes, more or less, depending on actual compatibility and SoC-family.
> Maybe "fsl,cpm1-qmc-hdlc" item in the middle is not needed.

Ok,
I will keep "fsl,cpm1-qmc-hdlc". The CPM1 is the co-processor present in these
SoCs and it handles the QMC controller. So, it makes sense to have it in this
binding.

I plan to add support for other SoCs in the future and for these SoCs, the
co-processor is not the CPM1. So, it makes sense to keep "fsl,cpm1-qmc-hdlc"
to identify the co-processor.

> 
> > 
> > If so, I didn't do that because a QMC channel consumer (driver matching
> > fsl,qmc-hdlc) doesn't contains any SoC specific part.  
> 
> Just like hundreds of other drivers. :)
> 
> There is a paragraph about specific compatibles here:
> https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-schema.html
> 
> 
> > It uses the channel as a communication channel to send/receive HDLC frames
> > to/from this communication channel.
> > All the specific SoC part is handled by the QMC controller (parent) itself and
> > not by any consumer (child).  
> 
> OK, so you guarantee in 100% for this hardware and all future (including
> designs unknown currently), that they will be 100% compatible with
> existing QMC channel consumer (child, matching fsl,qmc-hdlc) driver,
> thus there will be no need for any quirk. Specifically, there will be no
> chances that it would be reasonable to re-use the same driver for child
> (currently fsl,qmc-hdlc) in different parent.

Right,
compatible strings with SoC and co-processor will be added in the next iteration.

Thanks for your feedback.

Best regards,
Hervé

> 
> P.S. If you received this email twice, apologies, I have here troubles
> with internet.
> 
> Best regards,
> Krzysztof
> 

WARNING: multiple messages have this Message-ID (diff)
From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Andrew Lunn <andrew@lunn.ch>,
	alsa-devel@alsa-project.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Xiubo Li <Xiubo.Lee@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Jaroslav Kysela <perex@perex.cz>,
	Eric Dumazet <edumazet@google.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Fabio Estevam <festevam@gmail.com>,
	Qiang Zhao <qiang.zhao@nxp.com>,
	Shengjiu Wang <shengjiu.wang@gmail.com>,
	Lee Jones <lee@kernel.org>, Jakub Kicinski <kuba@kernel.org>,
	Paolo Abeni <pabeni@redhat.com>,
	devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org,
	Nicolin Chen <nicoleotsuka@gmail.com>,
	linux-gpio@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	Takashi Iwai <tiwai@suse.com>,
	linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
	Randy Dunlap <rdunlap@infradead.org>,
	Liam Girdwood <lgirdwood@gmail.com>, Li Yang <leoyang.li@nxp.com>,
	Mark Brown <broonie@kernel.org>, Si mon Horman <horms@kernel.org>,
	linuxppc-dev@lists.ozlabs.org,
	"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH v6 08/30] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC
Date: Wed, 27 Sep 2023 09:24:18 +0200	[thread overview]
Message-ID: <20230927092418.6a5326ce@bootlin.com> (raw)
In-Reply-To: <e8ee6529-b194-4588-96c0-1459f214d005@linaro.org>

Hi Krzysztof,

On Tue, 26 Sep 2023 22:59:14 +0200
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:

> On 25/09/2023 15:50, Herve Codina wrote:
> >>>>> With these details, do you still think I need to change the child (channel)
> >>>>> compatible ?      
> >>>>
> >>>> From OS point of view, you have a driver binding to this child-level
> >>>> compatible. How do you enforce Linux driver binding based on parent
> >>>> compatible? I looked at your next patch and I did not see it.    
> >>>
> >>> We do not need to have the child driver binding based on parent.    
> >>
> >> Exactly, that's what I said.
> >>  
> >>> We have to ensure that the child handles a QMC channel and the parent provides
> >>> a QMC channel.
> >>>
> >>> A QMC controller (parent) has to implement the QMC API (include/soc/fsl/qe/qmc.h)
> >>> and a QMC channel driver (child) has to use the QMC API.    
> >>
> >> How does this solve my concerns? Sorry, I do not understand. Your driver
> >> is a platform driver and binds to the generic compatible. How do you
> >> solve regular compatibility issues (need for quirks) if parent
> >> compatible is not used?
> >>
> >> How does being QMC compliant affects driver binding and
> >> compatibility/quirks?
> >>
> >> We are back to my original question and I don't think you answered to
> >> any of the concerns.  
> > 
> > Well, to be sure that I understand correctly, do you mean that I should
> > provide a compatible for the child (HDLC) with something like this:
> > --- 8< ---
> >   compatible:
> >     items:
> >       - enum:
> >           - fsl,mpc885-qmc-hdlc
> >           - fsl,mpc866-qmc-hdlc
> >       - const: fsl,cpm1-qmc-hdlc
> >       - const: fsl,qmc-hdlc
> > --- 8< ---  
> 
> Yes, more or less, depending on actual compatibility and SoC-family.
> Maybe "fsl,cpm1-qmc-hdlc" item in the middle is not needed.

Ok,
I will keep "fsl,cpm1-qmc-hdlc". The CPM1 is the co-processor present in these
SoCs and it handles the QMC controller. So, it makes sense to have it in this
binding.

I plan to add support for other SoCs in the future and for these SoCs, the
co-processor is not the CPM1. So, it makes sense to keep "fsl,cpm1-qmc-hdlc"
to identify the co-processor.

> 
> > 
> > If so, I didn't do that because a QMC channel consumer (driver matching
> > fsl,qmc-hdlc) doesn't contains any SoC specific part.  
> 
> Just like hundreds of other drivers. :)
> 
> There is a paragraph about specific compatibles here:
> https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-schema.html
> 
> 
> > It uses the channel as a communication channel to send/receive HDLC frames
> > to/from this communication channel.
> > All the specific SoC part is handled by the QMC controller (parent) itself and
> > not by any consumer (child).  
> 
> OK, so you guarantee in 100% for this hardware and all future (including
> designs unknown currently), that they will be 100% compatible with
> existing QMC channel consumer (child, matching fsl,qmc-hdlc) driver,
> thus there will be no need for any quirk. Specifically, there will be no
> chances that it would be reasonable to re-use the same driver for child
> (currently fsl,qmc-hdlc) in different parent.

Right,
compatible strings with SoC and co-processor will be added in the next iteration.

Thanks for your feedback.

Best regards,
Hervé

> 
> P.S. If you received this email twice, apologies, I have here troubles
> with internet.
> 
> Best regards,
> Krzysztof
> 

WARNING: multiple messages have this Message-ID (diff)
From: Herve Codina <herve.codina@bootlin.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Andrew Lunn <andrew@lunn.ch>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Lee Jones <lee@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
	Takashi Iwai <tiwai@suse.com>,
	Shengjiu Wang <shengjiu.wang@gmail.com>,
	Xiubo Li <Xiubo.Lee@gmail.com>,
	Fabio Estevam <festevam@gmail.com>,
	Nicolin Chen <nicoleotsuka@gmail.com>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Randy Dunlap <rdunlap@infradead.org>,
	netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	alsa-devel@alsa-project.org, Simon Horman <horms@kernel.org>,
	Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v6 08/30] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC
Date: Wed, 27 Sep 2023 09:24:18 +0200	[thread overview]
Message-ID: <20230927092418.6a5326ce@bootlin.com> (raw)
In-Reply-To: <e8ee6529-b194-4588-96c0-1459f214d005@linaro.org>

Hi Krzysztof,

On Tue, 26 Sep 2023 22:59:14 +0200
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:

> On 25/09/2023 15:50, Herve Codina wrote:
> >>>>> With these details, do you still think I need to change the child (channel)
> >>>>> compatible ?      
> >>>>
> >>>> From OS point of view, you have a driver binding to this child-level
> >>>> compatible. How do you enforce Linux driver binding based on parent
> >>>> compatible? I looked at your next patch and I did not see it.    
> >>>
> >>> We do not need to have the child driver binding based on parent.    
> >>
> >> Exactly, that's what I said.
> >>  
> >>> We have to ensure that the child handles a QMC channel and the parent provides
> >>> a QMC channel.
> >>>
> >>> A QMC controller (parent) has to implement the QMC API (include/soc/fsl/qe/qmc.h)
> >>> and a QMC channel driver (child) has to use the QMC API.    
> >>
> >> How does this solve my concerns? Sorry, I do not understand. Your driver
> >> is a platform driver and binds to the generic compatible. How do you
> >> solve regular compatibility issues (need for quirks) if parent
> >> compatible is not used?
> >>
> >> How does being QMC compliant affects driver binding and
> >> compatibility/quirks?
> >>
> >> We are back to my original question and I don't think you answered to
> >> any of the concerns.  
> > 
> > Well, to be sure that I understand correctly, do you mean that I should
> > provide a compatible for the child (HDLC) with something like this:
> > --- 8< ---
> >   compatible:
> >     items:
> >       - enum:
> >           - fsl,mpc885-qmc-hdlc
> >           - fsl,mpc866-qmc-hdlc
> >       - const: fsl,cpm1-qmc-hdlc
> >       - const: fsl,qmc-hdlc
> > --- 8< ---  
> 
> Yes, more or less, depending on actual compatibility and SoC-family.
> Maybe "fsl,cpm1-qmc-hdlc" item in the middle is not needed.

Ok,
I will keep "fsl,cpm1-qmc-hdlc". The CPM1 is the co-processor present in these
SoCs and it handles the QMC controller. So, it makes sense to have it in this
binding.

I plan to add support for other SoCs in the future and for these SoCs, the
co-processor is not the CPM1. So, it makes sense to keep "fsl,cpm1-qmc-hdlc"
to identify the co-processor.

> 
> > 
> > If so, I didn't do that because a QMC channel consumer (driver matching
> > fsl,qmc-hdlc) doesn't contains any SoC specific part.  
> 
> Just like hundreds of other drivers. :)
> 
> There is a paragraph about specific compatibles here:
> https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-schema.html
> 
> 
> > It uses the channel as a communication channel to send/receive HDLC frames
> > to/from this communication channel.
> > All the specific SoC part is handled by the QMC controller (parent) itself and
> > not by any consumer (child).  
> 
> OK, so you guarantee in 100% for this hardware and all future (including
> designs unknown currently), that they will be 100% compatible with
> existing QMC channel consumer (child, matching fsl,qmc-hdlc) driver,
> thus there will be no need for any quirk. Specifically, there will be no
> chances that it would be reasonable to re-use the same driver for child
> (currently fsl,qmc-hdlc) in different parent.

Right,
compatible strings with SoC and co-processor will be added in the next iteration.

Thanks for your feedback.

Best regards,
Hervé

> 
> P.S. If you received this email twice, apologies, I have here troubles
> with internet.
> 
> Best regards,
> Krzysztof
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-09-27  7:26 UTC|newest]

Thread overview: 131+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-22  7:58 [PATCH v6 00/30] Add support for QMC HDLC, framer infrastructure and PEF2256 framer Herve Codina
2023-09-22  7:58 ` Herve Codina
2023-09-22  7:58 ` Herve Codina
2023-09-22  7:58 ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 01/30] soc: fsl: cpm1: tsa: Fix __iomem addresses declaration Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 02/30] soc: fsl: cpm1: qmc: " Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 03/30] soc: fsl: cpm1: qmc: Fix rx channel reset Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 04/30] soc: fsl: cpm1: qmc: Extend the API to provide Rx status Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 05/30] soc: fsl: cpm1: qmc: Remove inline function specifiers Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 06/30] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Fix example property name Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 07/30] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add 'additionalProperties: false' in child nodes Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 08/30] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22 21:22   ` Rob Herring
2023-09-22 21:22     ` Rob Herring
2023-09-22 21:22     ` Rob Herring
2023-09-23 17:39   ` Krzysztof Kozlowski
2023-09-23 17:39     ` Krzysztof Kozlowski
2023-09-23 17:39     ` Krzysztof Kozlowski
2023-09-25  8:17     ` Herve Codina
2023-09-25  8:17       ` Herve Codina
2023-09-25  8:17       ` Herve Codina
2023-09-25  8:21       ` Krzysztof Kozlowski
2023-09-25  8:21         ` Krzysztof Kozlowski
2023-09-25  8:21         ` Krzysztof Kozlowski
2023-09-25  8:21         ` Krzysztof Kozlowski
2023-09-25 10:27         ` Herve Codina
2023-09-25 10:27           ` Herve Codina
2023-09-25 10:27           ` Herve Codina
2023-09-25 10:44           ` Krzysztof Kozlowski
2023-09-25 10:44             ` Krzysztof Kozlowski
2023-09-25 10:44             ` Krzysztof Kozlowski
2023-09-25 13:50             ` Herve Codina
2023-09-25 13:50               ` Herve Codina
2023-09-25 13:50               ` Herve Codina
2023-09-26 20:59               ` Krzysztof Kozlowski
2023-09-26 20:59                 ` Krzysztof Kozlowski
2023-09-26 20:59                 ` Krzysztof Kozlowski
2023-09-27  7:24                 ` Herve Codina [this message]
2023-09-27  7:24                   ` Herve Codina
2023-09-27  7:24                   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 09/30] soc: fsl: cpm1: qmc: Add support for child devices Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 10/30] net: wan: Add support for QMC HDLC Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 11/30] MAINTAINERS: Add the Freescale QMC HDLC driver entry Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 12/30] soc: fsl: cpm1: qmc: Introduce available timeslots masks Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 13/30] soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa* Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 14/30] soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa* Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 15/30] soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans() Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 16/30] soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans() Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 17/30] soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 18/30] soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setup Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 19/30] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 20/30] soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop() Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 21/30] soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan() Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 22/30] soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 23/30] wan: qmc_hdlc: Add runtime timeslots changes support Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58 ` [PATCH v6 24/30] net: wan: Add framer framework support Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:58   ` Herve Codina
2023-09-22  7:59 ` [PATCH v6 25/30] dt-bindings: net: Add the Lantiq PEF2256 E1/T1/J1 framer Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22 12:33   ` Rob Herring
2023-09-22 12:33     ` Rob Herring
2023-09-22 12:33     ` Rob Herring
2023-09-22 13:45     ` Herve Codina
2023-09-22 13:45       ` Herve Codina
2023-09-22 13:45       ` Herve Codina
2023-09-22 19:45       ` Rob Herring
2023-09-22 19:45         ` Rob Herring
2023-09-22 19:45         ` Rob Herring
2023-09-22  7:59 ` [PATCH v6 26/30] net: wan: framer: Add support for the Lantiq PEF2256 framer Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59 ` [PATCH v6 27/30] pinctrl: Add support for the Lantic PEF2256 pinmux Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59 ` [PATCH v6 28/30] MAINTAINERS: Add the Lantiq PEF2256 driver entry Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59 ` [PATCH v6 29/30] ASoC: codecs: Add support for the framer codec Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59 ` [PATCH v6 30/30] net: wan: fsl_qmc_hdlc: Add framer support Herve Codina
2023-09-22  7:59   ` Herve Codina
2023-09-22  7:59   ` Herve Codina

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