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From: Rob Herring <robh@kernel.org>
To: Pankaj Gupta <pankaj.gupta@nxp.com>
Cc: shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, clin@suse.com, conor+dt@kernel.org,
	pierre.gondois@arm.com, festevam@gmail.com, linux-imx@nxp.com,
	davem@davemloft.net, krzysztof.kozlowski+dt@linaro.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, gaurav.jain@nxp.com,
	alexander.stein@ew.tq-group.com, V.Sethi@nxp.com
Subject: Re: [PATCH v6 02/11] dt-bindings: arm: fsl: add imx-se-fw binding doc
Date: Thu, 28 Sep 2023 13:51:59 -0500	[thread overview]
Message-ID: <20230928185159.GA1035361-robh@kernel.org> (raw)
In-Reply-To: <20230927175401.1962733-3-pankaj.gupta@nxp.com>

On Wed, Sep 27, 2023 at 11:23:52PM +0530, Pankaj Gupta wrote:
> The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded
> secure enclave within the SoC boundary to enable features like
> - HSM
> - SHE
> - V2X
> 
> Communicates via message unit with linux kernel. This driver
> is enables communication ensuring well defined message sequence
> protocol between Application Core and enclave's firmware.
> 
> Driver configures multiple misc-device on the MU, for multiple
> user-space applications can communicate on single MU.
> 
> It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> 
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
>  .../bindings/firmware/fsl,imx-se-fw.yaml      | 73 +++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
> 
> diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
> new file mode 100644
> index 000000000000..d250794432b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/fsl,imx-se-fw.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW)
> +
> +maintainers:
> +  - Pankaj Gupta <pankaj.gupta@nxp.com>
> +
> +description:

Need '|' to preserve formatting.

> +  The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded
> +  secure enclave within the SoC boundary to enable features like
> +  - HSM
> +  - SHE
> +  - V2X
> +
> +  It uses message unit to communicate and coordinate to pass messages
> +  (e.g., data,  status and control) through its interfaces.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8ulp-se-fw
> +      - fsl,imx93-se-fw

The firmware is not compatible across chips?

> +
> +  mboxes:
> +    description:
> +      All MU channels must be within the same MU instance. Cross instances are
> +      not allowed. Users need to ensure that used MU instance does not conflict
> +      with other execution environments.
> +    items:
> +      - description: TX0 MU channel
> +      - description: RX0 MU channel
> +
> +  mbox-names:
> +    items:
> +      - const: tx
> +      - const: rx
> +
> +  fsl,mu-id:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Identifier to the message-unit among the multiple message-unit that exists on SoC.
> +      Per message-unit, multiple misc-devices are created, that are  used by userspace

Extra space in there.

Wrap lines at 80 unless there's a benefit to going to 100.

> +      application as logical-waiter and logical-receiver.
> +
> +  memory-region:
> +    items:
> +      - description: Reserved memory region that can be accessed by firmware. Used for
> +          exchanging the buffers between driver and firmware.
> +
> +  fsl,sram:

Just the common 'sram' property.

> +    description: Phandle to the device SRAM

Used for what?

> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> +required:
> +  - compatible
> +  - mboxes
> +  - mbox-names
> +  - fsl,mu-id

How is memory-region optional?

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    ele_fw: se-fw {

Drop unused labels.

> +      compatible = "fsl,imx8ulp-se-fw";
> +      mbox-names = "tx", "rx";
> +      mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> +      fsl,mu-id = <2>;
> +    };
> -- 
> 2.34.1
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Pankaj Gupta <pankaj.gupta@nxp.com>
Cc: shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, clin@suse.com, conor+dt@kernel.org,
	pierre.gondois@arm.com, festevam@gmail.com, linux-imx@nxp.com,
	davem@davemloft.net, krzysztof.kozlowski+dt@linaro.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, gaurav.jain@nxp.com,
	alexander.stein@ew.tq-group.com, V.Sethi@nxp.com
Subject: Re: [PATCH v6 02/11] dt-bindings: arm: fsl: add imx-se-fw binding doc
Date: Thu, 28 Sep 2023 13:51:59 -0500	[thread overview]
Message-ID: <20230928185159.GA1035361-robh@kernel.org> (raw)
In-Reply-To: <20230927175401.1962733-3-pankaj.gupta@nxp.com>

On Wed, Sep 27, 2023 at 11:23:52PM +0530, Pankaj Gupta wrote:
> The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded
> secure enclave within the SoC boundary to enable features like
> - HSM
> - SHE
> - V2X
> 
> Communicates via message unit with linux kernel. This driver
> is enables communication ensuring well defined message sequence
> protocol between Application Core and enclave's firmware.
> 
> Driver configures multiple misc-device on the MU, for multiple
> user-space applications can communicate on single MU.
> 
> It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> 
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
>  .../bindings/firmware/fsl,imx-se-fw.yaml      | 73 +++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
> 
> diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
> new file mode 100644
> index 000000000000..d250794432b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/fsl,imx-se-fw.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW)
> +
> +maintainers:
> +  - Pankaj Gupta <pankaj.gupta@nxp.com>
> +
> +description:

Need '|' to preserve formatting.

> +  The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded
> +  secure enclave within the SoC boundary to enable features like
> +  - HSM
> +  - SHE
> +  - V2X
> +
> +  It uses message unit to communicate and coordinate to pass messages
> +  (e.g., data,  status and control) through its interfaces.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8ulp-se-fw
> +      - fsl,imx93-se-fw

The firmware is not compatible across chips?

> +
> +  mboxes:
> +    description:
> +      All MU channels must be within the same MU instance. Cross instances are
> +      not allowed. Users need to ensure that used MU instance does not conflict
> +      with other execution environments.
> +    items:
> +      - description: TX0 MU channel
> +      - description: RX0 MU channel
> +
> +  mbox-names:
> +    items:
> +      - const: tx
> +      - const: rx
> +
> +  fsl,mu-id:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Identifier to the message-unit among the multiple message-unit that exists on SoC.
> +      Per message-unit, multiple misc-devices are created, that are  used by userspace

Extra space in there.

Wrap lines at 80 unless there's a benefit to going to 100.

> +      application as logical-waiter and logical-receiver.
> +
> +  memory-region:
> +    items:
> +      - description: Reserved memory region that can be accessed by firmware. Used for
> +          exchanging the buffers between driver and firmware.
> +
> +  fsl,sram:

Just the common 'sram' property.

> +    description: Phandle to the device SRAM

Used for what?

> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> +required:
> +  - compatible
> +  - mboxes
> +  - mbox-names
> +  - fsl,mu-id

How is memory-region optional?

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    ele_fw: se-fw {

Drop unused labels.

> +      compatible = "fsl,imx8ulp-se-fw";
> +      mbox-names = "tx", "rx";
> +      mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> +      fsl,mu-id = <2>;
> +    };
> -- 
> 2.34.1
> 

  reply	other threads:[~2023-09-28 18:52 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-27 17:53 [PATCH v6 00/11] firmware: imx: NXP Secure-Enclave FW Driver Pankaj Gupta
2023-09-27 17:53 ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 01/11] Documentation/firmware: added imx/se-fw to other_interfaces Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 02/11] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-28 18:51   ` Rob Herring [this message]
2023-09-28 18:51     ` Rob Herring
2023-10-04  4:10     ` [EXT] " Pankaj Gupta
2023-10-04  4:10       ` Pankaj Gupta
2023-10-04  6:36       ` Krzysztof Kozlowski
2023-10-04  6:36         ` Krzysztof Kozlowski
2023-10-26 11:23         ` Pankaj Gupta
2023-10-26 11:23           ` Pankaj Gupta
2023-10-26 13:55           ` Conor Dooley
2023-10-26 13:55             ` Conor Dooley
2023-10-27  7:08           ` Krzysztof Kozlowski
2023-10-27  7:08             ` Krzysztof Kozlowski
2023-09-27 17:53 ` [PATCH v6 03/11] arm64: dts: imx8ulp-evk: added nxp secure enclave firmware Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 04/11] arm64: dts: imx8ulp-evk: reserved mem-ranges to constrain ele_fw dma-range Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 05/11] arm64: dts: imx93-11x11-evk: added nxp secure enclave fw Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 06/11] arm64: dts: imx93-11x11-evk: reserved mem-ranges Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 07/11] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-10-04  6:40   ` Krzysztof Kozlowski
2023-10-04  6:40     ` Krzysztof Kozlowski
2023-10-26 11:18     ` [EXT] " Pankaj Gupta
2023-10-26 11:18       ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 08/11] firmware: imx: init-fw api exchange on imx93 Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-09-27 17:53 ` [PATCH v6 09/11] firmware: imx: enable trng Pankaj Gupta
2023-09-27 17:53   ` Pankaj Gupta
2023-10-01  5:25   ` kernel test robot
2023-10-01  5:25     ` kernel test robot
2023-09-27 17:54 ` [PATCH v6 10/11] firmware: imx: enclave-fw: add handling for save/restore IMEM region Pankaj Gupta
2023-09-27 17:54   ` Pankaj Gupta
2023-09-27 17:54 ` [PATCH v6 11/11] MAINTAINERS: Added maintainer details Pankaj Gupta
2023-09-27 17:54   ` Pankaj Gupta

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