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From: Christoph Hellwig <hch@lst.de>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: "Robin Murphy" <robin.murphy@arm.com>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Arnd Bergmann" <arnd@arndb.de>, "Icenowy Zheng" <uwu@icenowy.me>,
	"Jisheng Zhang" <jszhang@kernel.org>,
	"Drew Fustini" <dfustini@baylibre.com>,
	"Christoph Hellwig" <hch@lst.de>,
	"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"Robert Nelson" <robertcnelson@gmail.com>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Guo Ren" <guoren@kernel.org>, "Fu Wei" <wefu@redhat.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Conor Dooley" <conor@kernel.org>,
	"Jason Kridner" <jkridner@beagleboard.org>,
	"Xi Ruoyao" <xry111@xry111.site>, "Han Gao" <gaohan@iscas.ac.cn>,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	"Björn Töpel" <bjorn@kernel.org>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	Linux-MM <linux-mm@kvack.org>,
	"Fabrizio Castro" <fabrizio.castro@bp.renesas.com>
Subject: Re: [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards
Date: Thu, 5 Oct 2023 08:57:26 +0200	[thread overview]
Message-ID: <20231005065726.GA5760@lst.de> (raw)
In-Reply-To: <CA+V-a8vbWW6=HTfR+FCPOB0bAa8M3Bbm_k=7+XbjOc3ybo6VNQ@mail.gmail.com>

No.  The global pool is a last resort only for nommu and other very
limited setups.  It should never be enable in a general-purpose kernel,
and if your hardware requires it is a failed designed and should not
be supported in a general purpose kernel build.


WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: "Ulf Hansson" <ulf.hansson@linaro.org>,
	"Jisheng Zhang" <jszhang@kernel.org>,
	"Drew Fustini" <dfustini@baylibre.com>,
	linux-kernel@vger.kernel.org, Linux-MM <linux-mm@kvack.org>,
	"Guo Ren" <guoren@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	linux-riscv@lists.infradead.org, "Christoph Hellwig" <hch@lst.de>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Fabrizio Castro" <fabrizio.castro@bp.renesas.com>,
	devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	"Arnd Bergmann" <arnd@arndb.de>, "Han Gao" <gaohan@iscas.ac.cn>,
	"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"Jason Kridner" <jkridner@beagleboard.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Robert Nelson" <robertcnelson@gmail.com>,
	linux-mmc@vger.kernel.org,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Björn Töpel" <bjorn@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Xi Ruoyao" <xry111@xry111.site>,
	"Robin Murphy" <robin.murphy@arm.com>, "Fu Wei" <wefu@redhat.com>
Subject: Re: [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards
Date: Thu, 5 Oct 2023 08:57:26 +0200	[thread overview]
Message-ID: <20231005065726.GA5760@lst.de> (raw)
In-Reply-To: <CA+V-a8vbWW6=HTfR+FCPOB0bAa8M3Bbm_k=7+XbjOc3ybo6VNQ@mail.gmail.com>

No.  The global pool is a last resort only for nommu and other very
limited setups.  It should never be enable in a general-purpose kernel,
and if your hardware requires it is a failed designed and should not
be supported in a general purpose kernel build.


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  parent reply	other threads:[~2023-10-05 15:58 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-22  1:49 [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards Drew Fustini
2023-09-22  1:49 ` Drew Fustini
2023-09-22  1:49 ` [PATCH 1/6] dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support Drew Fustini
2023-09-22  1:49   ` Drew Fustini
2023-09-22  9:57   ` Conor Dooley
2023-09-22  9:57     ` Conor Dooley
2023-09-22 15:18     ` Drew Fustini
2023-09-22 15:18       ` Drew Fustini
2023-09-23  8:10       ` Guo Ren
2023-09-23  8:10         ` Guo Ren
2023-09-24 21:04         ` Drew Fustini
2023-09-24 21:04           ` Drew Fustini
2023-09-22  1:49 ` [PATCH 2/6] mmc: sdhci: add __sdhci_execute_tuning() to header Drew Fustini
2023-09-22  1:49   ` Drew Fustini
2023-09-25 10:21   ` Adrian Hunter
2023-09-25 10:21     ` Adrian Hunter
2023-09-25 10:23     ` Xi Ruoyao
2023-09-25 10:23       ` Xi Ruoyao
2023-09-25 10:31       ` Adrian Hunter
2023-09-25 10:31         ` Adrian Hunter
2023-09-25 14:41     ` Drew Fustini
2023-09-25 14:41       ` Drew Fustini
2023-09-22  1:49 ` [PATCH 3/6] mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520 Drew Fustini
2023-09-22  1:49   ` Drew Fustini
2023-09-25 10:35   ` Adrian Hunter
2023-09-25 10:35     ` Adrian Hunter
2023-09-25 14:43     ` Drew Fustini
2023-09-25 14:43       ` Drew Fustini
2023-10-04 16:19   ` Jisheng Zhang
2023-10-04 16:19     ` Jisheng Zhang
2023-10-04 19:12     ` Drew Fustini
2023-10-04 19:12       ` Drew Fustini
2023-09-22  1:49 ` [PATCH 4/6] riscv: dts: thead: Add TH1520 mmc controller and sdhci clock Drew Fustini
2023-09-22  1:49   ` Drew Fustini
2023-09-22  1:49 ` [PATCH 5/6] riscv: dts: thead: Enable BeagleV Ahead eMMC controller Drew Fustini
2023-09-22  1:49   ` Drew Fustini
2023-09-22  1:49 ` [PATCH 6/6] riscv: dts: thead: Enable LicheePi 4A " Drew Fustini
2023-09-22  1:49   ` Drew Fustini
2023-09-22 11:41 ` [PATCH 0/6] RISC-V: Add eMMC support for TH1520 boards Xi Ruoyao
2023-09-22 11:41   ` Xi Ruoyao
2023-09-22 16:23   ` Drew Fustini
2023-09-22 16:23     ` Drew Fustini
2023-09-23 16:33     ` Xi Ruoyao
2023-09-23 16:33       ` Xi Ruoyao
2023-09-23  0:11   ` Icenowy Zheng
2023-09-23  0:11     ` Icenowy Zheng
2023-09-22 19:08 ` Robert Nelson
2023-09-22 19:08   ` Robert Nelson
2023-09-22 22:48   ` Robert Nelson
2023-09-22 22:48     ` Robert Nelson
2023-10-03  4:37     ` Drew Fustini
2023-10-03  4:37       ` Drew Fustini
2023-10-04 11:30       ` Jisheng Zhang
2023-10-04 11:30         ` Jisheng Zhang
2023-10-04 13:02         ` Lad, Prabhakar
2023-10-04 13:02           ` Lad, Prabhakar
2023-10-04 13:49           ` Robin Murphy
2023-10-04 13:49             ` Robin Murphy
2023-10-04 14:02             ` Icenowy Zheng
2023-10-04 14:02               ` Icenowy Zheng
2023-10-04 14:18               ` Robin Murphy
2023-10-04 14:18                 ` Robin Murphy
2023-10-04 14:46                 ` Icenowy Zheng
2023-10-04 14:46                   ` Icenowy Zheng
2023-10-04 14:58                 ` Icenowy Zheng
2023-10-04 14:58                   ` Icenowy Zheng
2023-10-04 16:03                 ` Lad, Prabhakar
2023-10-04 16:03                   ` Lad, Prabhakar
2023-10-04 17:16                   ` Lad, Prabhakar
2023-10-04 17:16                     ` Lad, Prabhakar
2023-10-04 18:49                     ` Samuel Holland
2023-10-04 18:49                       ` Samuel Holland
2023-10-04 19:38                       ` Robin Murphy
2023-10-04 19:38                         ` Robin Murphy
2023-10-04 20:47                         ` Lad, Prabhakar
2023-10-04 20:47                           ` Lad, Prabhakar
2023-10-05  6:57                     ` Christoph Hellwig [this message]
2023-10-05  6:57                       ` Christoph Hellwig
2023-10-04 14:06             ` Jisheng Zhang
2023-10-04 14:06               ` Jisheng Zhang
2023-10-04 15:27               ` Geert Uytterhoeven
2023-10-04 15:27                 ` Geert Uytterhoeven

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