From: Andy Chiu <andy.chiu@sifive.com>
To: linux-riscv@lists.infradead.org, palmer@dabbelt.com
Cc: paul.walmsley@sifive.com, greentime.hu@sifive.com,
guoren@linux.alibaba.com, bjorn@kernel.org, peterz@infradead.org,
tglx@linutronix.de, "Andy Chiu" <andy.chiu@sifive.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Oleg Nesterov" <oleg@redhat.com>, "Guo Ren" <guoren@kernel.org>,
"Jisheng Zhang" <jszhang@kernel.org>,
"Björn Töpel" <bjorn@rivosinc.com>,
"Vincent Chen" <vincent.chen@sifive.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Bresticker" <abrestic@rivosinc.com>,
"Mathis Salmen" <mathis.salmen@matsal.de>
Subject: [v3, 4/5] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}()
Date: Thu, 19 Oct 2023 15:45:51 +0000 [thread overview]
Message-ID: <20231019154552.23351-5-andy.chiu@sifive.com> (raw)
In-Reply-To: <20231019154552.23351-1-andy.chiu@sifive.com>
riscv_v_vstate_{save,restore}() can operate only on the knowlege of
struct __riscv_v_ext_state, and struct pt_regs. Let the caller decides
which should be passed into the function. Meanwhile, the kernel-mode
Vector is going to introduce another vstate, so this also makes functions
potentially able to be reused.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---
Changelog v3:
- save V context after get_cpu_vector_context
Changelog v2:
- fix build fail that get caught on this patch (Conor)
---
arch/riscv/include/asm/entry-common.h | 2 +-
arch/riscv/include/asm/vector.h | 14 +++++---------
arch/riscv/kernel/kernel_mode_vector.c | 2 +-
arch/riscv/kernel/ptrace.c | 2 +-
arch/riscv/kernel/signal.c | 2 +-
5 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h
index 8d64f1c18169..fd78361bf301 100644
--- a/arch/riscv/include/asm/entry-common.h
+++ b/arch/riscv/include/asm/entry-common.h
@@ -16,7 +16,7 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
* We are already called with irq disabled, so go without
* keepping track of vector_context_busy.
*/
- riscv_v_vstate_restore(current, regs);
+ riscv_v_vstate_restore(¤t->thread.vstate, regs);
}
}
diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h
index 2f11c6f3ad96..d356eac8c0b4 100644
--- a/arch/riscv/include/asm/vector.h
+++ b/arch/riscv/include/asm/vector.h
@@ -166,23 +166,19 @@ static inline void riscv_v_vstate_discard(struct pt_regs *regs)
__riscv_v_vstate_dirty(regs);
}
-static inline void riscv_v_vstate_save(struct task_struct *task,
+static inline void riscv_v_vstate_save(struct __riscv_v_ext_state *vstate,
struct pt_regs *regs)
{
if ((regs->status & SR_VS) == SR_VS_DIRTY) {
- struct __riscv_v_ext_state *vstate = &task->thread.vstate;
-
__riscv_v_vstate_save(vstate, vstate->datap);
__riscv_v_vstate_clean(regs);
}
}
-static inline void riscv_v_vstate_restore(struct task_struct *task,
+static inline void riscv_v_vstate_restore(struct __riscv_v_ext_state *vstate,
struct pt_regs *regs)
{
if ((regs->status & SR_VS) != SR_VS_OFF) {
- struct __riscv_v_ext_state *vstate = &task->thread.vstate;
-
__riscv_v_vstate_restore(vstate, vstate->datap);
__riscv_v_vstate_clean(regs);
}
@@ -203,7 +199,7 @@ static inline void __switch_to_vector(struct task_struct *prev,
struct pt_regs *regs;
regs = task_pt_regs(prev);
- riscv_v_vstate_save(prev, regs);
+ riscv_v_vstate_save(&prev->thread.vstate, regs);
riscv_v_vstate_set_restore(next, task_pt_regs(next));
}
@@ -221,8 +217,8 @@ static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; }
static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; }
#define riscv_v_vsize (0)
#define riscv_v_vstate_discard(regs) do {} while (0)
-#define riscv_v_vstate_save(task, regs) do {} while (0)
-#define riscv_v_vstate_restore(task, regs) do {} while (0)
+#define riscv_v_vstate_save(vstate, regs) do {} while (0)
+#define riscv_v_vstate_restore(vstate, regs) do {} while (0)
#define __switch_to_vector(__prev, __next) do {} while (0)
#define riscv_v_vstate_off(regs) do {} while (0)
#define riscv_v_vstate_on(regs) do {} while (0)
diff --git a/arch/riscv/kernel/kernel_mode_vector.c b/arch/riscv/kernel/kernel_mode_vector.c
index fa01dc62256f..2344817f8640 100644
--- a/arch/riscv/kernel/kernel_mode_vector.c
+++ b/arch/riscv/kernel/kernel_mode_vector.c
@@ -70,7 +70,7 @@ void kernel_vector_begin(void)
get_cpu_vector_context();
- riscv_v_vstate_save(current, task_pt_regs(current));
+ riscv_v_vstate_save(¤t->thread.vstate, task_pt_regs(current));
riscv_v_enable();
}
diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c
index 7b93bcbdf9fa..e8515aa9d80b 100644
--- a/arch/riscv/kernel/ptrace.c
+++ b/arch/riscv/kernel/ptrace.c
@@ -101,7 +101,7 @@ static int riscv_vr_get(struct task_struct *target,
*/
if (target == current) {
get_cpu_vector_context();
- riscv_v_vstate_save(current, task_pt_regs(current));
+ riscv_v_vstate_save(¤t->thread.vstate, task_pt_regs(current));
put_cpu_vector_context();
}
diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c
index d31d2c74d31f..13cb00cbcd58 100644
--- a/arch/riscv/kernel/signal.c
+++ b/arch/riscv/kernel/signal.c
@@ -87,7 +87,7 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec)
WARN_ON(unlikely(!IS_ALIGNED((unsigned long)datap, 16)));
get_cpu_vector_context();
- riscv_v_vstate_save(current, regs);
+ riscv_v_vstate_save(¤t->thread.vstate, regs);
put_cpu_vector_context();
/* Copy everything of vstate but datap. */
--
2.17.1
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next prev parent reply other threads:[~2023-10-19 15:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-19 15:45 [v3, 0/5] riscv: support kernel-mode Vector Andy Chiu
2023-10-19 15:45 ` [v3, 1/5] riscv: Add support for kernel mode vector Andy Chiu
2023-10-24 11:16 ` Conor Dooley
2023-10-19 15:45 ` [v3, 2/5] riscv: Add vector extension XOR implementation Andy Chiu
2023-10-19 15:45 ` [v3, 3/5] riscv: sched: defer restoring Vector context for user Andy Chiu
2023-10-24 11:24 ` Conor Dooley
2023-10-19 15:45 ` Andy Chiu [this message]
2023-10-24 11:26 ` [v3, 4/5] riscv: vector: do not pass task_struct into riscv_v_vstate_{save,restore}() Conor Dooley
2023-10-19 15:45 ` [v3, 5/5] riscv: vector: allow kernel-mode Vector with preemption Andy Chiu
2023-10-20 7:02 ` Andy Chiu
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