From: Rob Herring <robh@kernel.org>
To: Niklas Cassel <nks@flawful.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
"Niklas Cassel" <niklas.cassel@wdc.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v2 1/4] dt-bindings: PCI: dwc: rockchip: Add atu property
Date: Thu, 26 Oct 2023 13:20:31 -0500 [thread overview]
Message-ID: <20231026182031.GA4122054-robh@kernel.org> (raw)
In-Reply-To: <20231024151014.240695-2-nks@flawful.org>
On Tue, Oct 24, 2023 at 05:10:08PM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@wdc.com>
The subject says 'atu property', but 'atu' is not a property.
>
> Even though rockchip-dw-pcie.yaml inherits snps,dw-pcie.yaml
> using:
>
> allOf:
> - $ref: /schemas/pci/snps,dw-pcie.yaml#
>
> and snps,dw-pcie.yaml does have the atu property defined, in order to be
> able to use this property, while still making sure 'make CHECK_DTBS=y'
> pass, we need to add this property to rockchip-dw-pcie.yaml.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
> ---
> Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> index 1ae8dcfa072c..229f8608c535 100644
> --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> @@ -29,16 +29,20 @@ properties:
> - const: rockchip,rk3568-pcie
>
> reg:
> + minItems: 3
> items:
> - description: Data Bus Interface (DBI) registers
> - description: Rockchip designed configuration registers
> - description: Config registers
> + - description: iATU registers
>
> reg-names:
> + minItems: 3
> items:
> - const: dbi
> - const: apb
> - const: config
> + - const: atu
>
> clocks:
> minItems: 5
> --
> 2.41.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Niklas Cassel <nks@flawful.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
"Niklas Cassel" <niklas.cassel@wdc.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v2 1/4] dt-bindings: PCI: dwc: rockchip: Add atu property
Date: Thu, 26 Oct 2023 13:20:31 -0500 [thread overview]
Message-ID: <20231026182031.GA4122054-robh@kernel.org> (raw)
In-Reply-To: <20231024151014.240695-2-nks@flawful.org>
On Tue, Oct 24, 2023 at 05:10:08PM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@wdc.com>
The subject says 'atu property', but 'atu' is not a property.
>
> Even though rockchip-dw-pcie.yaml inherits snps,dw-pcie.yaml
> using:
>
> allOf:
> - $ref: /schemas/pci/snps,dw-pcie.yaml#
>
> and snps,dw-pcie.yaml does have the atu property defined, in order to be
> able to use this property, while still making sure 'make CHECK_DTBS=y'
> pass, we need to add this property to rockchip-dw-pcie.yaml.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
> ---
> Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> index 1ae8dcfa072c..229f8608c535 100644
> --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> @@ -29,16 +29,20 @@ properties:
> - const: rockchip,rk3568-pcie
>
> reg:
> + minItems: 3
> items:
> - description: Data Bus Interface (DBI) registers
> - description: Rockchip designed configuration registers
> - description: Config registers
> + - description: iATU registers
>
> reg-names:
> + minItems: 3
> items:
> - const: dbi
> - const: apb
> - const: config
> + - const: atu
>
> clocks:
> minItems: 5
> --
> 2.41.0
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Niklas Cassel <nks@flawful.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
"Niklas Cassel" <niklas.cassel@wdc.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v2 1/4] dt-bindings: PCI: dwc: rockchip: Add atu property
Date: Thu, 26 Oct 2023 13:20:31 -0500 [thread overview]
Message-ID: <20231026182031.GA4122054-robh@kernel.org> (raw)
In-Reply-To: <20231024151014.240695-2-nks@flawful.org>
On Tue, Oct 24, 2023 at 05:10:08PM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@wdc.com>
The subject says 'atu property', but 'atu' is not a property.
>
> Even though rockchip-dw-pcie.yaml inherits snps,dw-pcie.yaml
> using:
>
> allOf:
> - $ref: /schemas/pci/snps,dw-pcie.yaml#
>
> and snps,dw-pcie.yaml does have the atu property defined, in order to be
> able to use this property, while still making sure 'make CHECK_DTBS=y'
> pass, we need to add this property to rockchip-dw-pcie.yaml.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
> ---
> Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> index 1ae8dcfa072c..229f8608c535 100644
> --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
> @@ -29,16 +29,20 @@ properties:
> - const: rockchip,rk3568-pcie
>
> reg:
> + minItems: 3
> items:
> - description: Data Bus Interface (DBI) registers
> - description: Rockchip designed configuration registers
> - description: Config registers
> + - description: iATU registers
>
> reg-names:
> + minItems: 3
> items:
> - const: dbi
> - const: apb
> - const: config
> + - const: atu
>
> clocks:
> minItems: 5
> --
> 2.41.0
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-26 18:20 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-24 15:10 [PATCH v2 0/4] rk3588 PCIe improvements Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` [PATCH v2 1/4] dt-bindings: PCI: dwc: rockchip: Add atu property Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 16:29 ` Conor Dooley
2023-10-24 16:29 ` Conor Dooley
2023-10-24 16:29 ` Conor Dooley
2023-10-25 20:02 ` Niklas Cassel
2023-10-25 20:02 ` Niklas Cassel
2023-10-25 20:02 ` Niklas Cassel
2023-10-26 18:35 ` Rob Herring
2023-10-26 18:35 ` Rob Herring
2023-10-26 18:35 ` Rob Herring
2023-10-27 14:34 ` Niklas Cassel
2023-10-27 15:56 ` Rob Herring
2023-10-27 16:37 ` Niklas Cassel
2023-10-27 16:37 ` Niklas Cassel
2023-10-26 18:20 ` Rob Herring [this message]
2023-10-26 18:20 ` Rob Herring
2023-10-26 18:20 ` Rob Herring
2023-10-24 15:10 ` [PATCH v2 2/4] arm64: dts: rockchip: add missing mandatory rk3588 PCIe " Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` [PATCH v2 3/4] dt-bindings: PCI: dwc: rockchip: Add dma properties Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 16:30 ` Conor Dooley
2023-10-24 16:30 ` Conor Dooley
2023-10-24 16:30 ` Conor Dooley
2023-10-25 20:07 ` Niklas Cassel
2023-10-25 20:07 ` Niklas Cassel
2023-10-25 20:07 ` Niklas Cassel
2023-10-25 20:55 ` Niklas Cassel
2023-10-25 20:55 ` Niklas Cassel
2023-10-25 20:55 ` Niklas Cassel
2023-10-26 14:29 ` Serge Semin
2023-10-26 14:29 ` Serge Semin
2023-10-26 14:29 ` Serge Semin
2023-10-26 14:32 ` Serge Semin
2023-10-26 14:32 ` Serge Semin
2023-10-26 14:32 ` Serge Semin
2023-10-27 14:51 ` Niklas Cassel
2023-10-24 15:10 ` [PATCH v2 4/4] arm64: dts: rockchip: add missing rk3588 PCIe " Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
2023-10-24 15:10 ` Niklas Cassel
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