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From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liweiwei@iscas.ac.cn,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	ajones@ventanamicro.com,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v7 00/16] rv64i CPU, RVA22U64 profile support
Date: Tue, 31 Oct 2023 17:39:00 -0300	[thread overview]
Message-ID: <20231031203916.197332-1-dbarboza@ventanamicro.com> (raw)

Hi,

As discussed in v6, all our problems with the profile implementation
cames from the rv64 CPU and how to deal with its defaults. Enabling a
profile on top of it is straightforward, but disabling it (either via a
script trying to undo a profile enablement, or users doing something
silly) makes things complicated - disabling all the mandatory extensions
will overwrite the CPU defaults, but doing nothing is weird considering
how QEMU options work. And therein lies the rub: we didn't have any
other way of consuming profiles, so we were stuck dancing around rv64
defaults and what to do with them.

In this v7 we're adding a new CPU called 'rv64i'. This is a new type of
CPUs, called 'bare', that doesn't inherit any defaults and allows users
to enable/disable extensions at will. This CPU is implementing bare
RV64I for a reason: this is the mandatory ISA for profiles support.

All the design around profile support is now made on top of how rv64i
works.  Other non-vendor CPUs (like rv64) can still use profiles, but
now we're not concerned about what happens if an user does '-cpu
rv64,rva22u64=false'. In short, we recommend using profiles with rv64i
but we won't forbid using it with rv64 (in particular because stock rv64
does not implement rva22u64, which is surprising giving it has a lot of
defaults ...). Patches 1, 2 and 3 implements rv64i. 

Another noticeable change was made in patches 15 and 16. We're now
exposing the profile flag to all CPUs. In the end a profile is just a
set of mandatory extensions and conditions that must be met. If the
conditions are met we should enable the flag, regardless of user input.
This is done by changes in patch 15. Patch 16 changes
query-cpu-model-expansion to show profile flags.

Patches based on top of Alistair's riscv-to-apply.next.

Patches missing acks: 1, 2, 3, 5, 15, 16

Changes from v6:
- patch 1 (new):
  - create vendor CPU type
- patch 2 (new):
  - check for 'if vendorCPU' instead of 'if !genericCPU'
- patch 3 (new):
  - add rv64i CPU
- patch 5 (former patch 2 from v6):
  - drop the CB_DEF_VALUE define
- patch 6 (fomer patch 3 from v6):
  - mention cbop block size in commit msg
- patch 9 (former patch 6 from v6):
  - removed the "no-op" when disabling a profile
  - rewrote the commit msg to reflect that the design is made on top of the rv64i CPU
- patch 12 (fomer patch 9 from v6):
  - do not disable RVI when disabling a profile
- patch 15 (patch 12 from v6):
  - previous acks revoked due to the amount of changes made
  - disable profile flags if there are missing mandatory extensions during finalize()
  - enable profile flags if all its preconditions are met during
    finalize()
- patch 16 (new):
  - add profile flags to query-cpu-model-expansion
- v6 link: https://lore.kernel.org/qemu-riscv/20231028085427.707060-1-dbarboza@ventanamicro.com/

Daniel Henrique Barboza (16):
  target/riscv: create TYPE_RISCV_VENDOR_CPU
  target/riscv/tcg: do not use "!generic" CPU checks
  target/riscv: add rv64i CPU
  target/riscv: add zicbop extension flag
  target/riscv/tcg: add 'zic64b' support
  riscv-qmp-cmds.c: expose named features in cpu_model_expansion
  target/riscv: add rva22u64 profile definition
  target/riscv/kvm: add 'rva22u64' flag as unavailable
  target/riscv/tcg: add user flag for profile support
  target/riscv/tcg: add MISA user options hash
  target/riscv/tcg: add riscv_cpu_write_misa_bit()
  target/riscv/tcg: handle profile MISA bits
  target/riscv/tcg: add hash table insert helpers
  target/riscv/tcg: honor user choice for G MISA bits
  target/riscv/tcg: validate profiles during finalize
  riscv-qmp-cmds.c: add profile flags in cpu-model-expansion

 hw/riscv/virt.c               |   5 +
 target/riscv/cpu-qom.h        |   3 +
 target/riscv/cpu.c            |  96 ++++++++++-
 target/riscv/cpu.h            |  13 ++
 target/riscv/cpu_cfg.h        |   3 +
 target/riscv/kvm/kvm-cpu.c    |   7 +-
 target/riscv/riscv-qmp-cmds.c |  44 ++++-
 target/riscv/tcg/tcg-cpu.c    | 301 +++++++++++++++++++++++++++++-----
 8 files changed, 412 insertions(+), 60 deletions(-)

-- 
2.41.0



             reply	other threads:[~2023-10-31 20:40 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-31 20:39 Daniel Henrique Barboza [this message]
2023-10-31 20:39 ` [PATCH v7 01/16] target/riscv: create TYPE_RISCV_VENDOR_CPU Daniel Henrique Barboza
2023-11-01  9:19   ` Andrew Jones
2023-10-31 20:39 ` [PATCH v7 02/16] target/riscv/tcg: do not use "!generic" CPU checks Daniel Henrique Barboza
2023-11-01  9:20   ` Andrew Jones
2023-10-31 20:39 ` [PATCH v7 03/16] target/riscv: add rv64i CPU Daniel Henrique Barboza
2023-11-01  9:02   ` Andrew Jones
2023-11-01  9:27     ` Daniel Henrique Barboza
2023-11-01  9:47       ` Andrew Jones
2023-10-31 20:39 ` [PATCH v7 04/16] target/riscv: add zicbop extension flag Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 05/16] target/riscv/tcg: add 'zic64b' support Daniel Henrique Barboza
2023-11-01  9:04   ` Andrew Jones
2023-10-31 20:39 ` [PATCH v7 06/16] riscv-qmp-cmds.c: expose named features in cpu_model_expansion Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 07/16] target/riscv: add rva22u64 profile definition Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 08/16] target/riscv/kvm: add 'rva22u64' flag as unavailable Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 09/16] target/riscv/tcg: add user flag for profile support Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 10/16] target/riscv/tcg: add MISA user options hash Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 11/16] target/riscv/tcg: add riscv_cpu_write_misa_bit() Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 12/16] target/riscv/tcg: handle profile MISA bits Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 13/16] target/riscv/tcg: add hash table insert helpers Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 14/16] target/riscv/tcg: honor user choice for G MISA bits Daniel Henrique Barboza
2023-10-31 20:39 ` [PATCH v7 15/16] target/riscv/tcg: validate profiles during finalize Daniel Henrique Barboza
2023-11-01  9:17   ` Andrew Jones
2023-10-31 20:39 ` [PATCH v7 16/16] riscv-qmp-cmds.c: add profile flags in cpu-model-expansion Daniel Henrique Barboza
2023-11-01  9:19   ` Andrew Jones

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