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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH 11/12] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests
Date: Mon, 13 Nov 2023 17:42:43 +0000	[thread overview]
Message-ID: <20231113174244.3026520-12-maz@kernel.org> (raw)
In-Reply-To: <20231113174244.3026520-1-maz@kernel.org>

We can now expose ID_AA64MMFR4_EL1 to guests, and let NV guests
understand that they cannot really switch HCR_EL2.E2H to 0 on
some platforms.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/nested.c   | 4 ++++
 arch/arm64/kvm/sys_regs.c | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 042695a210ce..3885f1c93979 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -137,6 +137,10 @@ void access_nested_id_reg(struct kvm_vcpu *v, struct sys_reg_params *p,
 		val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001);
 		break;
 
+	case SYS_ID_AA64MMFR4_EL1:
+		val &= NV_FTR(MMFR4, E2H0);
+		break;
+
 	case SYS_ID_AA64DFR0_EL1:
 		/* Only limited support for PMU, Debug, BPs and WPs */
 		val &= (NV_FTR(DFR0, PMUVer)	|
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 4735e1b37fb3..4461eafca16c 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2196,7 +2196,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 					ID_AA64MMFR2_EL1_NV |
 					ID_AA64MMFR2_EL1_CCIDX)),
 	ID_SANITISED(ID_AA64MMFR3_EL1),
-	ID_UNALLOCATED(7,4),
+	ID_SANITISED(ID_AA64MMFR4_EL1),
 	ID_UNALLOCATED(7,5),
 	ID_UNALLOCATED(7,6),
 	ID_UNALLOCATED(7,7),
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: [PATCH 11/12] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests
Date: Mon, 13 Nov 2023 17:42:43 +0000	[thread overview]
Message-ID: <20231113174244.3026520-12-maz@kernel.org> (raw)
In-Reply-To: <20231113174244.3026520-1-maz@kernel.org>

We can now expose ID_AA64MMFR4_EL1 to guests, and let NV guests
understand that they cannot really switch HCR_EL2.E2H to 0 on
some platforms.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/nested.c   | 4 ++++
 arch/arm64/kvm/sys_regs.c | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 042695a210ce..3885f1c93979 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -137,6 +137,10 @@ void access_nested_id_reg(struct kvm_vcpu *v, struct sys_reg_params *p,
 		val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001);
 		break;
 
+	case SYS_ID_AA64MMFR4_EL1:
+		val &= NV_FTR(MMFR4, E2H0);
+		break;
+
 	case SYS_ID_AA64DFR0_EL1:
 		/* Only limited support for PMU, Debug, BPs and WPs */
 		val &= (NV_FTR(DFR0, PMUVer)	|
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 4735e1b37fb3..4461eafca16c 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2196,7 +2196,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 					ID_AA64MMFR2_EL1_NV |
 					ID_AA64MMFR2_EL1_CCIDX)),
 	ID_SANITISED(ID_AA64MMFR3_EL1),
-	ID_UNALLOCATED(7,4),
+	ID_SANITISED(ID_AA64MMFR4_EL1),
 	ID_UNALLOCATED(7,5),
 	ID_UNALLOCATED(7,6),
 	ID_UNALLOCATED(7,7),
-- 
2.39.2


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  parent reply	other threads:[~2023-11-13 17:43 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-13 17:42 [PATCH 00/12] arm64: Add support for FEAT_E2H0, or lack thereof Marc Zyngier
2023-11-13 17:42 ` Marc Zyngier
2023-11-13 17:42 ` [PATCH 01/12] arm64: cpufeatures: Correctly handle signed values Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-17  0:45   ` Oliver Upton
2023-11-17  0:45     ` Oliver Upton
2023-11-13 17:42 ` [PATCH 02/12] arm64: cpufeature: Correctly display signed override values Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-17  0:46   ` Oliver Upton
2023-11-17  0:46     ` Oliver Upton
2023-11-13 17:42 ` [PATCH 03/12] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1 Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-13 17:42 ` [PATCH 04/12] arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-17  0:48   ` Oliver Upton
2023-11-17  0:48     ` Oliver Upton
2023-11-13 17:42 ` [PATCH 05/12] arm64: cpufeature: Detect E2H0 not being implemented Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-17  0:56   ` Oliver Upton
2023-11-17  0:56     ` Oliver Upton
2023-11-17 12:21     ` Marc Zyngier
2023-11-17 12:21       ` Marc Zyngier
2023-11-13 17:42 ` [PATCH 06/12] arm64: cpufeature: Detect HCR_EL2.NV1 being RES0 Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-13 17:42 ` [PATCH 07/12] arm64: Treat HCR_EL2.E2H as RES1 when ID_AA64MMFR4_EL1.E2H0 is non-zero Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-17  0:23   ` Oliver Upton
2023-11-17  0:23     ` Oliver Upton
2023-11-17 12:17     ` Marc Zyngier
2023-11-17 12:17       ` Marc Zyngier
2023-11-17 18:01       ` Oliver Upton
2023-11-17 18:01         ` Oliver Upton
2023-11-13 17:42 ` [PATCH 08/12] arm64: Add override for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-13 17:42 ` [PATCH 09/12] arm64: Add MIDR-based override infrastructure Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-13 17:42 ` [PATCH 10/12] arm64: Add MIDR-based overrides for ID_AA64MMFR4_EL1.E2H0 Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier
2023-11-13 17:42 ` Marc Zyngier [this message]
2023-11-13 17:42   ` [PATCH 11/12] KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests Marc Zyngier
2023-11-13 17:42 ` [PATCH 12/12] KVM: arm64: Force guest's HCR_EL2.E2H RES1 when NV1 is not implemented Marc Zyngier
2023-11-13 17:42   ` Marc Zyngier

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