[PULL 0/2] hppa64 fixes

[PULL 0/2] hppa64 fixes

[deller]

From: Helge Deller <deller@gmx.de>

The following changes since commit 34a5cb6d8434303c170230644b2a7c1d5781d197:

  Merge tag 'pull-tcg-20231114' of https://gitlab.com/rth7680/qemu into staging (2023-11-15 08:05:25 -0500)

are available in the Git repository at:

  https://github.com/hdeller/qemu-hppa.git tags/hppa64-fixes-pull-request

for you to fetch changes up to 2f926bfd5b79e6219ae65a1e530b38f37d62b384:

  disas/hppa: Show hexcode of instruction along with disassembly (2023-11-17 18:36:36 +0100)

----------------------------------------------------------------
HPPA64 fixes for 8.2

The SHRPD patch fixes a real translation bug which then allows to boot
the 64-bit Linux kernels of the Debian-11 and Debian-12 installation CDs.

The second patch adds the instruction byte sequence to the
assembly log. This is not an actual bug fix, but it's important since
it helps a lot when trying to fix qemu translation bugs on hppa.

----------------------------------------------------------------

Helge Deller (2):
  target/hppa: Fix 64-bit SHRPD instruction
  disas/hppa: Show hexcode of instruction along with disassembly

 disas/hppa.c            | 6 +++++-
 target/hppa/translate.c | 4 ++--
 2 files changed, 7 insertions(+), 3 deletions(-)

-- 
2.41.0

[PULL 1/2] target/hppa: Fix 64-bit SHRPD instruction

[deller]

From: Helge Deller <deller@gmx.de>

When shifting the two joined 64-bit registers right, shift the upper
64-bit register to the left and the lower 64-bit register to the right
before merging them with OR.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 4a4830c3e3..3ef39b1bd7 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3438,9 +3438,9 @@ static bool trans_shrp_sar(DisasContext *ctx, arg_shrp_sar *a)
             TCGv_i64 n = tcg_temp_new_i64();
 
             tcg_gen_xori_i64(n, cpu_sar, 63);
-            tcg_gen_shl_i64(t, src2, n);
+            tcg_gen_shl_i64(t, src1, n);
             tcg_gen_shli_i64(t, t, 1);
-            tcg_gen_shr_i64(dest, src1, cpu_sar);
+            tcg_gen_shr_i64(dest, src2, cpu_sar);
             tcg_gen_or_i64(dest, dest, t);
         } else {
             TCGv_i64 t = tcg_temp_new_i64();
-- 
2.41.0

[PULL 2/2] disas/hppa: Show hexcode of instruction along with disassembly

[deller]

From: Helge Deller <deller@gmx.de>

On hppa many instructions can be expressed by different bytecodes.
To be able to debug qemu translation bugs it's therefore necessary to see the
currently executed byte codes without the need to lookup the sequence without
the full executable.
With this patch the instruction byte code is shown beside the disassembly.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 disas/hppa.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/disas/hppa.c b/disas/hppa.c
index dcf9a47f34..cce4f4aa37 100644
--- a/disas/hppa.c
+++ b/disas/hppa.c
@@ -1968,6 +1968,10 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
 
   insn = bfd_getb32 (buffer);
 
+  info->fprintf_func(info->stream, " %02x %02x %02x %02x   ",
+                (insn >> 24) & 0xff, (insn >> 16) & 0xff,
+                (insn >>  8) & 0xff, insn & 0xff);
+
   for (i = 0; i < NUMOPCODES; ++i)
     {
       const struct pa_opcode *opcode = &pa_opcodes[i];
@@ -2826,6 +2830,6 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
 	  return sizeof (insn);
 	}
     }
-  (*info->fprintf_func) (info->stream, "#%8x", insn);
+  info->fprintf_func(info->stream, "<unknown>");
   return sizeof (insn);
 }
-- 
2.41.0

Re: [PULL 0/2] hppa64 fixes

[Stefan Hajnoczi]

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Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.

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