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* [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
@ 2023-10-15 20:01 ` Marek Vasut
  0 siblings, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2023-10-15 20:01 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frieder Schrempf,
	Krzysztof Kozlowski, Marco Felsch, NXP Linux Team,
	Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
	devicetree

The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Signed-off-by: Marek Vasut <marex@denx.de>
---
NOTE: The labels are there so they can be used by U-Boot and DTOs
NOTE: Depends on currently linux-next next-20231013
      c761068f484c ("dt-bindings: at24: add ST M24C32-D Additional Write lockable page")
      4791146e9055 ("eeprom: at24: add ST M24C32-D Additional Write lockable page support")
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Marco Felsch <m.felsch@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
 arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index d8963f32ec84c..4ae4fdab461e0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -420,6 +420,18 @@ eeprom1: eeprom@53 {	/* EEPROM with FEC MAC address */
 		reg = <0x53>;
 	};
 
+	eeprom0wl: eeprom@58 {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x50 */
+		pagesize = <32>;
+		reg = <0x58>;
+	};
+
+	eeprom1wl: eeprom@5b {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x53 */
+		pagesize = <32>;
+		reg = <0x5b>;
+	};
+
 	ioexp: gpio@74 {
 		compatible = "nxp,pca9539";
 		reg = <0x74>;
-- 
2.42.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
@ 2023-10-15 20:01 ` Marek Vasut
  0 siblings, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2023-10-15 20:01 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frieder Schrempf,
	Krzysztof Kozlowski, Marco Felsch, NXP Linux Team,
	Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
	devicetree

The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Signed-off-by: Marek Vasut <marex@denx.de>
---
NOTE: The labels are there so they can be used by U-Boot and DTOs
NOTE: Depends on currently linux-next next-20231013
      c761068f484c ("dt-bindings: at24: add ST M24C32-D Additional Write lockable page")
      4791146e9055 ("eeprom: at24: add ST M24C32-D Additional Write lockable page support")
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Marco Felsch <m.felsch@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
---
 arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index d8963f32ec84c..4ae4fdab461e0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -420,6 +420,18 @@ eeprom1: eeprom@53 {	/* EEPROM with FEC MAC address */
 		reg = <0x53>;
 	};
 
+	eeprom0wl: eeprom@58 {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x50 */
+		pagesize = <32>;
+		reg = <0x58>;
+	};
+
+	eeprom1wl: eeprom@5b {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x53 */
+		pagesize = <32>;
+		reg = <0x5b>;
+	};
+
 	ioexp: gpio@74 {
 		compatible = "nxp,pca9539";
 		reg = <0x74>;
-- 
2.42.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
@ 2023-10-16  0:05 Marek Vasut
  0 siblings, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2023-10-16  0:05 UTC (permalink / raw)
  To: u-boot
  Cc: Marek Vasut, NXP i.MX U-Boot Team, Fabio Estevam, Stefano Babic,
	u-boot

The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Disable the additional page in rev.100 SoM DTO as those devices
contain EEPROM without an Additional Write lockable page.

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: u-boot@dh-electronics.com
---
 arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts |  8 ++++++++
 arch/arm/dts/imx8mp-dhcom-som.dtsi               | 12 ++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
index 5d9a00c9429..0e5d329b149 100644
--- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
+++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
@@ -24,6 +24,14 @@
 	pagesize = <16>;
 };
 
+&eeprom0wl {
+	status = "disabled";
+};
+
+&eeprom1wl {
+	status = "disabled";
+};
+
 &ethphy0f { /* SMSC LAN8740Ai */
 	pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
 	reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi
index ea2a567447a..b504d36818b 100644
--- a/arch/arm/dts/imx8mp-dhcom-som.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi
@@ -392,6 +392,18 @@
 		reg = <0x53>;
 	};
 
+	eeprom0wl: eeprom@58 {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x50 */
+		pagesize = <32>;
+		reg = <0x58>;
+	};
+
+	eeprom1wl: eeprom@5b {
+		compatible = "atmel,24c32d-wl";	/* M24C32-D WL page of 0x53 */
+		pagesize = <32>;
+		reg = <0x5b>;
+	};
+
 	ioexp: gpio@74 {
 		compatible = "nxp,pca9539";
 		reg = <0x74>;
-- 
2.42.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
  2023-10-15 20:01 ` Marek Vasut
@ 2023-11-27  2:05   ` Shawn Guo
  -1 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2023-11-27  2:05 UTC (permalink / raw)
  To: Marek Vasut
  Cc: linux-arm-kernel, Conor Dooley, Fabio Estevam, Frieder Schrempf,
	Krzysztof Kozlowski, Marco Felsch, NXP Linux Team,
	Pengutronix Kernel Team, Rob Herring, Sascha Hauer, devicetree

On Sun, Oct 15, 2023 at 10:01:24PM +0200, Marek Vasut wrote:
> The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
> EEPROMs which have Additional Write lockable page at separate I2C
> address. Describe the page in DT to make it available.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Applied, thanks!

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
@ 2023-11-27  2:05   ` Shawn Guo
  0 siblings, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2023-11-27  2:05 UTC (permalink / raw)
  To: Marek Vasut
  Cc: linux-arm-kernel, Conor Dooley, Fabio Estevam, Frieder Schrempf,
	Krzysztof Kozlowski, Marco Felsch, NXP Linux Team,
	Pengutronix Kernel Team, Rob Herring, Sascha Hauer, devicetree

On Sun, Oct 15, 2023 at 10:01:24PM +0200, Marek Vasut wrote:
> The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
> EEPROMs which have Additional Write lockable page at separate I2C
> address. Describe the page in DT to make it available.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Applied, thanks!

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-11-27  2:06 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2023-10-15 20:01 [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT Marek Vasut
2023-10-15 20:01 ` Marek Vasut
2023-11-27  2:05 ` Shawn Guo
2023-11-27  2:05   ` Shawn Guo
  -- strict thread matches above, loose matches on Subject: below --
2023-10-16  0:05 Marek Vasut

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