* [PATCH 0/2] nvmem: Add Sophgo eFuse driver @ 2023-11-19 13:13 ` Jisheng Zhang 0 siblings, 0 replies; 10+ messages in thread From: Jisheng Zhang @ 2023-11-19 13:13 UTC (permalink / raw) To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang Sophgo SoCs such as CV1800B contain eFuses used to store factory-programmed data such as calibration values for the built-in ethernet PHY. As for CV1800B, HW automatically loads the eFuse content into CONTENT base registers which are organized as 32bit values exposed as MMIO. Currently, add read support for the eFuse. This is a preparation step for supporting the built-in ethernet phy. Since the clk support isn't mainlined, so cv1800b DT patches are not included. Jisheng Zhang (2): dt-bindings: nvmem: Add sophgo,efuses nvmem: Add Sophgo eFuse driver .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++ drivers/nvmem/Kconfig | 13 +++ drivers/nvmem/Makefile | 2 + drivers/nvmem/sophgo-efuse.c | 97 +++++++++++++++++++ 4 files changed, 166 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml create mode 100644 drivers/nvmem/sophgo-efuse.c -- 2.42.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 0/2] nvmem: Add Sophgo eFuse driver @ 2023-11-19 13:13 ` Jisheng Zhang 0 siblings, 0 replies; 10+ messages in thread From: Jisheng Zhang @ 2023-11-19 13:13 UTC (permalink / raw) To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang Sophgo SoCs such as CV1800B contain eFuses used to store factory-programmed data such as calibration values for the built-in ethernet PHY. As for CV1800B, HW automatically loads the eFuse content into CONTENT base registers which are organized as 32bit values exposed as MMIO. Currently, add read support for the eFuse. This is a preparation step for supporting the built-in ethernet phy. Since the clk support isn't mainlined, so cv1800b DT patches are not included. Jisheng Zhang (2): dt-bindings: nvmem: Add sophgo,efuses nvmem: Add Sophgo eFuse driver .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++ drivers/nvmem/Kconfig | 13 +++ drivers/nvmem/Makefile | 2 + drivers/nvmem/sophgo-efuse.c | 97 +++++++++++++++++++ 4 files changed, 166 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml create mode 100644 drivers/nvmem/sophgo-efuse.c -- 2.42.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses 2023-11-19 13:13 ` Jisheng Zhang @ 2023-11-19 13:13 ` Jisheng Zhang -1 siblings, 0 replies; 10+ messages in thread From: Jisheng Zhang @ 2023-11-19 13:13 UTC (permalink / raw) To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang Sophgo SoCs such as CV1800B come with eFuses used to store factory-programmed data such as calibration settings for the built-in ethernet PHY. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml new file mode 100644 index 000000000000..e4ae81a1742a --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SoC eFuse-based NVMEM + +description: | + Sophgo SoCs such as the CV1800B contain factory-programmed eFuses used to e.g. store + calibration data for the built-in ethernet PHY. +maintainers: + - Jisheng Zhang <jszhang@kernel.org> + +allOf: + - $ref: nvmem.yaml# + - $ref: nvmem-deprecated-cells.yaml# + +properties: + compatible: + items: + - enum: + - sophgo,cv1800b-efuse + + reg: + maxItems: 1 + + clocks: + description: + eFuse clock id. + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + efuse@3050000 { + compatible = "sophgo,cv1800b-efuse"; + reg = <0x3050000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&clk 1>; + + ephy_txitune: ephy-txitune@24 { + reg = <0x24 0x4>; + }; + }; + +... -- 2.42.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses @ 2023-11-19 13:13 ` Jisheng Zhang 0 siblings, 0 replies; 10+ messages in thread From: Jisheng Zhang @ 2023-11-19 13:13 UTC (permalink / raw) To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang Sophgo SoCs such as CV1800B come with eFuses used to store factory-programmed data such as calibration settings for the built-in ethernet PHY. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml new file mode 100644 index 000000000000..e4ae81a1742a --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SoC eFuse-based NVMEM + +description: | + Sophgo SoCs such as the CV1800B contain factory-programmed eFuses used to e.g. store + calibration data for the built-in ethernet PHY. +maintainers: + - Jisheng Zhang <jszhang@kernel.org> + +allOf: + - $ref: nvmem.yaml# + - $ref: nvmem-deprecated-cells.yaml# + +properties: + compatible: + items: + - enum: + - sophgo,cv1800b-efuse + + reg: + maxItems: 1 + + clocks: + description: + eFuse clock id. + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + efuse@3050000 { + compatible = "sophgo,cv1800b-efuse"; + reg = <0x3050000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&clk 1>; + + ephy_txitune: ephy-txitune@24 { + reg = <0x24 0x4>; + }; + }; + +... -- 2.42.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses 2023-11-19 13:13 ` Jisheng Zhang @ 2023-11-20 10:42 ` Krzysztof Kozlowski -1 siblings, 0 replies; 10+ messages in thread From: Krzysztof Kozlowski @ 2023-11-20 10:42 UTC (permalink / raw) To: Jisheng Zhang, Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang On 19/11/2023 14:13, Jisheng Zhang wrote: > Sophgo SoCs such as CV1800B come with eFuses used to store > factory-programmed data such as calibration settings for the built-in > ethernet PHY. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Thank you for your patch. There is something to discuss/improve. > --- > .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++++++++++ > 1 file changed, 54 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > > diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > new file mode 100644 > index 000000000000..e4ae81a1742a > --- /dev/null > +++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml Filename should match the compatible, unless you already have other devices coming. > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SoC eFuse-based NVMEM > + > +description: | Do not need '|' unless you need to preserve formatting. > + Sophgo SoCs such as the CV1800B contain factory-programmed eFuses used to e.g. store Please wrap at Linux coding style (so 80). > + calibration data for the built-in ethernet PHY. Blank line here. > +maintainers: > + - Jisheng Zhang <jszhang@kernel.org> > + > +allOf: > + - $ref: nvmem.yaml# > + - $ref: nvmem-deprecated-cells.yaml# > + > +properties: > + compatible: > + items: Drop items, we keep just enum directly for such cases. > + - enum: > + - sophgo,cv1800b-efuse > + > + reg: > + maxItems: 1 > + > + clocks: > + description: > + eFuse clock id. Drop description, quite obvious. > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + > +unevaluatedProperties: false > +... Best regards, Krzysztof _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses @ 2023-11-20 10:42 ` Krzysztof Kozlowski 0 siblings, 0 replies; 10+ messages in thread From: Krzysztof Kozlowski @ 2023-11-20 10:42 UTC (permalink / raw) To: Jisheng Zhang, Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang On 19/11/2023 14:13, Jisheng Zhang wrote: > Sophgo SoCs such as CV1800B come with eFuses used to store > factory-programmed data such as calibration settings for the built-in > ethernet PHY. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Thank you for your patch. There is something to discuss/improve. > --- > .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++++++++++ > 1 file changed, 54 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > > diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > new file mode 100644 > index 000000000000..e4ae81a1742a > --- /dev/null > +++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml Filename should match the compatible, unless you already have other devices coming. > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SoC eFuse-based NVMEM > + > +description: | Do not need '|' unless you need to preserve formatting. > + Sophgo SoCs such as the CV1800B contain factory-programmed eFuses used to e.g. store Please wrap at Linux coding style (so 80). > + calibration data for the built-in ethernet PHY. Blank line here. > +maintainers: > + - Jisheng Zhang <jszhang@kernel.org> > + > +allOf: > + - $ref: nvmem.yaml# > + - $ref: nvmem-deprecated-cells.yaml# > + > +properties: > + compatible: > + items: Drop items, we keep just enum directly for such cases. > + - enum: > + - sophgo,cv1800b-efuse > + > + reg: > + maxItems: 1 > + > + clocks: > + description: > + eFuse clock id. Drop description, quite obvious. > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + > +unevaluatedProperties: false > +... Best regards, Krzysztof ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses 2023-11-19 13:13 ` Jisheng Zhang @ 2023-11-27 18:24 ` Rob Herring -1 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2023-11-27 18:24 UTC (permalink / raw) To: Jisheng Zhang Cc: Srinivas Kandagatla, Krzysztof Kozlowski, Conor Dooley, devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang On Sun, Nov 19, 2023 at 09:13:31PM +0800, Jisheng Zhang wrote: > Sophgo SoCs such as CV1800B come with eFuses used to store > factory-programmed data such as calibration settings for the built-in > ethernet PHY. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++++++++++ > 1 file changed, 54 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > > diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > new file mode 100644 > index 000000000000..e4ae81a1742a > --- /dev/null > +++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SoC eFuse-based NVMEM > + > +description: | > + Sophgo SoCs such as the CV1800B contain factory-programmed eFuses used to e.g. store > + calibration data for the built-in ethernet PHY. > +maintainers: > + - Jisheng Zhang <jszhang@kernel.org> > + > +allOf: > + - $ref: nvmem.yaml# > + - $ref: nvmem-deprecated-cells.yaml# Why does a new binding need to use the deprecated form? Rob _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses @ 2023-11-27 18:24 ` Rob Herring 0 siblings, 0 replies; 10+ messages in thread From: Rob Herring @ 2023-11-27 18:24 UTC (permalink / raw) To: Jisheng Zhang Cc: Srinivas Kandagatla, Krzysztof Kozlowski, Conor Dooley, devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang On Sun, Nov 19, 2023 at 09:13:31PM +0800, Jisheng Zhang wrote: > Sophgo SoCs such as CV1800B come with eFuses used to store > factory-programmed data such as calibration settings for the built-in > ethernet PHY. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > .../bindings/nvmem/sophgo,efuse.yaml | 54 +++++++++++++++++++ > 1 file changed, 54 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > > diff --git a/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > new file mode 100644 > index 000000000000..e4ae81a1742a > --- /dev/null > +++ b/Documentation/devicetree/bindings/nvmem/sophgo,efuse.yaml > @@ -0,0 +1,54 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/nvmem/sophgo,efuse.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SoC eFuse-based NVMEM > + > +description: | > + Sophgo SoCs such as the CV1800B contain factory-programmed eFuses used to e.g. store > + calibration data for the built-in ethernet PHY. > +maintainers: > + - Jisheng Zhang <jszhang@kernel.org> > + > +allOf: > + - $ref: nvmem.yaml# > + - $ref: nvmem-deprecated-cells.yaml# Why does a new binding need to use the deprecated form? Rob ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/2] nvmem: Add Sophgo eFuse driver 2023-11-19 13:13 ` Jisheng Zhang @ 2023-11-19 13:13 ` Jisheng Zhang -1 siblings, 0 replies; 10+ messages in thread From: Jisheng Zhang @ 2023-11-19 13:13 UTC (permalink / raw) To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang Sophgo SoCs such as CV1800B contain eFuses used to store factory-programmed data such as calibration values for the built-in ethernet PHY. As for CV1800B, HW automatically loads the eFuse content into CONTENT base registers which are organized as 32bit values exposed as MMIO. Currently, add read support for the eFuse. This is a preparation step for supporting the built-in ethernet phy. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- drivers/nvmem/Kconfig | 13 +++++ drivers/nvmem/Makefile | 2 + drivers/nvmem/sophgo-efuse.c | 97 ++++++++++++++++++++++++++++++++++++ 3 files changed, 112 insertions(+) create mode 100644 drivers/nvmem/sophgo-efuse.c diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 5bc9c4874fe3..f2de7338c6e9 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -298,6 +298,19 @@ config NVMEM_SNVS_LPGPR This driver can also be built as a module. If so, the module will be called nvmem-snvs-lpgpr. +config NVMEM_SOPHGO_EFUSE + tristate "Sophgo eFuse support" + depends on ARCH_SOPHGO || COMPILE_TEST + default ARCH_SOPHGO + help + Say y here to enable support for reading eFuses on Sophgo SoCs + such as the CV1800B. These are e.g. used to store factory programmed + calibration data required for the builtin ethernet PHY. + + This driver can also be built as a module. If so, the module will + be called nvmem-sophgo-efuse. + + config NVMEM_SPMI_SDAM tristate "SPMI SDAM Support" depends on SPMI diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 423baf089515..f3602bb16efc 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -60,6 +60,8 @@ obj-$(CONFIG_NVMEM_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o nvmem-sc27xx-efuse-y := sc27xx-efuse.o obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o nvmem_snvs_lpgpr-y := snvs_lpgpr.o +obj-$(CONFIG_NVMEM_SOPHGO_EFUSE) += nvmem-sophgo-efuse.o +nvmem-sophgo-efuse-y := sophgo-efuse.o obj-$(CONFIG_NVMEM_SPMI_SDAM) += nvmem_qcom-spmi-sdam.o nvmem_qcom-spmi-sdam-y += qcom-spmi-sdam.o obj-$(CONFIG_NVMEM_SPRD_EFUSE) += nvmem_sprd_efuse.o diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c new file mode 100644 index 000000000000..3b4eb4d097e3 --- /dev/null +++ b/drivers/nvmem/sophgo-efuse.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Sophgo SoC eFuse driver + * + * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> + */ + +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/nvmem-provider.h> +#include <linux/platform_device.h> + +#define CV1800B_EFUSE_CONTENT_BASE 0x100 +#define CV1800B_EFUSE_CONTENT_SIZE 0x100 + +struct sophgo_efuses_priv { + void __iomem *base; + struct clk *clk; +}; + +static int sophgo_efuses_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct sophgo_efuses_priv *priv = context; + u32 *dst = val; + int ret; + + ret = clk_prepare_enable(priv->clk); + if (ret < 0) + return ret; + + while (bytes >= sizeof(u32)) { + *dst++ = readl_relaxed(priv->base + CV1800B_EFUSE_CONTENT_BASE + offset); + bytes -= sizeof(u32); + offset += sizeof(u32); + } + + clk_disable_unprepare(priv->clk); + + return 0; +} + +static int sophgo_efuses_probe(struct platform_device *pdev) +{ + struct sophgo_efuses_priv *priv; + struct resource *res; + struct nvmem_config config = { + .dev = &pdev->dev, + .add_legacy_fixed_of_cells = true, + .read_only = true, + .reg_read = sophgo_efuses_read, + .stride = sizeof(u32), + .word_size = sizeof(u32), + .name = "sophgo_efuse_nvmem", + .id = NVMEM_DEVID_AUTO, + .root_only = true, + }; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + config.priv = priv; + config.size = CV1800B_EFUSE_CONTENT_SIZE; + + return PTR_ERR_OR_ZERO(devm_nvmem_register(config.dev, &config)); +} + +static const struct of_device_id sophgo_efuses_of_match[] = { + { .compatible = "sophgo,cv1800b-efuse", }, + {} +}; + +MODULE_DEVICE_TABLE(of, sophgo_efuses_of_match); + +static struct platform_driver sophgo_efuses_driver = { + .driver = { + .name = "sophgo_efuse", + .of_match_table = sophgo_efuses_of_match, + }, + .probe = sophgo_efuses_probe, +}; + +module_platform_driver(sophgo_efuses_driver); + +MODULE_AUTHOR("Jisheng Zhang <jszhang@kernel.org>"); +MODULE_LICENSE("GPL"); -- 2.42.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] nvmem: Add Sophgo eFuse driver @ 2023-11-19 13:13 ` Jisheng Zhang 0 siblings, 0 replies; 10+ messages in thread From: Jisheng Zhang @ 2023-11-19 13:13 UTC (permalink / raw) To: Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: devicetree, linux-kernel, linux-riscv, Chao Wei, Chen Wang Sophgo SoCs such as CV1800B contain eFuses used to store factory-programmed data such as calibration values for the built-in ethernet PHY. As for CV1800B, HW automatically loads the eFuse content into CONTENT base registers which are organized as 32bit values exposed as MMIO. Currently, add read support for the eFuse. This is a preparation step for supporting the built-in ethernet phy. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- drivers/nvmem/Kconfig | 13 +++++ drivers/nvmem/Makefile | 2 + drivers/nvmem/sophgo-efuse.c | 97 ++++++++++++++++++++++++++++++++++++ 3 files changed, 112 insertions(+) create mode 100644 drivers/nvmem/sophgo-efuse.c diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 5bc9c4874fe3..f2de7338c6e9 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -298,6 +298,19 @@ config NVMEM_SNVS_LPGPR This driver can also be built as a module. If so, the module will be called nvmem-snvs-lpgpr. +config NVMEM_SOPHGO_EFUSE + tristate "Sophgo eFuse support" + depends on ARCH_SOPHGO || COMPILE_TEST + default ARCH_SOPHGO + help + Say y here to enable support for reading eFuses on Sophgo SoCs + such as the CV1800B. These are e.g. used to store factory programmed + calibration data required for the builtin ethernet PHY. + + This driver can also be built as a module. If so, the module will + be called nvmem-sophgo-efuse. + + config NVMEM_SPMI_SDAM tristate "SPMI SDAM Support" depends on SPMI diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 423baf089515..f3602bb16efc 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -60,6 +60,8 @@ obj-$(CONFIG_NVMEM_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o nvmem-sc27xx-efuse-y := sc27xx-efuse.o obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o nvmem_snvs_lpgpr-y := snvs_lpgpr.o +obj-$(CONFIG_NVMEM_SOPHGO_EFUSE) += nvmem-sophgo-efuse.o +nvmem-sophgo-efuse-y := sophgo-efuse.o obj-$(CONFIG_NVMEM_SPMI_SDAM) += nvmem_qcom-spmi-sdam.o nvmem_qcom-spmi-sdam-y += qcom-spmi-sdam.o obj-$(CONFIG_NVMEM_SPRD_EFUSE) += nvmem_sprd_efuse.o diff --git a/drivers/nvmem/sophgo-efuse.c b/drivers/nvmem/sophgo-efuse.c new file mode 100644 index 000000000000..3b4eb4d097e3 --- /dev/null +++ b/drivers/nvmem/sophgo-efuse.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Sophgo SoC eFuse driver + * + * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> + */ + +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/nvmem-provider.h> +#include <linux/platform_device.h> + +#define CV1800B_EFUSE_CONTENT_BASE 0x100 +#define CV1800B_EFUSE_CONTENT_SIZE 0x100 + +struct sophgo_efuses_priv { + void __iomem *base; + struct clk *clk; +}; + +static int sophgo_efuses_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct sophgo_efuses_priv *priv = context; + u32 *dst = val; + int ret; + + ret = clk_prepare_enable(priv->clk); + if (ret < 0) + return ret; + + while (bytes >= sizeof(u32)) { + *dst++ = readl_relaxed(priv->base + CV1800B_EFUSE_CONTENT_BASE + offset); + bytes -= sizeof(u32); + offset += sizeof(u32); + } + + clk_disable_unprepare(priv->clk); + + return 0; +} + +static int sophgo_efuses_probe(struct platform_device *pdev) +{ + struct sophgo_efuses_priv *priv; + struct resource *res; + struct nvmem_config config = { + .dev = &pdev->dev, + .add_legacy_fixed_of_cells = true, + .read_only = true, + .reg_read = sophgo_efuses_read, + .stride = sizeof(u32), + .word_size = sizeof(u32), + .name = "sophgo_efuse_nvmem", + .id = NVMEM_DEVID_AUTO, + .root_only = true, + }; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + config.priv = priv; + config.size = CV1800B_EFUSE_CONTENT_SIZE; + + return PTR_ERR_OR_ZERO(devm_nvmem_register(config.dev, &config)); +} + +static const struct of_device_id sophgo_efuses_of_match[] = { + { .compatible = "sophgo,cv1800b-efuse", }, + {} +}; + +MODULE_DEVICE_TABLE(of, sophgo_efuses_of_match); + +static struct platform_driver sophgo_efuses_driver = { + .driver = { + .name = "sophgo_efuse", + .of_match_table = sophgo_efuses_of_match, + }, + .probe = sophgo_efuses_probe, +}; + +module_platform_driver(sophgo_efuses_driver); + +MODULE_AUTHOR("Jisheng Zhang <jszhang@kernel.org>"); +MODULE_LICENSE("GPL"); -- 2.42.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-11-27 18:24 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-11-19 13:13 [PATCH 0/2] nvmem: Add Sophgo eFuse driver Jisheng Zhang 2023-11-19 13:13 ` Jisheng Zhang 2023-11-19 13:13 ` [PATCH 1/2] dt-bindings: nvmem: Add sophgo,efuses Jisheng Zhang 2023-11-19 13:13 ` Jisheng Zhang 2023-11-20 10:42 ` Krzysztof Kozlowski 2023-11-20 10:42 ` Krzysztof Kozlowski 2023-11-27 18:24 ` Rob Herring 2023-11-27 18:24 ` Rob Herring 2023-11-19 13:13 ` [PATCH 2/2] nvmem: Add Sophgo eFuse driver Jisheng Zhang 2023-11-19 13:13 ` Jisheng Zhang
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