* [PATCH v5 0/3] board: imx8mn-rve-gateway: add support for RVE gateway board
@ 2023-12-05 15:08 ` Hugo Villeneuve
0 siblings, 0 replies; 10+ messages in thread
From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer,
kernel, festevam, linux-imx, leoyang.li, robh
Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve
From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Hello,
this patch series add support for the RVE gateway board.
Thank you.
Link: [v1] https://lore.kernel.org/all/20231101144303.2653464-1-hugo@hugovil.com/
https://lore.kernel.org/all/20231101144057.2653271-1-hugo@hugovil.com/
[v2] https://lore.kernel.org/all/20231101183549.2960083-1-hugo@hugovil.com/
[v3] https://lore.kernel.org/all/20231102193121.1676000-1-hugo@hugovil.com/
[v4] https://lore.kernel.org/all/20231103142831.2116163-1-hugo@hugovil.com/
Changes for V2:
- Combine separate patches as a series. Start series at 2 to avoid confusion.
Changes for V3:
- Fix coding style / indentation
- Change vmmc supply for usdhc2 node
- Disable uart2 node instead of removing it.
- Remove MAINTAINERS board entry
- Add SOM compatible string
- Drop some status = "okay"
Changes for V4:
- Fix dtbs_check warning for compatible string "rve,rve-gateway"
(remove acked by tag because of that change)
Changes for V5:
- Fix indentation for gpio-line-names
- Add Krzysztof "Reviewed-by" tag for patch 2
Hugo Villeneuve (3):
dt-bindings: vendor-prefixes: add rve
dt-bindings: arm: fsl: add RVE gateway board
arm64: dts: freescale: introduce rve-gateway board
.../devicetree/bindings/arm/fsl.yaml | 4 +-
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../boot/dts/freescale/imx8mn-rve-gateway.dts | 285 ++++++++++++++++++
4 files changed, 291 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts
base-commit: bee0e7762ad2c6025b9f5245c040fcc36ef2bde8
--
2.39.2
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v5 0/3] board: imx8mn-rve-gateway: add support for RVE gateway board @ 2023-12-05 15:08 ` Hugo Villeneuve 0 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve From: Hugo Villeneuve <hvilleneuve@dimonoff.com> Hello, this patch series add support for the RVE gateway board. Thank you. Link: [v1] https://lore.kernel.org/all/20231101144303.2653464-1-hugo@hugovil.com/ https://lore.kernel.org/all/20231101144057.2653271-1-hugo@hugovil.com/ [v2] https://lore.kernel.org/all/20231101183549.2960083-1-hugo@hugovil.com/ [v3] https://lore.kernel.org/all/20231102193121.1676000-1-hugo@hugovil.com/ [v4] https://lore.kernel.org/all/20231103142831.2116163-1-hugo@hugovil.com/ Changes for V2: - Combine separate patches as a series. Start series at 2 to avoid confusion. Changes for V3: - Fix coding style / indentation - Change vmmc supply for usdhc2 node - Disable uart2 node instead of removing it. - Remove MAINTAINERS board entry - Add SOM compatible string - Drop some status = "okay" Changes for V4: - Fix dtbs_check warning for compatible string "rve,rve-gateway" (remove acked by tag because of that change) Changes for V5: - Fix indentation for gpio-line-names - Add Krzysztof "Reviewed-by" tag for patch 2 Hugo Villeneuve (3): dt-bindings: vendor-prefixes: add rve dt-bindings: arm: fsl: add RVE gateway board arm64: dts: freescale: introduce rve-gateway board .../devicetree/bindings/arm/fsl.yaml | 4 +- .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mn-rve-gateway.dts | 285 ++++++++++++++++++ 4 files changed, 291 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts base-commit: bee0e7762ad2c6025b9f5245c040fcc36ef2bde8 -- 2.39.2 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v5 1/3] dt-bindings: vendor-prefixes: add rve 2023-12-05 15:08 ` Hugo Villeneuve @ 2023-12-05 15:08 ` Hugo Villeneuve -1 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve, Krzysztof Kozlowski From: Hugo Villeneuve <hvilleneuve@dimonoff.com> Add vendor prefix for Recharge Véhicule Électrique (RVE), which manufactures electric vehicle chargers infrastructure components. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..71dcd6240a99 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1179,6 +1179,8 @@ patternProperties: description: Shenzhen Roofull Technology Co, Ltd "^roseapplepi,.*": description: RoseapplePi.org + "^rve,.*": + description: Recharge Véhicule Électrique (RVE) inc. "^saef,.*": description: Saef Technology Limited "^samsung,.*": -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v5 1/3] dt-bindings: vendor-prefixes: add rve @ 2023-12-05 15:08 ` Hugo Villeneuve 0 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve, Krzysztof Kozlowski From: Hugo Villeneuve <hvilleneuve@dimonoff.com> Add vendor prefix for Recharge Véhicule Électrique (RVE), which manufactures electric vehicle chargers infrastructure components. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..71dcd6240a99 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1179,6 +1179,8 @@ patternProperties: description: Shenzhen Roofull Technology Co, Ltd "^roseapplepi,.*": description: RoseapplePi.org + "^rve,.*": + description: Recharge Véhicule Électrique (RVE) inc. "^saef,.*": description: Saef Technology Limited "^samsung,.*": -- 2.39.2 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v5 2/3] dt-bindings: arm: fsl: add RVE gateway board 2023-12-05 15:08 ` Hugo Villeneuve @ 2023-12-05 15:08 ` Hugo Villeneuve -1 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve, Krzysztof Kozlowski From: Hugo Villeneuve <hvilleneuve@dimonoff.com> Add DT compatible string for RVE gateway board based on a Variscite VAR-SOM-NANO with a NXP MX8MN nano CPU. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- Documentation/devicetree/bindings/arm/fsl.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 32b195852a75..5b98a17b65b5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1022,7 +1022,9 @@ properties: - description: Variscite VAR-SOM-MX8MN based boards items: - - const: variscite,var-som-mx8mn-symphony + - enum: + - rve,rve-gateway # i.MX8MN RVE Gateway Board + - variscite,var-som-mx8mn-symphony - const: variscite,var-som-mx8mn - const: fsl,imx8mn -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v5 2/3] dt-bindings: arm: fsl: add RVE gateway board @ 2023-12-05 15:08 ` Hugo Villeneuve 0 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve, Krzysztof Kozlowski From: Hugo Villeneuve <hvilleneuve@dimonoff.com> Add DT compatible string for RVE gateway board based on a Variscite VAR-SOM-NANO with a NXP MX8MN nano CPU. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- Documentation/devicetree/bindings/arm/fsl.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 32b195852a75..5b98a17b65b5 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1022,7 +1022,9 @@ properties: - description: Variscite VAR-SOM-MX8MN based boards items: - - const: variscite,var-som-mx8mn-symphony + - enum: + - rve,rve-gateway # i.MX8MN RVE Gateway Board + - variscite,var-som-mx8mn-symphony - const: variscite,var-som-mx8mn - const: fsl,imx8mn -- 2.39.2 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v5 3/3] arm64: dts: freescale: introduce rve-gateway board 2023-12-05 15:08 ` Hugo Villeneuve @ 2023-12-05 15:08 ` Hugo Villeneuve -1 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve From: Hugo Villeneuve <hvilleneuve@dimonoff.com> The RVE gateway board is based on a Variscite VAR-SOM-NANO, with a NXP MX8MN nano CPU. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mn-rve-gateway.dts | 285 ++++++++++++++++++ 2 files changed, 286 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 300049037eb0..c99da779ef7b 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -98,6 +98,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr3l-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mn-rve-gateway.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts b/arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts new file mode 100644 index 000000000000..1b633bd1ebb6 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts @@ -0,0 +1,285 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 DimOnOff + */ + +/dts-v1/; + +#include <dt-bindings/usb/pd.h> +#include "imx8mn-var-som.dtsi" + +/ { + model = "RVE gateway"; + compatible = "rve,rve-gateway", "variscite,var-som-mx8mn", "fsl,imx8mn"; + + crystal_duart_24m: crystal-duart-24m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + key-enter { + label = "enter"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_ENTER>; + }; + + key-exit { + label = "exit"; + gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + linux,code = <KEY_ESC>; + }; + }; + + lcd { + compatible = "hit,hd44780"; + display-height-chars = <2>; + display-width-chars = <20>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd>; + data-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>, + <&gpio1 6 GPIO_ACTIVE_HIGH>, + <&gpio1 14 GPIO_ACTIVE_HIGH>, + <&gpio4 28 GPIO_ACTIVE_HIGH>, + <&gpio5 24 GPIO_ACTIVE_HIGH>, + <&gpio5 2 GPIO_ACTIVE_HIGH>, + <&gpio1 12 GPIO_ACTIVE_HIGH>, + <&gpio5 25 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; + rs-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + rw-gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* Bourns PEC12R rotary encoder, 24 steps. */ + rotary: rotary-encoder { + compatible = "rotary-encoder"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rotary>; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>, /* A */ + <&gpio3 21 GPIO_ACTIVE_LOW>; /* B */ + linux,axis = <0>; /* REL_X */ + rotary-encoder,encoding = "gray"; + rotary-encoder,relative-axis; + }; +}; + +&ecspi1 { + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + + duart1: serial@0 { + compatible = "nxp,sc16is752"; + reg = <0>; + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; + spi-max-frequency = <4000000>; + clocks = <&crystal_duart_24m>; + interrupt-parent = <&gpio3>; + interrupts = <22 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "RADIO0", "RADIO1", "RADIO2", "RADIO3", + "RADIO4", "RADIO_RESET", "TP12", "TP11"; + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + }; + + /delete-node/ touchscreen@0; +}; + +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + /delete-property/ dmas; + /delete-property/ dma-names; + status = "okay"; + + duart2: serial@0 { + compatible = "nxp,sc16is752"; + reg = <0>; + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; + spi-max-frequency = <4000000>; + clocks = <&crystal_duart_24m>; + interrupt-parent = <&gpio3>; + interrupts = <20 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_B_USER", "LED_R_USER", "LED_G_USER", + "GPIO_EXT3", "GPIO_EXT2", "GPIO_EXT1", + "GPIO_EXT0", "TP13"; + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + }; +}; + +/* Configure PWM pins in GPIO mode: */ +&gpio5 { + gpio-line-names = "", "", "", "PWM3", "PWM2", "PWM1"; +}; + +&gpu { + status = "disabled"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + /* Carrier board EEPROM */ + eeprom_cb: eeprom@56 { + compatible = "atmel,24c04"; + reg = <0x56>; + pagesize = <16>; + vcc-supply = <®_3p3v>; + }; + + lm75: sensor@48 { + compatible = "st,stlm75"; + reg = <0x48>; + vs-supply = <®_3p3v>; + }; + + mcp7940: rtc@6f { + compatible = "microchip,mcp7940x"; + reg = <0x6f>; + }; +}; + +&i2c3 { + codec@1a { + status = "disabled"; + }; +}; + +&i2c4 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + pcf8574_1: gpio@38 { + compatible = "nxp,pcf8574"; + reg = <0x38>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_B_COMM3", "LED_R_COMM3", "LED_G_COMM3", + "TP14", "TP15", "LED_G_COMM4", "LED_R_COMM4", + "LED_B_COMM4"; + }; + + pcf8574_2: gpio@39 { + compatible = "nxp,pcf8574"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_B_COMM2", "LED_G_COMM2", "LED_B_COMM1", + "LED_R_COMM2", "LED_R_COMM1", "LED_G_COMM1", + "TP16", "TP17"; + }; +}; + +/* Bluetooth */ +&uart2 { + status = "disabled"; +}; + +&usbotg1 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +/* SD interface on expansion connector. */ +&usdhc2 { + vmmc-supply = <®_3p3v>; + cd-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; +}; + +&iomuxc { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13 + MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x13 + MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x13 + MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x13 /* SS0 */ + MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x13 /* SC16 IRQ */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x13 + MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x13 + MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x13 + MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x13 /* SS0 */ + MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x13 /* SC16 IRQ */ + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0xc6 /* Enter */ + MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0xc6 /* Exit */ + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 + MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 + MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + >; + }; + + pinctrl_lcd: lcdgrp { + fsl,pins = < + MX8MN_IOMUXC_SAI3_TXD_GPIO5_IO1 0x00000156 /* D0 */ + MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x00000156 /* D1 */ + MX8MN_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x00000156 /* D2 */ + MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00000156 /* D3 */ + MX8MN_IOMUXC_UART2_RXD_GPIO5_IO24 0x00000156 /* D4 */ + MX8MN_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x00000156 /* D5 */ + MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00000156 /* D6 */ + MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25 0x00000156 /* D7 */ + MX8MN_IOMUXC_UART1_TXD_GPIO5_IO23 0x00000156 /* E */ + MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x00000156 /* RS */ + MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x00000156 /* R/W */ + >; + }; + + pinctrl_rotary: rotarygrp { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x00000156 /* A */ + MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x00000156 /* B */ + >; + }; + + /* Override Card Detect function GPIO value (GPIO1_IO10) from SOM: */ + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41 + >; + }; +}; -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v5 3/3] arm64: dts: freescale: introduce rve-gateway board @ 2023-12-05 15:08 ` Hugo Villeneuve 0 siblings, 0 replies; 10+ messages in thread From: Hugo Villeneuve @ 2023-12-05 15:08 UTC (permalink / raw) To: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh Cc: devicetree, linux-kernel, linux-arm-kernel, hugo, Hugo Villeneuve From: Hugo Villeneuve <hvilleneuve@dimonoff.com> The RVE gateway board is based on a Variscite VAR-SOM-NANO, with a NXP MX8MN nano CPU. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mn-rve-gateway.dts | 285 ++++++++++++++++++ 2 files changed, 286 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 300049037eb0..c99da779ef7b 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -98,6 +98,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-bsh-smm-s2pro.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr3l-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mn-rve-gateway.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts b/arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts new file mode 100644 index 000000000000..1b633bd1ebb6 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts @@ -0,0 +1,285 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 DimOnOff + */ + +/dts-v1/; + +#include <dt-bindings/usb/pd.h> +#include "imx8mn-var-som.dtsi" + +/ { + model = "RVE gateway"; + compatible = "rve,rve-gateway", "variscite,var-som-mx8mn", "fsl,imx8mn"; + + crystal_duart_24m: crystal-duart-24m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + key-enter { + label = "enter"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_ENTER>; + }; + + key-exit { + label = "exit"; + gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + linux,code = <KEY_ESC>; + }; + }; + + lcd { + compatible = "hit,hd44780"; + display-height-chars = <2>; + display-width-chars = <20>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd>; + data-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>, + <&gpio1 6 GPIO_ACTIVE_HIGH>, + <&gpio1 14 GPIO_ACTIVE_HIGH>, + <&gpio4 28 GPIO_ACTIVE_HIGH>, + <&gpio5 24 GPIO_ACTIVE_HIGH>, + <&gpio5 2 GPIO_ACTIVE_HIGH>, + <&gpio1 12 GPIO_ACTIVE_HIGH>, + <&gpio5 25 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; + rs-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + rw-gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* Bourns PEC12R rotary encoder, 24 steps. */ + rotary: rotary-encoder { + compatible = "rotary-encoder"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rotary>; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>, /* A */ + <&gpio3 21 GPIO_ACTIVE_LOW>; /* B */ + linux,axis = <0>; /* REL_X */ + rotary-encoder,encoding = "gray"; + rotary-encoder,relative-axis; + }; +}; + +&ecspi1 { + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + + duart1: serial@0 { + compatible = "nxp,sc16is752"; + reg = <0>; + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; + spi-max-frequency = <4000000>; + clocks = <&crystal_duart_24m>; + interrupt-parent = <&gpio3>; + interrupts = <22 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "RADIO0", "RADIO1", "RADIO2", "RADIO3", + "RADIO4", "RADIO_RESET", "TP12", "TP11"; + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + }; + + /delete-node/ touchscreen@0; +}; + +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + /delete-property/ dmas; + /delete-property/ dma-names; + status = "okay"; + + duart2: serial@0 { + compatible = "nxp,sc16is752"; + reg = <0>; + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; + spi-max-frequency = <4000000>; + clocks = <&crystal_duart_24m>; + interrupt-parent = <&gpio3>; + interrupts = <20 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_B_USER", "LED_R_USER", "LED_G_USER", + "GPIO_EXT3", "GPIO_EXT2", "GPIO_EXT1", + "GPIO_EXT0", "TP13"; + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + }; +}; + +/* Configure PWM pins in GPIO mode: */ +&gpio5 { + gpio-line-names = "", "", "", "PWM3", "PWM2", "PWM1"; +}; + +&gpu { + status = "disabled"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + /* Carrier board EEPROM */ + eeprom_cb: eeprom@56 { + compatible = "atmel,24c04"; + reg = <0x56>; + pagesize = <16>; + vcc-supply = <®_3p3v>; + }; + + lm75: sensor@48 { + compatible = "st,stlm75"; + reg = <0x48>; + vs-supply = <®_3p3v>; + }; + + mcp7940: rtc@6f { + compatible = "microchip,mcp7940x"; + reg = <0x6f>; + }; +}; + +&i2c3 { + codec@1a { + status = "disabled"; + }; +}; + +&i2c4 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + pcf8574_1: gpio@38 { + compatible = "nxp,pcf8574"; + reg = <0x38>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_B_COMM3", "LED_R_COMM3", "LED_G_COMM3", + "TP14", "TP15", "LED_G_COMM4", "LED_R_COMM4", + "LED_B_COMM4"; + }; + + pcf8574_2: gpio@39 { + compatible = "nxp,pcf8574"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "LED_B_COMM2", "LED_G_COMM2", "LED_B_COMM1", + "LED_R_COMM2", "LED_R_COMM1", "LED_G_COMM1", + "TP16", "TP17"; + }; +}; + +/* Bluetooth */ +&uart2 { + status = "disabled"; +}; + +&usbotg1 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +/* SD interface on expansion connector. */ +&usdhc2 { + vmmc-supply = <®_3p3v>; + cd-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; +}; + +&iomuxc { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13 + MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x13 + MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x13 + MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x13 /* SS0 */ + MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x13 /* SC16 IRQ */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x13 + MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x13 + MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x13 + MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x13 /* SS0 */ + MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x13 /* SC16 IRQ */ + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0xc6 /* Enter */ + MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0xc6 /* Exit */ + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 + MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 + MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + >; + }; + + pinctrl_lcd: lcdgrp { + fsl,pins = < + MX8MN_IOMUXC_SAI3_TXD_GPIO5_IO1 0x00000156 /* D0 */ + MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x00000156 /* D1 */ + MX8MN_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x00000156 /* D2 */ + MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00000156 /* D3 */ + MX8MN_IOMUXC_UART2_RXD_GPIO5_IO24 0x00000156 /* D4 */ + MX8MN_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x00000156 /* D5 */ + MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00000156 /* D6 */ + MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25 0x00000156 /* D7 */ + MX8MN_IOMUXC_UART1_TXD_GPIO5_IO23 0x00000156 /* E */ + MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x00000156 /* RS */ + MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x00000156 /* R/W */ + >; + }; + + pinctrl_rotary: rotarygrp { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x00000156 /* A */ + MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x00000156 /* B */ + >; + }; + + /* Override Card Detect function GPIO value (GPIO1_IO10) from SOM: */ + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41 + >; + }; +}; -- 2.39.2 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v5 0/3] board: imx8mn-rve-gateway: add support for RVE gateway board 2023-12-05 15:08 ` Hugo Villeneuve @ 2023-12-06 0:49 ` Shawn Guo -1 siblings, 0 replies; 10+ messages in thread From: Shawn Guo @ 2023-12-06 0:49 UTC (permalink / raw) To: Hugo Villeneuve Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh, devicetree, linux-kernel, linux-arm-kernel, Hugo Villeneuve On Tue, Dec 05, 2023 at 10:08:11AM -0500, Hugo Villeneuve wrote: > Hugo Villeneuve (3): > dt-bindings: vendor-prefixes: add rve > dt-bindings: arm: fsl: add RVE gateway board > arm64: dts: freescale: introduce rve-gateway board Applied all, thanks! _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v5 0/3] board: imx8mn-rve-gateway: add support for RVE gateway board @ 2023-12-06 0:49 ` Shawn Guo 0 siblings, 0 replies; 10+ messages in thread From: Shawn Guo @ 2023-12-06 0:49 UTC (permalink / raw) To: Hugo Villeneuve Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, s.hauer, kernel, festevam, linux-imx, leoyang.li, robh, devicetree, linux-kernel, linux-arm-kernel, Hugo Villeneuve On Tue, Dec 05, 2023 at 10:08:11AM -0500, Hugo Villeneuve wrote: > Hugo Villeneuve (3): > dt-bindings: vendor-prefixes: add rve > dt-bindings: arm: fsl: add RVE gateway board > arm64: dts: freescale: introduce rve-gateway board Applied all, thanks! ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-12-06 0:50 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-12-05 15:08 [PATCH v5 0/3] board: imx8mn-rve-gateway: add support for RVE gateway board Hugo Villeneuve 2023-12-05 15:08 ` Hugo Villeneuve 2023-12-05 15:08 ` [PATCH v5 1/3] dt-bindings: vendor-prefixes: add rve Hugo Villeneuve 2023-12-05 15:08 ` Hugo Villeneuve 2023-12-05 15:08 ` [PATCH v5 2/3] dt-bindings: arm: fsl: add RVE gateway board Hugo Villeneuve 2023-12-05 15:08 ` Hugo Villeneuve 2023-12-05 15:08 ` [PATCH v5 3/3] arm64: dts: freescale: introduce rve-gateway board Hugo Villeneuve 2023-12-05 15:08 ` Hugo Villeneuve 2023-12-06 0:49 ` [PATCH v5 0/3] board: imx8mn-rve-gateway: add support for RVE gateway board Shawn Guo 2023-12-06 0:49 ` Shawn Guo
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