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From: Chris Morgan <macroalpha82@gmail.com>
To: devicetree@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org, linus.walleij@linaro.org,
	marex@denx.de, conor+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org,
	daniel@ffwll.ch, airlied@gmail.com, sam@ravnborg.org,
	quic_jesszhan@quicinc.com, neil.armstrong@linaro.org,
	jagan@amarulasolutions.com,
	Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation
Date: Fri,  8 Dec 2023 09:48:45 -0600	[thread overview]
Message-ID: <20231208154847.130615-2-macroalpha82@gmail.com> (raw)
In-Reply-To: <20231208154847.130615-1-macroalpha82@gmail.com>

From: Chris Morgan <macromorgan@hotmail.com>

The AVCL register, according to the datasheet, comes in increments
of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented
by 0x3). The current calculation is done by adding the defined
AVCL value in mV to -4400 and then dividing by 200 to get the register
value. Unfortunately if I subtract -4400 from -4400 I get -8800, which
divided by 200 gives me -44. If I instead subtract -4400 from -4400
I get 0, which divided by 200 gives me 0. Based on the datasheet this
is the expected register value.

Fixes: 83b7a8e7e88e ("drm/panel/panel-sitronix-st7701: Parametrize voltage and timing")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
 drivers/gpu/drm/panel/panel-sitronix-st7701.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
index 0459965e1b4f..036ac403ed21 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
@@ -288,7 +288,7 @@ static void st7701_init_sequence(struct st7701 *st7701)
 		   FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVDD_MASK,
 			      DIV_ROUND_CLOSEST(desc->avdd_mv - 6200, 200)) |
 		   FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVCL_MASK,
-			      DIV_ROUND_CLOSEST(-4400 + desc->avcl_mv, 200)));
+			      DIV_ROUND_CLOSEST(-4400 - desc->avcl_mv, 200)));
 
 	/* T2D = 0.2us * T2D[3:0] */
 	ST7701_DSI(st7701, DSI_CMD2_BK1_SPD1,
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Chris Morgan <macroalpha82@gmail.com>
To: devicetree@vger.kernel.org
Cc: marex@denx.de, neil.armstrong@linaro.org, conor+dt@kernel.org,
	sam@ravnborg.org, Chris Morgan <macromorgan@hotmail.com>,
	dri-devel@lists.freedesktop.org, robh+dt@kernel.org,
	jagan@amarulasolutions.com, krzysztof.kozlowski+dt@linaro.org,
	quic_jesszhan@quicinc.com
Subject: [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation
Date: Fri,  8 Dec 2023 09:48:45 -0600	[thread overview]
Message-ID: <20231208154847.130615-2-macroalpha82@gmail.com> (raw)
In-Reply-To: <20231208154847.130615-1-macroalpha82@gmail.com>

From: Chris Morgan <macromorgan@hotmail.com>

The AVCL register, according to the datasheet, comes in increments
of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented
by 0x3). The current calculation is done by adding the defined
AVCL value in mV to -4400 and then dividing by 200 to get the register
value. Unfortunately if I subtract -4400 from -4400 I get -8800, which
divided by 200 gives me -44. If I instead subtract -4400 from -4400
I get 0, which divided by 200 gives me 0. Based on the datasheet this
is the expected register value.

Fixes: 83b7a8e7e88e ("drm/panel/panel-sitronix-st7701: Parametrize voltage and timing")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
 drivers/gpu/drm/panel/panel-sitronix-st7701.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
index 0459965e1b4f..036ac403ed21 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
@@ -288,7 +288,7 @@ static void st7701_init_sequence(struct st7701 *st7701)
 		   FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVDD_MASK,
 			      DIV_ROUND_CLOSEST(desc->avdd_mv - 6200, 200)) |
 		   FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVCL_MASK,
-			      DIV_ROUND_CLOSEST(-4400 + desc->avcl_mv, 200)));
+			      DIV_ROUND_CLOSEST(-4400 - desc->avcl_mv, 200)));
 
 	/* T2D = 0.2us * T2D[3:0] */
 	ST7701_DSI(st7701, DSI_CMD2_BK1_SPD1,
-- 
2.34.1


  reply	other threads:[~2023-12-08 15:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-08 15:48 [PATCH 0/3] Add Support for RG-ARC Panel Chris Morgan
2023-12-08 15:48 ` Chris Morgan
2023-12-08 15:48 ` Chris Morgan [this message]
2023-12-08 15:48   ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
2023-12-11  8:29   ` neil.armstrong
2023-12-11  8:29     ` neil.armstrong
2023-12-11 23:43   ` Linus Walleij
2023-12-11 23:43     ` Linus Walleij
2023-12-08 15:48 ` [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel Chris Morgan
2023-12-08 15:48   ` Chris Morgan
2023-12-09  8:13   ` Krzysztof Kozlowski
2023-12-09  8:13     ` Krzysztof Kozlowski
2023-12-09 23:38   ` Linus Walleij
2023-12-09 23:38     ` Linus Walleij
2023-12-08 15:48 ` [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support Chris Morgan
2023-12-08 15:48   ` Chris Morgan
2023-12-11  8:28   ` neil.armstrong
2023-12-11  8:28     ` neil.armstrong
2023-12-11 23:44   ` Linus Walleij
2023-12-11 23:44     ` Linus Walleij
2023-12-11  9:16 ` [PATCH 0/3] Add Support for RG-ARC Panel Neil Armstrong
2023-12-11  9:16   ` Neil Armstrong

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