* [RFC PATCH v3 01/18] perf stat: Add new field in stat_config to enable hardware aware grouping.
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:26 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 02/18] perf stat: Add basic functions for the " weilin.wang
` (17 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Hardware counter and event information could be used to help creating event
groups that better utilize hardware counters and improve multiplexing.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/builtin-stat.c | 8 ++++++++
tools/perf/util/metricgroup.c | 5 +++++
tools/perf/util/metricgroup.h | 1 +
tools/perf/util/stat.h | 1 +
4 files changed, 15 insertions(+)
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index d8e5d6f7a87a..a7a8018c3511 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -2061,6 +2061,7 @@ static int add_default_attributes(void)
stat_config.metric_no_threshold,
stat_config.user_requested_cpu_list,
stat_config.system_wide,
+ stat_config.hardware_aware_grouping,
&stat_config.metric_events);
}
@@ -2094,6 +2095,7 @@ static int add_default_attributes(void)
stat_config.metric_no_threshold,
stat_config.user_requested_cpu_list,
stat_config.system_wide,
+ stat_config.hardware_aware_grouping,
&stat_config.metric_events);
}
@@ -2128,6 +2130,7 @@ static int add_default_attributes(void)
/*metric_no_threshold=*/true,
stat_config.user_requested_cpu_list,
stat_config.system_wide,
+ stat_config.hardware_aware_grouping,
&stat_config.metric_events) < 0)
return -1;
}
@@ -2169,6 +2172,7 @@ static int add_default_attributes(void)
/*metric_no_threshold=*/true,
stat_config.user_requested_cpu_list,
stat_config.system_wide,
+ stat_config.hardware_aware_grouping,
&stat_config.metric_events) < 0)
return -1;
@@ -2502,6 +2506,9 @@ int cmd_stat(int argc, const char **argv)
(const char **) stat_usage,
PARSE_OPT_STOP_AT_NON_OPTION);
+ /* Set hardware_aware_grouping to false on default before completely enable it.*/
+ stat_config.hardware_aware_grouping = false;
+
if (stat_config.csv_sep) {
stat_config.csv_output = true;
if (!strcmp(stat_config.csv_sep, "\\t"))
@@ -2702,6 +2709,7 @@ int cmd_stat(int argc, const char **argv)
stat_config.metric_no_threshold,
stat_config.user_requested_cpu_list,
stat_config.system_wide,
+ stat_config.hardware_aware_grouping,
&stat_config.metric_events);
zfree(&metrics);
}
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 0484736d9fe4..dfbcdb517b78 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1690,12 +1690,17 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
bool metric_no_threshold,
const char *user_requested_cpu_list,
bool system_wide,
+ bool hardware_aware_grouping,
struct rblist *metric_events)
{
const struct pmu_metrics_table *table = pmu_metrics_table__find();
if (!table)
return -EINVAL;
+ if (hardware_aware_grouping) {
+ pr_debug("Use hardware aware grouping instead of traditional metric grouping method\n");
+ }
+
return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
metric_no_threshold, user_requested_cpu_list, system_wide,
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index d5325c6ec8e1..779f6ede1b51 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -77,6 +77,7 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
bool metric_no_threshold,
const char *user_requested_cpu_list,
bool system_wide,
+ bool hardware_aware_grouping,
struct rblist *metric_events);
int metricgroup__parse_groups_test(struct evlist *evlist,
const struct pmu_metrics_table *table,
diff --git a/tools/perf/util/stat.h b/tools/perf/util/stat.h
index 325d0fad1842..f97d6282ba3d 100644
--- a/tools/perf/util/stat.h
+++ b/tools/perf/util/stat.h
@@ -87,6 +87,7 @@ struct perf_stat_config {
bool metric_no_group;
bool metric_no_merge;
bool metric_no_threshold;
+ bool hardware_aware_grouping;
bool stop_read_counter;
bool iostat_run;
char *user_requested_cpu_list;
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 01/18] perf stat: Add new field in stat_config to enable hardware aware grouping.
2023-12-12 23:02 ` [RFC PATCH v3 01/18] perf stat: Add new field in stat_config to enable hardware aware grouping weilin.wang
@ 2023-12-12 23:26 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2023-12-12 23:26 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:02 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Hardware counter and event information could be used to help creating event
> groups that better utilize hardware counters and improve multiplexing.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
Reviewed-by: Ian Rogers <irogers@google.com>
> ---
> tools/perf/builtin-stat.c | 8 ++++++++
> tools/perf/util/metricgroup.c | 5 +++++
> tools/perf/util/metricgroup.h | 1 +
> tools/perf/util/stat.h | 1 +
> 4 files changed, 15 insertions(+)
>
> diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
> index d8e5d6f7a87a..a7a8018c3511 100644
> --- a/tools/perf/builtin-stat.c
> +++ b/tools/perf/builtin-stat.c
> @@ -2061,6 +2061,7 @@ static int add_default_attributes(void)
> stat_config.metric_no_threshold,
> stat_config.user_requested_cpu_list,
> stat_config.system_wide,
> + stat_config.hardware_aware_grouping,
> &stat_config.metric_events);
> }
>
> @@ -2094,6 +2095,7 @@ static int add_default_attributes(void)
> stat_config.metric_no_threshold,
> stat_config.user_requested_cpu_list,
> stat_config.system_wide,
> + stat_config.hardware_aware_grouping,
> &stat_config.metric_events);
> }
>
> @@ -2128,6 +2130,7 @@ static int add_default_attributes(void)
> /*metric_no_threshold=*/true,
> stat_config.user_requested_cpu_list,
> stat_config.system_wide,
> + stat_config.hardware_aware_grouping,
> &stat_config.metric_events) < 0)
> return -1;
> }
> @@ -2169,6 +2172,7 @@ static int add_default_attributes(void)
> /*metric_no_threshold=*/true,
> stat_config.user_requested_cpu_list,
> stat_config.system_wide,
> + stat_config.hardware_aware_grouping,
> &stat_config.metric_events) < 0)
> return -1;
>
> @@ -2502,6 +2506,9 @@ int cmd_stat(int argc, const char **argv)
> (const char **) stat_usage,
> PARSE_OPT_STOP_AT_NON_OPTION);
>
> + /* Set hardware_aware_grouping to false on default before completely enable it.*/
> + stat_config.hardware_aware_grouping = false;
nit: we don't normally zero values like this as the curly brace
initializer will implicitly zero all non named values being
initialized.
Thanks,
Ian
> +
> if (stat_config.csv_sep) {
> stat_config.csv_output = true;
> if (!strcmp(stat_config.csv_sep, "\\t"))
> @@ -2702,6 +2709,7 @@ int cmd_stat(int argc, const char **argv)
> stat_config.metric_no_threshold,
> stat_config.user_requested_cpu_list,
> stat_config.system_wide,
> + stat_config.hardware_aware_grouping,
> &stat_config.metric_events);
> zfree(&metrics);
> }
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index 0484736d9fe4..dfbcdb517b78 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1690,12 +1690,17 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
> bool metric_no_threshold,
> const char *user_requested_cpu_list,
> bool system_wide,
> + bool hardware_aware_grouping,
> struct rblist *metric_events)
> {
> const struct pmu_metrics_table *table = pmu_metrics_table__find();
>
> if (!table)
> return -EINVAL;
> + if (hardware_aware_grouping) {
> + pr_debug("Use hardware aware grouping instead of traditional metric grouping method\n");
> + }
> +
>
> return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
> metric_no_threshold, user_requested_cpu_list, system_wide,
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index d5325c6ec8e1..779f6ede1b51 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -77,6 +77,7 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
> bool metric_no_threshold,
> const char *user_requested_cpu_list,
> bool system_wide,
> + bool hardware_aware_grouping,
> struct rblist *metric_events);
> int metricgroup__parse_groups_test(struct evlist *evlist,
> const struct pmu_metrics_table *table,
> diff --git a/tools/perf/util/stat.h b/tools/perf/util/stat.h
> index 325d0fad1842..f97d6282ba3d 100644
> --- a/tools/perf/util/stat.h
> +++ b/tools/perf/util/stat.h
> @@ -87,6 +87,7 @@ struct perf_stat_config {
> bool metric_no_group;
> bool metric_no_merge;
> bool metric_no_threshold;
> + bool hardware_aware_grouping;
> bool stop_read_counter;
> bool iostat_run;
> char *user_requested_cpu_list;
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 02/18] perf stat: Add basic functions for the hardware aware grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 01/18] perf stat: Add new field in stat_config to enable hardware aware grouping weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 02/18] perf stat: Add basic functions for the hardware-grouping stat cmd option weilin.wang
` (16 subsequent siblings)
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add the first set of functions for the hardware aware grouping method. Function
hw_awre_parse_groups() is the entry point of this metric grouping method. It
does metric grouping on a combined list of events and will create a list of
grouping strings as final results of the grouping method. These grouping strings
will be used in the same mannor as existing metric grouping process.
This method will fall back to normal grouping when hardware aware grouping
return with err so that perf stat still executes and returns with correct
result.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 210 +++++++++++++++++++++++++++++++++-
tools/perf/util/metricgroup.h | 9 ++
2 files changed, 218 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index dfbcdb517b78..8d1143ee898c 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1432,6 +1432,101 @@ static int build_combined_expr_ctx(const struct list_head *metric_list,
return ret;
}
+/**
+ * hw_aware_build_grouping - Build event groupings by reading counter
+ * requirement of the events and counter available on the system from
+ * pmu-events.
+ * @ctx: the event identifiers parsed from metrics.
+ * @groupings: header to the list of final event grouping.
+ * @modifier: any modifiers added to the events.
+ */
+static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
+ struct list_head *groupings __maybe_unused,
+ const char *modifier __maybe_unused)
+{
+ int ret = 0;
+
+ pr_debug("This is a placeholder\n");
+ return ret;
+}
+
+static void group_str_free(struct metricgroup__group_strs *g)
+{
+ if (!g)
+ return;
+
+ strbuf_release(&g->grouping_str);
+ free(g);
+}
+
+static void metricgroup__free_grouping_strs(struct list_head
+ *grouping_strs)
+{
+ struct metricgroup__group_strs *g, *tmp;
+
+ list_for_each_entry_safe(g, tmp, grouping_strs, nd) {
+ list_del_init(&g->nd);
+ group_str_free(g);
+ }
+}
+
+/**
+ * hw_aware_parse_ids - Build the event string for the ids and parse them
+ * creating an evlist. The encoded metric_ids are decoded. Events are placed
+ * into groups based on event counter requirements and counter availabilities of
+ * the system.
+ * @metric_no_merge: is metric sharing explicitly disabled.
+ * @fake_pmu: used when testing metrics not supported by the current CPU.
+ * @ids: the event identifiers parsed from a metric.
+ * @modifier: any modifiers added to the events.
+ * @out_evlist: the created list of events.
+ */
+static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
+ struct expr_parse_ctx *ids, const char *modifier,
+ struct evlist **out_evlist)
+{
+ struct parse_events_error parse_error;
+ struct evlist *parsed_evlist;
+ LIST_HEAD(groupings);
+ struct metricgroup__group_strs *group;
+ int ret;
+
+ *out_evlist = NULL;
+ ret = hw_aware_build_grouping(ids, &groupings, modifier);
+ if (ret) {
+ metricgroup__free_grouping_strs(&groupings);
+ return ret;
+ }
+
+ parsed_evlist = evlist__new();
+ if (!parsed_evlist) {
+ ret = -ENOMEM;
+ goto err_out;
+ }
+ list_for_each_entry(group, &groupings, nd) {
+ struct strbuf *events = &group->grouping_str;
+
+ pr_debug("Parsing metric events '%s'\n", events->buf);
+ parse_events_error__init(&parse_error);
+ ret = __parse_events(parsed_evlist, events->buf, /*pmu_filter=*/NULL,
+ &parse_error, fake_pmu, /*warn_if_reordered=*/false);
+ if (ret) {
+ parse_events_error__print(&parse_error, events->buf);
+ goto err_out;
+ }
+ ret = decode_all_metric_ids(parsed_evlist, modifier);
+ if (ret)
+ goto err_out;
+ }
+ *out_evlist = parsed_evlist;
+ parsed_evlist = NULL;
+err_out:
+ parse_events_error__exit(&parse_error);
+ evlist__delete(parsed_evlist);
+ metricgroup__free_grouping_strs(&groupings);
+ return ret;
+}
+
/**
* parse_ids - Build the event string for the ids and parse them creating an
* evlist. The encoded metric_ids are decoded.
@@ -1520,6 +1615,114 @@ static int parse_ids(bool metric_no_merge, struct perf_pmu *fake_pmu,
return ret;
}
+static int hw_aware_parse_groups(struct evlist *perf_evlist,
+ const char *pmu, const char *str,
+ bool metric_no_threshold,
+ const char *user_requested_cpu_list,
+ bool system_wide,
+ struct perf_pmu *fake_pmu,
+ struct rblist *metric_events_list,
+ const struct pmu_metrics_table *table)
+{
+ struct evlist *combined_evlist = NULL;
+ LIST_HEAD(metric_list);
+ struct metric *m;
+ int ret;
+ bool metric_no_group = false;
+ bool metric_no_merge = false;
+
+ if (metric_events_list->nr_entries == 0)
+ metricgroup__rblist_init(metric_events_list);
+ ret = metricgroup__add_metric_list(pmu, str, metric_no_group, metric_no_threshold,
+ user_requested_cpu_list,
+ system_wide, &metric_list, table);
+ if (ret)
+ goto out;
+
+ /* Sort metrics from largest to smallest. */
+ list_sort(NULL, &metric_list, metric_list_cmp);
+
+ if (!metric_no_merge) {
+ struct expr_parse_ctx *combined = NULL;
+
+ ret = build_combined_expr_ctx(&metric_list, &combined);
+
+ if (!ret && combined && hashmap__size(combined->ids)) {
+ ret = hw_aware_parse_ids(fake_pmu, combined,
+ /*modifier=*/NULL,
+ &combined_evlist);
+ }
+
+ if (ret)
+ goto out;
+
+ if (combined)
+ expr__ctx_free(combined);
+ }
+
+ list_for_each_entry(m, &metric_list, nd) {
+ struct metric_expr *expr;
+ struct metric_event *me;
+ struct evsel **metric_events;
+
+ ret = setup_metric_events(fake_pmu ? "all" : m->pmu, m->pctx->ids,
+ combined_evlist, &metric_events);
+ if (ret) {
+ pr_debug("Cannot resolve IDs for %s: %s\n",
+ m->metric_name, m->metric_expr);
+ goto out;
+ }
+
+ me = metricgroup__lookup(metric_events_list, metric_events[0], true);
+
+ expr = malloc(sizeof(struct metric_expr));
+ if (!expr) {
+ ret = -ENOMEM;
+ free(metric_events);
+ goto out;
+ }
+
+ expr->metric_refs = m->metric_refs;
+ m->metric_refs = NULL;
+ expr->metric_expr = m->metric_expr;
+ if (m->modifier) {
+ char *tmp;
+
+ if (asprintf(&tmp, "%s:%s", m->metric_name, m->modifier) < 0)
+ expr->metric_name = NULL;
+ else
+ expr->metric_name = tmp;
+ } else {
+ expr->metric_name = strdup(m->metric_name);
+ }
+
+ if (!expr->metric_name) {
+ ret = -ENOMEM;
+ free(metric_events);
+ goto out;
+ }
+ expr->metric_threshold = m->metric_threshold;
+ expr->metric_unit = m->metric_unit;
+ expr->metric_events = metric_events;
+ expr->runtime = m->pctx->sctx.runtime;
+ list_add(&expr->nd, &me->head);
+ }
+
+ if (combined_evlist) {
+ evlist__splice_list_tail(perf_evlist, &combined_evlist->core.entries);
+ evlist__delete(combined_evlist);
+ }
+
+ list_for_each_entry(m, &metric_list, nd) {
+ if (m->evlist)
+ evlist__splice_list_tail(perf_evlist, &m->evlist->core.entries);
+ }
+
+out:
+ metricgroup__free_metrics(&metric_list);
+ return ret;
+}
+
static int parse_groups(struct evlist *perf_evlist,
const char *pmu, const char *str,
bool metric_no_group,
@@ -1698,10 +1901,15 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
if (!table)
return -EINVAL;
if (hardware_aware_grouping) {
+ int ret;
pr_debug("Use hardware aware grouping instead of traditional metric grouping method\n");
+ ret = hw_aware_parse_groups(perf_evlist, pmu, str,
+ metric_no_threshold, user_requested_cpu_list, system_wide,
+ /*fake_pmu=*/NULL, metric_events, table);
+ if (!ret)
+ return 0;
}
-
return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
metric_no_threshold, user_requested_cpu_list, system_wide,
/*fake_pmu=*/NULL, metric_events, table);
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 779f6ede1b51..89809df85644 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -6,6 +6,7 @@
#include <linux/rbtree.h>
#include <stdbool.h>
#include "pmu-events/pmu-events.h"
+#include "strbuf.h"
struct evlist;
struct evsel;
@@ -66,6 +67,14 @@ struct metric_expr {
int runtime;
};
+/**
+ * Each group is one node in the group string list.
+ */
+struct metricgroup__group_strs {
+ struct list_head nd;
+ struct strbuf grouping_str;
+};
+
struct metric_event *metricgroup__lookup(struct rblist *metric_events,
struct evsel *evsel,
bool create);
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 02/18] perf stat: Add basic functions for the hardware-grouping stat cmd option
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 01/18] perf stat: Add new field in stat_config to enable hardware aware grouping weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 02/18] perf stat: Add basic functions for the " weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:29 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 03/18] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping weilin.wang
` (15 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add the first set of functions for the hardware-grouping method. Function
hw_awre_parse_groups() is the entry point of this metric grouping method.
It does metric grouping on a combined list of events and will create a list
of grouping strings as final results of the grouping method. These grouping
strings will be used in the same mannor as existing metric grouping
process.
This method will fall back to normal grouping when hardware aware grouping
return with err so that perf stat still executes and returns with correct
result.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 210 +++++++++++++++++++++++++++++++++-
tools/perf/util/metricgroup.h | 9 ++
2 files changed, 218 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index dfbcdb517b78..8d1143ee898c 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1432,6 +1432,101 @@ static int build_combined_expr_ctx(const struct list_head *metric_list,
return ret;
}
+/**
+ * hw_aware_build_grouping - Build event groupings by reading counter
+ * requirement of the events and counter available on the system from
+ * pmu-events.
+ * @ctx: the event identifiers parsed from metrics.
+ * @groupings: header to the list of final event grouping.
+ * @modifier: any modifiers added to the events.
+ */
+static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
+ struct list_head *groupings __maybe_unused,
+ const char *modifier __maybe_unused)
+{
+ int ret = 0;
+
+ pr_debug("This is a placeholder\n");
+ return ret;
+}
+
+static void group_str_free(struct metricgroup__group_strs *g)
+{
+ if (!g)
+ return;
+
+ strbuf_release(&g->grouping_str);
+ free(g);
+}
+
+static void metricgroup__free_grouping_strs(struct list_head
+ *grouping_strs)
+{
+ struct metricgroup__group_strs *g, *tmp;
+
+ list_for_each_entry_safe(g, tmp, grouping_strs, nd) {
+ list_del_init(&g->nd);
+ group_str_free(g);
+ }
+}
+
+/**
+ * hw_aware_parse_ids - Build the event string for the ids and parse them
+ * creating an evlist. The encoded metric_ids are decoded. Events are placed
+ * into groups based on event counter requirements and counter availabilities of
+ * the system.
+ * @metric_no_merge: is metric sharing explicitly disabled.
+ * @fake_pmu: used when testing metrics not supported by the current CPU.
+ * @ids: the event identifiers parsed from a metric.
+ * @modifier: any modifiers added to the events.
+ * @out_evlist: the created list of events.
+ */
+static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
+ struct expr_parse_ctx *ids, const char *modifier,
+ struct evlist **out_evlist)
+{
+ struct parse_events_error parse_error;
+ struct evlist *parsed_evlist;
+ LIST_HEAD(groupings);
+ struct metricgroup__group_strs *group;
+ int ret;
+
+ *out_evlist = NULL;
+ ret = hw_aware_build_grouping(ids, &groupings, modifier);
+ if (ret) {
+ metricgroup__free_grouping_strs(&groupings);
+ return ret;
+ }
+
+ parsed_evlist = evlist__new();
+ if (!parsed_evlist) {
+ ret = -ENOMEM;
+ goto err_out;
+ }
+ list_for_each_entry(group, &groupings, nd) {
+ struct strbuf *events = &group->grouping_str;
+
+ pr_debug("Parsing metric events '%s'\n", events->buf);
+ parse_events_error__init(&parse_error);
+ ret = __parse_events(parsed_evlist, events->buf, /*pmu_filter=*/NULL,
+ &parse_error, fake_pmu, /*warn_if_reordered=*/false);
+ if (ret) {
+ parse_events_error__print(&parse_error, events->buf);
+ goto err_out;
+ }
+ ret = decode_all_metric_ids(parsed_evlist, modifier);
+ if (ret)
+ goto err_out;
+ }
+ *out_evlist = parsed_evlist;
+ parsed_evlist = NULL;
+err_out:
+ parse_events_error__exit(&parse_error);
+ evlist__delete(parsed_evlist);
+ metricgroup__free_grouping_strs(&groupings);
+ return ret;
+}
+
/**
* parse_ids - Build the event string for the ids and parse them creating an
* evlist. The encoded metric_ids are decoded.
@@ -1520,6 +1615,114 @@ static int parse_ids(bool metric_no_merge, struct perf_pmu *fake_pmu,
return ret;
}
+static int hw_aware_parse_groups(struct evlist *perf_evlist,
+ const char *pmu, const char *str,
+ bool metric_no_threshold,
+ const char *user_requested_cpu_list,
+ bool system_wide,
+ struct perf_pmu *fake_pmu,
+ struct rblist *metric_events_list,
+ const struct pmu_metrics_table *table)
+{
+ struct evlist *combined_evlist = NULL;
+ LIST_HEAD(metric_list);
+ struct metric *m;
+ int ret;
+ bool metric_no_group = false;
+ bool metric_no_merge = false;
+
+ if (metric_events_list->nr_entries == 0)
+ metricgroup__rblist_init(metric_events_list);
+ ret = metricgroup__add_metric_list(pmu, str, metric_no_group, metric_no_threshold,
+ user_requested_cpu_list,
+ system_wide, &metric_list, table);
+ if (ret)
+ goto out;
+
+ /* Sort metrics from largest to smallest. */
+ list_sort(NULL, &metric_list, metric_list_cmp);
+
+ if (!metric_no_merge) {
+ struct expr_parse_ctx *combined = NULL;
+
+ ret = build_combined_expr_ctx(&metric_list, &combined);
+
+ if (!ret && combined && hashmap__size(combined->ids)) {
+ ret = hw_aware_parse_ids(fake_pmu, combined,
+ /*modifier=*/NULL,
+ &combined_evlist);
+ }
+
+ if (ret)
+ goto out;
+
+ if (combined)
+ expr__ctx_free(combined);
+ }
+
+ list_for_each_entry(m, &metric_list, nd) {
+ struct metric_expr *expr;
+ struct metric_event *me;
+ struct evsel **metric_events;
+
+ ret = setup_metric_events(fake_pmu ? "all" : m->pmu, m->pctx->ids,
+ combined_evlist, &metric_events);
+ if (ret) {
+ pr_debug("Cannot resolve IDs for %s: %s\n",
+ m->metric_name, m->metric_expr);
+ goto out;
+ }
+
+ me = metricgroup__lookup(metric_events_list, metric_events[0], true);
+
+ expr = malloc(sizeof(struct metric_expr));
+ if (!expr) {
+ ret = -ENOMEM;
+ free(metric_events);
+ goto out;
+ }
+
+ expr->metric_refs = m->metric_refs;
+ m->metric_refs = NULL;
+ expr->metric_expr = m->metric_expr;
+ if (m->modifier) {
+ char *tmp;
+
+ if (asprintf(&tmp, "%s:%s", m->metric_name, m->modifier) < 0)
+ expr->metric_name = NULL;
+ else
+ expr->metric_name = tmp;
+ } else {
+ expr->metric_name = strdup(m->metric_name);
+ }
+
+ if (!expr->metric_name) {
+ ret = -ENOMEM;
+ free(metric_events);
+ goto out;
+ }
+ expr->metric_threshold = m->metric_threshold;
+ expr->metric_unit = m->metric_unit;
+ expr->metric_events = metric_events;
+ expr->runtime = m->pctx->sctx.runtime;
+ list_add(&expr->nd, &me->head);
+ }
+
+ if (combined_evlist) {
+ evlist__splice_list_tail(perf_evlist, &combined_evlist->core.entries);
+ evlist__delete(combined_evlist);
+ }
+
+ list_for_each_entry(m, &metric_list, nd) {
+ if (m->evlist)
+ evlist__splice_list_tail(perf_evlist, &m->evlist->core.entries);
+ }
+
+out:
+ metricgroup__free_metrics(&metric_list);
+ return ret;
+}
+
static int parse_groups(struct evlist *perf_evlist,
const char *pmu, const char *str,
bool metric_no_group,
@@ -1698,10 +1901,15 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
if (!table)
return -EINVAL;
if (hardware_aware_grouping) {
+ int ret;
pr_debug("Use hardware aware grouping instead of traditional metric grouping method\n");
+ ret = hw_aware_parse_groups(perf_evlist, pmu, str,
+ metric_no_threshold, user_requested_cpu_list, system_wide,
+ /*fake_pmu=*/NULL, metric_events, table);
+ if (!ret)
+ return 0;
}
-
return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
metric_no_threshold, user_requested_cpu_list, system_wide,
/*fake_pmu=*/NULL, metric_events, table);
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 779f6ede1b51..89809df85644 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -6,6 +6,7 @@
#include <linux/rbtree.h>
#include <stdbool.h>
#include "pmu-events/pmu-events.h"
+#include "strbuf.h"
struct evlist;
struct evsel;
@@ -66,6 +67,14 @@ struct metric_expr {
int runtime;
};
+/**
+ * Each group is one node in the group string list.
+ */
+struct metricgroup__group_strs {
+ struct list_head nd;
+ struct strbuf grouping_str;
+};
+
struct metric_event *metricgroup__lookup(struct rblist *metric_events,
struct evsel *evsel,
bool create);
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 02/18] perf stat: Add basic functions for the hardware-grouping stat cmd option
2023-12-12 23:02 ` [RFC PATCH v3 02/18] perf stat: Add basic functions for the hardware-grouping stat cmd option weilin.wang
@ 2023-12-12 23:29 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2023-12-12 23:29 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:02 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Add the first set of functions for the hardware-grouping method. Function
> hw_awre_parse_groups() is the entry point of this metric grouping method.
nit: s/awre/aware/
> It does metric grouping on a combined list of events and will create a list
> of grouping strings as final results of the grouping method. These grouping
> strings will be used in the same mannor as existing metric grouping
> process.
nit: s/mannor/manner/
> This method will fall back to normal grouping when hardware aware grouping
> return with err so that perf stat still executes and returns with correct
> result.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/perf/util/metricgroup.c | 210 +++++++++++++++++++++++++++++++++-
> tools/perf/util/metricgroup.h | 9 ++
> 2 files changed, 218 insertions(+), 1 deletion(-)
>
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index dfbcdb517b78..8d1143ee898c 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1432,6 +1432,101 @@ static int build_combined_expr_ctx(const struct list_head *metric_list,
> return ret;
> }
>
> +/**
> + * hw_aware_build_grouping - Build event groupings by reading counter
> + * requirement of the events and counter available on the system from
> + * pmu-events.
> + * @ctx: the event identifiers parsed from metrics.
> + * @groupings: header to the list of final event grouping.
> + * @modifier: any modifiers added to the events.
> + */
> +static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> + struct list_head *groupings __maybe_unused,
> + const char *modifier __maybe_unused)
> +{
> + int ret = 0;
> +
> + pr_debug("This is a placeholder\n");
> + return ret;
> +}
> +
> +static void group_str_free(struct metricgroup__group_strs *g)
> +{
> + if (!g)
> + return;
> +
> + strbuf_release(&g->grouping_str);
> + free(g);
> +}
> +
> +static void metricgroup__free_grouping_strs(struct list_head
> + *grouping_strs)
> +{
> + struct metricgroup__group_strs *g, *tmp;
> +
> + list_for_each_entry_safe(g, tmp, grouping_strs, nd) {
> + list_del_init(&g->nd);
> + group_str_free(g);
> + }
> +}
> +
> +/**
> + * hw_aware_parse_ids - Build the event string for the ids and parse them
> + * creating an evlist. The encoded metric_ids are decoded. Events are placed
> + * into groups based on event counter requirements and counter availabilities of
> + * the system.
> + * @metric_no_merge: is metric sharing explicitly disabled.
> + * @fake_pmu: used when testing metrics not supported by the current CPU.
> + * @ids: the event identifiers parsed from a metric.
> + * @modifier: any modifiers added to the events.
> + * @out_evlist: the created list of events.
> + */
> +static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
> + struct expr_parse_ctx *ids, const char *modifier,
> + struct evlist **out_evlist)
> +{
> + struct parse_events_error parse_error;
> + struct evlist *parsed_evlist;
> + LIST_HEAD(groupings);
> + struct metricgroup__group_strs *group;
> + int ret;
> +
> + *out_evlist = NULL;
> + ret = hw_aware_build_grouping(ids, &groupings, modifier);
> + if (ret) {
> + metricgroup__free_grouping_strs(&groupings);
> + return ret;
> + }
> +
> + parsed_evlist = evlist__new();
> + if (!parsed_evlist) {
> + ret = -ENOMEM;
> + goto err_out;
> + }
> + list_for_each_entry(group, &groupings, nd) {
> + struct strbuf *events = &group->grouping_str;
> +
> + pr_debug("Parsing metric events '%s'\n", events->buf);
> + parse_events_error__init(&parse_error);
> + ret = __parse_events(parsed_evlist, events->buf, /*pmu_filter=*/NULL,
> + &parse_error, fake_pmu, /*warn_if_reordered=*/false);
> + if (ret) {
> + parse_events_error__print(&parse_error, events->buf);
> + goto err_out;
> + }
> + ret = decode_all_metric_ids(parsed_evlist, modifier);
> + if (ret)
> + goto err_out;
> + }
> + *out_evlist = parsed_evlist;
> + parsed_evlist = NULL;
> +err_out:
> + parse_events_error__exit(&parse_error);
> + evlist__delete(parsed_evlist);
> + metricgroup__free_grouping_strs(&groupings);
> + return ret;
> +}
> +
> /**
> * parse_ids - Build the event string for the ids and parse them creating an
> * evlist. The encoded metric_ids are decoded.
> @@ -1520,6 +1615,114 @@ static int parse_ids(bool metric_no_merge, struct perf_pmu *fake_pmu,
> return ret;
> }
>
> +static int hw_aware_parse_groups(struct evlist *perf_evlist,
> + const char *pmu, const char *str,
> + bool metric_no_threshold,
> + const char *user_requested_cpu_list,
> + bool system_wide,
> + struct perf_pmu *fake_pmu,
> + struct rblist *metric_events_list,
> + const struct pmu_metrics_table *table)
> +{
> + struct evlist *combined_evlist = NULL;
> + LIST_HEAD(metric_list);
> + struct metric *m;
> + int ret;
> + bool metric_no_group = false;
> + bool metric_no_merge = false;
> +
> + if (metric_events_list->nr_entries == 0)
> + metricgroup__rblist_init(metric_events_list);
> + ret = metricgroup__add_metric_list(pmu, str, metric_no_group, metric_no_threshold,
> + user_requested_cpu_list,
> + system_wide, &metric_list, table);
> + if (ret)
> + goto out;
> +
> + /* Sort metrics from largest to smallest. */
> + list_sort(NULL, &metric_list, metric_list_cmp);
> +
> + if (!metric_no_merge) {
> + struct expr_parse_ctx *combined = NULL;
> +
> + ret = build_combined_expr_ctx(&metric_list, &combined);
> +
> + if (!ret && combined && hashmap__size(combined->ids)) {
> + ret = hw_aware_parse_ids(fake_pmu, combined,
> + /*modifier=*/NULL,
> + &combined_evlist);
> + }
> +
> + if (ret)
> + goto out;
> +
> + if (combined)
> + expr__ctx_free(combined);
> + }
> +
> + list_for_each_entry(m, &metric_list, nd) {
> + struct metric_expr *expr;
> + struct metric_event *me;
> + struct evsel **metric_events;
> +
> + ret = setup_metric_events(fake_pmu ? "all" : m->pmu, m->pctx->ids,
> + combined_evlist, &metric_events);
> + if (ret) {
> + pr_debug("Cannot resolve IDs for %s: %s\n",
> + m->metric_name, m->metric_expr);
> + goto out;
> + }
> +
> + me = metricgroup__lookup(metric_events_list, metric_events[0], true);
> +
> + expr = malloc(sizeof(struct metric_expr));
> + if (!expr) {
> + ret = -ENOMEM;
> + free(metric_events);
> + goto out;
> + }
> +
> + expr->metric_refs = m->metric_refs;
> + m->metric_refs = NULL;
> + expr->metric_expr = m->metric_expr;
> + if (m->modifier) {
> + char *tmp;
> +
> + if (asprintf(&tmp, "%s:%s", m->metric_name, m->modifier) < 0)
> + expr->metric_name = NULL;
> + else
> + expr->metric_name = tmp;
> + } else {
> + expr->metric_name = strdup(m->metric_name);
> + }
> +
> + if (!expr->metric_name) {
> + ret = -ENOMEM;
> + free(metric_events);
> + goto out;
> + }
> + expr->metric_threshold = m->metric_threshold;
> + expr->metric_unit = m->metric_unit;
> + expr->metric_events = metric_events;
> + expr->runtime = m->pctx->sctx.runtime;
> + list_add(&expr->nd, &me->head);
> + }
> +
> + if (combined_evlist) {
> + evlist__splice_list_tail(perf_evlist, &combined_evlist->core.entries);
> + evlist__delete(combined_evlist);
> + }
> +
> + list_for_each_entry(m, &metric_list, nd) {
> + if (m->evlist)
> + evlist__splice_list_tail(perf_evlist, &m->evlist->core.entries);
> + }
> +
> +out:
> + metricgroup__free_metrics(&metric_list);
> + return ret;
> +}
> +
> static int parse_groups(struct evlist *perf_evlist,
> const char *pmu, const char *str,
> bool metric_no_group,
> @@ -1698,10 +1901,15 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
> if (!table)
> return -EINVAL;
> if (hardware_aware_grouping) {
> + int ret;
> pr_debug("Use hardware aware grouping instead of traditional metric grouping method\n");
> + ret = hw_aware_parse_groups(perf_evlist, pmu, str,
> + metric_no_threshold, user_requested_cpu_list, system_wide,
> + /*fake_pmu=*/NULL, metric_events, table);
> + if (!ret)
> + return 0;
> }
>
> -
> return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
> metric_no_threshold, user_requested_cpu_list, system_wide,
> /*fake_pmu=*/NULL, metric_events, table);
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index 779f6ede1b51..89809df85644 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -6,6 +6,7 @@
> #include <linux/rbtree.h>
> #include <stdbool.h>
> #include "pmu-events/pmu-events.h"
> +#include "strbuf.h"
>
> struct evlist;
> struct evsel;
> @@ -66,6 +67,14 @@ struct metric_expr {
> int runtime;
> };
>
> +/**
> + * Each group is one node in the group string list.
> + */
> +struct metricgroup__group_strs {
> + struct list_head nd;
> + struct strbuf grouping_str;
> +};
This can go in the C file to reduce the scope.
> +
> struct metric_event *metricgroup__lookup(struct rblist *metric_events,
> struct evsel *evsel,
> bool create);
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 03/18] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (2 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 02/18] perf stat: Add basic functions for the hardware-grouping stat cmd option weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 0:06 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 04/18] perf pmu-events: Add counter info into JSON files for SapphireRapids weilin.wang
` (14 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
These functions are added to parse event counter restrictions and counter
availability info from json files so that the metric grouping method could
do grouping based on the counter restriction of events and the counters
that are available on the system.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/pmu-events/jevents.py | 171 ++++++++++++++++++++++++++++-
tools/perf/pmu-events/pmu-events.h | 25 ++++-
2 files changed, 188 insertions(+), 8 deletions(-)
diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
index 0093c998cb6e..16f17d335f8e 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -23,6 +23,8 @@ _metric_tables = []
_sys_metric_tables = []
# Mapping between sys event table names and sys metric table names.
_sys_event_table_to_metric_table_mapping = {}
+# List of regular PMU counter layout tables.
+_pmu_layouts_tables = []
# Map from an event name to an architecture standard
# JsonEvent. Architecture standard events are in json files in the top
# f'{_args.starting_dir}/{_args.arch}' directory.
@@ -31,6 +33,9 @@ _arch_std_events = {}
_pending_events = []
# Name of events table to be written out
_pending_events_tblname = None
+# PMU counter layout to write out when the table is closed
+_pending_pmu_counts = [] # Name of PMU counter layout table to be written out
+_pending_pmu_counts_tblname = None
# Metrics to write out when the table is closed
_pending_metrics = []
# Name of metrics table to be written out
@@ -47,10 +52,17 @@ _json_event_attributes = [
'event',
# Short things in alphabetical order.
'compat', 'deprecated', 'perpkg', 'unit',
+ # Counter this event could use
+ 'counter',
# Longer things (the last won't be iterated over during decompress).
'long_desc'
]
+# Attributes that are in pmu_unit_layout.
+_json_layout_attributes = [
+ 'pmu', 'desc', 'size', 'fixed_size'
+]
+
# Attributes that are in pmu_metric rather than pmu_event.
_json_metric_attributes = [
'metric_name', 'metric_group', 'metric_expr', 'metric_threshold',
@@ -58,7 +70,9 @@ _json_metric_attributes = [
'default_metricgroup_name', 'aggr_mode', 'event_grouping'
]
# Attributes that are bools or enum int values, encoded as '0', '1',...
-_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg']
+_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg',
+ 'size', 'fixed_size'
+]
def removesuffix(s: str, suffix: str) -> str:
"""Remove the suffix from a string
@@ -316,6 +330,9 @@ class JsonEvent:
if 'Errata' in jd:
extra_desc += ' Spec update: ' + jd['Errata']
self.pmu = unit_to_pmu(jd.get('Unit'))
+ self.counter = jd.get('Counter')
+ self.size = jd.get('Size')
+ self.fixed_size = jd.get('FixedSize')
filter = jd.get('Filter')
self.unit = jd.get('ScaleUnit')
self.perpkg = jd.get('PerPkg')
@@ -386,8 +403,16 @@ class JsonEvent:
s += f'\t{attr} = {value},\n'
return s + '}'
- def build_c_string(self, metric: bool) -> str:
+ def build_c_string(self, metric: bool, layout: bool = False) -> str:
s = ''
+ if layout:
+ for attr in _json_layout_attributes:
+ x = getattr(self, attr)
+ if attr in _json_enum_attributes:
+ s += x if x else '0'
+ else:
+ s += f'{x}\\000' if x else '\\000'
+ return s
for attr in _json_metric_attributes if metric else _json_event_attributes:
x = getattr(self, attr)
if metric and x and attr == 'metric_expr':
@@ -402,10 +427,10 @@ class JsonEvent:
s += f'{x}\\000' if x else '\\000'
return s
- def to_c_string(self, metric: bool) -> str:
+ def to_c_string(self, metric: bool, layout: bool = False) -> str:
"""Representation of the event as a C struct initializer."""
- s = self.build_c_string(metric)
+ s = self.build_c_string(metric, layout)
return f'{{ { _bcs.offsets[s] } }}, /* {s} */\n'
@@ -442,6 +467,8 @@ def preprocess_arch_std_files(archpath: str) -> None:
_arch_std_events[event.name.lower()] = event
if event.metric_name:
_arch_std_events[event.metric_name.lower()] = event
+ if event.size:
+ _arch_std_events[event.pmu.lower()] = event
def add_events_table_entries(item: os.DirEntry, topic: str) -> None:
@@ -451,6 +478,8 @@ def add_events_table_entries(item: os.DirEntry, topic: str) -> None:
_pending_events.append(e)
if e.metric_name:
_pending_metrics.append(e)
+ if e.size:
+ _pending_pmu_counts.append(e)
def print_pending_events() -> None:
@@ -564,6 +593,33 @@ const struct pmu_table_entry {_pending_metrics_tblname}[] = {{
""")
_args.output_file.write('};\n\n')
+def print_pending_pmu_counts() -> None:
+
+ def pmu_counts_cmp_key(j: JsonEvent) -> Tuple[bool, str, str]:
+ def fix_none(s: Optional[str]) -> str:
+ if s is None:
+ return ''
+ return s
+
+ return (j.desc is not None, fix_none(j.pmu), fix_none(j.size))
+
+ global _pending_pmu_counts
+ if not _pending_pmu_counts:
+ return
+
+ global _pending_pmu_counts_tblname
+ global pmu_layouts_tables
+ _pmu_layouts_tables.append(_pending_pmu_counts_tblname)
+
+ _args.output_file.write(
+ f'static const struct compact_pmu_event {_pending_pmu_counts_tblname}[] = {{\n')
+
+ for pmu_layout in sorted(_pending_pmu_counts, key=pmu_counts_cmp_key):
+ _args.output_file.write(pmu_layout.to_c_string(metric=False, layout=True))
+ _pending_pmu_counts = []
+
+ _args.output_file.write('};\n\n')
+
def get_topic(topic: str) -> str:
if topic.endswith('metrics.json'):
return 'metrics'
@@ -604,6 +660,8 @@ def preprocess_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
if event.metric_name:
_bcs.add(pmu_name, metric=True)
_bcs.add(event.build_c_string(metric=True), metric=True)
+ if event.size:
+ _bcs.add(event.build_c_string(metric=False, layout=True), metric=False)
def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
"""Process a JSON file during the main walk."""
@@ -617,11 +675,14 @@ def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
if item.is_dir() and is_leaf_dir(item.path):
print_pending_events()
print_pending_metrics()
+ print_pending_pmu_counts()
global _pending_events_tblname
_pending_events_tblname = file_name_to_table_name('pmu_events_', parents, item.name)
global _pending_metrics_tblname
_pending_metrics_tblname = file_name_to_table_name('pmu_metrics_', parents, item.name)
+ global _pending_pmu_counts_tblname
+ _pending_pmu_counts_tblname = file_name_to_table_name('pmu_layouts_', parents, item.name)
if item.name == 'sys':
_sys_event_table_to_metric_table_mapping[_pending_events_tblname] = _pending_metrics_tblname
@@ -655,6 +716,12 @@ struct pmu_metrics_table {
uint32_t num_pmus;
};
+/* Struct used to make the PMU counter layout table implementation opaque to callers. */
+struct pmu_layouts_table {
+ const struct compact_pmu_event *entries;
+ size_t length;
+};
+
/*
* Map a CPU to its table of PMU events. The CPU is identified by the
* cpuid field, which is an arch-specific identifier for the CPU.
@@ -668,6 +735,7 @@ struct pmu_events_map {
const char *cpuid;
struct pmu_events_table event_table;
struct pmu_metrics_table metric_table;
+ struct pmu_layouts_table layout_table;
};
/*
@@ -712,6 +780,12 @@ const struct pmu_events_map pmu_events_map[] = {
metric_size = '0'
if event_size == '0' and metric_size == '0':
continue
+ layout_tblname = file_name_to_table_name('pmu_layouts_', [], row[2].replace('/', '_'))
+ if layout_tblname in _pmu_layouts_tables:
+ layout_size = f'ARRAY_SIZE({layout_tblname})'
+ else:
+ layout_tblname = 'NULL'
+ layout_size = '0'
cpuid = row[0].replace('\\', '\\\\')
_args.output_file.write(f"""{{
\t.arch = "{arch}",
@@ -723,6 +797,10 @@ const struct pmu_events_map pmu_events_map[] = {
\t.metric_table = {{
\t\t.pmus = {metric_tblname},
\t\t.num_pmus = {metric_size}
+\t}},
+\t.layout_table = {{
+\t\t.entries = {layout_tblname},
+\t\t.length = {layout_size}
\t}}
}},
""")
@@ -733,6 +811,7 @@ const struct pmu_events_map pmu_events_map[] = {
\t.cpuid = 0,
\t.event_table = { 0, 0 },
\t.metric_table = { 0, 0 },
+\t.layout_table = { 0, 0 },
}
};
""")
@@ -821,6 +900,24 @@ static void decompress_metric(int offset, struct pmu_metric *pm)
_args.output_file.write('\twhile (*p++);')
_args.output_file.write("""}
+static void decompress_layout(int offset, struct pmu_layout *pm)
+{
+\tconst char *p = &big_c_string[offset];
+""")
+ for attr in _json_layout_attributes:
+ _args.output_file.write(f'\n\tpm->{attr} = ')
+ if attr in _json_enum_attributes:
+ _args.output_file.write("*p - '0';\n")
+ else:
+ _args.output_file.write("(*p == '\\0' ? NULL : p);\n")
+ if attr == _json_layout_attributes[-1]:
+ continue
+ if attr in _json_enum_attributes:
+ _args.output_file.write('\tp++;')
+ else:
+ _args.output_file.write('\twhile (*p++);')
+ _args.output_file.write("""}
+
static int pmu_events_table__for_each_event_pmu(const struct pmu_events_table *table,
const struct pmu_table_entry *pmu,
pmu_event_iter_fn fn,
@@ -976,6 +1073,21 @@ int pmu_metrics_table__for_each_metric(const struct pmu_metrics_table *table,
return 0;
}
+int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *table,
+ pmu_layout_iter_fn fn,
+ void *data) {
+ for (size_t i = 0; i < table->length; i++) {
+ struct pmu_layout pm;
+ int ret;
+
+ decompress_layout(table->entries[i].offset, &pm);
+ ret = fn(&pm, data);
+ if (ret)
+ return ret;
+ }
+ return 0;
+}
+
static const struct pmu_events_map *map_for_pmu(struct perf_pmu *pmu)
{
static struct {
@@ -1071,6 +1183,33 @@ const struct pmu_metrics_table *perf_pmu__find_metrics_table(struct perf_pmu *pm
return NULL;
}
+const struct pmu_layouts_table *perf_pmu__find_layouts_table(struct perf_pmu *pmu)
+{
+ const struct pmu_layouts_table *table = NULL;
+ char *cpuid = perf_pmu__getcpuid(pmu);
+ int i;
+
+ /* on some platforms which uses cpus map, cpuid can be NULL for
+ * PMUs other than CORE PMUs.
+ */
+ if (!cpuid)
+ return NULL;
+
+ i = 0;
+ for (;;) {
+ const struct pmu_events_map *map = &pmu_events_map[i++];
+ if (!map->arch)
+ break;
+
+ if (!strcmp_cpuid_str(map->cpuid, cpuid)) {
+ table = &map->layout_table;
+ break;
+ }
+ }
+ free(cpuid);
+ return table;
+}
+
const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid)
{
for (const struct pmu_events_map *tables = &pmu_events_map[0];
@@ -1092,6 +1231,16 @@ const struct pmu_metrics_table *find_core_metrics_table(const char *arch, const
}
return NULL;
}
+const struct pmu_layouts_table *find_core_layouts_table(const char *arch, const char *cpuid)
+{
+ for (const struct pmu_events_map *tables = &pmu_events_map[0];
+ tables->arch;
+ tables++) {
+ if (!strcmp(tables->arch, arch) && !strcmp_cpuid_str(tables->cpuid, cpuid))
+ return &tables->layout_table;
+ }
+ return NULL;
+}
int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data)
{
@@ -1120,6 +1269,19 @@ int pmu_for_each_core_metric(pmu_metric_iter_fn fn, void *data)
return 0;
}
+int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data)
+{
+ for (const struct pmu_events_map *tables = &pmu_events_map[0];
+ tables->arch;
+ tables++) {
+ int ret = pmu_layouts_table__for_each_layout(&tables->layout_table, fn, data);
+
+ if (ret)
+ return ret;
+ }
+ return 0;
+}
+
const struct pmu_events_table *find_sys_events_table(const char *name)
{
for (const struct pmu_sys_events *tables = &pmu_sys_event_tables[0];
@@ -1276,6 +1438,7 @@ struct pmu_table_entry {
ftw(arch_path, [], process_one_file)
print_pending_events()
print_pending_metrics()
+ print_pending_pmu_counts()
print_mapping_table(archs)
print_system_mapping_table()
diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h
index f5aa96f1685c..65e0c5dd8bb4 100644
--- a/tools/perf/pmu-events/pmu-events.h
+++ b/tools/perf/pmu-events/pmu-events.h
@@ -45,6 +45,7 @@ struct pmu_event {
const char *desc;
const char *topic;
const char *long_desc;
+ const char *counter;
const char *pmu;
const char *unit;
bool perpkg;
@@ -67,8 +68,16 @@ struct pmu_metric {
enum metric_event_groups event_grouping;
};
+struct pmu_layout {
+ const char *pmu;
+ const char *desc;
+ int size;
+ int fixed_size;
+};
+
struct pmu_events_table;
struct pmu_metrics_table;
+struct pmu_layouts_table;
typedef int (*pmu_event_iter_fn)(const struct pmu_event *pe,
const struct pmu_events_table *table,
@@ -78,15 +87,20 @@ typedef int (*pmu_metric_iter_fn)(const struct pmu_metric *pm,
const struct pmu_metrics_table *table,
void *data);
+typedef int (*pmu_layout_iter_fn)(const struct pmu_layout *pm,
+ void *data);
+
int pmu_events_table__for_each_event(const struct pmu_events_table *table,
struct perf_pmu *pmu,
pmu_event_iter_fn fn,
void *data);
int pmu_events_table__find_event(const struct pmu_events_table *table,
- struct perf_pmu *pmu,
- const char *name,
- pmu_event_iter_fn fn,
- void *data);
+ struct perf_pmu *pmu,
+ const char *name,
+ pmu_event_iter_fn fn,
+ void *data);
+int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *table, pmu_layout_iter_fn fn,
+ void *data);
size_t pmu_events_table__num_events(const struct pmu_events_table *table,
struct perf_pmu *pmu);
@@ -95,10 +109,13 @@ int pmu_metrics_table__for_each_metric(const struct pmu_metrics_table *table, pm
const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu);
const struct pmu_metrics_table *perf_pmu__find_metrics_table(struct perf_pmu *pmu);
+const struct pmu_layouts_table *perf_pmu__find_layouts_table(struct perf_pmu *pmu);
const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid);
const struct pmu_metrics_table *find_core_metrics_table(const char *arch, const char *cpuid);
+const struct pmu_layouts_table *find_core_layouts_table(const char *arch, const char *cpuid);
int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data);
int pmu_for_each_core_metric(pmu_metric_iter_fn fn, void *data);
+int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data);
const struct pmu_events_table *find_sys_events_table(const char *name);
const struct pmu_metrics_table *find_sys_metrics_table(const char *name);
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 03/18] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping
2023-12-12 23:02 ` [RFC PATCH v3 03/18] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping weilin.wang
@ 2024-01-24 0:06 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 0:06 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:02 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> These functions are added to parse event counter restrictions and counter
> availability info from json files so that the metric grouping method could
> do grouping based on the counter restriction of events and the counters
> that are available on the system.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/perf/pmu-events/jevents.py | 171 ++++++++++++++++++++++++++++-
> tools/perf/pmu-events/pmu-events.h | 25 ++++-
> 2 files changed, 188 insertions(+), 8 deletions(-)
>
> diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
> index 0093c998cb6e..16f17d335f8e 100755
> --- a/tools/perf/pmu-events/jevents.py
> +++ b/tools/perf/pmu-events/jevents.py
> @@ -23,6 +23,8 @@ _metric_tables = []
> _sys_metric_tables = []
> # Mapping between sys event table names and sys metric table names.
> _sys_event_table_to_metric_table_mapping = {}
> +# List of regular PMU counter layout tables.
> +_pmu_layouts_tables = []
> # Map from an event name to an architecture standard
> # JsonEvent. Architecture standard events are in json files in the top
> # f'{_args.starting_dir}/{_args.arch}' directory.
> @@ -31,6 +33,9 @@ _arch_std_events = {}
> _pending_events = []
> # Name of events table to be written out
> _pending_events_tblname = None
> +# PMU counter layout to write out when the table is closed
nit: s/table/layout table/
> +_pending_pmu_counts = [] # Name of PMU counter layout table to be written out
> +_pending_pmu_counts_tblname = None
> # Metrics to write out when the table is closed
> _pending_metrics = []
> # Name of metrics table to be written out
> @@ -47,10 +52,17 @@ _json_event_attributes = [
> 'event',
> # Short things in alphabetical order.
> 'compat', 'deprecated', 'perpkg', 'unit',
> + # Counter this event could use
> + 'counter',
> # Longer things (the last won't be iterated over during decompress).
> 'long_desc'
> ]
>
> +# Attributes that are in pmu_unit_layout.
> +_json_layout_attributes = [
> + 'pmu', 'desc', 'size', 'fixed_size'
> +]
> +
> # Attributes that are in pmu_metric rather than pmu_event.
> _json_metric_attributes = [
> 'metric_name', 'metric_group', 'metric_expr', 'metric_threshold',
> @@ -58,7 +70,9 @@ _json_metric_attributes = [
> 'default_metricgroup_name', 'aggr_mode', 'event_grouping'
> ]
> # Attributes that are bools or enum int values, encoded as '0', '1',...
> -_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg']
> +_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg',
> + 'size', 'fixed_size'
> +]
>
> def removesuffix(s: str, suffix: str) -> str:
> """Remove the suffix from a string
> @@ -316,6 +330,9 @@ class JsonEvent:
> if 'Errata' in jd:
> extra_desc += ' Spec update: ' + jd['Errata']
> self.pmu = unit_to_pmu(jd.get('Unit'))
> + self.counter = jd.get('Counter')
> + self.size = jd.get('Size')
> + self.fixed_size = jd.get('FixedSize')
nit: I think it is less than clear what the counter, size and fixed
size fields in JsonEvent are for. The code is derived from much older
code by Andi Kleen, for new fields I think it would be preferable to
document them.
> filter = jd.get('Filter')
> self.unit = jd.get('ScaleUnit')
> self.perpkg = jd.get('PerPkg')
> @@ -386,8 +403,16 @@ class JsonEvent:
> s += f'\t{attr} = {value},\n'
> return s + '}'
>
> - def build_c_string(self, metric: bool) -> str:
> + def build_c_string(self, metric: bool, layout: bool = False) -> str:
> s = ''
> + if layout:
> + for attr in _json_layout_attributes:
> + x = getattr(self, attr)
> + if attr in _json_enum_attributes:
> + s += x if x else '0'
> + else:
> + s += f'{x}\\000' if x else '\\000'
> + return s
> for attr in _json_metric_attributes if metric else _json_event_attributes:
> x = getattr(self, attr)
> if metric and x and attr == 'metric_expr':
> @@ -402,10 +427,10 @@ class JsonEvent:
> s += f'{x}\\000' if x else '\\000'
> return s
>
> - def to_c_string(self, metric: bool) -> str:
> + def to_c_string(self, metric: bool, layout: bool = False) -> str:
nit: Removing the default argument would make the code less error prone.
> """Representation of the event as a C struct initializer."""
>
> - s = self.build_c_string(metric)
> + s = self.build_c_string(metric, layout)
> return f'{{ { _bcs.offsets[s] } }}, /* {s} */\n'
>
>
> @@ -442,6 +467,8 @@ def preprocess_arch_std_files(archpath: str) -> None:
> _arch_std_events[event.name.lower()] = event
> if event.metric_name:
> _arch_std_events[event.metric_name.lower()] = event
> + if event.size:
> + _arch_std_events[event.pmu.lower()] = event
>
>
> def add_events_table_entries(item: os.DirEntry, topic: str) -> None:
> @@ -451,6 +478,8 @@ def add_events_table_entries(item: os.DirEntry, topic: str) -> None:
> _pending_events.append(e)
> if e.metric_name:
> _pending_metrics.append(e)
> + if e.size:
> + _pending_pmu_counts.append(e)
>
>
> def print_pending_events() -> None:
> @@ -564,6 +593,33 @@ const struct pmu_table_entry {_pending_metrics_tblname}[] = {{
> """)
> _args.output_file.write('};\n\n')
>
> +def print_pending_pmu_counts() -> None:
nit: Perhaps "print_pending_pmu_counter_layout_tables" would be a
better name? A function description comment would be nice.
> +
> + def pmu_counts_cmp_key(j: JsonEvent) -> Tuple[bool, str, str]:
> + def fix_none(s: Optional[str]) -> str:
> + if s is None:
> + return ''
> + return s
> +
> + return (j.desc is not None, fix_none(j.pmu), fix_none(j.size))
> +
> + global _pending_pmu_counts
> + if not _pending_pmu_counts:
> + return
> +
> + global _pending_pmu_counts_tblname
> + global pmu_layouts_tables
> + _pmu_layouts_tables.append(_pending_pmu_counts_tblname)
> +
> + _args.output_file.write(
> + f'static const struct compact_pmu_event {_pending_pmu_counts_tblname}[] = {{\n')
> +
> + for pmu_layout in sorted(_pending_pmu_counts, key=pmu_counts_cmp_key):
> + _args.output_file.write(pmu_layout.to_c_string(metric=False, layout=True))
> + _pending_pmu_counts = []
> +
> + _args.output_file.write('};\n\n')
> +
> def get_topic(topic: str) -> str:
> if topic.endswith('metrics.json'):
> return 'metrics'
> @@ -604,6 +660,8 @@ def preprocess_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
> if event.metric_name:
> _bcs.add(pmu_name, metric=True)
> _bcs.add(event.build_c_string(metric=True), metric=True)
> + if event.size:
> + _bcs.add(event.build_c_string(metric=False, layout=True), metric=False)
>
> def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
> """Process a JSON file during the main walk."""
> @@ -617,11 +675,14 @@ def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
> if item.is_dir() and is_leaf_dir(item.path):
> print_pending_events()
> print_pending_metrics()
> + print_pending_pmu_counts()
>
> global _pending_events_tblname
> _pending_events_tblname = file_name_to_table_name('pmu_events_', parents, item.name)
> global _pending_metrics_tblname
> _pending_metrics_tblname = file_name_to_table_name('pmu_metrics_', parents, item.name)
> + global _pending_pmu_counts_tblname
> + _pending_pmu_counts_tblname = file_name_to_table_name('pmu_layouts_', parents, item.name)
>
> if item.name == 'sys':
> _sys_event_table_to_metric_table_mapping[_pending_events_tblname] = _pending_metrics_tblname
> @@ -655,6 +716,12 @@ struct pmu_metrics_table {
> uint32_t num_pmus;
> };
>
> +/* Struct used to make the PMU counter layout table implementation opaque to callers. */
> +struct pmu_layouts_table {
> + const struct compact_pmu_event *entries;
> + size_t length;
> +};
> +
> /*
> * Map a CPU to its table of PMU events. The CPU is identified by the
> * cpuid field, which is an arch-specific identifier for the CPU.
> @@ -668,6 +735,7 @@ struct pmu_events_map {
> const char *cpuid;
> struct pmu_events_table event_table;
> struct pmu_metrics_table metric_table;
> + struct pmu_layouts_table layout_table;
> };
>
> /*
> @@ -712,6 +780,12 @@ const struct pmu_events_map pmu_events_map[] = {
> metric_size = '0'
> if event_size == '0' and metric_size == '0':
> continue
> + layout_tblname = file_name_to_table_name('pmu_layouts_', [], row[2].replace('/', '_'))
> + if layout_tblname in _pmu_layouts_tables:
> + layout_size = f'ARRAY_SIZE({layout_tblname})'
> + else:
> + layout_tblname = 'NULL'
> + layout_size = '0'
> cpuid = row[0].replace('\\', '\\\\')
> _args.output_file.write(f"""{{
> \t.arch = "{arch}",
> @@ -723,6 +797,10 @@ const struct pmu_events_map pmu_events_map[] = {
> \t.metric_table = {{
> \t\t.pmus = {metric_tblname},
> \t\t.num_pmus = {metric_size}
> +\t}},
> +\t.layout_table = {{
> +\t\t.entries = {layout_tblname},
> +\t\t.length = {layout_size}
> \t}}
> }},
> """)
> @@ -733,6 +811,7 @@ const struct pmu_events_map pmu_events_map[] = {
> \t.cpuid = 0,
> \t.event_table = { 0, 0 },
> \t.metric_table = { 0, 0 },
> +\t.layout_table = { 0, 0 },
> }
> };
> """)
> @@ -821,6 +900,24 @@ static void decompress_metric(int offset, struct pmu_metric *pm)
> _args.output_file.write('\twhile (*p++);')
> _args.output_file.write("""}
>
> +static void decompress_layout(int offset, struct pmu_layout *pm)
> +{
> +\tconst char *p = &big_c_string[offset];
> +""")
> + for attr in _json_layout_attributes:
> + _args.output_file.write(f'\n\tpm->{attr} = ')
> + if attr in _json_enum_attributes:
> + _args.output_file.write("*p - '0';\n")
> + else:
> + _args.output_file.write("(*p == '\\0' ? NULL : p);\n")
> + if attr == _json_layout_attributes[-1]:
> + continue
> + if attr in _json_enum_attributes:
> + _args.output_file.write('\tp++;')
> + else:
> + _args.output_file.write('\twhile (*p++);')
> + _args.output_file.write("""}
> +
> static int pmu_events_table__for_each_event_pmu(const struct pmu_events_table *table,
> const struct pmu_table_entry *pmu,
> pmu_event_iter_fn fn,
> @@ -976,6 +1073,21 @@ int pmu_metrics_table__for_each_metric(const struct pmu_metrics_table *table,
> return 0;
> }
>
> +int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *table,
> + pmu_layout_iter_fn fn,
> + void *data) {
> + for (size_t i = 0; i < table->length; i++) {
> + struct pmu_layout pm;
> + int ret;
> +
> + decompress_layout(table->entries[i].offset, &pm);
> + ret = fn(&pm, data);
> + if (ret)
> + return ret;
> + }
> + return 0;
> +}
> +
> static const struct pmu_events_map *map_for_pmu(struct perf_pmu *pmu)
> {
> static struct {
> @@ -1071,6 +1183,33 @@ const struct pmu_metrics_table *perf_pmu__find_metrics_table(struct perf_pmu *pm
> return NULL;
> }
>
> +const struct pmu_layouts_table *perf_pmu__find_layouts_table(struct perf_pmu *pmu)
> +{
> + const struct pmu_layouts_table *table = NULL;
> + char *cpuid = perf_pmu__getcpuid(pmu);
> + int i;
> +
> + /* on some platforms which uses cpus map, cpuid can be NULL for
> + * PMUs other than CORE PMUs.
> + */
> + if (!cpuid)
> + return NULL;
> +
> + i = 0;
> + for (;;) {
> + const struct pmu_events_map *map = &pmu_events_map[i++];
> + if (!map->arch)
> + break;
> +
> + if (!strcmp_cpuid_str(map->cpuid, cpuid)) {
> + table = &map->layout_table;
> + break;
> + }
> + }
> + free(cpuid);
> + return table;
> +}
> +
> const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid)
> {
> for (const struct pmu_events_map *tables = &pmu_events_map[0];
> @@ -1092,6 +1231,16 @@ const struct pmu_metrics_table *find_core_metrics_table(const char *arch, const
> }
> return NULL;
> }
> +const struct pmu_layouts_table *find_core_layouts_table(const char *arch, const char *cpuid)
> +{
> + for (const struct pmu_events_map *tables = &pmu_events_map[0];
> + tables->arch;
> + tables++) {
> + if (!strcmp(tables->arch, arch) && !strcmp_cpuid_str(tables->cpuid, cpuid))
> + return &tables->layout_table;
> + }
> + return NULL;
> +}
>
> int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data)
> {
> @@ -1120,6 +1269,19 @@ int pmu_for_each_core_metric(pmu_metric_iter_fn fn, void *data)
> return 0;
> }
>
> +int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data)
> +{
> + for (const struct pmu_events_map *tables = &pmu_events_map[0];
> + tables->arch;
> + tables++) {
> + int ret = pmu_layouts_table__for_each_layout(&tables->layout_table, fn, data);
> +
> + if (ret)
> + return ret;
> + }
> + return 0;
> +}
> +
> const struct pmu_events_table *find_sys_events_table(const char *name)
> {
> for (const struct pmu_sys_events *tables = &pmu_sys_event_tables[0];
> @@ -1276,6 +1438,7 @@ struct pmu_table_entry {
> ftw(arch_path, [], process_one_file)
> print_pending_events()
> print_pending_metrics()
> + print_pending_pmu_counts()
>
> print_mapping_table(archs)
> print_system_mapping_table()
> diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h
> index f5aa96f1685c..65e0c5dd8bb4 100644
> --- a/tools/perf/pmu-events/pmu-events.h
> +++ b/tools/perf/pmu-events/pmu-events.h
> @@ -45,6 +45,7 @@ struct pmu_event {
> const char *desc;
> const char *topic;
> const char *long_desc;
nit: A comment/example for the counter value would be useful.
> + const char *counter;
> const char *pmu;
> const char *unit;
> bool perpkg;
> @@ -67,8 +68,16 @@ struct pmu_metric {
> enum metric_event_groups event_grouping;
> };
>
> +struct pmu_layout {
> + const char *pmu;
> + const char *desc;
> + int size;
> + int fixed_size;
So size is the number of generic counters and fixed size the number of
fixed counters? Perhaps num_counters and num_fixed_counters, comments
would be useful.
> +};
> +
> struct pmu_events_table;
> struct pmu_metrics_table;
> +struct pmu_layouts_table;
>
> typedef int (*pmu_event_iter_fn)(const struct pmu_event *pe,
> const struct pmu_events_table *table,
> @@ -78,15 +87,20 @@ typedef int (*pmu_metric_iter_fn)(const struct pmu_metric *pm,
> const struct pmu_metrics_table *table,
> void *data);
>
> +typedef int (*pmu_layout_iter_fn)(const struct pmu_layout *pm,
> + void *data);
> +
> int pmu_events_table__for_each_event(const struct pmu_events_table *table,
> struct perf_pmu *pmu,
> pmu_event_iter_fn fn,
> void *data);
> int pmu_events_table__find_event(const struct pmu_events_table *table,
> - struct perf_pmu *pmu,
> - const char *name,
> - pmu_event_iter_fn fn,
> - void *data);
> + struct perf_pmu *pmu,
> + const char *name,
> + pmu_event_iter_fn fn,
> + void *data);
nit: I think this is just a whitespace difference and so should be avoided.
> +int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *table, pmu_layout_iter_fn fn,
> + void *data);
Perhaps we should cache the layout in the struct pmu and iterate those.
Thanks,
Ian
> size_t pmu_events_table__num_events(const struct pmu_events_table *table,
> struct perf_pmu *pmu);
>
> @@ -95,10 +109,13 @@ int pmu_metrics_table__for_each_metric(const struct pmu_metrics_table *table, pm
>
> const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu);
> const struct pmu_metrics_table *perf_pmu__find_metrics_table(struct perf_pmu *pmu);
> +const struct pmu_layouts_table *perf_pmu__find_layouts_table(struct perf_pmu *pmu);
> const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid);
> const struct pmu_metrics_table *find_core_metrics_table(const char *arch, const char *cpuid);
> +const struct pmu_layouts_table *find_core_layouts_table(const char *arch, const char *cpuid);
> int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data);
> int pmu_for_each_core_metric(pmu_metric_iter_fn fn, void *data);
> +int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data);
>
> const struct pmu_events_table *find_sys_events_table(const char *name);
> const struct pmu_metrics_table *find_sys_metrics_table(const char *name);
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 04/18] perf pmu-events: Add counter info into JSON files for SapphireRapids
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (3 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 03/18] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 4:53 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 05/18] perf pmu-events: Add event counter data for Cascadelakex weilin.wang
` (13 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
The added new fields are required in the hardware aware grouping method.
Currently, the format of added fields are temporary for experiments.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
.../arch/x86/sapphirerapids/cache.json | 104 ++++
.../arch/x86/sapphirerapids/counter.json | 16 +
.../x86/sapphirerapids/floating-point.json | 25 +
.../arch/x86/sapphirerapids/frontend.json | 59 ++
.../arch/x86/sapphirerapids/memory.json | 44 ++
.../arch/x86/sapphirerapids/other.json | 40 ++
.../arch/x86/sapphirerapids/pipeline.json | 118 ++++
.../arch/x86/sapphirerapids/uncore-cache.json | 514 ++++++++++++++++++
.../arch/x86/sapphirerapids/uncore-cxl.json | 56 ++
.../sapphirerapids/uncore-interconnect.json | 476 ++++++++++++++++
.../arch/x86/sapphirerapids/uncore-io.json | 373 +++++++++++++
.../x86/sapphirerapids/uncore-memory.json | 391 +++++++++++++
.../arch/x86/sapphirerapids/uncore-power.json | 24 +
.../x86/sapphirerapids/virtual-memory.json | 20 +
14 files changed, 2260 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json
index 9606e76b98d6..67d5150f5c0b 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "L1D.HWPF_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "L1D.HWPF_MISS",
"SampleAfterValue": "1000003",
@@ -8,6 +9,7 @@
},
{
"BriefDescription": "Counts the number of cache lines replaced in L1 data cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "L1D.REPLACEMENT",
"PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
@@ -16,6 +18,7 @@
},
{
"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.FB_FULL",
"PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
@@ -24,6 +27,7 @@
},
{
"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x48",
@@ -34,6 +38,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event L1D_PEND_MISS.L2_STALLS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.L2_STALL",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 resources.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.L2_STALLS",
"PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
@@ -50,6 +56,7 @@
},
{
"BriefDescription": "Number of L1D misses that are outstanding",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING",
"PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",
@@ -58,6 +65,7 @@
},
{
"BriefDescription": "Cycles with L1D load Misses outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING_CYCLES",
@@ -67,6 +75,7 @@
},
{
"BriefDescription": "L2 cache lines filling L2",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "L2_LINES_IN.ALL",
"PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
@@ -75,6 +84,7 @@
},
{
"BriefDescription": "L2_LINES_OUT.NON_SILENT",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "L2_LINES_OUT.NON_SILENT",
"SampleAfterValue": "200003",
@@ -82,6 +92,7 @@
},
{
"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered by an L2 cache fill.",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "L2_LINES_OUT.SILENT",
"PublicDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
@@ -90,6 +101,7 @@
},
{
"BriefDescription": "Cache lines that have been L2 hardware prefetched but not used by demand accesses",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "L2_LINES_OUT.USELESS_HWPF",
"PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",
@@ -98,6 +110,7 @@
},
{
"BriefDescription": "All accesses to L2 cache [This event is alias to L2_RQSTS.REFERENCES]",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_REQUEST.ALL",
"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",
@@ -106,6 +119,7 @@
},
{
"BriefDescription": "Read requests with true-miss in L2 cache. [This event is alias to L2_RQSTS.MISS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_REQUEST.MISS",
"PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",
@@ -114,6 +128,7 @@
},
{
"BriefDescription": "L2 code requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_CODE_RD",
"PublicDescription": "Counts the total number of L2 code requests.",
@@ -122,6 +137,7 @@
},
{
"BriefDescription": "Demand Data Read access L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",
"PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",
@@ -130,6 +146,7 @@
},
{
"BriefDescription": "Demand requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_MISS",
"PublicDescription": "Counts demand requests that miss L2 cache.",
@@ -138,6 +155,7 @@
},
{
"BriefDescription": "Demand requests to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",
"PublicDescription": "Counts demand requests to L2 cache.",
@@ -146,6 +164,7 @@
},
{
"BriefDescription": "L2_RQSTS.ALL_HWPF",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_HWPF",
"SampleAfterValue": "200003",
@@ -153,6 +172,7 @@
},
{
"BriefDescription": "RFO requests to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_RFO",
"PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",
@@ -161,6 +181,7 @@
},
{
"BriefDescription": "L2 cache hits when fetching instructions, code reads.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_HIT",
"PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",
@@ -169,6 +190,7 @@
},
{
"BriefDescription": "L2 cache misses when fetching instructions",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_MISS",
"PublicDescription": "Counts L2 cache misses when fetching instructions.",
@@ -177,6 +199,7 @@
},
{
"BriefDescription": "Demand Data Read requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
"PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",
@@ -185,6 +208,7 @@
},
{
"BriefDescription": "Demand Data Read miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",
"PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",
@@ -193,6 +217,7 @@
},
{
"BriefDescription": "L2_RQSTS.HWPF_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.HWPF_MISS",
"SampleAfterValue": "200003",
@@ -200,6 +225,7 @@
},
{
"BriefDescription": "Read requests with true-miss in L2 cache. [This event is alias to L2_REQUEST.MISS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.MISS",
"PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",
@@ -208,6 +234,7 @@
},
{
"BriefDescription": "All accesses to L2 cache [This event is alias to L2_REQUEST.ALL]",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.REFERENCES",
"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",
@@ -216,6 +243,7 @@
},
{
"BriefDescription": "RFO requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_HIT",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
@@ -224,6 +252,7 @@
},
{
"BriefDescription": "RFO requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_MISS",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
@@ -232,6 +261,7 @@
},
{
"BriefDescription": "SW prefetch requests that hit L2 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.SWPF_HIT",
"PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
@@ -240,6 +270,7 @@
},
{
"BriefDescription": "SW prefetch requests that miss L2 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.SWPF_MISS",
"PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
@@ -248,6 +279,7 @@
},
{
"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetches to the L3)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x2e",
"EventName": "LONGEST_LAT_CACHE.MISS",
"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
@@ -256,6 +288,7 @@
},
{
"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetches to the L3)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x2e",
"EventName": "LONGEST_LAT_CACHE.REFERENCE",
"PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
@@ -264,6 +297,7 @@
},
{
"BriefDescription": "Retired load instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ALL_LOADS",
@@ -274,6 +308,7 @@
},
{
"BriefDescription": "Retired store instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ALL_STORES",
@@ -284,6 +319,7 @@
},
{
"BriefDescription": "All retired memory instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ANY",
@@ -294,6 +330,7 @@
},
{
"BriefDescription": "Retired load instructions with locked access.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.LOCK_LOADS",
@@ -304,6 +341,7 @@
},
{
"BriefDescription": "Retired load instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.SPLIT_LOADS",
@@ -314,6 +352,7 @@
},
{
"BriefDescription": "Retired store instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.SPLIT_STORES",
@@ -324,6 +363,7 @@
},
{
"BriefDescription": "Retired load instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
@@ -334,6 +374,7 @@
},
{
"BriefDescription": "Retired store instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",
@@ -344,6 +385,7 @@
},
{
"BriefDescription": "Completed demand load uops that miss the L1 d-cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",
"PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",
@@ -352,6 +394,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were HitM responses from shared L3",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",
@@ -362,6 +405,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",
@@ -372,6 +416,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were hits in L3 without snoops required",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE",
@@ -382,6 +427,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",
@@ -392,6 +438,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources missed L3 but serviced from local dram",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM",
@@ -402,6 +449,7 @@
},
{
"BriefDescription": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
@@ -411,6 +459,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources was forwarded from a remote cache",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD",
@@ -421,6 +470,7 @@
},
{
"BriefDescription": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
@@ -430,6 +480,7 @@
},
{
"BriefDescription": "Retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM",
"PublicDescription": "Counts retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source and the data request missed L3.",
@@ -438,6 +489,7 @@
},
{
"BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd4",
"EventName": "MEM_LOAD_MISC_RETIRED.UC",
@@ -448,6 +500,7 @@
},
{
"BriefDescription": "Number of completed demand load requests that missed the L1, but hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be brought into L1, but data is not yet ready in L1.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.FB_HIT",
@@ -458,6 +511,7 @@
},
{
"BriefDescription": "Retired load instructions with L1 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L1_HIT",
@@ -468,6 +522,7 @@
},
{
"BriefDescription": "Retired load instructions missed L1 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L1_MISS",
@@ -478,6 +533,7 @@
},
{
"BriefDescription": "Retired load instructions with L2 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L2_HIT",
@@ -488,6 +544,7 @@
},
{
"BriefDescription": "Retired load instructions missed L2 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L2_MISS",
@@ -498,6 +555,7 @@
},
{
"BriefDescription": "Retired load instructions with L3 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L3_HIT",
@@ -508,6 +566,7 @@
},
{
"BriefDescription": "Retired load instructions missed L3 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L3_MISS",
@@ -518,6 +577,7 @@
},
{
"BriefDescription": "Retired load instructions with local Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.LOCAL_PMM",
@@ -528,6 +588,7 @@
},
{
"BriefDescription": "MEM_STORE_RETIRED.L2_HIT",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "MEM_STORE_RETIRED.L2_HIT",
"SampleAfterValue": "200003",
@@ -535,6 +596,7 @@
},
{
"BriefDescription": "Retired memory uops for any access",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe5",
"EventName": "MEM_UOP_RETIRED.ANY",
"PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",
@@ -543,6 +605,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -552,6 +615,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -561,6 +625,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -570,6 +635,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -579,6 +645,7 @@
},
{
"BriefDescription": "Counts demand data reads that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -588,6 +655,7 @@
},
{
"BriefDescription": "Counts demand data reads that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -597,6 +665,7 @@
},
{
"BriefDescription": "Counts demand data reads that resulted in a snoop that hit in another core, which did not forward the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -606,6 +675,7 @@
},
{
"BriefDescription": "Counts demand data reads that resulted in a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -615,6 +685,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_CACHE.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -624,6 +695,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_CACHE.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -633,6 +705,7 @@
},
{
"BriefDescription": "Counts demand data reads that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -642,6 +715,7 @@
},
{
"BriefDescription": "Counts demand data reads that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -651,6 +725,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -660,6 +735,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -669,6 +745,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -678,6 +755,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -687,6 +765,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L3.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -696,6 +775,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -705,6 +785,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -714,6 +795,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop that hit in another core, which did not forward the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HIT_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -723,6 +805,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -732,6 +815,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop was sent and data was returned (Modified or Not Modified).",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -741,6 +825,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -750,6 +835,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -759,6 +845,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -768,6 +855,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -777,6 +865,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO), hardware prefetch RFOs (which bring data to L2), and software prefetches for exclusive ownership (PREFETCHW) that hit to a (M)odified cacheline in the L3 or snoop filter.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.RFO_TO_CORE.L3_HIT_M",
"MSRIndex": "0x1a6,0x1a7",
@@ -786,6 +875,7 @@
},
{
"BriefDescription": "Counts streaming stores that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.STREAMING_WR.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -795,6 +885,7 @@
},
{
"BriefDescription": "OFFCORE_REQUESTS.ALL_REQUESTS",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",
"SampleAfterValue": "100003",
@@ -802,6 +893,7 @@
},
{
"BriefDescription": "Demand and prefetch data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "OFFCORE_REQUESTS.DATA_RD",
"PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",
@@ -810,6 +902,7 @@
},
{
"BriefDescription": "Demand Data Read requests sent to uncore",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",
"PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",
@@ -818,6 +911,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",
@@ -826,6 +920,7 @@
},
{
"BriefDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
@@ -834,6 +929,7 @@
},
{
"BriefDescription": "Cycles where at least 1 outstanding demand data read request is pending.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",
@@ -842,6 +938,7 @@
},
{
"BriefDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
@@ -850,6 +947,7 @@
},
{
"BriefDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",
"SampleAfterValue": "1000003",
@@ -857,6 +955,7 @@
},
{
"BriefDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",
"PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending. Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",
@@ -865,6 +964,7 @@
},
{
"BriefDescription": "Counts bus locks, accounts for cache line split locks and UC locks.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "SQ_MISC.BUS_LOCK",
"PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically. Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",
@@ -873,6 +973,7 @@
},
{
"BriefDescription": "Number of PREFETCHNTA instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "SW_PREFETCH_ACCESS.NTA",
"PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",
@@ -881,6 +982,7 @@
},
{
"BriefDescription": "Number of PREFETCHW instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "SW_PREFETCH_ACCESS.PREFETCHW",
"PublicDescription": "Counts the number of PREFETCHW instructions executed.",
@@ -889,6 +991,7 @@
},
{
"BriefDescription": "Number of PREFETCHT0 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "SW_PREFETCH_ACCESS.T0",
"PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",
@@ -897,6 +1000,7 @@
},
{
"BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "SW_PREFETCH_ACCESS.T1_T2",
"PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json
new file mode 100644
index 000000000000..5f8c0b7c8d19
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json
@@ -0,0 +1,16 @@
+[
+ {
+ "Size": "8",
+ "FixedSize": "4"
+ },
+ {
+ "Unit": "UBOX",
+ "Size": "2",
+ "FixedSize": "0"
+ },
+ {
+ "Unit": "IRP",
+ "Size": "2",
+ "FixedSize": "0"
+ }
+]
\ No newline at end of file
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json
index 4a9d211e9d4f..5b144ac504ed 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "ARITH.FPDIV_ACTIVE",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb0",
"EventName": "ARITH.FPDIV_ACTIVE",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Counts all microcode FP assists.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.FP",
"PublicDescription": "Counts all microcode Floating Point assists.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "ASSISTS.SSE_AVX_MIX",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.SSE_AVX_MIX",
"SampleAfterValue": "1000003",
@@ -24,6 +27,7 @@
},
{
"BriefDescription": "FP_ARITH_DISPATCHED.PORT_0",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb3",
"EventName": "FP_ARITH_DISPATCHED.PORT_0",
"SampleAfterValue": "2000003",
@@ -31,6 +35,7 @@
},
{
"BriefDescription": "FP_ARITH_DISPATCHED.PORT_1",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb3",
"EventName": "FP_ARITH_DISPATCHED.PORT_1",
"SampleAfterValue": "2000003",
@@ -38,6 +43,7 @@
},
{
"BriefDescription": "FP_ARITH_DISPATCHED.PORT_5",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb3",
"EventName": "FP_ARITH_DISPATCHED.PORT_5",
"SampleAfterValue": "2000003",
@@ -45,6 +51,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -53,6 +60,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -61,6 +69,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -69,6 +78,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -77,6 +87,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -85,6 +96,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -93,6 +105,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -101,6 +114,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -109,6 +123,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational scalar floating-point instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* scalar, double and single precision floating-point: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR",
"PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -117,6 +132,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -125,6 +141,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
"PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -133,6 +150,7 @@
},
{
"BriefDescription": "Number of any Vector retired FP arithmetic instructions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.VECTOR",
"PublicDescription": "Number of any Vector retired FP arithmetic instructions. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -141,6 +159,7 @@
},
{
"BriefDescription": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",
"SampleAfterValue": "100003",
@@ -148,6 +167,7 @@
},
{
"BriefDescription": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",
"SampleAfterValue": "100003",
@@ -155,6 +175,7 @@
},
{
"BriefDescription": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",
"SampleAfterValue": "100003",
@@ -162,6 +183,7 @@
},
{
"BriefDescription": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",
"SampleAfterValue": "100003",
@@ -169,6 +191,7 @@
},
{
"BriefDescription": "Number of all Scalar Half-Precision FP arithmetic instructions(1) retired - regular and complex.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.SCALAR",
"PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR",
@@ -177,6 +200,7 @@
},
{
"BriefDescription": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",
"SampleAfterValue": "100003",
@@ -184,6 +208,7 @@
},
{
"BriefDescription": "Number of all Vector (also called packed) Half-Precision FP arithmetic instructions(1) retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcf",
"EventName": "FP_ARITH_INST_RETIRED2.VECTOR",
"PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json
index 9e53da55d0c1..b89f07e7cb93 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Clears due to Unknown Branches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "BACLEARS.ANY",
"PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction.",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "DECODE.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Cycles the Microcode Sequencer is busy.",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "DECODE.MS_BUSY",
"SampleAfterValue": "500009",
@@ -24,6 +27,7 @@
},
{
"BriefDescription": "DSB-to-MITE switch true penalty cycles.",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",
"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",
@@ -32,6 +36,7 @@
},
{
"BriefDescription": "Retired Instructions who experienced DSB miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",
"MSRIndex": "0x3F7",
@@ -39,10 +44,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.DSB_MISS",
"MSRIndex": "0x3F7",
@@ -50,10 +57,12 @@
"PEBS": "1",
"PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced iTLB true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.ITLB_MISS",
"MSRIndex": "0x3F7",
@@ -61,10 +70,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L1 Cache true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.L1I_MISS",
"MSRIndex": "0x3F7",
@@ -72,10 +83,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L2 Cache true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.L2_MISS",
"MSRIndex": "0x3F7",
@@ -83,10 +96,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_1",
"MSRIndex": "0x3F7",
@@ -94,10 +109,12 @@
"PEBS": "1",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_128",
"MSRIndex": "0x3F7",
@@ -105,10 +122,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_16",
"MSRIndex": "0x3F7",
@@ -116,10 +135,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2",
"MSRIndex": "0x3F7",
@@ -127,10 +148,12 @@
"PEBS": "1",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_256",
"MSRIndex": "0x3F7",
@@ -138,10 +161,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",
"MSRIndex": "0x3F7",
@@ -149,10 +174,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_32",
"MSRIndex": "0x3F7",
@@ -160,10 +187,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_4",
"MSRIndex": "0x3F7",
@@ -171,10 +200,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_512",
"MSRIndex": "0x3F7",
@@ -182,10 +213,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_64",
"MSRIndex": "0x3F7",
@@ -193,10 +226,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_8",
"MSRIndex": "0x3F7",
@@ -204,20 +239,24 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "FRONTEND_RETIRED.MS_FLOWS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.MS_FLOWS",
"MSRIndex": "0x3F7",
"MSRValue": "0x8",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.STLB_MISS",
"MSRIndex": "0x3F7",
@@ -225,20 +264,24 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "FRONTEND_RETIRED.UNKNOWN_BRANCH",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.UNKNOWN_BRANCH",
"MSRIndex": "0x3F7",
"MSRValue": "0x17",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "ICACHE_DATA.STALLS",
"PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",
@@ -247,6 +290,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_TAG.STALLS",
"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",
@@ -255,6 +299,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_ANY",
@@ -264,6 +309,7 @@
},
{
"BriefDescription": "Cycles DSB is delivering optimal number of Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_OK",
@@ -273,6 +319,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.DSB_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",
@@ -281,6 +328,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES_ANY",
@@ -290,6 +338,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering optimal number of Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES_OK",
@@ -299,6 +348,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MITE_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",
@@ -307,6 +357,7 @@
},
{
"BriefDescription": "Cycles when uops are being delivered to IDQ while MS is busy",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MS_CYCLES_ANY",
@@ -316,6 +367,7 @@
},
{
"BriefDescription": "Number of switches from DSB or MITE to the MS",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x79",
@@ -326,6 +378,7 @@
},
{
"BriefDescription": "Uops delivered to IDQ while MS is busy",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MS_UOPS",
"PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS).",
@@ -334,6 +387,7 @@
},
{
"BriefDescription": "Uops not delivered by IDQ when backend of the machine is not stalled [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x9c",
"EventName": "IDQ_BUBBLES.CORE",
"PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",
@@ -342,6 +396,7 @@
},
{
"BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "6",
"EventCode": "0x9c",
"EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",
@@ -351,6 +406,7 @@
},
{
"BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x9c",
"EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",
@@ -361,6 +417,7 @@
},
{
"BriefDescription": "Uops not delivered by IDQ when backend of the machine is not stalled [This event is alias to IDQ_BUBBLES.CORE]",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",
"PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE]",
@@ -369,6 +426,7 @@
},
{
"BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "6",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",
@@ -378,6 +436,7 @@
},
{
"BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json
index e8bf7c9c44e1..4c1f257bfd0e 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of machine clears due to memory ordering conflicts.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc3",
"EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
"PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "2",
"EventCode": "0x47",
"EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "3",
"EventCode": "0x47",
"EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0x47",
"EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "9",
"EventCode": "0x47",
"EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",
@@ -51,6 +57,7 @@
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
@@ -59,10 +66,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "1009",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
@@ -71,10 +80,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "20011",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
@@ -83,10 +94,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "503",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
@@ -95,10 +108,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
@@ -107,10 +122,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
@@ -119,10 +136,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "101",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
@@ -131,10 +150,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "2003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.",
+ "Counter": "1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
@@ -143,6 +164,7 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "50021",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
@@ -157,6 +179,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -166,6 +189,7 @@
},
{
"BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -175,6 +199,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -184,6 +209,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that missed the local socket's L1, L2, and L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L3.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -193,6 +219,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L3.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -202,6 +229,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -211,6 +239,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -220,6 +249,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that missed the L3 Cache and were supplied by the local socket (DRAM or PMM), whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM or DRAM accesses that are controlled by the close or distant SNC Cluster. It does not count misses to the L3 which go to Local CXL Type 2 Memory or Local Non DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.L3_MISS_LOCAL_SOCKET",
"MSRIndex": "0x1a6,0x1a7",
@@ -229,6 +259,7 @@
},
{
"BriefDescription": "Counts streaming stores that missed the local socket's L1, L2, and L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.STREAMING_WR.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -238,6 +269,7 @@
},
{
"BriefDescription": "Counts streaming stores that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.STREAMING_WR.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -247,6 +279,7 @@
},
{
"BriefDescription": "Counts demand data read requests that miss the L3 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
"SampleAfterValue": "100003",
@@ -254,6 +287,7 @@
},
{
"BriefDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",
"PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache. Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",
@@ -262,6 +296,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED",
"PublicDescription": "Counts the number of times RTM abort was triggered.",
@@ -270,6 +305,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_EVENTS",
"PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).",
@@ -278,6 +314,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_MEM",
"PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",
@@ -286,6 +323,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_MEMTYPE",
"PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",
@@ -294,6 +332,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",
"PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",
@@ -302,6 +341,7 @@
},
{
"BriefDescription": "Number of times an RTM execution successfully committed",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.COMMIT",
"PublicDescription": "Counts the number of times RTM commit succeeded.",
@@ -310,6 +350,7 @@
},
{
"BriefDescription": "Number of times an RTM execution started.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.START",
"PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",
@@ -318,6 +359,7 @@
},
{
"BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY_READ",
"PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",
@@ -326,6 +368,7 @@
},
{
"BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional writes.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY_WRITE",
"PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",
@@ -334,6 +377,7 @@
},
{
"BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CONFLICT",
"PublicDescription": "Counts the number of times a TSX line had a cache conflict.",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json
index 442ef3807a9d..5a5ead85b902 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "ASSISTS.PAGE_FAULT",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.PAGE_FAULT",
"SampleAfterValue": "1000003",
@@ -8,6 +9,7 @@
},
{
"BriefDescription": "Counts the cycles where the AMX (Advance Matrix Extension) unit is busy performing an operation.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb7",
"EventName": "EXE.AMX_BUSY",
"SampleAfterValue": "2000003",
@@ -15,6 +17,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -24,6 +27,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_CODE_RD.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -51,6 +57,7 @@
},
{
"BriefDescription": "Counts demand data reads that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -60,6 +67,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -69,6 +77,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -78,6 +87,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM accesses that are controlled by the close or distant SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.LOCAL_SOCKET_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -87,6 +97,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -96,6 +107,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -105,6 +117,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -114,6 +127,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_DATA_RD.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -123,6 +137,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -132,6 +147,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -141,6 +157,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -150,6 +167,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.DEMAND_RFO.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -159,6 +177,7 @@
},
{
"BriefDescription": "Counts data load hardware prefetch requests to the L1 data cache that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L1D.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -168,6 +187,7 @@
},
{
"BriefDescription": "Counts hardware prefetches (which bring data to L2) that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L2.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -177,6 +197,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L3.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -186,6 +207,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline was homed in a remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.HWPF_L3.REMOTE",
"MSRIndex": "0x1a6,0x1a7",
@@ -195,6 +217,7 @@
},
{
"BriefDescription": "Counts writebacks of modified cachelines and streaming stores that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.MODIFIED_WRITE.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -204,6 +227,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -213,6 +237,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -222,6 +247,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -231,6 +257,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts DRAM accesses that are controlled by the close or distant SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -240,6 +267,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM accesses that are controlled by the close or distant SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -249,6 +277,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by a remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE",
"MSRIndex": "0x1a6,0x1a7",
@@ -258,6 +287,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -267,6 +297,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM or PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE_MEMORY",
"MSRIndex": "0x1a6,0x1a7",
@@ -276,6 +307,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.REMOTE_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -285,6 +317,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.READS_TO_CORE.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -294,6 +327,7 @@
},
{
"BriefDescription": "Counts streaming stores that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -303,6 +337,7 @@
},
{
"BriefDescription": "Counts Demand RFOs, ItoM's, PREFECTHW's, Hardware RFO Prefetches to the L1/L2 and Streaming stores that likely resulted in a store to Memory (DRAM or PMM)",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A,0x2B",
"EventName": "OCR.WRITE_ESTIMATE.MEMORY",
"MSRIndex": "0x1a6,0x1a7",
@@ -312,6 +347,7 @@
},
{
"BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa5",
"EventName": "RS.EMPTY",
"PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",
@@ -320,6 +356,7 @@
},
{
"BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xa5",
@@ -331,6 +368,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event RS.EMPTY_COUNT",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"Deprecated": "1",
"EdgeDetect": "1",
@@ -342,6 +380,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event RS.EMPTY",
+ "Counter": "0,1,2,3,4,5,6,7",
"Deprecated": "1",
"EventCode": "0xa5",
"EventName": "RS_EMPTY.CYCLES",
@@ -350,6 +389,7 @@
},
{
"BriefDescription": "Cycles the uncore cannot take further requests",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x2d",
"EventName": "XQ.FULL_CYCLES",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
index 6dcf3b763af4..d52c264fa50d 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "AMX retired arithmetic BF16 operations.",
+ "Counter": "0",
"EventCode": "0xce",
"EventName": "AMX_OPS_RETIRED.BF16",
"PublicDescription": "Number of AMX-based retired arithmetic bfloat16 (BF16) floating-point operations. Counts TDPBF16PS FP instructions. SW to use operation multiplier of 4",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "AMX retired arithmetic integer 8-bit operations.",
+ "Counter": "0",
"EventCode": "0xce",
"EventName": "AMX_OPS_RETIRED.INT8",
"PublicDescription": "Number of AMX-based retired arithmetic integer operations of 8-bit width source operands. Counts TDPB[SS,UU,US,SU]D instructions. SW should use operation multiplier of 8.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event ARITH.DIV_ACTIVE",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"Deprecated": "1",
"EventCode": "0xb0",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Cycles when divide unit is busy executing divide or square root operations.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb0",
"EventName": "ARITH.DIV_ACTIVE",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event ARITH.FPDIV_ACTIVE",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"Deprecated": "1",
"EventCode": "0xb0",
@@ -44,6 +49,7 @@
},
{
"BriefDescription": "This event counts the cycles the integer divider is busy.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb0",
"EventName": "ARITH.IDIV_ACTIVE",
@@ -52,6 +58,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event ARITH.IDIV_ACTIVE",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"Deprecated": "1",
"EventCode": "0xb0",
@@ -61,6 +68,7 @@
},
{
"BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.ANY",
"PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",
@@ -69,6 +77,7 @@
},
{
"BriefDescription": "All branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.ALL_BRANCHES",
"PEBS": "1",
@@ -77,6 +86,7 @@
},
{
"BriefDescription": "Conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND",
"PEBS": "1",
@@ -86,6 +96,7 @@
},
{
"BriefDescription": "Not taken branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_NTAKEN",
"PEBS": "1",
@@ -95,6 +106,7 @@
},
{
"BriefDescription": "Taken conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_TAKEN",
"PEBS": "1",
@@ -104,6 +116,7 @@
},
{
"BriefDescription": "Far branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.FAR_BRANCH",
"PEBS": "1",
@@ -113,6 +126,7 @@
},
{
"BriefDescription": "Indirect near branch instructions retired (excluding returns)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.INDIRECT",
"PEBS": "1",
@@ -122,6 +136,7 @@
},
{
"BriefDescription": "Direct and indirect near call instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_CALL",
"PEBS": "1",
@@ -131,6 +146,7 @@
},
{
"BriefDescription": "Return instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_RETURN",
"PEBS": "1",
@@ -140,6 +156,7 @@
},
{
"BriefDescription": "Taken branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -149,6 +166,7 @@
},
{
"BriefDescription": "All mispredicted branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.ALL_BRANCHES",
"PEBS": "1",
@@ -157,6 +175,7 @@
},
{
"BriefDescription": "Mispredicted conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND",
"PEBS": "1",
@@ -166,6 +185,7 @@
},
{
"BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND_NTAKEN",
"PEBS": "1",
@@ -175,6 +195,7 @@
},
{
"BriefDescription": "number of branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND_TAKEN",
"PEBS": "1",
@@ -184,6 +205,7 @@
},
{
"BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.INDIRECT",
"PEBS": "1",
@@ -193,6 +215,7 @@
},
{
"BriefDescription": "Mispredicted indirect CALL retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.INDIRECT_CALL",
"PEBS": "1",
@@ -202,6 +225,7 @@
},
{
"BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -211,6 +235,7 @@
},
{
"BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.RET",
"PEBS": "1",
@@ -220,6 +245,7 @@
},
{
"BriefDescription": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.C01",
"PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state. This state can be entered via the TPAUSE or UMWAIT instructions.",
@@ -228,6 +254,7 @@
},
{
"BriefDescription": "Core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.C02",
"PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state. This state can be entered via the TPAUSE or UMWAIT instructions.",
@@ -236,6 +263,7 @@
},
{
"BriefDescription": "Core clocks when the thread is in the C0.1 or C0.2 or running a PAUSE in C0 ACPI state.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.C0_WAIT",
"PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",
@@ -244,6 +272,7 @@
},
{
"BriefDescription": "Cycle counts are evenly distributed between active threads in the Core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",
"PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
@@ -252,6 +281,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when this thread is unhalted and the other thread is halted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",
"PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",
@@ -260,6 +290,7 @@
},
{
"BriefDescription": "CPU_CLK_UNHALTED.PAUSE",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.PAUSE",
"SampleAfterValue": "2000003",
@@ -267,6 +298,7 @@
},
{
"BriefDescription": "CPU_CLK_UNHALTED.PAUSE_INST",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xec",
@@ -276,6 +308,7 @@
},
{
"BriefDescription": "Core crystal clock cycles. Cycle counts are evenly distributed between active threads in the Core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",
"PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
@@ -284,6 +317,7 @@
},
{
"BriefDescription": "Reference cycles when the core is not in halt state.",
+ "Counter": "Fixed counter 2",
"EventName": "CPU_CLK_UNHALTED.REF_TSC",
"PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
"SampleAfterValue": "2000003",
@@ -291,6 +325,7 @@
},
{
"BriefDescription": "Reference cycles when the core is not in halt state.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.REF_TSC_P",
"PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
@@ -299,6 +334,7 @@
},
{
"BriefDescription": "Core cycles when the thread is not in halt state",
+ "Counter": "Fixed counter 1",
"EventName": "CPU_CLK_UNHALTED.THREAD",
"PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.",
"SampleAfterValue": "2000003",
@@ -306,6 +342,7 @@
},
{
"BriefDescription": "Thread cycles when thread is not in halt state",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.THREAD_P",
"PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",
@@ -313,6 +350,7 @@
},
{
"BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "8",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",
@@ -321,6 +359,7 @@
},
{
"BriefDescription": "Cycles while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",
@@ -329,6 +368,7 @@
},
{
"BriefDescription": "Cycles while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "16",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",
@@ -337,6 +377,7 @@
},
{
"BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "12",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",
@@ -345,6 +386,7 @@
},
{
"BriefDescription": "Execution stalls while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",
@@ -353,6 +395,7 @@
},
{
"BriefDescription": "Total execution stalls.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",
@@ -361,6 +404,7 @@
},
{
"BriefDescription": "Cycles total of 1 uop is executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.1_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",
@@ -369,6 +413,7 @@
},
{
"BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.2_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",
@@ -377,6 +422,7 @@
},
{
"BriefDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.3_PORTS_UTIL",
"PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -385,6 +431,7 @@
},
{
"BriefDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.4_PORTS_UTIL",
"PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -393,6 +440,7 @@
},
{
"BriefDescription": "Execution stalls while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "5",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",
@@ -401,6 +449,7 @@
},
{
"BriefDescription": "Cycles where the Store Buffer was full and no loads caused an execution stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.BOUND_ON_STORES",
@@ -410,6 +459,7 @@
},
{
"BriefDescription": "Cycles no uop executed while RS was not empty, the SB was not full and there was no outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",
"PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",
@@ -418,6 +468,7 @@
},
{
"BriefDescription": "Instruction decoders utilized in a cycle",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "INST_DECODED.DECODERS",
"PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
@@ -426,6 +477,7 @@
},
{
"BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.ANY",
"PEBS": "1",
"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter.",
@@ -434,6 +486,7 @@
},
{
"BriefDescription": "Number of instructions retired. General Counter - architectural event",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.ANY_P",
"PEBS": "1",
@@ -442,6 +495,7 @@
},
{
"BriefDescription": "INST_RETIRED.MACRO_FUSED",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.MACRO_FUSED",
"SampleAfterValue": "2000003",
@@ -449,6 +503,7 @@
},
{
"BriefDescription": "Retired NOP instructions.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.NOP",
"PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions",
@@ -457,6 +512,7 @@
},
{
"BriefDescription": "Precise instruction retired with PEBS precise-distribution",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.PREC_DIST",
"PEBS": "1",
"PublicDescription": "A version of INST_RETIRED that allows for a precise distribution of samples across instructions retired. It utilizes the Precise Distribution of Instructions Retired (PDIR++) feature to fix bias in how retired instructions get sampled. Use on Fixed Counter 0.",
@@ -465,6 +521,7 @@
},
{
"BriefDescription": "Iterations of Repeat string retired instructions.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.REP_ITERATION",
"PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",
@@ -473,6 +530,7 @@
},
{
"BriefDescription": "Clears speculative count",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xad",
@@ -483,6 +541,7 @@
},
{
"BriefDescription": "Counts cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xad",
"EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",
"PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
@@ -491,6 +550,7 @@
},
{
"BriefDescription": "INT_MISC.MBA_STALLS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xad",
"EventName": "INT_MISC.MBA_STALLS",
"SampleAfterValue": "1000003",
@@ -498,6 +558,7 @@
},
{
"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for this thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xad",
"EventName": "INT_MISC.RECOVERY_CYCLES",
"PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",
@@ -506,15 +567,18 @@
},
{
"BriefDescription": "INT_MISC.UNKNOWN_BRANCH_CYCLES",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xad",
"EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",
"MSRIndex": "0x3F7",
"MSRValue": "0x7",
"SampleAfterValue": "1000003",
+ "TakenAlone": "1",
"UMask": "0x40"
},
{
"BriefDescription": "TMA slots where uops got dropped",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xad",
"EventName": "INT_MISC.UOP_DROPPING",
"PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",
@@ -523,6 +587,7 @@
},
{
"BriefDescription": "INT_VEC_RETIRED.128BIT",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.128BIT",
"SampleAfterValue": "1000003",
@@ -530,6 +595,7 @@
},
{
"BriefDescription": "INT_VEC_RETIRED.256BIT",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.256BIT",
"SampleAfterValue": "1000003",
@@ -537,6 +603,7 @@
},
{
"BriefDescription": "integer ADD, SUB, SAD 128-bit vector instructions.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.ADD_128",
"PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",
@@ -545,6 +612,7 @@
},
{
"BriefDescription": "integer ADD, SUB, SAD 256-bit vector instructions.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.ADD_256",
"PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",
@@ -553,6 +621,7 @@
},
{
"BriefDescription": "INT_VEC_RETIRED.MUL_256",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.MUL_256",
"SampleAfterValue": "1000003",
@@ -560,6 +629,7 @@
},
{
"BriefDescription": "INT_VEC_RETIRED.SHUFFLES",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.SHUFFLES",
"SampleAfterValue": "1000003",
@@ -567,6 +637,7 @@
},
{
"BriefDescription": "INT_VEC_RETIRED.VNNI_128",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.VNNI_128",
"SampleAfterValue": "1000003",
@@ -574,6 +645,7 @@
},
{
"BriefDescription": "INT_VEC_RETIRED.VNNI_256",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe7",
"EventName": "INT_VEC_RETIRED.VNNI_256",
"SampleAfterValue": "1000003",
@@ -581,6 +653,7 @@
},
{
"BriefDescription": "False dependencies in MOB due to partial compare on address.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.ADDRESS_ALIAS",
"PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",
@@ -589,6 +662,7 @@
},
{
"BriefDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.NO_SR",
"PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
@@ -597,6 +671,7 @@
},
{
"BriefDescription": "Loads blocked due to overlapping with a preceding store that cannot be forwarded.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.STORE_FORWARD",
"PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",
@@ -605,6 +680,7 @@
},
{
"BriefDescription": "Counts the number of demand load dispatches that hit L1D fill buffer (FB) allocated for software prefetch.",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "LOAD_HIT_PREFETCH.SWPF",
"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
@@ -613,6 +689,7 @@
},
{
"BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xa8",
"EventName": "LSD.CYCLES_ACTIVE",
@@ -622,6 +699,7 @@
},
{
"BriefDescription": "Cycles optimal number of Uops delivered by the LSD, but did not come from the decoder.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "6",
"EventCode": "0xa8",
"EventName": "LSD.CYCLES_OK",
@@ -631,6 +709,7 @@
},
{
"BriefDescription": "Number of Uops delivered by the LSD.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa8",
"EventName": "LSD.UOPS",
"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
@@ -639,6 +718,7 @@
},
{
"BriefDescription": "Number of machine clears (nukes) of any type.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xc3",
@@ -649,6 +729,7 @@
},
{
"BriefDescription": "Self-modifying code (SMC) detected.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc3",
"EventName": "MACHINE_CLEARS.SMC",
"PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
@@ -657,6 +738,7 @@
},
{
"BriefDescription": "LFENCE instructions retired",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xe0",
"EventName": "MISC2_RETIRED.LFENCE",
"PublicDescription": "number of LFENCE retired instructions",
@@ -665,6 +747,7 @@
},
{
"BriefDescription": "Increments whenever there is an update to the LBR array.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcc",
"EventName": "MISC_RETIRED.LBR_INSERTS",
"PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",
@@ -673,6 +756,7 @@
},
{
"BriefDescription": "Cycles stalled due to no store buffers available. (not including draining form sync).",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.SB",
"PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",
@@ -681,6 +765,7 @@
},
{
"BriefDescription": "Counts cycles where the pipeline is stalled due to serializing operations.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.SCOREBOARD",
"SampleAfterValue": "100003",
@@ -688,6 +773,7 @@
},
{
"BriefDescription": "TMA slots where no uops were being issued due to lack of back-end resources.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",
"PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",
@@ -712,6 +798,7 @@
},
{
"BriefDescription": "TOPDOWN.MEMORY_BOUND_SLOTS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",
"SampleAfterValue": "10000003",
@@ -719,6 +806,7 @@
},
{
"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",
+ "Counter": "Fixed counter 3",
"EventName": "TOPDOWN.SLOTS",
"PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3).",
"SampleAfterValue": "10000003",
@@ -726,6 +814,7 @@
},
{
"BriefDescription": "TMA slots available for an unhalted logical processor. General counter - architectural event",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.SLOTS_P",
"PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",
@@ -734,6 +823,7 @@
},
{
"BriefDescription": "UOPS_DECODED.DEC0_UOPS",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UOPS_DECODED.DEC0_UOPS",
"SampleAfterValue": "1000003",
@@ -741,6 +831,7 @@
},
{
"BriefDescription": "Uops executed on port 0",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_0",
"PublicDescription": "Number of uops dispatch to execution port 0.",
@@ -749,6 +840,7 @@
},
{
"BriefDescription": "Uops executed on port 1",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_1",
"PublicDescription": "Number of uops dispatch to execution port 1.",
@@ -757,6 +849,7 @@
},
{
"BriefDescription": "Uops executed on ports 2, 3 and 10",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_2_3_10",
"PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",
@@ -765,6 +858,7 @@
},
{
"BriefDescription": "Uops executed on ports 4 and 9",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_4_9",
"PublicDescription": "Number of uops dispatch to execution ports 4 and 9",
@@ -773,6 +867,7 @@
},
{
"BriefDescription": "Uops executed on ports 5 and 11",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_5_11",
"PublicDescription": "Number of uops dispatch to execution ports 5 and 11",
@@ -781,6 +876,7 @@
},
{
"BriefDescription": "Uops executed on port 6",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_6",
"PublicDescription": "Number of uops dispatch to execution port 6.",
@@ -789,6 +885,7 @@
},
{
"BriefDescription": "Uops executed on ports 7 and 8",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb2",
"EventName": "UOPS_DISPATCHED.PORT_7_8",
"PublicDescription": "Number of uops dispatch to execution ports 7 and 8.",
@@ -797,6 +894,7 @@
},
{
"BriefDescription": "Number of uops executed on the core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE",
"PublicDescription": "Counts the number of uops executed from any thread.",
@@ -805,6 +903,7 @@
},
{
"BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",
@@ -814,6 +913,7 @@
},
{
"BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",
@@ -823,6 +923,7 @@
},
{
"BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "3",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",
@@ -832,6 +933,7 @@
},
{
"BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",
@@ -841,6 +943,7 @@
},
{
"BriefDescription": "Cycles where at least 1 uop was executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_1",
@@ -850,6 +953,7 @@
},
{
"BriefDescription": "Cycles where at least 2 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_2",
@@ -859,6 +963,7 @@
},
{
"BriefDescription": "Cycles where at least 3 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "3",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_3",
@@ -868,6 +973,7 @@
},
{
"BriefDescription": "Cycles where at least 4 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_4",
@@ -877,6 +983,7 @@
},
{
"BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.STALLS",
@@ -887,6 +994,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UOPS_EXECUTED.STALLS",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"Deprecated": "1",
"EventCode": "0xb1",
@@ -897,6 +1005,7 @@
},
{
"BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.THREAD",
"SampleAfterValue": "2000003",
@@ -904,6 +1013,7 @@
},
{
"BriefDescription": "Counts the number of x87 uops dispatched.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.X87",
"PublicDescription": "Counts the number of x87 uops executed.",
@@ -912,6 +1022,7 @@
},
{
"BriefDescription": "Uops that RAT issues to RS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xae",
"EventName": "UOPS_ISSUED.ANY",
"PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",
@@ -920,6 +1031,7 @@
},
{
"BriefDescription": "Cycles with retired uop(s).",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.CYCLES",
@@ -929,6 +1041,7 @@
},
{
"BriefDescription": "Retired uops except the last uop of each instruction.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.HEAVY",
"PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",
@@ -937,15 +1050,18 @@
},
{
"BriefDescription": "UOPS_RETIRED.MS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.MS",
"MSRIndex": "0x3F7",
"MSRValue": "0x8",
"SampleAfterValue": "2000003",
+ "TakenAlone": "1",
"UMask": "0x4"
},
{
"BriefDescription": "Retirement slots used.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.SLOTS",
"PublicDescription": "Counts the retirement slots used each cycle.",
@@ -954,6 +1070,7 @@
},
{
"BriefDescription": "Cycles without actually retired uops.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.STALLS",
@@ -964,6 +1081,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UOPS_RETIRED.STALLS",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"Deprecated": "1",
"EventCode": "0xc2",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
index cf6fa70f37c1..fc3ecfc0e5a7 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE",
"PerPkg": "1",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass : Not Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN",
"PerPkg": "1",
@@ -19,6 +21,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass : Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN",
"PerPkg": "1",
@@ -28,6 +31,7 @@
},
{
"BriefDescription": "CHA Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_CHA_CLOCKTICKS",
"PerPkg": "1",
@@ -36,6 +40,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_CHA_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -43,6 +48,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Any Cycle with Multiple Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_GTONE",
"PerPkg": "1",
@@ -52,6 +58,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Any Single Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_ONE",
"PerPkg": "1",
@@ -61,6 +68,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple Core Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_GTONE",
"PerPkg": "1",
@@ -70,6 +78,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single Core Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_ONE",
"PerPkg": "1",
@@ -79,6 +88,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE",
"PerPkg": "1",
@@ -88,6 +98,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_ONE",
"PerPkg": "1",
@@ -97,6 +108,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple External Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_GTONE",
"PerPkg": "1",
@@ -106,6 +118,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single External Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_ONE",
"PerPkg": "1",
@@ -115,6 +128,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple Snoop Targets from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE",
"PerPkg": "1",
@@ -124,6 +138,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single Snoop Target from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.REMOTE_ONE",
"PerPkg": "1",
@@ -133,6 +148,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6e",
"EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD",
"PerPkg": "1",
@@ -141,6 +157,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6e",
"EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C",
"PerPkg": "1",
@@ -149,6 +166,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6e",
"EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC",
"PerPkg": "1",
@@ -157,6 +175,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP",
"PerPkg": "1",
@@ -165,6 +184,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO",
"PerPkg": "1",
@@ -173,6 +193,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL",
"PerPkg": "1",
@@ -181,6 +202,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.GO",
"PerPkg": "1",
@@ -189,6 +211,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL",
"PerPkg": "1",
@@ -197,6 +220,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS",
"PerPkg": "1",
@@ -205,6 +229,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.NOP",
"PerPkg": "1",
@@ -213,6 +238,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_CHA_DIRECT_GO_OPC.PULL",
"PerPkg": "1",
@@ -221,6 +247,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP",
"PerPkg": "1",
@@ -230,6 +257,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_CHA_DIR_LOOKUP.SNP",
"PerPkg": "1",
@@ -239,6 +267,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_CHA_DIR_UPDATE.HA",
"PerPkg": "1",
@@ -248,6 +277,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_CHA_DIR_UPDATE.TOR",
"PerPkg": "1",
@@ -257,6 +287,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -266,6 +297,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -275,6 +307,7 @@
},
{
"BriefDescription": "Read request from a remote socket which hit in the HitMe Cache to a line In the E state",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_CHA_HITME_HIT.EX_RDS",
"PerPkg": "1",
@@ -284,6 +317,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache : Shared hit and op is RdInvOwn, RdInv, Inv*",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ",
"PerPkg": "1",
@@ -292,6 +326,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache : op is WbMtoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_CHA_HITME_HIT.WBMTOE",
"PerPkg": "1",
@@ -300,6 +335,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache : op is WbMtoI, WbPushMtoI, WbFlush, or WbMtoS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S",
"PerPkg": "1",
@@ -308,6 +344,7 @@
},
{
"BriefDescription": "Counts Number of times HitMe Cache is accessed : op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*",
+ "Counter": "0,1,2,3",
"EventCode": "0x5e",
"EventName": "UNC_CHA_HITME_LOOKUP.READ",
"PerPkg": "1",
@@ -316,6 +353,7 @@
},
{
"BriefDescription": "Counts Number of times HitMe Cache is accessed : op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5e",
"EventName": "UNC_CHA_HITME_LOOKUP.WRITE",
"PerPkg": "1",
@@ -324,6 +362,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache : No SF/LLC HitS/F and op is RdInvOwn",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN",
"PerPkg": "1",
@@ -332,6 +371,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache : op is RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.READ_OR_INV",
"PerPkg": "1",
@@ -340,6 +380,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache : SF/LLC HitS/F and op is RdInvOwn",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN",
"PerPkg": "1",
@@ -348,6 +389,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Deallocate HitME$ on Reads without RspFwdI*",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE",
"PerPkg": "1",
@@ -356,6 +398,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : op is RspIFwd or RspIFwdWb for a local request",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC",
"PerPkg": "1",
@@ -365,6 +408,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Update HitMe Cache on RdInvOwn even if not RspFwdI*",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN",
"PerPkg": "1",
@@ -373,6 +417,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : op is RspIFwd or RspIFwdWb for a remote request",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM",
"PerPkg": "1",
@@ -382,6 +427,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Update HitMe Cache to SHARed",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.SHARED",
"PerPkg": "1",
@@ -390,6 +436,7 @@
},
{
"BriefDescription": "Normal priority reads issued to the memory controller from the CHA",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL",
"PerPkg": "1",
@@ -399,6 +446,7 @@
},
{
"BriefDescription": "HA to iMC Reads Issued : ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY",
"PerPkg": "1",
@@ -408,6 +456,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x5b",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL",
"PerPkg": "1",
@@ -417,6 +466,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Full Line",
+ "Counter": "0,1,2,3",
"EventCode": "0x5b",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY",
"PerPkg": "1",
@@ -426,6 +476,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : Partial Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x5b",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL",
"PerPkg": "1",
@@ -435,6 +486,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Partial",
+ "Counter": "0,1,2,3",
"EventCode": "0x5b",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY",
"PerPkg": "1",
@@ -444,6 +496,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Any Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ALL",
"PerPkg": "1",
@@ -453,6 +506,7 @@
},
{
"BriefDescription": "Cache Lookups : All transactions from Remote Agents",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ALL_REMOTE",
"PerPkg": "1",
@@ -462,6 +516,7 @@
},
{
"BriefDescription": "Cache Lookups : All Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ANY_F",
"PerPkg": "1",
@@ -470,6 +525,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE",
"PerPkg": "1",
@@ -479,6 +535,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F",
"PerPkg": "1",
@@ -487,6 +544,7 @@
},
{
"BriefDescription": "Cache Lookups : Local non-prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F",
"PerPkg": "1",
@@ -495,6 +553,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD",
"PerPkg": "1",
@@ -504,6 +563,7 @@
},
{
"BriefDescription": "Cache Lookups : Data Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL",
"PerPkg": "1",
@@ -513,6 +573,7 @@
},
{
"BriefDescription": "Cache Lookups : Data Read Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F",
"PerPkg": "1",
@@ -521,6 +582,7 @@
},
{
"BriefDescription": "Cache Lookups : Demand Data Reads, Core and LLC prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL",
"PerPkg": "1",
@@ -530,6 +592,7 @@
},
{
"BriefDescription": "Cache Lookups : Data Read Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS",
"PerPkg": "1",
@@ -539,6 +602,7 @@
},
{
"BriefDescription": "Cache Lookups : E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.E",
"PerPkg": "1",
@@ -548,6 +612,7 @@
},
{
"BriefDescription": "Cache Lookups : F State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.F",
"PerPkg": "1",
@@ -557,6 +622,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV",
"PerPkg": "1",
@@ -566,6 +632,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F",
"PerPkg": "1",
@@ -574,6 +641,7 @@
},
{
"BriefDescription": "Cache Lookups : I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.I",
"PerPkg": "1",
@@ -583,6 +651,7 @@
},
{
"BriefDescription": "Cache Lookups : Local LLC prefetch requests (from LLC)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL_F",
"PerPkg": "1",
@@ -591,6 +660,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCALLY_HOMED_ADDRESS",
"PerPkg": "1",
@@ -600,6 +670,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_CODE",
"PerPkg": "1",
@@ -609,6 +680,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DATA_RD",
"PerPkg": "1",
@@ -618,6 +690,7 @@
},
{
"BriefDescription": "Cache Lookups : Demand CRd Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_CODE",
"PerPkg": "1",
@@ -627,6 +700,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Demand Data Reads that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_DATA_RD",
"PerPkg": "1",
@@ -636,6 +710,7 @@
},
{
"BriefDescription": "Cache Lookups : Demand RFO Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_RFO",
"PerPkg": "1",
@@ -645,6 +720,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F",
"PerPkg": "1",
@@ -653,6 +729,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_FLUSH_INV",
"PerPkg": "1",
@@ -662,6 +739,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Prefetch requests to the LLC that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_LLC_PF",
"PerPkg": "1",
@@ -671,6 +749,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Prefetches that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF",
"PerPkg": "1",
@@ -680,6 +759,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Prefetches that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_CODE",
"PerPkg": "1",
@@ -689,6 +769,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Prefetches that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_DATA_RD",
"PerPkg": "1",
@@ -698,6 +779,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Prefetches that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_RFO",
"PerPkg": "1",
@@ -707,6 +789,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_RFO",
"PerPkg": "1",
@@ -716,6 +799,7 @@
},
{
"BriefDescription": "Cache Lookups : M State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.M",
"PerPkg": "1",
@@ -725,6 +809,7 @@
},
{
"BriefDescription": "Cache Lookups : All Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL",
"PerPkg": "1",
@@ -734,6 +819,7 @@
},
{
"BriefDescription": "Cache Lookups : Write Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F",
"PerPkg": "1",
@@ -742,6 +828,7 @@
},
{
"BriefDescription": "Cache Lookups : Remote non-snoop requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.PREF_OR_DMND_REMOTE_F",
"PerPkg": "1",
@@ -750,6 +837,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTELY_HOMED_ADDRESS",
"PerPkg": "1",
@@ -759,6 +847,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Requests that come from a Remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_CODE",
"PerPkg": "1",
@@ -768,6 +857,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Requests that come from a Remote socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_DATA_RD",
"PerPkg": "1",
@@ -777,6 +867,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_F",
"PerPkg": "1",
@@ -785,6 +876,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate requests that come from a Remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_FLUSH_INV",
"PerPkg": "1",
@@ -794,6 +886,7 @@
},
{
"BriefDescription": "Cache Lookups : Filters Requests for those that write info into the cache that come from a remote socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_OTHER",
"PerPkg": "1",
@@ -803,6 +896,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Requests that come from a Remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_RFO",
"PerPkg": "1",
@@ -812,6 +906,7 @@
},
{
"BriefDescription": "Cache Lookups : Remote snoop requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP_F",
"PerPkg": "1",
@@ -820,6 +915,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Snoop Requests from a Remote Socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP",
"PerPkg": "1",
@@ -829,6 +925,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO",
"PerPkg": "1",
@@ -838,6 +935,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_F",
"PerPkg": "1",
@@ -846,6 +944,7 @@
},
{
"BriefDescription": "Cache Lookups : Locally HOMed RFOs - Demand and Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_LOCAL",
"PerPkg": "1",
@@ -855,6 +954,7 @@
},
{
"BriefDescription": "Cache Lookups : S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.S",
"PerPkg": "1",
@@ -864,6 +964,7 @@
},
{
"BriefDescription": "Cache Lookups : SnoopFilter - E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.SF_E",
"PerPkg": "1",
@@ -873,6 +974,7 @@
},
{
"BriefDescription": "Cache Lookups : SnoopFilter - H State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.SF_H",
"PerPkg": "1",
@@ -882,6 +984,7 @@
},
{
"BriefDescription": "Cache Lookups : SnoopFilter - S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.SF_S",
"PerPkg": "1",
@@ -891,6 +994,7 @@
},
{
"BriefDescription": "Cache Lookups : Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL",
"PerPkg": "1",
@@ -900,6 +1004,7 @@
},
{
"BriefDescription": "Cache Lookups : Remote Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.WRITE_REMOTE",
"PerPkg": "1",
@@ -909,6 +1014,7 @@
},
{
"BriefDescription": "Lines Victimized : Lines in E state",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.E_STATE",
"PerPkg": "1",
@@ -918,6 +1024,7 @@
},
{
"BriefDescription": "Lines Victimized : IA traffic",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.IA",
"PerPkg": "1",
@@ -927,6 +1034,7 @@
},
{
"BriefDescription": "Lines Victimized : IO traffic",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.IO",
"PerPkg": "1",
@@ -936,6 +1044,7 @@
},
{
"BriefDescription": "All LLC lines in E state that are victimized on a fill from an IO device",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.IO_E",
"PerPkg": "1",
@@ -945,6 +1054,7 @@
},
{
"BriefDescription": "All LLC lines in F or S state that are victimized on a fill from an IO device",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.IO_FS",
"PerPkg": "1",
@@ -954,6 +1064,7 @@
},
{
"BriefDescription": "All LLC lines in M state that are victimized on a fill from an IO device",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.IO_M",
"PerPkg": "1",
@@ -963,6 +1074,7 @@
},
{
"BriefDescription": "All LLC lines in any state that are victimized on a fill from an IO device",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.IO_MESF",
"PerPkg": "1",
@@ -972,6 +1084,7 @@
},
{
"BriefDescription": "Lines Victimized; Local - All Lines",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL",
"PerPkg": "1",
@@ -981,6 +1094,7 @@
},
{
"BriefDescription": "Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E",
"PerPkg": "1",
@@ -990,6 +1104,7 @@
},
{
"BriefDescription": "Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M",
"PerPkg": "1",
@@ -999,6 +1114,7 @@
},
{
"BriefDescription": "Lines Victimized : Local Only",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY",
"PerPkg": "1",
@@ -1007,6 +1123,7 @@
},
{
"BriefDescription": "Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S",
"PerPkg": "1",
@@ -1016,6 +1133,7 @@
},
{
"BriefDescription": "Lines Victimized : Lines in M state",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.M_STATE",
"PerPkg": "1",
@@ -1025,6 +1143,7 @@
},
{
"BriefDescription": "Lines Victimized; Remote - All Lines",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL",
"PerPkg": "1",
@@ -1034,6 +1153,7 @@
},
{
"BriefDescription": "Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E",
"PerPkg": "1",
@@ -1043,6 +1163,7 @@
},
{
"BriefDescription": "Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M",
"PerPkg": "1",
@@ -1052,6 +1173,7 @@
},
{
"BriefDescription": "Lines Victimized : Remote Only",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ONLY",
"PerPkg": "1",
@@ -1060,6 +1182,7 @@
},
{
"BriefDescription": "Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S",
"PerPkg": "1",
@@ -1069,6 +1192,7 @@
},
{
"BriefDescription": "Lines Victimized : Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.S_STATE",
"PerPkg": "1",
@@ -1078,6 +1202,7 @@
},
{
"BriefDescription": "All LLC lines in E state that are victimized on a fill",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E",
"PerPkg": "1",
@@ -1087,6 +1212,7 @@
},
{
"BriefDescription": "All LLC lines in M state that are victimized on a fill",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M",
"PerPkg": "1",
@@ -1096,6 +1222,7 @@
},
{
"BriefDescription": "All LLC lines in S state that are victimized on a fill",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S",
"PerPkg": "1",
@@ -1105,6 +1232,7 @@
},
{
"BriefDescription": "Cbo Misc : CV0 Prefetch Miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.CV0_PREF_MISS",
"PerPkg": "1",
@@ -1114,6 +1242,7 @@
},
{
"BriefDescription": "Cbo Misc : CV0 Prefetch Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.CV0_PREF_VIC",
"PerPkg": "1",
@@ -1123,6 +1252,7 @@
},
{
"BriefDescription": "Number of times that an RFO hit in S state.",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.RFO_HIT_S",
"PerPkg": "1",
@@ -1132,6 +1262,7 @@
},
{
"BriefDescription": "Cbo Misc : Silent Snoop Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.RSPI_WAS_FSE",
"PerPkg": "1",
@@ -1141,6 +1272,7 @@
},
{
"BriefDescription": "Cbo Misc : Write Combining Aliasing",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.WC_ALIASING",
"PerPkg": "1",
@@ -1150,6 +1282,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Local InvItoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.LOCAL_INVITOE",
"PerPkg": "1",
@@ -1159,6 +1292,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Local Rd",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.LOCAL_READ",
"PerPkg": "1",
@@ -1168,6 +1302,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Off",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.OFF_PWRHEURISTIC",
"PerPkg": "1",
@@ -1177,6 +1312,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Remote Rd",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.REMOTE_READ",
"PerPkg": "1",
@@ -1186,6 +1322,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Remote Rd InvItoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.REMOTE_READINVITOE",
"PerPkg": "1",
@@ -1195,6 +1332,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadcast",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.RFO_HITS_SNP_BCAST",
"PerPkg": "1",
@@ -1204,6 +1342,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
"PerPkg": "1",
@@ -1212,6 +1351,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
"PerPkg": "1",
@@ -1220,6 +1360,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
"PerPkg": "1",
@@ -1228,6 +1369,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw a Near Memory set conflict in SF/LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC",
"PerPkg": "1",
@@ -1237,6 +1379,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw a Near memory set conflict in SF/LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF",
"PerPkg": "1",
@@ -1246,6 +1389,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw a Near Memory set conflict in TOR",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR",
"PerPkg": "1",
@@ -1255,6 +1399,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC",
"PerPkg": "1",
@@ -1263,6 +1408,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
"PerPkg": "1",
@@ -1271,6 +1417,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
"PerPkg": "1",
@@ -1279,6 +1426,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT",
"PerPkg": "1",
@@ -1287,6 +1435,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.REJ_IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.REJ_IRQ",
"PerPkg": "1",
@@ -1295,6 +1444,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP",
"PerPkg": "1",
@@ -1303,6 +1453,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.SLOW_INSERT",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.SLOW_INSERT",
"PerPkg": "1",
@@ -1311,6 +1462,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.THROTTLE",
"PerPkg": "1",
@@ -1319,6 +1471,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.THROTTLE_IRQ",
"PerPkg": "1",
@@ -1327,6 +1480,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.THROTTLE_PRQ",
"PerPkg": "1",
@@ -1335,6 +1489,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO",
"PerPkg": "1",
@@ -1344,6 +1499,7 @@
},
{
"BriefDescription": "Number of SLOW TOR Request inserted to ha_pmm_tor_req_fifo",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO",
"PerPkg": "1",
@@ -1352,6 +1508,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC0",
"PerPkg": "1",
@@ -1361,6 +1518,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC1",
"PerPkg": "1",
@@ -1370,6 +1528,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC2",
"PerPkg": "1",
@@ -1379,6 +1538,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC3",
"PerPkg": "1",
@@ -1388,6 +1548,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC4",
"PerPkg": "1",
@@ -1397,6 +1558,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC5",
"PerPkg": "1",
@@ -1406,6 +1568,7 @@
},
{
"BriefDescription": "Requests for exclusive ownership of a cache line without receiving data",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE",
"PerPkg": "1",
@@ -1415,6 +1578,7 @@
},
{
"BriefDescription": "Local requests for exclusive ownership of a cache line without receiving data",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL",
"PerPkg": "1",
@@ -1424,6 +1588,7 @@
},
{
"BriefDescription": "Remote requests for exclusive ownership of a cache line without receiving data",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE",
"PerPkg": "1",
@@ -1433,6 +1598,7 @@
},
{
"BriefDescription": "Read requests made into the CHA",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS",
"PerPkg": "1",
@@ -1442,6 +1608,7 @@
},
{
"BriefDescription": "Read requests from a unit on this socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS_LOCAL",
"PerPkg": "1",
@@ -1451,6 +1618,7 @@
},
{
"BriefDescription": "Read requests from a remote socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS_REMOTE",
"PerPkg": "1",
@@ -1460,6 +1628,7 @@
},
{
"BriefDescription": "Write requests made into the CHA",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES",
"PerPkg": "1",
@@ -1469,6 +1638,7 @@
},
{
"BriefDescription": "Write Requests from a unit on this socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL",
"PerPkg": "1",
@@ -1478,6 +1648,7 @@
},
{
"BriefDescription": "Read and Write Requests; Writes Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE",
"PerPkg": "1",
@@ -1487,6 +1658,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : IPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IPQ",
"PerPkg": "1",
@@ -1496,6 +1668,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IRQ",
"PerPkg": "1",
@@ -1505,6 +1678,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ",
"PerPkg": "1",
@@ -1514,6 +1688,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.PRQ",
"PerPkg": "1",
@@ -1523,6 +1698,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ",
"PerPkg": "1",
@@ -1532,6 +1708,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : RRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.RRQ",
"PerPkg": "1",
@@ -1541,6 +1718,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : WBQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.WBQ",
"PerPkg": "1",
@@ -1550,6 +1728,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -1559,6 +1738,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -1568,6 +1748,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -1577,6 +1758,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -1586,6 +1768,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -1595,6 +1778,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -1604,6 +1788,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -1613,6 +1798,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -1622,6 +1808,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -1630,6 +1817,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -1639,6 +1827,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA",
"PerPkg": "1",
@@ -1647,6 +1836,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -1656,6 +1846,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -1664,6 +1855,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -1673,6 +1865,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -1682,6 +1875,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -1690,6 +1884,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -1699,6 +1894,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -1708,6 +1904,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -1717,6 +1914,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -1726,6 +1924,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -1735,6 +1934,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -1744,6 +1944,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -1753,6 +1954,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -1762,6 +1964,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -1770,6 +1973,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -1779,6 +1983,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA",
"PerPkg": "1",
@@ -1787,6 +1992,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LLC or SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -1796,6 +2002,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -1804,6 +2011,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -1812,6 +2020,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -1821,6 +2030,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -1829,6 +2039,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -1838,6 +2049,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -1847,6 +2059,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -1856,6 +2069,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -1865,6 +2079,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -1874,6 +2089,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -1883,6 +2099,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -1892,6 +2109,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -1901,6 +2119,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -1910,6 +2129,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -1919,6 +2139,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -1928,6 +2149,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -1937,6 +2159,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -1946,6 +2169,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -1955,6 +2179,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -1964,6 +2189,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -1973,6 +2199,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -1982,6 +2209,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA",
"PerPkg": "1",
@@ -1991,6 +2219,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0",
"PerPkg": "1",
@@ -2000,6 +2229,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA",
"PerPkg": "1",
@@ -2036,6 +2266,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -2045,6 +2276,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -2054,6 +2286,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -2063,6 +2296,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -2072,6 +2306,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -2081,6 +2316,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -2090,6 +2326,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -2099,6 +2336,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -2108,6 +2346,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP",
"PerPkg": "1",
@@ -2117,6 +2356,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0",
"PerPkg": "1",
@@ -2126,6 +2366,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA",
"PerPkg": "1",
@@ -2135,6 +2376,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2144,6 +2386,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM",
"PerPkg": "1",
@@ -2153,6 +2396,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH",
"PerPkg": "1",
@@ -2162,6 +2406,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM",
"PerPkg": "1",
@@ -2171,6 +2416,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM",
"PerPkg": "1",
@@ -2180,6 +2426,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2189,6 +2436,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2198,6 +2446,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2207,6 +2456,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2216,6 +2466,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2225,6 +2476,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2234,6 +2486,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2243,6 +2496,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2252,6 +2506,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2260,6 +2515,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2269,6 +2525,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA",
"PerPkg": "1",
@@ -2277,6 +2534,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2286,6 +2544,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2294,6 +2553,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2303,6 +2563,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2312,6 +2573,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2320,6 +2582,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -2329,6 +2592,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -2338,6 +2602,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -2347,6 +2612,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -2356,6 +2622,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -2365,6 +2632,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -2374,6 +2642,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -2383,6 +2652,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -2392,6 +2662,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP",
"PerPkg": "1",
@@ -2401,6 +2672,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0",
"PerPkg": "1",
@@ -2410,6 +2682,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA",
"PerPkg": "1",
@@ -2419,6 +2692,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2428,6 +2702,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM",
"PerPkg": "1",
@@ -2437,6 +2712,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH",
"PerPkg": "1",
@@ -2446,6 +2722,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM",
"PerPkg": "1",
@@ -2455,6 +2732,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM",
"PerPkg": "1",
@@ -2464,6 +2742,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2473,6 +2752,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2482,6 +2762,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2491,6 +2772,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2500,6 +2782,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2509,6 +2792,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2518,6 +2802,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2527,6 +2812,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2536,6 +2822,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2545,6 +2832,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2554,6 +2842,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA",
"PerPkg": "1",
@@ -2563,6 +2852,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2572,6 +2862,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2581,6 +2872,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2590,6 +2882,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2599,6 +2892,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2608,6 +2902,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2617,6 +2912,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2626,6 +2922,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2635,6 +2932,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2644,6 +2942,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2653,6 +2952,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2662,6 +2962,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2671,6 +2972,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2680,6 +2982,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2689,6 +2992,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2698,6 +3002,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA",
"PerPkg": "1",
@@ -2707,6 +3012,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2716,6 +3022,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2725,6 +3032,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2734,6 +3042,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2743,6 +3052,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2752,6 +3062,7 @@
},
{
"BriefDescription": "Snoops Sent : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.ALL",
"PerPkg": "1",
@@ -2761,6 +3072,7 @@
},
{
"BriefDescription": "Snoops Sent : Broadcast snoop for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL",
"PerPkg": "1",
@@ -2770,6 +3082,7 @@
},
{
"BriefDescription": "Snoops Sent : Broadcast snoops for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE",
"PerPkg": "1",
@@ -2779,6 +3092,7 @@
},
{
"BriefDescription": "Snoops Sent : Directed snoops for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL",
"PerPkg": "1",
@@ -2788,6 +3102,7 @@
},
{
"BriefDescription": "Snoops Sent : Directed snoops for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE",
"PerPkg": "1",
@@ -2797,6 +3112,7 @@
},
{
"BriefDescription": "Snoops Sent : Broadcast or directed Snoops sent for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.LOCAL",
"PerPkg": "1",
@@ -2806,6 +3122,7 @@
},
{
"BriefDescription": "Snoops Sent : Broadcast or directed Snoops sent for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.REMOTE",
"PerPkg": "1",
@@ -2815,6 +3132,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RSPCNFLCT*",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCT",
"PerPkg": "1",
@@ -2824,6 +3142,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPFWD",
"PerPkg": "1",
@@ -2833,6 +3152,7 @@
},
{
"BriefDescription": "Snoop Responses Received : Rsp*Fwd*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPFWDWB",
"PerPkg": "1",
@@ -2842,6 +3162,7 @@
},
{
"BriefDescription": "RspI Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPI",
"PerPkg": "1",
@@ -2851,6 +3172,7 @@
},
{
"BriefDescription": "RspIFwd Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD",
"PerPkg": "1",
@@ -2860,6 +3182,7 @@
},
{
"BriefDescription": "RspS Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPS",
"PerPkg": "1",
@@ -2869,6 +3192,7 @@
},
{
"BriefDescription": "RspSFwd Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD",
"PerPkg": "1",
@@ -2878,6 +3202,7 @@
},
{
"BriefDescription": "Snoop Responses Received : Rsp*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_CHA_SNOOP_RESP.RSPWB",
"PerPkg": "1",
@@ -2887,6 +3212,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspCnflct",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT",
"PerPkg": "1",
@@ -2896,6 +3222,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD",
"PerPkg": "1",
@@ -2905,6 +3232,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB",
"PerPkg": "1",
@@ -2914,6 +3242,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspI",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI",
"PerPkg": "1",
@@ -2923,6 +3252,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspIFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD",
"PerPkg": "1",
@@ -2932,6 +3262,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS",
"PerPkg": "1",
@@ -2941,6 +3272,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspSFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD",
"PerPkg": "1",
@@ -2950,6 +3282,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : Rsp*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB",
"PerPkg": "1",
@@ -2959,6 +3292,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : MtoI RspIDataM",
+ "Counter": "0,1,2,3",
"EventCode": "0x6b",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM",
"PerPkg": "1",
@@ -2967,6 +3301,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x6b",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM",
"PerPkg": "1",
@@ -2975,6 +3310,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : Pull Data Partial - Hit LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x6b",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC",
"PerPkg": "1",
@@ -2983,6 +3319,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : Pull Data Partial - Hit SF",
+ "Counter": "0,1,2,3",
"EventCode": "0x6b",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF",
"PerPkg": "1",
@@ -2991,6 +3328,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hit LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x6b",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC",
"PerPkg": "1",
@@ -2999,6 +3337,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hit SF",
+ "Counter": "0,1,2,3",
"EventCode": "0x6b",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF",
"PerPkg": "1",
@@ -3007,6 +3346,7 @@
},
{
"BriefDescription": "TOR Inserts : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ALL",
"PerPkg": "1",
@@ -3016,6 +3356,7 @@
},
{
"BriefDescription": "TOR Inserts : DDR Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.DDR",
"PerPkg": "1",
@@ -3024,6 +3365,7 @@
},
{
"BriefDescription": "TOR Inserts : SF/LLC Evictions",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.EVICT",
"PerPkg": "1",
@@ -3033,6 +3375,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Hits",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.HIT",
"PerPkg": "1",
@@ -3041,6 +3384,7 @@
},
{
"BriefDescription": "TOR Inserts; All from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA",
"PerPkg": "1",
@@ -3050,6 +3394,7 @@
},
{
"BriefDescription": "TOR Inserts;CLFlush from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH",
"PerPkg": "1",
@@ -3059,6 +3404,7 @@
},
{
"BriefDescription": "TOR Inserts;CLFlushOpt from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT",
"PerPkg": "1",
@@ -3068,6 +3414,7 @@
},
{
"BriefDescription": "TOR Inserts; CRd from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CRD",
"PerPkg": "1",
@@ -3077,6 +3424,7 @@
},
{
"BriefDescription": "TOR Inserts; CRd Pref from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF",
"PerPkg": "1",
@@ -3086,6 +3434,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD",
"PerPkg": "1",
@@ -3095,6 +3444,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE",
"PerPkg": "1",
@@ -3104,6 +3454,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Opt from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT",
"PerPkg": "1",
@@ -3113,6 +3464,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Opt Pref from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF",
"PerPkg": "1",
@@ -3122,6 +3474,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Pref from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF",
"PerPkg": "1",
@@ -3131,6 +3484,7 @@
},
{
"BriefDescription": "TOR Inserts; Hits from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT",
"PerPkg": "1",
@@ -3140,6 +3494,7 @@
},
{
"BriefDescription": "TOR Inserts; CRd hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD",
"PerPkg": "1",
@@ -3149,6 +3504,7 @@
},
{
"BriefDescription": "TOR Inserts; CRd Pref hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF",
"PerPkg": "1",
@@ -3158,6 +3514,7 @@
},
{
"BriefDescription": "All requests issued from IA cores to CXL accelerator memory regions that hit the LLC.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC",
"PerPkg": "1",
@@ -3166,6 +3523,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3175,6 +3533,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD",
"PerPkg": "1",
@@ -3184,6 +3543,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE",
"PerPkg": "1",
@@ -3193,6 +3553,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Opt hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT",
"PerPkg": "1",
@@ -3202,6 +3563,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Opt Pref hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF",
"PerPkg": "1",
@@ -3211,6 +3573,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Pref hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF",
"PerPkg": "1",
@@ -3220,6 +3583,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Hit LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM",
"PerPkg": "1",
@@ -3229,6 +3593,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefCode hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE",
"PerPkg": "1",
@@ -3238,6 +3603,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefData hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA",
"PerPkg": "1",
@@ -3247,6 +3613,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefRFO hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO",
"PerPkg": "1",
@@ -3256,6 +3623,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO",
"PerPkg": "1",
@@ -3265,6 +3633,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO Pref hits from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF",
"PerPkg": "1",
@@ -3274,6 +3643,7 @@
},
{
"BriefDescription": "TOR Inserts;ItoM from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM",
"PerPkg": "1",
@@ -3283,6 +3653,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR",
"PerPkg": "1",
@@ -3292,6 +3663,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefCode from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE",
"PerPkg": "1",
@@ -3301,6 +3673,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefData from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA",
"PerPkg": "1",
@@ -3310,6 +3683,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefRFO from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO",
"PerPkg": "1",
@@ -3319,6 +3693,7 @@
},
{
"BriefDescription": "TOR Inserts; misses from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",
"PerPkg": "1",
@@ -3328,6 +3703,7 @@
},
{
"BriefDescription": "TOR Inserts for CRd misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD",
"PerPkg": "1",
@@ -3337,6 +3713,7 @@
},
{
"BriefDescription": "CRds and equivalent opcodes issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRDMORPH_CXL_ACC",
"PerPkg": "1",
@@ -3345,6 +3722,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL",
"PerPkg": "1",
@@ -3354,6 +3732,7 @@
},
{
"BriefDescription": "TOR Inserts; CRd Pref misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF",
"PerPkg": "1",
@@ -3363,6 +3742,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL",
"PerPkg": "1",
@@ -3372,6 +3752,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE",
"PerPkg": "1",
@@ -3381,6 +3762,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE",
"PerPkg": "1",
@@ -3390,6 +3772,7 @@
},
{
"BriefDescription": "All requests issued from IA cores to CXL accelerator memory regions that miss the LLC.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC",
"PerPkg": "1",
@@ -3398,6 +3781,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3407,6 +3791,7 @@
},
{
"BriefDescription": "TOR Inserts for DRd misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD",
"PerPkg": "1",
@@ -3416,6 +3801,7 @@
},
{
"BriefDescription": "DRds and equivalent opcodes issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDMORPH_CXL_ACC",
"PerPkg": "1",
@@ -3424,6 +3810,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE",
"PerPkg": "1",
@@ -3433,6 +3820,7 @@
},
{
"BriefDescription": "DRds issued from an IA core which miss the L3 and target memory in a CXL type 2 memory expander card.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC",
"PerPkg": "1",
@@ -3441,6 +3829,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3450,6 +3839,7 @@
},
{
"BriefDescription": "TOR Inserts for DRds issued by IA Cores targeting DDR Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR",
"PerPkg": "1",
@@ -3459,6 +3849,7 @@
},
{
"BriefDescription": "TOR Inserts for DRd misses from local IA targeting local memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL",
"PerPkg": "1",
@@ -3468,6 +3859,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR",
"PerPkg": "1",
@@ -3477,6 +3869,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM",
"PerPkg": "1",
@@ -3486,6 +3879,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Opt misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT",
"PerPkg": "1",
@@ -3495,6 +3889,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3504,6 +3899,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Opt Pref misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF",
"PerPkg": "1",
@@ -3513,6 +3909,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3522,6 +3919,7 @@
},
{
"BriefDescription": "TOR Inserts for DRds issued by iA Cores targeting PMM Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM",
"PerPkg": "1",
@@ -3531,6 +3929,7 @@
},
{
"BriefDescription": "TOR Inserts for DRd Pref misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF",
"PerPkg": "1",
@@ -3540,6 +3939,7 @@
},
{
"BriefDescription": "L2 data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC",
"PerPkg": "1",
@@ -3548,6 +3948,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3557,6 +3958,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR",
"PerPkg": "1",
@@ -3566,6 +3968,7 @@
},
{
"BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting local memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL",
"PerPkg": "1",
@@ -3575,6 +3978,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR",
"PerPkg": "1",
@@ -3584,6 +3988,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM",
"PerPkg": "1",
@@ -3593,6 +3998,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM",
"PerPkg": "1",
@@ -3602,6 +4008,7 @@
},
{
"BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting remote memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE",
"PerPkg": "1",
@@ -3611,6 +4018,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR",
"PerPkg": "1",
@@ -3620,6 +4028,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM",
"PerPkg": "1",
@@ -3629,6 +4038,7 @@
},
{
"BriefDescription": "TOR Inserts for DRd misses from local IA targeting remote memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE",
"PerPkg": "1",
@@ -3638,6 +4048,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR",
"PerPkg": "1",
@@ -3647,6 +4058,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM",
"PerPkg": "1",
@@ -3656,6 +4068,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Missed LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM",
"PerPkg": "1",
@@ -3665,6 +4078,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefCode misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE",
"PerPkg": "1",
@@ -3674,6 +4088,7 @@
},
{
"BriefDescription": "LLC Prefetch Code transactions issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE_CXL_ACC",
"PerPkg": "1",
@@ -3682,6 +4097,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefData misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA",
"PerPkg": "1",
@@ -3691,6 +4107,7 @@
},
{
"BriefDescription": "LLC data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC",
"PerPkg": "1",
@@ -3699,6 +4116,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3708,6 +4126,7 @@
},
{
"BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO",
"PerPkg": "1",
@@ -3717,6 +4136,7 @@
},
{
"BriefDescription": "L2 RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC",
"PerPkg": "1",
@@ -3725,6 +4145,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3734,6 +4155,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR",
"PerPkg": "1",
@@ -3743,6 +4165,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM",
"PerPkg": "1",
@@ -3752,6 +4175,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR",
"PerPkg": "1",
@@ -3761,6 +4185,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM",
"PerPkg": "1",
@@ -3770,6 +4195,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR",
"PerPkg": "1",
@@ -3779,6 +4205,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM",
"PerPkg": "1",
@@ -3788,6 +4215,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR",
"PerPkg": "1",
@@ -3797,6 +4225,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM",
"PerPkg": "1",
@@ -3806,6 +4235,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO",
"PerPkg": "1",
@@ -3815,6 +4245,7 @@
},
{
"BriefDescription": "RFO and L2 RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFOMORPH_CXL_ACC",
"PerPkg": "1",
@@ -3823,6 +4254,7 @@
},
{
"BriefDescription": "RFOs issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC",
"PerPkg": "1",
@@ -3831,6 +4263,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3840,6 +4273,7 @@
},
{
"BriefDescription": "TOR Inserts RFO misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL",
"PerPkg": "1",
@@ -3849,6 +4283,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO pref misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF",
"PerPkg": "1",
@@ -3858,6 +4293,7 @@
},
{
"BriefDescription": "LLC RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC",
"PerPkg": "1",
@@ -3866,6 +4302,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
"PerPkg": "1",
@@ -3875,6 +4312,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO prefetch misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL",
"PerPkg": "1",
@@ -3884,6 +4322,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO prefetch misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE",
"PerPkg": "1",
@@ -3893,6 +4332,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE",
"PerPkg": "1",
@@ -3902,6 +4342,7 @@
},
{
"BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that Missed LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF",
"PerPkg": "1",
@@ -3911,6 +4352,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL",
"PerPkg": "1",
@@ -3920,6 +4362,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF",
"PerPkg": "1",
@@ -3929,6 +4372,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR",
"PerPkg": "1",
@@ -3938,6 +4382,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM",
"PerPkg": "1",
@@ -3947,6 +4392,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR",
"PerPkg": "1",
@@ -3956,6 +4402,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM",
"PerPkg": "1",
@@ -3965,6 +4412,7 @@
},
{
"BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Missed LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL",
"PerPkg": "1",
@@ -3974,6 +4422,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_RFO",
"PerPkg": "1",
@@ -3983,6 +4432,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO pref from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF",
"PerPkg": "1",
@@ -3992,6 +4442,7 @@
},
{
"BriefDescription": "TOR Inserts;SpecItoM from Local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM",
"PerPkg": "1",
@@ -4001,6 +4452,7 @@
},
{
"BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE",
"PerPkg": "1",
@@ -4010,6 +4462,7 @@
},
{
"BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI",
"PerPkg": "1",
@@ -4019,6 +4472,7 @@
},
{
"BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE",
"PerPkg": "1",
@@ -4028,6 +4482,7 @@
},
{
"BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI",
"PerPkg": "1",
@@ -4037,6 +4492,7 @@
},
{
"BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI",
"PerPkg": "1",
@@ -4046,6 +4502,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL",
"PerPkg": "1",
@@ -4055,6 +4512,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLF issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF",
"PerPkg": "1",
@@ -4064,6 +4522,7 @@
},
{
"BriefDescription": "TOR Inserts; All from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO",
"PerPkg": "1",
@@ -4073,6 +4532,7 @@
},
{
"BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH",
"PerPkg": "1",
@@ -4082,6 +4542,7 @@
},
{
"BriefDescription": "TOR Inserts; Hits from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT",
"PerPkg": "1",
@@ -4091,6 +4552,7 @@
},
{
"BriefDescription": "TOR Inserts; ItoM hits from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM",
"PerPkg": "1",
@@ -4100,6 +4562,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR",
"PerPkg": "1",
@@ -4109,6 +4572,7 @@
},
{
"BriefDescription": "TOR Inserts; RdCur and FsRdCur hits from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR",
"PerPkg": "1",
@@ -4118,6 +4582,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO hits from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO",
"PerPkg": "1",
@@ -4127,6 +4592,7 @@
},
{
"BriefDescription": "TOR Inserts for ItoM from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM",
"PerPkg": "1",
@@ -4136,6 +4602,7 @@
},
{
"BriefDescription": "TOR Inserts for ItoMCacheNears from IO devices.",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR",
"PerPkg": "1",
@@ -4145,6 +4612,7 @@
},
{
"BriefDescription": "TOR Inserts; Misses from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS",
"PerPkg": "1",
@@ -4154,6 +4622,7 @@
},
{
"BriefDescription": "TOR Inserts; ItoM misses from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM",
"PerPkg": "1",
@@ -4163,6 +4632,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR",
"PerPkg": "1",
@@ -4172,6 +4642,7 @@
},
{
"BriefDescription": "TOR Inserts; RdCur and FsRdCur misses from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR",
"PerPkg": "1",
@@ -4181,6 +4652,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO misses from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO",
"PerPkg": "1",
@@ -4190,6 +4662,7 @@
},
{
"BriefDescription": "TOR Inserts for RdCur from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR",
"PerPkg": "1",
@@ -4199,6 +4672,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO from local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_RFO",
"PerPkg": "1",
@@ -4208,6 +4682,7 @@
},
{
"BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI",
"PerPkg": "1",
@@ -4217,6 +4692,7 @@
},
{
"BriefDescription": "TOR Inserts : IPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IPQ",
"PerPkg": "1",
@@ -4226,6 +4702,7 @@
},
{
"BriefDescription": "TOR Inserts : IRQ - iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA",
"PerPkg": "1",
@@ -4235,6 +4712,7 @@
},
{
"BriefDescription": "TOR Inserts : IRQ - Non iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA",
"PerPkg": "1",
@@ -4244,6 +4722,7 @@
},
{
"BriefDescription": "TOR Inserts : Just ISOC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ISOC",
"PerPkg": "1",
@@ -4252,6 +4731,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Local Targets",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT",
"PerPkg": "1",
@@ -4260,6 +4740,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Local iA and IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL",
"PerPkg": "1",
@@ -4269,6 +4750,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Local iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_IA",
"PerPkg": "1",
@@ -4278,6 +4760,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_IO",
"PerPkg": "1",
@@ -4287,6 +4770,7 @@
},
{
"BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of the extended umask field",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC",
"PerPkg": "1",
@@ -4295,6 +4779,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MISS",
"PerPkg": "1",
@@ -4303,6 +4788,7 @@
},
{
"BriefDescription": "TOR Inserts : MMCFG Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MMCFG",
"PerPkg": "1",
@@ -4311,6 +4797,7 @@
},
{
"BriefDescription": "TOR Inserts : MMIO Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MMIO",
"PerPkg": "1",
@@ -4319,6 +4806,7 @@
},
{
"BriefDescription": "TOR Inserts : Just NearMem",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.NEARMEM",
"PerPkg": "1",
@@ -4327,6 +4815,7 @@
},
{
"BriefDescription": "TOR Inserts : Just NonCoherent",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.NONCOH",
"PerPkg": "1",
@@ -4335,6 +4824,7 @@
},
{
"BriefDescription": "TOR Inserts : Just NotNearMem",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM",
"PerPkg": "1",
@@ -4343,6 +4833,7 @@
},
{
"BriefDescription": "TOR Inserts : PMM Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PMM",
"PerPkg": "1",
@@ -4351,6 +4842,7 @@
},
{
"BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in b[29:19] of the extended umask field",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC",
"PerPkg": "1",
@@ -4359,6 +4851,7 @@
},
{
"BriefDescription": "TOR Inserts : PRQ - IOSF",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF",
"PerPkg": "1",
@@ -4368,6 +4861,7 @@
},
{
"BriefDescription": "TOR Inserts : PRQ - Non IOSF",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF",
"PerPkg": "1",
@@ -4377,6 +4871,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Remote Targets",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT",
"PerPkg": "1",
@@ -4385,6 +4880,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.REM_ALL",
"PerPkg": "1",
@@ -4394,6 +4890,7 @@
},
{
"BriefDescription": "TOR Inserts : All Snoops from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.REM_SNPS",
"PerPkg": "1",
@@ -4403,6 +4900,7 @@
},
{
"BriefDescription": "TOR Inserts : RRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.RRQ",
"PerPkg": "1",
@@ -4412,6 +4910,7 @@
},
{
"BriefDescription": "TOR Inserts; All Snoops from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.SNPS_FROM_REM",
"PerPkg": "1",
@@ -4421,6 +4920,7 @@
},
{
"BriefDescription": "TOR Inserts : WBQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.WBQ",
"PerPkg": "1",
@@ -5825,6 +6325,7 @@
},
{
"BriefDescription": "WbPushMtoI : Pushed to LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_CHA_WB_PUSH_MTOI.LLC",
"PerPkg": "1",
@@ -5834,6 +6335,7 @@
},
{
"BriefDescription": "WbPushMtoI : Pushed to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_CHA_WB_PUSH_MTOI.MEM",
"PerPkg": "1",
@@ -5843,6 +6345,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5a",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0",
"PerPkg": "1",
@@ -5852,6 +6355,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5a",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1",
"PerPkg": "1",
@@ -5861,6 +6365,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2",
+ "Counter": "0,1,2,3",
"EventCode": "0x5a",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2",
"PerPkg": "1",
@@ -5870,6 +6375,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3",
+ "Counter": "0,1,2,3",
"EventCode": "0x5a",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3",
"PerPkg": "1",
@@ -5879,6 +6385,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4",
+ "Counter": "0,1,2,3",
"EventCode": "0x5a",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4",
"PerPkg": "1",
@@ -5888,6 +6395,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5",
+ "Counter": "0,1,2,3",
"EventCode": "0x5a",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5",
"PerPkg": "1",
@@ -5897,6 +6405,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT",
"PerPkg": "1",
@@ -5906,6 +6415,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD",
"PerPkg": "1",
@@ -5915,6 +6425,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT",
"PerPkg": "1",
@@ -5924,6 +6435,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD",
"PerPkg": "1",
@@ -5933,6 +6445,7 @@
},
{
"BriefDescription": "XPT Prefetches : Sent (on 0?)",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.SENT0",
"PerPkg": "1",
@@ -5942,6 +6455,7 @@
},
{
"BriefDescription": "XPT Prefetches : Sent (on 1?)",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.SENT1",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json
index f3e84fd88de3..147903614004 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts the number of lfclk ticks",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x01",
"EventName": "UNC_CXLCM_CLOCKTICKS",
"PerPkg": "1",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of Allocation to Mem Rxx AGF 0",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_DATA",
"PerPkg": "1",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Req AGF0",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ0",
"PerPkg": "1",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Rsp AGF",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ1",
"PerPkg": "1",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Data AGF",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP0",
"PerPkg": "1",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Rsp AGF",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP1",
"PerPkg": "1",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Req AGF 1",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_DATA",
"PerPkg": "1",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Number of Allocation to Mem Data AGF",
+ "Counter": "4,5,6,7",
"EventCode": "0x43",
"EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_REQ",
"PerPkg": "1",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Count the number of Flits with AK set",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.AK_HDR",
"PerPkg": "1",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "Count the number of Flits with BE set",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.BE_HDR",
"PerPkg": "1",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Count the number of control flits received",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.CTRL",
"PerPkg": "1",
@@ -89,6 +100,7 @@
},
{
"BriefDescription": "Count the number of Headerless flits received",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.NO_HDR",
"PerPkg": "1",
@@ -97,6 +109,7 @@
},
{
"BriefDescription": "Count the number of protocol flits received",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.PROT",
"PerPkg": "1",
@@ -105,6 +118,7 @@
},
{
"BriefDescription": "Count the number of Flits with SZ set",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.SZ_HDR",
"PerPkg": "1",
@@ -113,6 +127,7 @@
},
{
"BriefDescription": "Count the number of flits received",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.VALID",
"PerPkg": "1",
@@ -121,6 +136,7 @@
},
{
"BriefDescription": "Count the number of valid messages in the flit",
+ "Counter": "4,5,6,7",
"EventCode": "0x4b",
"EventName": "UNC_CXLCM_RxC_FLITS.VALID_MSG",
"PerPkg": "1",
@@ -129,6 +145,7 @@
},
{
"BriefDescription": "Count the number of CRC errors detected",
+ "Counter": "4,5,6,7",
"EventCode": "0x40",
"EventName": "UNC_CXLCM_RxC_MISC.CRC_ERRORS",
"PerPkg": "1",
@@ -137,6 +154,7 @@
},
{
"BriefDescription": "Count the number of Init flits sent",
+ "Counter": "4,5,6,7",
"EventCode": "0x40",
"EventName": "UNC_CXLCM_RxC_MISC.INIT",
"PerPkg": "1",
@@ -145,6 +163,7 @@
},
{
"BriefDescription": "Count the number of LLCRD flits sent",
+ "Counter": "4,5,6,7",
"EventCode": "0x40",
"EventName": "UNC_CXLCM_RxC_MISC.LLCRD",
"PerPkg": "1",
@@ -153,6 +172,7 @@
},
{
"BriefDescription": "Count the number of Retry flits sent",
+ "Counter": "4,5,6,7",
"EventCode": "0x40",
"EventName": "UNC_CXLCM_RxC_MISC.RETRY",
"PerPkg": "1",
@@ -161,6 +181,7 @@
},
{
"BriefDescription": "Number of cycles the Packing Buffer is Full",
+ "Counter": "4,5,6,7",
"EventCode": "0x52",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_DATA",
"PerPkg": "1",
@@ -169,6 +190,7 @@
},
{
"BriefDescription": "Number of cycles the Packing Buffer is Full",
+ "Counter": "4,5,6,7",
"EventCode": "0x52",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_REQ",
"PerPkg": "1",
@@ -177,6 +199,7 @@
},
{
"BriefDescription": "Number of cycles the Packing Buffer is Full",
+ "Counter": "4,5,6,7",
"EventCode": "0x52",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_RSP",
"PerPkg": "1",
@@ -185,6 +208,7 @@
},
{
"BriefDescription": "Number of cycles the Packing Buffer is Full",
+ "Counter": "4,5,6,7",
"EventCode": "0x52",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_DATA",
"PerPkg": "1",
@@ -193,6 +217,7 @@
},
{
"BriefDescription": "Number of cycles the Packing Buffer is Full",
+ "Counter": "4,5,6,7",
"EventCode": "0x52",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_REQ",
"PerPkg": "1",
@@ -201,6 +226,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Data Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x41",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_DATA",
"PerPkg": "1",
@@ -209,6 +235,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Req Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x41",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_REQ",
"PerPkg": "1",
@@ -217,6 +244,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Rsp Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x41",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_RSP",
"PerPkg": "1",
@@ -225,6 +253,7 @@
},
{
"BriefDescription": "Number of Allocation to Mem Data Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x41",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_DATA",
"PerPkg": "1",
@@ -233,6 +262,7 @@
},
{
"BriefDescription": "Number of Allocation to Mem Rxx Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x41",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_REQ",
"PerPkg": "1",
@@ -241,6 +271,7 @@
},
{
"BriefDescription": "Number of cycles of Not Empty for Cache Data Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x42",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_DATA",
"PerPkg": "1",
@@ -249,6 +280,7 @@
},
{
"BriefDescription": "Number of cycles of Not Empty for Cache Req Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x42",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_REQ",
"PerPkg": "1",
@@ -257,6 +289,7 @@
},
{
"BriefDescription": "Number of cycles of Not Empty for Cache Rsp Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x42",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_RSP",
"PerPkg": "1",
@@ -265,6 +298,7 @@
},
{
"BriefDescription": "Number of cycles of Not Empty for Mem Data Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x42",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_DATA",
"PerPkg": "1",
@@ -273,6 +307,7 @@
},
{
"BriefDescription": "Number of cycles of Not Empty for Mem Rxx Packing buffer",
+ "Counter": "4,5,6,7",
"EventCode": "0x42",
"EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_REQ",
"PerPkg": "1",
@@ -281,6 +316,7 @@
},
{
"BriefDescription": "Count the number of Flits with AK set",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.AK_HDR",
"PerPkg": "1",
@@ -289,6 +325,7 @@
},
{
"BriefDescription": "Count the number of Flits with BE set",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.BE_HDR",
"PerPkg": "1",
@@ -297,6 +334,7 @@
},
{
"BriefDescription": "Count the number of control flits packed",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.CTRL",
"PerPkg": "1",
@@ -305,6 +343,7 @@
},
{
"BriefDescription": "Count the number of Headerless flits packed",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.NO_HDR",
"PerPkg": "1",
@@ -313,6 +352,7 @@
},
{
"BriefDescription": "Count the number of protocol flits packed",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.PROT",
"PerPkg": "1",
@@ -321,6 +361,7 @@
},
{
"BriefDescription": "Count the number of Flits with SZ set",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.SZ_HDR",
"PerPkg": "1",
@@ -329,6 +370,7 @@
},
{
"BriefDescription": "Count the number of flits packed",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_CXLCM_TxC_FLITS.VALID",
"PerPkg": "1",
@@ -337,6 +379,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Data Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_DATA",
"PerPkg": "1",
@@ -345,6 +388,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Req Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ0",
"PerPkg": "1",
@@ -353,6 +397,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Rsp1 Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ1",
"PerPkg": "1",
@@ -361,6 +406,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Rsp0 Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP0",
"PerPkg": "1",
@@ -369,6 +415,7 @@
},
{
"BriefDescription": "Number of Allocation to Cache Req Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP1",
"PerPkg": "1",
@@ -377,6 +424,7 @@
},
{
"BriefDescription": "Number of Allocation to Mem Data Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_DATA",
"PerPkg": "1",
@@ -385,6 +433,7 @@
},
{
"BriefDescription": "Number of Allocation to Mem Rxx Packing buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_REQ",
"PerPkg": "1",
@@ -393,6 +442,7 @@
},
{
"BriefDescription": "Counts the number of uclk ticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_CXLDP_CLOCKTICKS",
"PerPkg": "1",
@@ -401,6 +451,7 @@
},
{
"BriefDescription": "Number of Allocation to M2S Data AGF",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA",
"PerPkg": "1",
@@ -409,6 +460,7 @@
},
{
"BriefDescription": "Number of Allocation to M2S Req AGF",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_REQ",
"PerPkg": "1",
@@ -417,6 +469,7 @@
},
{
"BriefDescription": "Number of Allocation to U2C Data AGF",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_DATA",
"PerPkg": "1",
@@ -425,6 +478,7 @@
},
{
"BriefDescription": "Number of Allocation to U2C Req AGF",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_REQ",
"PerPkg": "1",
@@ -433,6 +487,7 @@
},
{
"BriefDescription": "Number of Allocation to U2C Rsp AGF 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP0",
"PerPkg": "1",
@@ -441,6 +496,7 @@
},
{
"BriefDescription": "Number of Allocation to U2C Rsp AGF 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP1",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
index 09d840c7da4c..ee023a574bd2 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Total IRP occupancy of inbound read and write requests to coherent memory.",
+ "Counter": "0,1",
"EventCode": "0x0f",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM",
"PerPkg": "1",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "IRP Clockticks",
+ "Counter": "0,1",
"EventCode": "0x01",
"EventName": "UNC_I_CLOCKTICKS",
"PerPkg": "1",
@@ -18,6 +20,7 @@
},
{
"BriefDescription": "FAF RF full",
+ "Counter": "0,1",
"EventCode": "0x17",
"EventName": "UNC_I_FAF_FULL",
"PerPkg": "1",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "FAF - request insert from TC.",
+ "Counter": "0,1",
"EventCode": "0x18",
"EventName": "UNC_I_FAF_INSERTS",
"PerPkg": "1",
@@ -32,6 +36,7 @@
},
{
"BriefDescription": "FAF occupancy",
+ "Counter": "0,1",
"EventCode": "0x19",
"EventName": "UNC_I_FAF_OCCUPANCY",
"PerPkg": "1",
@@ -39,6 +44,7 @@
},
{
"BriefDescription": "FAF allocation -- sent to ADQ",
+ "Counter": "0,1",
"EventCode": "0x16",
"EventName": "UNC_I_FAF_TRANSACTIONS",
"PerPkg": "1",
@@ -46,6 +52,7 @@
},
{
"BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)",
+ "Counter": "0,1",
"EventCode": "0x20",
"EventName": "UNC_I_IRP_ALL.EVICTS",
"PerPkg": "1",
@@ -54,6 +61,7 @@
},
{
"BriefDescription": ": All Inserts Inbound (p2p + faf + cset)",
+ "Counter": "0,1",
"EventCode": "0x20",
"EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS",
"PerPkg": "1",
@@ -62,6 +70,7 @@
},
{
"BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)",
+ "Counter": "0,1",
"EventCode": "0x20",
"EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS",
"PerPkg": "1",
@@ -70,6 +79,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
"PerPkg": "1",
@@ -78,6 +88,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.2ND_RD_INSERT",
"PerPkg": "1",
@@ -86,6 +97,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.2ND_WR_INSERT",
"PerPkg": "1",
@@ -94,6 +106,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.FAST_REJ",
"PerPkg": "1",
@@ -102,6 +115,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.FAST_REQ",
"PerPkg": "1",
@@ -110,6 +124,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.FAST_XFER",
"PerPkg": "1",
@@ -118,6 +133,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.PF_ACK_HINT",
"PerPkg": "1",
@@ -126,6 +142,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF",
"PerPkg": "1",
@@ -134,6 +151,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Lost Forward",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.LOST_FWD",
"PerPkg": "1",
@@ -143,6 +161,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Received Invalid",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SEC_RCVD_INVLD",
"PerPkg": "1",
@@ -152,6 +171,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Received Valid",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SEC_RCVD_VLD",
"PerPkg": "1",
@@ -161,6 +181,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_E",
"PerPkg": "1",
@@ -170,6 +191,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_I",
"PerPkg": "1",
@@ -179,6 +201,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_M",
"PerPkg": "1",
@@ -188,6 +211,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_S",
"PerPkg": "1",
@@ -197,6 +221,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit M, E, S or I line in the IIO",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT",
"PerPkg": "1",
@@ -206,6 +231,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit E or S line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES",
"PerPkg": "1",
@@ -215,6 +241,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit I line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I",
"PerPkg": "1",
@@ -224,6 +251,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit M line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M",
"PerPkg": "1",
@@ -233,6 +261,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that miss the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_MISS",
"PerPkg": "1",
@@ -242,6 +271,7 @@
},
{
"BriefDescription": "Snoop Responses : Hit E or S",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_ES",
"PerPkg": "1",
@@ -250,6 +280,7 @@
},
{
"BriefDescription": "Snoop Responses : Hit I",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_I",
"PerPkg": "1",
@@ -258,6 +289,7 @@
},
{
"BriefDescription": "Snoop Responses : Hit M",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_M",
"PerPkg": "1",
@@ -266,6 +298,7 @@
},
{
"BriefDescription": "Snoop Responses : Miss",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.MISS",
"PerPkg": "1",
@@ -274,6 +307,7 @@
},
{
"BriefDescription": "Snoop Responses : SnpCode",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPCODE",
"PerPkg": "1",
@@ -282,6 +316,7 @@
},
{
"BriefDescription": "Snoop Responses : SnpData",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPDATA",
"PerPkg": "1",
@@ -290,6 +325,7 @@
},
{
"BriefDescription": "Snoop Responses : SnpInv",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPINV",
"PerPkg": "1",
@@ -298,6 +334,7 @@
},
{
"BriefDescription": "Inbound write (fast path) requests received by the IRP.",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.WR_PREF",
"PerPkg": "1",
@@ -307,6 +344,7 @@
},
{
"BriefDescription": "AK Egress Allocations",
+ "Counter": "0,1",
"EventCode": "0x0b",
"EventName": "UNC_I_TxC_AK_INSERTS",
"PerPkg": "1",
@@ -314,6 +352,7 @@
},
{
"BriefDescription": "BL DRS Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x05",
"EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL",
"PerPkg": "1",
@@ -321,6 +360,7 @@
},
{
"BriefDescription": "BL DRS Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_I_TxC_BL_DRS_INSERTS",
"PerPkg": "1",
@@ -328,6 +368,7 @@
},
{
"BriefDescription": "BL DRS Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x08",
"EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY",
"PerPkg": "1",
@@ -335,6 +376,7 @@
},
{
"BriefDescription": "BL NCB Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x06",
"EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL",
"PerPkg": "1",
@@ -342,6 +384,7 @@
},
{
"BriefDescription": "BL NCB Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_I_TxC_BL_NCB_INSERTS",
"PerPkg": "1",
@@ -349,6 +392,7 @@
},
{
"BriefDescription": "BL NCB Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x09",
"EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY",
"PerPkg": "1",
@@ -356,6 +400,7 @@
},
{
"BriefDescription": "BL NCS Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x07",
"EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL",
"PerPkg": "1",
@@ -363,6 +408,7 @@
},
{
"BriefDescription": "BL NCS Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x04",
"EventName": "UNC_I_TxC_BL_NCS_INSERTS",
"PerPkg": "1",
@@ -370,6 +416,7 @@
},
{
"BriefDescription": "BL NCS Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x0a",
"EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY",
"PerPkg": "1",
@@ -377,6 +424,7 @@
},
{
"BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES",
+ "Counter": "0,1",
"EventCode": "0x1c",
"EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -385,6 +433,7 @@
},
{
"BriefDescription": "No AD0 Egress Credits Stalls",
+ "Counter": "0,1",
"EventCode": "0x1a",
"EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -393,6 +442,7 @@
},
{
"BriefDescription": "No AD1 Egress Credits Stalls",
+ "Counter": "0,1",
"EventCode": "0x1b",
"EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -401,6 +451,7 @@
},
{
"BriefDescription": "No BL Egress Credit Stalls",
+ "Counter": "0,1",
"EventCode": "0x1d",
"EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -409,6 +460,7 @@
},
{
"BriefDescription": "Outbound Read Requests",
+ "Counter": "0,1",
"EventCode": "0x0d",
"EventName": "UNC_I_TxS_DATA_INSERTS_NCB",
"PerPkg": "1",
@@ -417,6 +469,7 @@
},
{
"BriefDescription": "Outbound Read Requests",
+ "Counter": "0,1",
"EventCode": "0x0e",
"EventName": "UNC_I_TxS_DATA_INSERTS_NCS",
"PerPkg": "1",
@@ -425,6 +478,7 @@
},
{
"BriefDescription": "Outbound Request Queue Occupancy",
+ "Counter": "0,1",
"EventCode": "0x0c",
"EventName": "UNC_I_TxS_REQUEST_OCCUPANCY",
"PerPkg": "1",
@@ -433,6 +487,7 @@
},
{
"BriefDescription": "M2M Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M2M_CLOCKTICKS",
"PerPkg": "1",
@@ -441,6 +496,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M2M_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -448,6 +504,7 @@
},
{
"BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -456,6 +513,7 @@
},
{
"BriefDescription": "Cycles when direct to core mode, which bypasses the CHA, was disabled : Non Cisgress",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
"PerPkg": "1",
@@ -465,6 +523,7 @@
},
{
"BriefDescription": "Counts the time when FM didn't do d2c for fill reads (cross tile case)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED",
"PerPkg": "1",
@@ -472,6 +531,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE",
"PerPkg": "1",
@@ -480,6 +540,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction was overridden : Cisgress",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE.CISGRESS",
"PerPkg": "1",
@@ -488,6 +549,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction was overridden : 2LM Hit?",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE.PMM_HIT",
"PerPkg": "1",
@@ -496,6 +558,7 @@
},
{
"BriefDescription": "Number of times a direct to UPI transaction was overridden.",
+ "Counter": "0,1,2,3",
"EventCode": "0x1C",
"EventName": "UNC_M2M_DIRECT2UPITXN_OVERRIDE.PMM_HIT",
"PerPkg": "1",
@@ -505,6 +568,7 @@
},
{
"BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS",
"PerPkg": "1",
@@ -513,6 +577,7 @@
},
{
"BriefDescription": "Cycles when direct to Intel UPI was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -521,6 +586,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled : Cisgress D2U Ignored",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.CISGRESS",
"PerPkg": "1",
@@ -530,6 +596,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled : Egress Ignored D2U",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.EGRESS",
"PerPkg": "1",
@@ -539,6 +606,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled : Non Cisgress D2U Ignored",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
"PerPkg": "1",
@@ -548,6 +616,7 @@
},
{
"BriefDescription": "Messages sent direct to the Intel UPI",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2M_DIRECT2UPI_TAKEN",
"PerPkg": "1",
@@ -557,6 +626,7 @@
},
{
"BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x1c",
"EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE",
"PerPkg": "1",
@@ -565,6 +635,7 @@
},
{
"BriefDescription": "Number of times a direct to UPI transaction was overridden.",
+ "Counter": "0,1,2,3",
"EventCode": "0x1C",
"EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE.CISGRESS",
"PerPkg": "1",
@@ -573,6 +644,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A",
"PerPkg": "1",
@@ -581,6 +653,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I",
"PerPkg": "1",
@@ -589,6 +662,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P",
"PerPkg": "1",
@@ -597,6 +671,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S",
"PerPkg": "1",
@@ -605,6 +680,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A",
"PerPkg": "1",
@@ -613,6 +689,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I",
"PerPkg": "1",
@@ -621,6 +698,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P",
"PerPkg": "1",
@@ -629,6 +707,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S",
"PerPkg": "1",
@@ -637,6 +716,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY",
"PerPkg": "1",
@@ -646,6 +726,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A",
"PerPkg": "1",
@@ -655,6 +736,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I",
"PerPkg": "1",
@@ -664,6 +746,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S",
"PerPkg": "1",
@@ -673,6 +756,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A",
"PerPkg": "1",
@@ -681,6 +765,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I",
"PerPkg": "1",
@@ -689,6 +774,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P",
"PerPkg": "1",
@@ -697,6 +783,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S",
"PerPkg": "1",
@@ -705,6 +792,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A",
"PerPkg": "1",
@@ -713,6 +801,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I",
"PerPkg": "1",
@@ -721,6 +810,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P",
"PerPkg": "1",
@@ -729,6 +819,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S",
"PerPkg": "1",
@@ -737,6 +828,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from A to I",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I",
"PerPkg": "1",
@@ -745,6 +837,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from A to S",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S",
"PerPkg": "1",
@@ -753,6 +846,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY",
"PerPkg": "1",
@@ -761,6 +855,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_I_HIT_NON_PMM",
"PerPkg": "1",
@@ -770,6 +865,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_I_MISS_NON_PMM",
"PerPkg": "1",
@@ -779,6 +875,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_S_HIT_NON_PMM",
"PerPkg": "1",
@@ -788,6 +885,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_S_MISS_NON_PMM",
"PerPkg": "1",
@@ -797,6 +895,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.HIT_NON_PMM",
"PerPkg": "1",
@@ -806,6 +905,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from I to A",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A",
"PerPkg": "1",
@@ -814,6 +914,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from I to S",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S",
"PerPkg": "1",
@@ -822,6 +923,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_A_HIT_NON_PMM",
"PerPkg": "1",
@@ -831,6 +933,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_A_MISS_NON_PMM",
"PerPkg": "1",
@@ -840,6 +943,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_S_HIT_NON_PMM",
"PerPkg": "1",
@@ -849,6 +953,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_S_MISS_NON_PMM",
"PerPkg": "1",
@@ -858,6 +963,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.MISS_NON_PMM",
"PerPkg": "1",
@@ -867,6 +973,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from S to A",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A",
"PerPkg": "1",
@@ -875,6 +982,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from S to I",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I",
"PerPkg": "1",
@@ -883,6 +991,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_A_HIT_NON_PMM",
"PerPkg": "1",
@@ -892,6 +1001,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_A_MISS_NON_PMM",
"PerPkg": "1",
@@ -901,6 +1011,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_I_HIT_NON_PMM",
"PerPkg": "1",
@@ -910,6 +1021,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_I_MISS_NON_PMM",
"PerPkg": "1",
@@ -919,6 +1031,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -928,6 +1041,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -937,6 +1051,7 @@
},
{
"BriefDescription": "Count when Starve Glocab counter is at 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_IGR_STARVE_WINNER.MASK7",
"PerPkg": "1",
@@ -945,6 +1060,7 @@
},
{
"BriefDescription": "Reads to iMC issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.ALL",
"PerPkg": "1",
@@ -953,6 +1069,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0.TO_NM1LM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0.TO_NM1LM",
"PerPkg": "1",
@@ -961,6 +1078,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0.TO_NMCache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0.TO_NMCache",
"PerPkg": "1",
@@ -969,6 +1087,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_ALL",
"FCMask": "0x00000000",
@@ -979,6 +1098,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_FROM_TGR",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR",
"PerPkg": "1",
@@ -987,6 +1107,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_ISOCH",
"PerPkg": "1",
@@ -995,6 +1116,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_NORMAL",
"FCMask": "0x00000000",
@@ -1005,6 +1127,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1013,6 +1136,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1021,6 +1145,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_PMM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH0_TO_PMM",
"FCMask": "0x00000000",
@@ -1031,6 +1156,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1.TO_NM1LM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1.TO_NM1LM",
"PerPkg": "1",
@@ -1039,6 +1165,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1.TO_NMCache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1.TO_NMCache",
"PerPkg": "1",
@@ -1047,6 +1174,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_ALL",
"FCMask": "0x00000000",
@@ -1057,6 +1185,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_FROM_TGR",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR",
"PerPkg": "1",
@@ -1065,6 +1194,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_ISOCH",
"PerPkg": "1",
@@ -1073,6 +1203,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_NORMAL",
"FCMask": "0x00000000",
@@ -1083,6 +1214,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1091,6 +1223,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1099,6 +1232,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_PMM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.CH1_TO_PMM",
"FCMask": "0x00000000",
@@ -1109,6 +1243,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.FROM_TGR",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.FROM_TGR",
"PerPkg": "1",
@@ -1117,6 +1252,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.ISOCH",
"PerPkg": "1",
@@ -1125,6 +1261,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.NORMAL",
"PerPkg": "1",
@@ -1133,6 +1270,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1141,6 +1279,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1149,6 +1288,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.TO_NM1LM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.TO_NM1LM",
"PerPkg": "1",
@@ -1157,6 +1297,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.TO_NMCACHE",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.TO_NMCACHE",
"PerPkg": "1",
@@ -1165,6 +1306,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_READS.TO_PMM",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_IMC_READS.TO_PMM",
"PerPkg": "1",
@@ -1173,6 +1315,7 @@
},
{
"BriefDescription": "All Writes - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.ALL",
"PerPkg": "1",
@@ -1181,6 +1324,7 @@
},
{
"BriefDescription": "Non-Inclusive - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0.NI",
"PerPkg": "1",
@@ -1188,6 +1332,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_WRITES.CH0_ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_ALL",
"FCMask": "0x00000000",
@@ -1198,6 +1343,7 @@
},
{
"BriefDescription": "From TGR - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR",
"PerPkg": "1",
@@ -1205,6 +1351,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_WRITES.CH0_FULL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_FULL",
"FCMask": "0x00000000",
@@ -1215,6 +1362,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH",
"PerPkg": "1",
@@ -1223,6 +1371,7 @@
},
{
"BriefDescription": "Non-Inclusive - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_NI",
"PerPkg": "1",
@@ -1230,6 +1379,7 @@
},
{
"BriefDescription": "Non-Inclusive Miss - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS",
"PerPkg": "1",
@@ -1237,6 +1387,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_WRITES.CH0_PARTIAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL",
"FCMask": "0x00000000",
@@ -1247,6 +1398,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH",
"PerPkg": "1",
@@ -1255,6 +1407,7 @@
},
{
"BriefDescription": "DDR, acting as Cache - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1263,6 +1416,7 @@
},
{
"BriefDescription": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1271,6 +1425,7 @@
},
{
"BriefDescription": "PMM - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH0_TO_PMM",
"FCMask": "0x00000000",
@@ -1282,6 +1437,7 @@
},
{
"BriefDescription": "Non-Inclusive - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1.NI",
"PerPkg": "1",
@@ -1289,6 +1445,7 @@
},
{
"BriefDescription": "All Writes - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_ALL",
"FCMask": "0x00000000",
@@ -1299,6 +1456,7 @@
},
{
"BriefDescription": "From TGR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR",
"PerPkg": "1",
@@ -1306,6 +1464,7 @@
},
{
"BriefDescription": "Full Line Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_FULL",
"FCMask": "0x00000000",
@@ -1316,6 +1475,7 @@
},
{
"BriefDescription": "ISOCH Full Line - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH",
"PerPkg": "1",
@@ -1324,6 +1484,7 @@
},
{
"BriefDescription": "Non-Inclusive - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_NI",
"PerPkg": "1",
@@ -1331,6 +1492,7 @@
},
{
"BriefDescription": "Non-Inclusive Miss - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS",
"PerPkg": "1",
@@ -1338,6 +1500,7 @@
},
{
"BriefDescription": "Partial Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL",
"FCMask": "0x00000000",
@@ -1348,6 +1511,7 @@
},
{
"BriefDescription": "ISOCH Partial - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH",
"PerPkg": "1",
@@ -1356,6 +1520,7 @@
},
{
"BriefDescription": "DDR, acting as Cache - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1364,6 +1529,7 @@
},
{
"BriefDescription": "DDR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1372,6 +1538,7 @@
},
{
"BriefDescription": "PMM - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.CH1_TO_PMM",
"FCMask": "0x00000000",
@@ -1383,6 +1550,7 @@
},
{
"BriefDescription": "From TGR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.FROM_TGR",
"PerPkg": "1",
@@ -1390,6 +1558,7 @@
},
{
"BriefDescription": "Full Non-ISOCH - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.FULL",
"PerPkg": "1",
@@ -1398,6 +1567,7 @@
},
{
"BriefDescription": "ISOCH Full Line - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH",
"PerPkg": "1",
@@ -1406,6 +1576,7 @@
},
{
"BriefDescription": "Non-Inclusive - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.NI",
"PerPkg": "1",
@@ -1413,6 +1584,7 @@
},
{
"BriefDescription": "Non-Inclusive Miss - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.NI_MISS",
"PerPkg": "1",
@@ -1420,6 +1592,7 @@
},
{
"BriefDescription": "Partial Non-ISOCH - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.PARTIAL",
"PerPkg": "1",
@@ -1428,6 +1601,7 @@
},
{
"BriefDescription": "ISOCH Partial - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH",
"PerPkg": "1",
@@ -1436,6 +1610,7 @@
},
{
"BriefDescription": "DDR, acting as Cache - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1444,6 +1619,7 @@
},
{
"BriefDescription": "DDR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1452,6 +1628,7 @@
},
{
"BriefDescription": "PMM - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_IMC_WRITES.TO_PMM",
"PerPkg": "1",
@@ -1460,6 +1637,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_M2M_PREFCAM_CIS_DROPS",
"PerPkg": "1",
@@ -1467,6 +1645,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI",
"PerPkg": "1",
@@ -1475,6 +1654,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT",
"PerPkg": "1",
@@ -1483,6 +1663,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI",
"PerPkg": "1",
@@ -1491,6 +1672,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT",
"PerPkg": "1",
@@ -1499,6 +1681,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.UPI_ALLCH",
"PerPkg": "1",
@@ -1507,6 +1690,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH",
"PerPkg": "1",
@@ -1515,6 +1699,7 @@
},
{
"BriefDescription": ": UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.UPI_ALLCH",
"PerPkg": "1",
@@ -1523,6 +1708,7 @@
},
{
"BriefDescription": ": XPT - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH",
"PerPkg": "1",
@@ -1531,6 +1717,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.RD_MERGED",
"PerPkg": "1",
@@ -1539,6 +1726,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.WR_MERGED",
"PerPkg": "1",
@@ -1547,6 +1735,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.WR_SQUASHED",
"PerPkg": "1",
@@ -1555,6 +1744,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_UPI",
"PerPkg": "1",
@@ -1563,6 +1753,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT",
"PerPkg": "1",
@@ -1571,6 +1762,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_UPI",
"PerPkg": "1",
@@ -1579,6 +1771,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT",
"PerPkg": "1",
@@ -1587,6 +1780,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH",
"PerPkg": "1",
@@ -1595,6 +1789,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH",
"PerPkg": "1",
@@ -1604,6 +1799,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH",
"PerPkg": "1",
@@ -1612,6 +1808,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1620,6 +1817,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1628,6 +1826,7 @@
},
{
"BriefDescription": "All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH",
"PerPkg": "1",
@@ -1636,6 +1835,7 @@
},
{
"BriefDescription": ": Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0",
"PerPkg": "1",
@@ -1644,6 +1844,7 @@
},
{
"BriefDescription": ": Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1",
"PerPkg": "1",
@@ -1652,6 +1853,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
"PerPkg": "1",
@@ -1660,6 +1862,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS",
"PerPkg": "1",
@@ -1668,6 +1871,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT",
"PerPkg": "1",
@@ -1676,6 +1880,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED",
"PerPkg": "1",
@@ -1684,6 +1889,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY",
"PerPkg": "1",
@@ -1691,6 +1897,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M2M_RxC_AD_INSERTS",
"PerPkg": "1",
@@ -1699,6 +1906,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M2M_RxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -1706,6 +1914,7 @@
},
{
"BriefDescription": "Clean NearMem Read Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN",
"PerPkg": "1",
@@ -1715,6 +1924,7 @@
},
{
"BriefDescription": "Dirty NearMem Read Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY",
"PerPkg": "1",
@@ -1724,6 +1934,7 @@
},
{
"BriefDescription": "Tag Hit : Clean NearMem Underfill Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN",
"PerPkg": "1",
@@ -1733,6 +1944,7 @@
},
{
"BriefDescription": "Tag Hit : Dirty NearMem Underfill Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY",
"PerPkg": "1",
@@ -1742,6 +1954,7 @@
},
{
"BriefDescription": "UNC_M2M_TAG_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2M_TAG_MISS",
"PerPkg": "1",
@@ -1750,6 +1963,7 @@
},
{
"BriefDescription": "Number AD Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M2M_TGR_AD_CREDITS",
"PerPkg": "1",
@@ -1757,6 +1971,7 @@
},
{
"BriefDescription": "Number BL Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_M2M_TGR_BL_CREDITS",
"PerPkg": "1",
@@ -1764,6 +1979,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -1772,6 +1988,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -1780,6 +1997,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1788,6 +2006,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1796,6 +2015,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2M_WPQ_FLUSH.CH0",
"PerPkg": "1",
@@ -1804,6 +2024,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2M_WPQ_FLUSH.CH1",
"PerPkg": "1",
@@ -1812,6 +2033,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0",
"PerPkg": "1",
@@ -1820,6 +2042,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1",
"PerPkg": "1",
@@ -1828,6 +2051,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0",
"PerPkg": "1",
@@ -1836,6 +2060,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1",
"PerPkg": "1",
@@ -1844,6 +2069,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -1852,6 +2078,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -1860,6 +2087,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M2M_WR_TRACKER_NE.CH0",
"PerPkg": "1",
@@ -1868,6 +2096,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M2M_WR_TRACKER_NE.CH1",
"PerPkg": "1",
@@ -1876,6 +2105,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Mirror",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M2M_WR_TRACKER_NE.MIRR",
"PerPkg": "1",
@@ -1884,6 +2114,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR",
"PerPkg": "1",
@@ -1892,6 +2123,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR",
"PerPkg": "1",
@@ -1900,6 +2132,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0",
"PerPkg": "1",
@@ -1908,6 +2141,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1",
"PerPkg": "1",
@@ -1916,6 +2150,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1924,6 +2159,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1932,6 +2168,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0",
"PerPkg": "1",
@@ -1940,6 +2177,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1",
"PerPkg": "1",
@@ -1948,6 +2186,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1956,6 +2195,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1964,6 +2204,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ",
"PerPkg": "1",
@@ -1973,6 +2214,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP",
"PerPkg": "1",
@@ -1982,6 +2224,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : VNA Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -1991,6 +2234,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : Writebacks",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB",
"PerPkg": "1",
@@ -2000,6 +2244,7 @@
},
{
"BriefDescription": "M3UPI Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M3UPI_CLOCKTICKS",
"PerPkg": "1",
@@ -2008,6 +2253,7 @@
},
{
"BriefDescription": "M3UPI CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M3UPI_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -2015,6 +2261,7 @@
},
{
"BriefDescription": "D2C Sent",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_M3UPI_D2C_SENT",
"PerPkg": "1",
@@ -2023,6 +2270,7 @@
},
{
"BriefDescription": "D2U Sent",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_M3UPI_D2U_SENT",
"PerPkg": "1",
@@ -2031,6 +2279,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -2040,6 +2289,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -2049,6 +2299,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO0 and IIO1 share the same ring destination. (1 VN0 credit only)",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO1_NCB",
"PerPkg": "1",
@@ -2058,6 +2309,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO2",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB",
"PerPkg": "1",
@@ -2067,6 +2319,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO3",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB",
"PerPkg": "1",
@@ -2076,6 +2329,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO4",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB",
"PerPkg": "1",
@@ -2085,6 +2339,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO5",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB",
"PerPkg": "1",
@@ -2094,6 +2349,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : All IIO targets for NCS are in single mask. ORs them together",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS",
"PerPkg": "1",
@@ -2103,6 +2359,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : Selected M2p BL NCS credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL",
"PerPkg": "1",
@@ -2112,6 +2369,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO5",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.UBOX_NCB",
"PerPkg": "1",
@@ -2121,6 +2379,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AD - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3e",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0",
"PerPkg": "1",
@@ -2130,6 +2389,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AD - Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x3e",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1",
"PerPkg": "1",
@@ -2139,6 +2399,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AD - Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x3e",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2",
"PerPkg": "1",
@@ -2148,6 +2409,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AK - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3e",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0",
"PerPkg": "1",
@@ -2157,6 +2419,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AK - Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x3e",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2",
"PerPkg": "1",
@@ -2166,6 +2429,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : BL - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3e",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0",
"PerPkg": "1",
@@ -2625,6 +2889,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL Arb",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB",
"PerPkg": "1",
@@ -2634,6 +2899,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idle",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE",
"PerPkg": "1",
@@ -2643,6 +2909,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 1",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT",
"PerPkg": "1",
@@ -2652,6 +2919,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 2",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT",
"PerPkg": "1",
@@ -3296,6 +3564,7 @@
},
{
"BriefDescription": "Message Held : Can't Slot AD",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD",
"PerPkg": "1",
@@ -3305,6 +3574,7 @@
},
{
"BriefDescription": "Message Held : Can't Slot BL",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL",
"PerPkg": "1",
@@ -3314,6 +3584,7 @@
},
{
"BriefDescription": "Message Held : Parallel Attempt",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT",
"PerPkg": "1",
@@ -3323,6 +3594,7 @@
},
{
"BriefDescription": "Message Held : Parallel Success",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS",
"PerPkg": "1",
@@ -3332,6 +3604,7 @@
},
{
"BriefDescription": "Message Held : VN0",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.VN0",
"PerPkg": "1",
@@ -3341,6 +3614,7 @@
},
{
"BriefDescription": "Message Held : VN1",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.VN1",
"PerPkg": "1",
@@ -3350,6 +3624,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ",
"PerPkg": "1",
@@ -3359,6 +3634,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP",
"PerPkg": "1",
@@ -3368,6 +3644,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP",
"PerPkg": "1",
@@ -3377,6 +3654,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB",
"PerPkg": "1",
@@ -3386,6 +3664,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS",
"PerPkg": "1",
@@ -3395,6 +3674,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP",
"PerPkg": "1",
@@ -3404,6 +3684,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4e",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB",
"PerPkg": "1",
@@ -3413,6 +3694,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ",
"PerPkg": "1",
@@ -3422,6 +3704,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP",
"PerPkg": "1",
@@ -3431,6 +3714,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP",
"PerPkg": "1",
@@ -3440,6 +3724,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB",
"PerPkg": "1",
@@ -3449,6 +3734,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS",
"PerPkg": "1",
@@ -3458,6 +3744,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP",
"PerPkg": "1",
@@ -3467,6 +3754,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4f",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB",
"PerPkg": "1",
@@ -3674,6 +3962,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS",
"FCMask": "0x00000000",
@@ -3684,6 +3973,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0",
"PerPkg": "1",
@@ -3693,6 +3983,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1",
"PerPkg": "1",
@@ -3702,6 +3993,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2",
"PerPkg": "1",
@@ -3711,6 +4003,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP",
"PerPkg": "1",
@@ -3720,6 +4013,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ",
"PerPkg": "1",
@@ -3729,6 +4023,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP",
"PerPkg": "1",
@@ -3738,6 +4033,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP",
"PerPkg": "1",
@@ -3747,6 +4043,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB",
"PerPkg": "1",
@@ -3756,6 +4053,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ",
"PerPkg": "1",
@@ -3765,6 +4063,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP",
"PerPkg": "1",
@@ -3774,6 +4073,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP",
"PerPkg": "1",
@@ -3783,6 +4083,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB",
"PerPkg": "1",
@@ -3792,6 +4093,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ",
"PerPkg": "1",
@@ -3801,6 +4103,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP",
"PerPkg": "1",
@@ -3810,6 +4113,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP",
"PerPkg": "1",
@@ -3819,6 +4123,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB",
"PerPkg": "1",
@@ -3828,6 +4133,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ",
"PerPkg": "1",
@@ -3837,6 +4143,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP",
"PerPkg": "1",
@@ -3846,6 +4153,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP",
"PerPkg": "1",
@@ -3911,6 +4219,7 @@
},
{
"BriefDescription": "AK Flow Q Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS",
"PerPkg": "1",
@@ -3997,6 +4306,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ",
"PerPkg": "1",
@@ -4006,6 +4316,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP",
"PerPkg": "1",
@@ -4015,6 +4326,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP",
"PerPkg": "1",
@@ -4024,6 +4336,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB",
"PerPkg": "1",
@@ -4033,6 +4346,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ",
"PerPkg": "1",
@@ -4042,6 +4356,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP",
"PerPkg": "1",
@@ -4051,6 +4366,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP",
"PerPkg": "1",
@@ -4060,6 +4376,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB",
"PerPkg": "1",
@@ -4069,6 +4386,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB",
"PerPkg": "1",
@@ -4078,6 +4396,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS",
"PerPkg": "1",
@@ -4087,6 +4406,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 NCS Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP",
"PerPkg": "1",
@@ -4096,6 +4416,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 NCB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB",
"PerPkg": "1",
@@ -4105,6 +4426,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB",
"PerPkg": "1",
@@ -4114,6 +4436,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS",
"PerPkg": "1",
@@ -4123,6 +4446,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1_NCB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP",
"PerPkg": "1",
@@ -4132,6 +4456,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1_NCS Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB",
"PerPkg": "1",
@@ -4253,6 +4578,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ",
"PerPkg": "1",
@@ -4262,6 +4588,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP",
"PerPkg": "1",
@@ -4271,6 +4598,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP",
"PerPkg": "1",
@@ -4280,6 +4608,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ",
"PerPkg": "1",
@@ -4289,6 +4618,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP",
"PerPkg": "1",
@@ -4298,6 +4628,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP",
"PerPkg": "1",
@@ -4307,6 +4638,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -4379,6 +4711,7 @@
},
{
"BriefDescription": "FlowQ Generated Prefetch",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN",
"PerPkg": "1",
@@ -4826,6 +5159,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AD Bouncable)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -4835,6 +5169,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AD credited)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -4844,6 +5179,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AK)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.AK",
"PerPkg": "1",
@@ -4853,6 +5189,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AKC)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.AKC",
"PerPkg": "1",
@@ -4862,6 +5199,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (BL Bouncable)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -4871,6 +5209,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (BL credited)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -4880,6 +5219,7 @@
},
{
"BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (IV)",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_MDF_CRS_TxR_INSERTS.IV",
"PerPkg": "1",
@@ -4889,6 +5229,7 @@
},
{
"BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AD)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AD",
"PerPkg": "1",
@@ -4898,6 +5239,7 @@
},
{
"BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AK)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AK",
"PerPkg": "1",
@@ -4907,6 +5249,7 @@
},
{
"BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AKC)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AKC",
"PerPkg": "1",
@@ -4916,6 +5259,7 @@
},
{
"BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (BL)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.BL",
"PerPkg": "1",
@@ -4925,6 +5269,7 @@
},
{
"BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (IV)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.IV",
"PerPkg": "1",
@@ -4934,6 +5279,7 @@
},
{
"BriefDescription": "Counts the number of cycles when the distress signals are asserted based on SBO Ingress threshold",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_MDF_FAST_ASSERTED.AD_BNC",
"PerPkg": "1",
@@ -4943,6 +5289,7 @@
},
{
"BriefDescription": "Counts the number of cycles when the distress signals are asserted based on SBO Ingress threshold",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_MDF_FAST_ASSERTED.BL_CRD",
"PerPkg": "1",
@@ -4952,6 +5299,7 @@
},
{
"BriefDescription": "UPI Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_UPI_CLOCKTICKS",
"PerPkg": "1",
@@ -4960,6 +5308,7 @@
},
{
"BriefDescription": "Direct packet attempts : D2C",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C",
"PerPkg": "1",
@@ -4969,6 +5318,7 @@
},
{
"BriefDescription": "Direct packet attempts : D2K",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K",
"PerPkg": "1",
@@ -4978,6 +5328,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
"PerPkg": "1",
@@ -4986,6 +5337,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
"PerPkg": "1",
@@ -4994,6 +5346,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
"PerPkg": "1",
@@ -5002,6 +5355,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
"PerPkg": "1",
@@ -5010,6 +5364,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
"PerPkg": "1",
@@ -5018,6 +5373,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
"PerPkg": "1",
@@ -5026,6 +5382,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
"PerPkg": "1",
@@ -5034,6 +5391,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
"PerPkg": "1",
@@ -5042,6 +5400,7 @@
},
{
"BriefDescription": "Cycles in L1",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_UPI_L1_POWER_CYCLES",
"PerPkg": "1",
@@ -5050,6 +5409,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
"PerPkg": "1",
@@ -5058,6 +5418,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
"PerPkg": "1",
@@ -5066,6 +5427,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
"PerPkg": "1",
@@ -5074,6 +5436,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
"PerPkg": "1",
@@ -5082,6 +5445,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
"PerPkg": "1",
@@ -5090,6 +5454,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
"PerPkg": "1",
@@ -5097,6 +5462,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
"PerPkg": "1",
@@ -5105,6 +5471,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
"PerPkg": "1",
@@ -5113,6 +5480,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
"PerPkg": "1",
@@ -5121,6 +5489,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
"PerPkg": "1",
@@ -5129,6 +5498,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
"PerPkg": "1",
@@ -5137,6 +5507,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
"PerPkg": "1",
@@ -5145,6 +5516,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
"PerPkg": "1",
@@ -5153,6 +5525,7 @@
},
{
"BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_UPI_PHY_INIT_CYCLES",
"PerPkg": "1",
@@ -5160,6 +5533,7 @@
},
{
"BriefDescription": "L1 Req Nack",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_UPI_POWER_L1_NACK",
"PerPkg": "1",
@@ -5168,6 +5542,7 @@
},
{
"BriefDescription": "L1 Req (same as L1 Ack).",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_UPI_POWER_L1_REQ",
"PerPkg": "1",
@@ -5176,6 +5551,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
"PerPkg": "1",
@@ -5184,6 +5560,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
"PerPkg": "1",
@@ -5192,6 +5569,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
"PerPkg": "1",
@@ -5200,6 +5578,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
"PerPkg": "1",
@@ -5208,6 +5587,7 @@
},
{
"BriefDescription": "Cycles in L0p",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_UPI_RxL0P_POWER_CYCLES",
"PerPkg": "1",
@@ -5216,6 +5596,7 @@
},
{
"BriefDescription": "Cycles in L0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_UPI_RxL0_POWER_CYCLES",
"PerPkg": "1",
@@ -5224,6 +5605,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.DATA",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.DATA",
"PerPkg": "1",
@@ -5232,6 +5614,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.LLCRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.LLCRD",
"PerPkg": "1",
@@ -5240,6 +5623,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.LLCTRL",
"PerPkg": "1",
@@ -5248,6 +5632,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.NULL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.NULL",
"PerPkg": "1",
@@ -5256,6 +5641,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.PROTHDR",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.PROTHDR",
"PerPkg": "1",
@@ -5264,6 +5650,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT0",
"PerPkg": "1",
@@ -5272,6 +5659,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT1",
"PerPkg": "1",
@@ -5280,6 +5668,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
"PerPkg": "1",
@@ -5288,6 +5677,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB",
"PerPkg": "1",
@@ -5297,6 +5687,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC",
"PerPkg": "1",
@@ -5306,6 +5697,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS",
"PerPkg": "1",
@@ -5315,6 +5707,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC",
"PerPkg": "1",
@@ -5324,6 +5717,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT0",
"PerPkg": "1",
@@ -5333,6 +5727,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT1",
"PerPkg": "1",
@@ -5342,6 +5737,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
"PerPkg": "1",
@@ -5351,6 +5747,7 @@
},
{
"BriefDescription": "CRC Errors Detected",
+ "Counter": "0,1,2,3",
"EventCode": "0x0b",
"EventName": "UNC_UPI_RxL_CRC_ERRORS",
"PerPkg": "1",
@@ -5359,6 +5756,7 @@
},
{
"BriefDescription": "LLR Requests Sent",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT",
"PerPkg": "1",
@@ -5367,6 +5765,7 @@
},
{
"BriefDescription": "VN0 Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0",
"PerPkg": "1",
@@ -5375,6 +5774,7 @@
},
{
"BriefDescription": "VN1 Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x3a",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1",
"PerPkg": "1",
@@ -5383,6 +5783,7 @@
},
{
"BriefDescription": "VNA Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA",
"FCMask": "0x00000000",
@@ -5393,6 +5794,7 @@
},
{
"BriefDescription": "Valid Flits Received : All Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.ALL_DATA",
"PerPkg": "1",
@@ -5402,6 +5804,7 @@
},
{
"BriefDescription": "Null FLITs received from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.ALL_NULL",
"PerPkg": "1",
@@ -5410,6 +5813,7 @@
},
{
"BriefDescription": "Valid Flits Received : Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.DATA",
"PerPkg": "1",
@@ -5419,6 +5823,7 @@
},
{
"BriefDescription": "Valid Flits Received : Idle",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.IDLE",
"PerPkg": "1",
@@ -5428,6 +5833,7 @@
},
{
"BriefDescription": "Valid Flits Received : LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.LLCRD",
"PerPkg": "1",
@@ -5437,6 +5843,7 @@
},
{
"BriefDescription": "Valid Flits Received : LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.LLCTRL",
"PerPkg": "1",
@@ -5446,6 +5853,7 @@
},
{
"BriefDescription": "Valid Flits Received : All Non Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.NON_DATA",
"PerPkg": "1",
@@ -5455,6 +5863,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.NULL",
"PerPkg": "1",
@@ -5464,6 +5873,7 @@
},
{
"BriefDescription": "Valid Flits Received : Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.PROTHDR",
"PerPkg": "1",
@@ -5473,6 +5883,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.SLOT0",
"PerPkg": "1",
@@ -5482,6 +5893,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.SLOT1",
"PerPkg": "1",
@@ -5491,6 +5903,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.SLOT2",
"PerPkg": "1",
@@ -5500,6 +5913,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT0",
"PerPkg": "1",
@@ -5509,6 +5923,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT1",
"PerPkg": "1",
@@ -5518,6 +5933,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
"PerPkg": "1",
@@ -5527,6 +5943,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0",
"PerPkg": "1",
@@ -5536,6 +5953,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1",
"PerPkg": "1",
@@ -5545,6 +5963,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
"PerPkg": "1",
@@ -5554,6 +5973,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
"PerPkg": "1",
@@ -5562,6 +5982,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
"PerPkg": "1",
@@ -5570,6 +5991,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
"PerPkg": "1",
@@ -5578,6 +6000,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
"PerPkg": "1",
@@ -5586,6 +6009,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
"PerPkg": "1",
@@ -5594,6 +6018,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
"PerPkg": "1",
@@ -5602,6 +6027,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
"PerPkg": "1",
@@ -5610,6 +6036,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
"PerPkg": "1",
@@ -5618,6 +6045,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
"PerPkg": "1",
@@ -5626,6 +6054,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
"PerPkg": "1",
@@ -5634,6 +6063,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
"PerPkg": "1",
@@ -5642,6 +6072,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
"PerPkg": "1",
@@ -5650,6 +6081,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
"PerPkg": "1",
@@ -5658,6 +6090,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
"PerPkg": "1",
@@ -5666,6 +6099,7 @@
},
{
"BriefDescription": "Cycles in L0p",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES",
"PerPkg": "1",
@@ -5674,6 +6108,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
"PerPkg": "1",
@@ -5681,6 +6116,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
"PerPkg": "1",
@@ -5688,6 +6124,7 @@
},
{
"BriefDescription": "Cycles in L0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_UPI_TxL0_POWER_CYCLES",
"PerPkg": "1",
@@ -5696,6 +6133,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.DATA",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.DATA",
"PerPkg": "1",
@@ -5704,6 +6142,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.LLCRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.LLCRD",
"PerPkg": "1",
@@ -5712,6 +6151,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.LLCTRL",
"PerPkg": "1",
@@ -5720,6 +6160,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.NULL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.NULL",
"PerPkg": "1",
@@ -5728,6 +6169,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.PROTHDR",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.PROTHDR",
"PerPkg": "1",
@@ -5736,6 +6178,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT0",
"PerPkg": "1",
@@ -5744,6 +6187,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT1",
"PerPkg": "1",
@@ -5752,6 +6196,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
"PerPkg": "1",
@@ -5760,6 +6205,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB",
"PerPkg": "1",
@@ -5769,6 +6215,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC",
"PerPkg": "1",
@@ -5778,6 +6225,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS",
"PerPkg": "1",
@@ -5787,6 +6235,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC",
"PerPkg": "1",
@@ -5796,6 +6245,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Bypassed",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_UPI_TxL_BYPASSED",
"PerPkg": "1",
@@ -5804,6 +6254,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_DATA",
"PerPkg": "1",
@@ -5813,6 +6264,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_LLCRD",
"PerPkg": "1",
@@ -5822,6 +6274,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_LLCTRL",
"PerPkg": "1",
@@ -5831,6 +6284,7 @@
},
{
"BriefDescription": "All Null Flits",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_NULL",
"PerPkg": "1",
@@ -5839,6 +6293,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_PROTHDR",
"PerPkg": "1",
@@ -5848,6 +6303,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.DATA",
"PerPkg": "1",
@@ -5857,6 +6313,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Idle",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.IDLE",
"PerPkg": "1",
@@ -5866,6 +6323,7 @@
},
{
"BriefDescription": "Valid Flits Sent : LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.LLCRD",
"PerPkg": "1",
@@ -5875,6 +6333,7 @@
},
{
"BriefDescription": "Valid Flits Sent : LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.LLCTRL",
"PerPkg": "1",
@@ -5884,6 +6343,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All Non Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.NON_DATA",
"PerPkg": "1",
@@ -5893,6 +6353,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.NULL",
"PerPkg": "1",
@@ -5902,6 +6363,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.PROTHDR",
"PerPkg": "1",
@@ -5911,6 +6373,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.SLOT0",
"PerPkg": "1",
@@ -5920,6 +6383,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.SLOT1",
"PerPkg": "1",
@@ -5929,6 +6393,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.SLOT2",
"PerPkg": "1",
@@ -5938,6 +6403,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_UPI_TxL_INSERTS",
"PerPkg": "1",
@@ -5946,6 +6412,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_UPI_TxL_OCCUPANCY",
"PerPkg": "1",
@@ -5954,6 +6421,7 @@
},
{
"BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
"PerPkg": "1",
@@ -5961,6 +6429,7 @@
},
{
"BriefDescription": "VNA Credits Pending Return - Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY",
"PerPkg": "1",
@@ -5969,6 +6438,7 @@
},
{
"BriefDescription": "Message Received : Doorbell",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD",
"PerPkg": "1",
@@ -5977,6 +6447,7 @@
},
{
"BriefDescription": "Message Received : Interrupt",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.INT_PRIO",
"PerPkg": "1",
@@ -5986,6 +6457,7 @@
},
{
"BriefDescription": "Message Received : IPI",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.IPI_RCVD",
"PerPkg": "1",
@@ -5995,6 +6467,7 @@
},
{
"BriefDescription": "Message Received : MSI",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.MSI_RCVD",
"PerPkg": "1",
@@ -6004,6 +6477,7 @@
},
{
"BriefDescription": "Message Received : VLW",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.VLW_RCVD",
"PerPkg": "1",
@@ -6157,6 +6631,7 @@
},
{
"BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK",
+ "Counter": "0,1",
"EventCode": "0x45",
"EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK",
"PerPkg": "1",
@@ -6190,6 +6665,7 @@
},
{
"BriefDescription": "RACU Request",
+ "Counter": "0,1",
"EventCode": "0x46",
"EventName": "UNC_U_RACU_REQUESTS",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json
index 8b5f54fed103..caf82e7ba92b 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "1",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN",
"PerPkg": "1",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "2",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN",
"PerPkg": "1",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "3",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN",
"PerPkg": "1",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "4",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN",
"PerPkg": "1",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "5",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN",
"PerPkg": "1",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "6",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN",
"PerPkg": "1",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "7",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN",
"PerPkg": "1",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "8",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN",
"PerPkg": "1",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "9",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART0_FREERUN",
"PerPkg": "1",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "10",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART1_FREERUN",
"PerPkg": "1",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "11",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART2_FREERUN",
"PerPkg": "1",
@@ -89,6 +100,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "12",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART3_FREERUN",
"PerPkg": "1",
@@ -97,6 +109,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "13",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART4_FREERUN",
"PerPkg": "1",
@@ -105,6 +118,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "14",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART5_FREERUN",
"PerPkg": "1",
@@ -113,6 +127,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "15",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART6_FREERUN",
"PerPkg": "1",
@@ -121,6 +136,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "16",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_OUT.PART7_FREERUN",
"PerPkg": "1",
@@ -129,6 +145,7 @@
},
{
"BriefDescription": "IIO Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_IIO_CLOCKTICKS",
"PerPkg": "1",
@@ -146,6 +163,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",
"FCMask": "0x07",
@@ -157,6 +175,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",
"FCMask": "0x07",
@@ -168,6 +187,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",
"FCMask": "0x07",
@@ -179,6 +199,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2",
"FCMask": "0x07",
@@ -190,6 +211,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3",
"FCMask": "0x07",
@@ -201,6 +223,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4",
"FCMask": "0x07",
@@ -212,6 +235,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5",
"FCMask": "0x07",
@@ -223,6 +247,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6",
"FCMask": "0x07",
@@ -234,6 +259,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7",
"FCMask": "0x07",
@@ -245,6 +271,7 @@
},
{
"BriefDescription": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
"FCMask": "0x07",
@@ -254,6 +281,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 0",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0",
"FCMask": "0x07",
@@ -265,6 +293,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 1",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1",
"FCMask": "0x07",
@@ -276,6 +305,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 2",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2",
"FCMask": "0x07",
@@ -287,6 +317,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 3",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3",
"FCMask": "0x07",
@@ -298,6 +329,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 4",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4",
"FCMask": "0x07",
@@ -309,6 +341,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 5",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5",
"FCMask": "0x07",
@@ -320,6 +353,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 6",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6",
"FCMask": "0x07",
@@ -331,6 +365,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy : Part 7",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7",
"FCMask": "0x07",
@@ -342,6 +377,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part0-7",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.ALL_PARTS",
"FCMask": "0x07",
@@ -352,6 +388,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -363,6 +400,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part1",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -374,6 +412,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part2",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -385,6 +424,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part3",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -396,6 +436,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -407,6 +448,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -418,6 +460,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -429,6 +472,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -440,6 +484,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part0-7 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.ALL_PARTS",
"FCMask": "0x07",
@@ -450,6 +495,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -461,6 +507,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -472,6 +519,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part0 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -483,6 +531,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part1 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -494,6 +543,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part2 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -505,6 +555,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part3 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -516,6 +567,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -527,6 +579,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -538,6 +591,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -549,6 +603,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -560,6 +615,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -571,6 +627,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -582,6 +639,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -593,6 +651,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -604,6 +663,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4",
"FCMask": "0x07",
@@ -615,6 +675,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5",
"FCMask": "0x07",
@@ -626,6 +687,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6",
"FCMask": "0x07",
@@ -637,6 +699,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7",
"FCMask": "0x07",
@@ -648,6 +711,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -659,6 +723,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -670,6 +735,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -681,6 +747,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -692,6 +759,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -703,6 +771,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -714,6 +783,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -725,6 +795,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -736,6 +807,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.ALL_PARTS",
"FCMask": "0x07",
@@ -747,6 +819,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0",
"FCMask": "0x07",
@@ -758,6 +831,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1",
"FCMask": "0x07",
@@ -769,6 +843,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2",
"FCMask": "0x07",
@@ -780,6 +855,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3",
"FCMask": "0x07",
@@ -791,6 +867,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4",
"FCMask": "0x07",
@@ -802,6 +879,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5",
"FCMask": "0x07",
@@ -813,6 +891,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6",
"FCMask": "0x07",
@@ -824,6 +903,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7",
"FCMask": "0x07",
@@ -835,6 +915,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by IIO Part0-7 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS",
"FCMask": "0x07",
@@ -845,6 +926,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by IIO Part0 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -856,6 +938,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by IIO Part1 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -867,6 +950,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by IIO Part2 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -878,6 +962,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by IIO Part3 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -889,6 +974,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -900,6 +986,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -911,6 +998,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -922,6 +1010,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -933,6 +1022,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made by IIO Part0-7 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS",
"FCMask": "0x07",
@@ -943,6 +1033,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made by IIO Part0 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -954,6 +1045,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made by IIO Part1 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -965,6 +1057,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made by IIO Part2 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -976,6 +1069,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made by IIO Part3 to Memory",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -987,6 +1081,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -998,6 +1093,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -1009,6 +1105,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -1020,6 +1117,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -1031,6 +1129,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -1042,6 +1141,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -1053,6 +1153,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -1064,6 +1165,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -1075,6 +1177,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -1086,6 +1189,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -1097,6 +1201,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -1108,6 +1213,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -1119,6 +1225,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA",
"FCMask": "0x07",
@@ -1130,6 +1237,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR",
"FCMask": "0x07",
@@ -1141,6 +1249,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Processing response from IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT",
"FCMask": "0x07",
@@ -1152,6 +1261,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Issuing to IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ",
"FCMask": "0x07",
@@ -1163,6 +1273,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN",
"FCMask": "0x07",
@@ -1174,6 +1285,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.WR",
"FCMask": "0x07",
@@ -1185,6 +1297,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.DATA",
"FCMask": "0x07",
@@ -1196,6 +1309,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR",
"FCMask": "0x07",
@@ -1207,6 +1321,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Processing response from IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT",
"FCMask": "0x07",
@@ -1218,6 +1333,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Issuing to IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ",
"FCMask": "0x07",
@@ -1229,6 +1345,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN",
"FCMask": "0x07",
@@ -1240,6 +1357,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.WR",
"FCMask": "0x07",
@@ -1300,6 +1418,7 @@
},
{
"BriefDescription": ": PWC Hit to a 2M page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS",
"PerPkg": "1",
@@ -1309,6 +1428,7 @@
},
{
"BriefDescription": ": PWT Hit to a 256T page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_256T_HITS",
"PerPkg": "1",
@@ -1318,6 +1438,7 @@
},
{
"BriefDescription": ": PWC Hit to a 4K page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS",
"PerPkg": "1",
@@ -1327,6 +1448,7 @@
},
{
"BriefDescription": ": PWC Hit to a 1G page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS",
"PerPkg": "1",
@@ -1336,6 +1458,7 @@
},
{
"BriefDescription": ": PageWalk cache fill",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS",
"PerPkg": "1",
@@ -1345,6 +1468,7 @@
},
{
"BriefDescription": ": PageWalk cache lookup",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS",
"PerPkg": "1",
@@ -1354,6 +1478,7 @@
},
{
"BriefDescription": ": PWC Hit to a 2M page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.SLPWC_1G_HITS",
"PerPkg": "1",
@@ -1363,6 +1488,7 @@
},
{
"BriefDescription": ": PWC Hit to a 2M page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.SLPWC_256T_HITS",
"PerPkg": "1",
@@ -1372,6 +1498,7 @@
},
{
"BriefDescription": ": PWC Hit to a 1G page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.SLPWC_512G_HITS",
"PerPkg": "1",
@@ -1381,6 +1508,7 @@
},
{
"BriefDescription": ": Global IOTLB invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.PWT_OCCUPANCY_MSB",
"PerPkg": "1",
@@ -1391,6 +1519,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0",
"PerPkg": "1",
@@ -1401,6 +1530,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1",
"PerPkg": "1",
@@ -1411,6 +1541,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1421,6 +1552,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS1",
"PerPkg": "1",
@@ -1431,6 +1563,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus) and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1",
"PerPkg": "1",
@@ -1441,6 +1574,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus) and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1451,6 +1585,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0",
"PerPkg": "1",
@@ -1461,6 +1596,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1",
"PerPkg": "1",
@@ -1471,6 +1607,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1481,6 +1618,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS1",
"PerPkg": "1",
@@ -1491,6 +1629,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus) and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1",
"PerPkg": "1",
@@ -1501,6 +1640,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus) and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1511,6 +1651,7 @@
},
{
"BriefDescription": "Number requests PCIe makes of the main die : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL",
"FCMask": "0x07",
@@ -1522,6 +1663,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Abort",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT",
"FCMask": "0x07",
@@ -1532,6 +1674,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Confined P2P",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P",
"FCMask": "0x07",
@@ -1542,6 +1685,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Local P2P",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P",
"FCMask": "0x07",
@@ -1552,6 +1696,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Multi-cast",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST",
"FCMask": "0x07",
@@ -1562,6 +1707,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM",
"FCMask": "0x07",
@@ -1572,6 +1718,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : MsgB",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB",
"FCMask": "0x07",
@@ -1582,6 +1729,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Remote P2P",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P",
"FCMask": "0x07",
@@ -1592,6 +1740,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Ubox",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX",
"FCMask": "0x07",
@@ -1602,6 +1751,7 @@
},
{
"BriefDescription": "ITC address map 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8f",
"EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU",
"PerPkg": "1",
@@ -1611,6 +1761,7 @@
},
{
"BriefDescription": "Outbound cacheline requests issued : 64B requests issued to device",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO",
"FCMask": "0x07",
@@ -1622,6 +1773,7 @@
},
{
"BriefDescription": "Outbound TLP (transaction layer packet) requests issued : To device",
+ "Counter": "0,1,2,3",
"EventCode": "0xd1",
"EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO",
"FCMask": "0x07",
@@ -1633,6 +1785,7 @@
},
{
"BriefDescription": "PWT occupancy. Does not include 9th bit of occupancy (will undercount if PWT is greater than 255 per cycle).",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_IIO_PWT_OCCUPANCY",
"PerPkg": "1",
@@ -1643,6 +1796,7 @@
},
{
"BriefDescription": "Request Ownership : PCIe Request complete",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA",
"FCMask": "0x07",
@@ -1654,6 +1808,7 @@
},
{
"BriefDescription": "Request Ownership : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR",
"FCMask": "0x07",
@@ -1665,6 +1820,7 @@
},
{
"BriefDescription": "Request Ownership : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN",
"FCMask": "0x07",
@@ -1676,6 +1832,7 @@
},
{
"BriefDescription": "Request Ownership : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR",
"FCMask": "0x07",
@@ -1687,6 +1844,7 @@
},
{
"BriefDescription": "Processing response from IOMMU : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR",
"FCMask": "0x07",
@@ -1698,6 +1856,7 @@
},
{
"BriefDescription": "Processing response from IOMMU : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT",
"FCMask": "0x07",
@@ -1708,6 +1867,7 @@
},
{
"BriefDescription": "Processing response from IOMMU : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ",
"FCMask": "0x07",
@@ -1719,6 +1879,7 @@
},
{
"BriefDescription": "Processing response from IOMMU : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN",
"FCMask": "0x07",
@@ -1730,6 +1891,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA",
"FCMask": "0x07",
@@ -1741,6 +1903,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR",
"FCMask": "0x07",
@@ -1752,6 +1915,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN",
"FCMask": "0x07",
@@ -1763,6 +1927,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR",
"FCMask": "0x07",
@@ -1774,6 +1939,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part0",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -1785,6 +1951,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part1",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -1796,6 +1963,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part2",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -1807,6 +1975,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part3",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -1818,6 +1987,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -1829,6 +1999,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -1840,6 +2011,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -1851,6 +2023,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -1862,6 +2035,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -1873,6 +2047,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -1884,6 +2059,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -1895,6 +2071,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -1906,6 +2083,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -1917,6 +2095,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -1928,6 +2107,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -1939,6 +2119,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -1950,6 +2131,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -1961,6 +2143,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -1972,6 +2155,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -1983,6 +2167,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -1994,6 +2179,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -2005,6 +2191,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -2016,6 +2203,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -2027,6 +2215,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -2038,6 +2227,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0",
"FCMask": "0x07",
@@ -2049,6 +2239,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1",
"FCMask": "0x07",
@@ -2060,6 +2251,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2",
"FCMask": "0x07",
@@ -2071,6 +2263,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3",
"FCMask": "0x07",
@@ -2082,6 +2275,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4",
"FCMask": "0x07",
@@ -2093,6 +2287,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5",
"FCMask": "0x07",
@@ -2104,6 +2299,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6",
"FCMask": "0x07",
@@ -2115,6 +2311,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7",
"FCMask": "0x07",
@@ -2126,6 +2323,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part0 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -2137,6 +2335,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part1 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -2148,6 +2347,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part2 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -2159,6 +2359,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part3 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -2170,6 +2371,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -2181,6 +2383,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -2192,6 +2395,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -2203,6 +2407,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -2214,6 +2419,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part0 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -2225,6 +2431,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part1 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -2236,6 +2443,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part2 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -2247,6 +2455,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part3 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -2258,6 +2467,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -2269,6 +2479,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -2280,6 +2491,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -2291,6 +2503,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -2302,6 +2515,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -2313,6 +2527,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -2324,6 +2539,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -2335,6 +2551,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -2346,6 +2563,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -2357,6 +2575,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -2368,6 +2587,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -2379,6 +2599,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -2390,6 +2611,7 @@
},
{
"BriefDescription": "M2P Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M2P_CLOCKTICKS",
"PerPkg": "1",
@@ -2398,6 +2620,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M2P_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -2405,6 +2628,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -2414,6 +2638,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -2423,6 +2648,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0",
"PerPkg": "1",
@@ -2432,6 +2658,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1",
"PerPkg": "1",
@@ -2441,6 +2668,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0",
"PerPkg": "1",
@@ -2450,6 +2678,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1",
"PerPkg": "1",
@@ -2459,6 +2688,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0",
"PerPkg": "1",
@@ -2468,6 +2698,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1",
"PerPkg": "1",
@@ -2477,6 +2708,7 @@
},
{
"BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS",
"PerPkg": "1",
@@ -2486,6 +2718,7 @@
},
{
"BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB",
"PerPkg": "1",
@@ -2495,6 +2728,7 @@
},
{
"BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS",
"PerPkg": "1",
@@ -2504,6 +2738,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0",
"PerPkg": "1",
@@ -2513,6 +2748,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1",
"PerPkg": "1",
@@ -2522,6 +2758,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0",
"PerPkg": "1",
@@ -2531,6 +2768,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1",
"PerPkg": "1",
@@ -2540,6 +2778,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0",
"PerPkg": "1",
@@ -2549,6 +2788,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1",
"PerPkg": "1",
@@ -2558,6 +2798,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB",
"PerPkg": "1",
@@ -2566,6 +2807,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS",
"PerPkg": "1",
@@ -2574,6 +2816,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB",
"PerPkg": "1",
@@ -2582,6 +2825,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS",
"PerPkg": "1",
@@ -2590,6 +2834,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB",
"PerPkg": "1",
@@ -2598,6 +2843,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS",
"PerPkg": "1",
@@ -2606,6 +2852,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB",
"PerPkg": "1",
@@ -2614,6 +2861,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS",
"PerPkg": "1",
@@ -2622,6 +2870,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB",
"PerPkg": "1",
@@ -2630,6 +2879,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS",
"PerPkg": "1",
@@ -2638,6 +2888,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB",
"PerPkg": "1",
@@ -2646,6 +2897,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS",
"PerPkg": "1",
@@ -2654,6 +2906,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB",
"PerPkg": "1",
@@ -2662,6 +2915,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS",
"PerPkg": "1",
@@ -2670,6 +2924,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB",
"PerPkg": "1",
@@ -2678,6 +2933,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS",
"PerPkg": "1",
@@ -2686,6 +2942,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB",
"PerPkg": "1",
@@ -2694,6 +2951,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS",
"PerPkg": "1",
@@ -2702,6 +2960,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB",
"PerPkg": "1",
@@ -2710,6 +2969,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS",
"PerPkg": "1",
@@ -2718,6 +2978,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB",
"PerPkg": "1",
@@ -2726,6 +2987,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS",
"PerPkg": "1",
@@ -2734,6 +2996,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB",
"PerPkg": "1",
@@ -2742,6 +3005,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS",
"PerPkg": "1",
@@ -2750,6 +3014,7 @@
},
{
"BriefDescription": "Local P2P Shared Credits Returned : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -2758,6 +3023,7 @@
},
{
"BriefDescription": "Local P2P Shared Credits Returned : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -2766,6 +3032,7 @@
},
{
"BriefDescription": "Local P2P Shared Credits Returned : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -2774,6 +3041,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -2782,6 +3050,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -2790,6 +3059,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -2798,6 +3068,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent3",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3",
"PerPkg": "1",
@@ -2806,6 +3077,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent4",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4",
"PerPkg": "1",
@@ -2814,6 +3086,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent5",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5",
"PerPkg": "1",
@@ -2822,6 +3095,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB",
"PerPkg": "1",
@@ -2830,6 +3104,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS",
"PerPkg": "1",
@@ -2838,6 +3113,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB",
"PerPkg": "1",
@@ -2846,6 +3122,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS",
"PerPkg": "1",
@@ -2854,6 +3131,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB",
"PerPkg": "1",
@@ -2862,6 +3140,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS",
"PerPkg": "1",
@@ -2870,6 +3149,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB",
"PerPkg": "1",
@@ -2878,6 +3158,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS",
"PerPkg": "1",
@@ -2886,6 +3167,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB",
"PerPkg": "1",
@@ -2894,6 +3176,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS",
"PerPkg": "1",
@@ -2902,6 +3185,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB",
"PerPkg": "1",
@@ -2910,6 +3194,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS",
"PerPkg": "1",
@@ -2918,6 +3203,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB",
"PerPkg": "1",
@@ -2926,6 +3212,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS",
"PerPkg": "1",
@@ -2934,6 +3221,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB",
"PerPkg": "1",
@@ -2942,6 +3230,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS",
"PerPkg": "1",
@@ -2950,6 +3239,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB",
"PerPkg": "1",
@@ -2958,6 +3248,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS",
"PerPkg": "1",
@@ -2966,6 +3257,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB",
"PerPkg": "1",
@@ -2974,6 +3266,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS",
"PerPkg": "1",
@@ -2982,6 +3275,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB",
"PerPkg": "1",
@@ -2990,6 +3284,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS",
"PerPkg": "1",
@@ -2998,6 +3293,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB",
"PerPkg": "1",
@@ -3006,6 +3302,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS",
"PerPkg": "1",
@@ -3014,6 +3311,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : All",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -3022,6 +3320,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Local NCB",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB",
"PerPkg": "1",
@@ -3030,6 +3329,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Local NCS",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS",
"PerPkg": "1",
@@ -3038,6 +3338,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Remote NCB",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB",
"PerPkg": "1",
@@ -3046,6 +3347,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Remote NCS",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS",
"PerPkg": "1",
@@ -3054,6 +3356,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL",
"PerPkg": "1",
@@ -3062,6 +3365,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Local NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB",
"PerPkg": "1",
@@ -3070,6 +3374,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Local NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS",
"PerPkg": "1",
@@ -3078,6 +3383,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Remote NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB",
"PerPkg": "1",
@@ -3086,6 +3392,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Remote NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS",
"PerPkg": "1",
@@ -3094,6 +3401,7 @@
},
{
"BriefDescription": "Shared Credits Received : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL",
"PerPkg": "1",
@@ -3102,6 +3410,7 @@
},
{
"BriefDescription": "Shared Credits Received : Local NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB",
"PerPkg": "1",
@@ -3110,6 +3419,7 @@
},
{
"BriefDescription": "Shared Credits Received : Local NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS",
"PerPkg": "1",
@@ -3118,6 +3428,7 @@
},
{
"BriefDescription": "Shared Credits Received : Remote NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB",
"PerPkg": "1",
@@ -3126,6 +3437,7 @@
},
{
"BriefDescription": "Shared Credits Received : Remote NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS",
"PerPkg": "1",
@@ -3134,6 +3446,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_DRS",
"PerPkg": "1",
@@ -3142,6 +3455,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCB",
"PerPkg": "1",
@@ -3150,6 +3464,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCS",
"PerPkg": "1",
@@ -3158,6 +3473,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_DRS",
"PerPkg": "1",
@@ -3166,6 +3482,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCB",
"PerPkg": "1",
@@ -3174,6 +3491,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCS",
"PerPkg": "1",
@@ -3182,6 +3500,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_DRS",
"PerPkg": "1",
@@ -3190,6 +3509,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCB",
"PerPkg": "1",
@@ -3198,6 +3518,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCS",
"PerPkg": "1",
@@ -3206,6 +3527,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCB",
"PerPkg": "1",
@@ -3214,6 +3536,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCS",
"PerPkg": "1",
@@ -3222,6 +3545,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCB",
"PerPkg": "1",
@@ -3230,6 +3554,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCS",
"PerPkg": "1",
@@ -3238,6 +3563,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCB",
"PerPkg": "1",
@@ -3246,6 +3572,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCS",
"PerPkg": "1",
@@ -3254,6 +3581,7 @@
},
{
"BriefDescription": "Remote P2P Shared Credits Returned : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -3262,6 +3590,7 @@
},
{
"BriefDescription": "Remote P2P Shared Credits Returned : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -3270,6 +3599,7 @@
},
{
"BriefDescription": "Remote P2P Shared Credits Returned : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -3278,6 +3608,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -3286,6 +3617,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -3294,6 +3626,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -3302,6 +3635,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_DRS",
"PerPkg": "1",
@@ -3310,6 +3644,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCB",
"PerPkg": "1",
@@ -3318,6 +3653,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCS",
"PerPkg": "1",
@@ -3326,6 +3662,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_DRS",
"PerPkg": "1",
@@ -3334,6 +3671,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCB",
"PerPkg": "1",
@@ -3342,6 +3680,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCS",
"PerPkg": "1",
@@ -3350,6 +3689,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_DRS",
"PerPkg": "1",
@@ -3358,6 +3698,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCB",
"PerPkg": "1",
@@ -3366,6 +3707,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCS",
"PerPkg": "1",
@@ -3374,6 +3716,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_DRS",
"PerPkg": "1",
@@ -3382,6 +3725,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCB",
"PerPkg": "1",
@@ -3390,6 +3734,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCS",
"PerPkg": "1",
@@ -3398,6 +3743,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_DRS",
"PerPkg": "1",
@@ -3406,6 +3752,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCB",
"PerPkg": "1",
@@ -3414,6 +3761,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCS",
"PerPkg": "1",
@@ -3422,6 +3770,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_DRS",
"PerPkg": "1",
@@ -3430,6 +3779,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCB",
"PerPkg": "1",
@@ -3438,6 +3788,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCS",
"PerPkg": "1",
@@ -3446,6 +3797,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.ALL",
"PerPkg": "1",
@@ -3455,6 +3807,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI",
"PerPkg": "1",
@@ -3464,6 +3817,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB",
"PerPkg": "1",
@@ -3473,6 +3827,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS",
"PerPkg": "1",
@@ -3482,6 +3837,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB",
"PerPkg": "1",
@@ -3491,6 +3847,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS",
"PerPkg": "1",
@@ -3500,6 +3857,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCB",
"PerPkg": "1",
@@ -3509,6 +3867,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCS",
"PerPkg": "1",
@@ -3518,6 +3877,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.ALL",
"PerPkg": "1",
@@ -3527,6 +3887,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI",
"PerPkg": "1",
@@ -3536,6 +3897,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB",
"PerPkg": "1",
@@ -3545,6 +3907,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS",
"PerPkg": "1",
@@ -3554,6 +3917,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB",
"PerPkg": "1",
@@ -3563,6 +3927,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS",
"PerPkg": "1",
@@ -3572,6 +3937,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.UPI_NCB",
"PerPkg": "1",
@@ -3581,6 +3947,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.UPI_NCS",
"PerPkg": "1",
@@ -3590,6 +3957,7 @@
},
{
"BriefDescription": "UNC_M2P_TxC_CREDITS.PMM",
+ "Counter": "0,1",
"EventCode": "0x2d",
"EventName": "UNC_M2P_TxC_CREDITS.PMM",
"PerPkg": "1",
@@ -3598,6 +3966,7 @@
},
{
"BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ",
+ "Counter": "0,1",
"EventCode": "0x2d",
"EventName": "UNC_M2P_TxC_CREDITS.PRQ",
"PerPkg": "1",
@@ -3606,6 +3975,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_0",
"FCMask": "0x00000000",
@@ -3617,6 +3987,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_1",
"FCMask": "0x00000000",
@@ -3628,6 +3999,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_0",
"FCMask": "0x00000000",
@@ -3639,6 +4011,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_1",
"FCMask": "0x00000000",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json
index 3ff9e9b722c8..20c064e818a9 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Cycles - at UCLK",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M2HBM_CLOCKTICKS",
"PerPkg": "1",
@@ -8,6 +9,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M2HBM_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -15,6 +17,7 @@
},
{
"BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -23,6 +26,7 @@
},
{
"BriefDescription": "Cycles when direct to core mode, which bypasses the CHA, was disabled : Non Cisgress",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
"PerPkg": "1",
@@ -32,6 +36,7 @@
},
{
"BriefDescription": "Counts the time when FM didn't do d2c for fill reads (cross tile case)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_NOTFORKED",
"PerPkg": "1",
@@ -39,6 +44,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2HBM_DIRECT2CORE_TXN_OVERRIDE",
"PerPkg": "1",
@@ -47,6 +53,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction was overridden : Cisgress",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2HBM_DIRECT2CORE_TXN_OVERRIDE.CISGRESS",
"PerPkg": "1",
@@ -55,6 +62,7 @@
},
{
"BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_CREDITS",
"PerPkg": "1",
@@ -63,6 +71,7 @@
},
{
"BriefDescription": "Cycles when direct to Intel UPI was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -71,6 +80,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled : Cisgress D2U Ignored",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.CISGRESS",
"FCMask": "0x00000000",
@@ -82,6 +92,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled : Egress Ignored D2U",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.EGRESS",
"FCMask": "0x00000000",
@@ -93,6 +104,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled : Non Cisgress D2U Ignored",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
"FCMask": "0x00000000",
@@ -104,6 +116,7 @@
},
{
"BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x1c",
"EventName": "UNC_M2HBM_DIRECT2UPI_TXN_OVERRIDE",
"PerPkg": "1",
@@ -112,6 +125,7 @@
},
{
"BriefDescription": "Number of times a direct to UPI transaction was overridden.",
+ "Counter": "0,1,2,3",
"EventCode": "0x1c",
"EventName": "UNC_M2HBM_DIRECT2UPI_TXN_OVERRIDE.CISGRESS",
"PerPkg": "1",
@@ -120,6 +134,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_A",
"PerPkg": "1",
@@ -128,6 +143,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_I",
"PerPkg": "1",
@@ -136,6 +152,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_P",
"PerPkg": "1",
@@ -144,6 +161,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_S",
"PerPkg": "1",
@@ -152,6 +170,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_A",
"PerPkg": "1",
@@ -160,6 +179,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_I",
"PerPkg": "1",
@@ -168,6 +188,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_P",
"PerPkg": "1",
@@ -176,6 +197,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1d",
"EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_S",
"PerPkg": "1",
@@ -184,6 +206,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.ANY",
"PerPkg": "1",
@@ -193,6 +216,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_A",
"PerPkg": "1",
@@ -202,6 +226,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_I",
"PerPkg": "1",
@@ -211,6 +236,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_S",
"PerPkg": "1",
@@ -220,6 +246,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_A",
"PerPkg": "1",
@@ -228,6 +255,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_I",
"PerPkg": "1",
@@ -236,6 +264,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_P",
"PerPkg": "1",
@@ -244,6 +273,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_S",
"PerPkg": "1",
@@ -252,6 +282,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_A",
"PerPkg": "1",
@@ -260,6 +291,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_I",
"PerPkg": "1",
@@ -268,6 +300,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_P",
"PerPkg": "1",
@@ -276,6 +309,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x1e",
"EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_S",
"PerPkg": "1",
@@ -284,6 +318,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from A to I",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A2I",
"PerPkg": "1",
@@ -292,6 +327,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from A to S",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A2S",
"PerPkg": "1",
@@ -300,6 +336,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.ANY",
"PerPkg": "1",
@@ -308,6 +345,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_I_HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -319,6 +357,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_I_MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -330,6 +369,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_S_HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -341,6 +381,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_S_MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -352,6 +393,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -363,6 +405,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from I to A",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I2A",
"PerPkg": "1",
@@ -371,6 +414,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from I to S",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I2S",
"PerPkg": "1",
@@ -379,6 +423,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_A_HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -390,6 +435,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_A_MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -401,6 +447,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_S_HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -412,6 +459,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_S_MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -423,6 +471,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -434,6 +483,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from S to A",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S2A",
"PerPkg": "1",
@@ -442,6 +492,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from S to I",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S2I",
"PerPkg": "1",
@@ -450,6 +501,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_A_HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -461,6 +513,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_A_MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -472,6 +525,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_I_HIT_NON_PMM",
"FCMask": "0x00000000",
@@ -483,6 +537,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_I_MISS_NON_PMM",
"FCMask": "0x00000000",
@@ -494,6 +549,7 @@
},
{
"BriefDescription": "Count distress signalled on AkAd cmp message",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.AD",
"PerPkg": "1",
@@ -502,6 +558,7 @@
},
{
"BriefDescription": "Count distress signalled on any packet type",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.ALL",
"PerPkg": "1",
@@ -510,6 +567,7 @@
},
{
"BriefDescription": "Count distress signalled on Bl Cmp message",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.BL_CMP",
"PerPkg": "1",
@@ -518,6 +576,7 @@
},
{
"BriefDescription": "Count distress signalled on NM fill write message",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.CROSSTILE_NMWR",
"PerPkg": "1",
@@ -526,6 +585,7 @@
},
{
"BriefDescription": "Count distress signalled on D2Cha message",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.D2CHA",
"PerPkg": "1",
@@ -534,6 +594,7 @@
},
{
"BriefDescription": "Count distress signalled on D2c message",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.D2CORE",
"PerPkg": "1",
@@ -542,6 +603,7 @@
},
{
"BriefDescription": "Count distress signalled on D2k message",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_M2HBM_DISTRESS.D2UPI",
"PerPkg": "1",
@@ -550,6 +612,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2HBM_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -559,6 +622,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2HBM_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -568,6 +632,7 @@
},
{
"BriefDescription": "Count when Starve Glocab counter is at 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2HBM_IGR_STARVE_WINNER.MASK7",
"FCMask": "0x00000000",
@@ -578,6 +643,7 @@
},
{
"BriefDescription": "Reads to iMC issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.ALL",
"PerPkg": "1",
@@ -586,6 +652,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH0.ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH0.ALL",
"PerPkg": "1",
@@ -594,6 +661,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH0.NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH0.NORMAL",
"PerPkg": "1",
@@ -602,6 +670,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH0_ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH0_ALL",
"FCMask": "0x00000000",
@@ -612,6 +681,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH0_FROM_TGR",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH0_FROM_TGR",
"PerPkg": "1",
@@ -620,6 +690,7 @@
},
{
"BriefDescription": "Critical Priority - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH0_ISOCH",
"PerPkg": "1",
@@ -628,6 +699,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH0_NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH0_NORMAL",
"FCMask": "0x00000000",
@@ -638,6 +710,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH1.ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH1.ALL",
"PerPkg": "1",
@@ -646,6 +719,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
"PerPkg": "1",
@@ -654,6 +728,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH1_ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH1_ALL",
"FCMask": "0x00000000",
@@ -664,6 +739,7 @@
},
{
"BriefDescription": "From TGR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH1_FROM_TGR",
"PerPkg": "1",
@@ -672,6 +748,7 @@
},
{
"BriefDescription": "Critical Priority - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH1_ISOCH",
"PerPkg": "1",
@@ -680,6 +757,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.CH1_NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.CH1_NORMAL",
"FCMask": "0x00000000",
@@ -690,6 +768,7 @@
},
{
"BriefDescription": "From TGR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.FROM_TGR",
"PerPkg": "1",
@@ -698,6 +777,7 @@
},
{
"BriefDescription": "Critical Priority - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.ISOCH",
"PerPkg": "1",
@@ -706,6 +786,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_READS.NORMAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2HBM_IMC_READS.NORMAL",
"PerPkg": "1",
@@ -714,6 +795,7 @@
},
{
"BriefDescription": "All Writes - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.ALL",
"PerPkg": "1",
@@ -722,6 +804,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0.ALL",
"PerPkg": "1",
@@ -730,6 +813,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.FULL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0.FULL",
"PerPkg": "1",
@@ -738,6 +822,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.PARTIAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0.PARTIAL",
"PerPkg": "1",
@@ -746,6 +831,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_ALL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_ALL",
"FCMask": "0x00000000",
@@ -756,6 +842,7 @@
},
{
"BriefDescription": "From TGR - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_FROM_TGR",
"PerPkg": "1",
@@ -763,6 +850,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_FULL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_FULL",
"FCMask": "0x00000000",
@@ -773,6 +861,7 @@
},
{
"BriefDescription": "ISOCH Full Line - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_FULL_ISOCH",
"PerPkg": "1",
@@ -781,6 +870,7 @@
},
{
"BriefDescription": "Non-Inclusive - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_NI",
"FCMask": "0x00000000",
@@ -790,6 +880,7 @@
},
{
"BriefDescription": "Non-Inclusive Miss - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_NI_MISS",
"FCMask": "0x00000000",
@@ -799,6 +890,7 @@
},
{
"BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL",
"FCMask": "0x00000000",
@@ -809,6 +901,7 @@
},
{
"BriefDescription": "ISOCH Partial - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL_ISOCH",
"PerPkg": "1",
@@ -817,6 +910,7 @@
},
{
"BriefDescription": "All Writes - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1.ALL",
"PerPkg": "1",
@@ -825,6 +919,7 @@
},
{
"BriefDescription": "Full Line Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1.FULL",
"PerPkg": "1",
@@ -833,6 +928,7 @@
},
{
"BriefDescription": "Partial Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1.PARTIAL",
"PerPkg": "1",
@@ -841,6 +937,7 @@
},
{
"BriefDescription": "All Writes - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_ALL",
"FCMask": "0x00000000",
@@ -851,6 +948,7 @@
},
{
"BriefDescription": "From TGR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_FROM_TGR",
"PerPkg": "1",
@@ -858,6 +956,7 @@
},
{
"BriefDescription": "Full Line Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_FULL",
"FCMask": "0x00000000",
@@ -868,6 +967,7 @@
},
{
"BriefDescription": "ISOCH Full Line - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_FULL_ISOCH",
"PerPkg": "1",
@@ -876,6 +976,7 @@
},
{
"BriefDescription": "Non-Inclusive - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_NI",
"FCMask": "0x00000000",
@@ -885,6 +986,7 @@
},
{
"BriefDescription": "Non-Inclusive Miss - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_NI_MISS",
"FCMask": "0x00000000",
@@ -894,6 +996,7 @@
},
{
"BriefDescription": "Partial Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_PARTIAL",
"FCMask": "0x00000000",
@@ -904,6 +1007,7 @@
},
{
"BriefDescription": "ISOCH Partial - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.CH1_PARTIAL_ISOCH",
"PerPkg": "1",
@@ -912,6 +1016,7 @@
},
{
"BriefDescription": "From TGR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.FROM_TGR",
"PerPkg": "1",
@@ -919,6 +1024,7 @@
},
{
"BriefDescription": "Full Non-ISOCH - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.FULL",
"PerPkg": "1",
@@ -927,6 +1033,7 @@
},
{
"BriefDescription": "ISOCH Full Line - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.FULL_ISOCH",
"PerPkg": "1",
@@ -935,6 +1042,7 @@
},
{
"BriefDescription": "Non-Inclusive - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.NI",
"FCMask": "0x00000000",
@@ -944,6 +1052,7 @@
},
{
"BriefDescription": "Non-Inclusive Miss - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.NI_MISS",
"FCMask": "0x00000000",
@@ -953,6 +1062,7 @@
},
{
"BriefDescription": "Partial Non-ISOCH - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.PARTIAL",
"PerPkg": "1",
@@ -961,6 +1071,7 @@
},
{
"BriefDescription": "ISOCH Partial - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2HBM_IMC_WRITES.PARTIAL_ISOCH",
"PerPkg": "1",
@@ -969,6 +1080,7 @@
},
{
"BriefDescription": "UNC_M2HBM_PREFCAM_CIS_DROPS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5c",
"EventName": "UNC_M2HBM_PREFCAM_CIS_DROPS",
"PerPkg": "1",
@@ -976,6 +1088,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH0_UPI",
"PerPkg": "1",
@@ -984,6 +1097,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH0_XPT",
"PerPkg": "1",
@@ -992,6 +1106,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH1_UPI",
"PerPkg": "1",
@@ -1000,6 +1115,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH1_XPT",
"PerPkg": "1",
@@ -1008,6 +1124,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.UPI_ALLCH",
"PerPkg": "1",
@@ -1016,6 +1133,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.XPT_ALLCH",
"PerPkg": "1",
@@ -1024,6 +1142,7 @@
},
{
"BriefDescription": ": UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_MERGE.UPI_ALLCH",
"PerPkg": "1",
@@ -1032,6 +1151,7 @@
},
{
"BriefDescription": ": XPT - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_MERGE.XPT_ALLCH",
"PerPkg": "1",
@@ -1040,6 +1160,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x5e",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.RD_MERGED",
"PerPkg": "1",
@@ -1048,6 +1169,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x5e",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.WR_MERGED",
"PerPkg": "1",
@@ -1056,6 +1178,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x5e",
"EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.WR_SQUASHED",
"PerPkg": "1",
@@ -1064,6 +1187,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH0_UPI",
"PerPkg": "1",
@@ -1072,6 +1196,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH0_XPT",
"PerPkg": "1",
@@ -1080,6 +1205,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH1_UPI",
"PerPkg": "1",
@@ -1088,6 +1214,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH1_XPT",
"PerPkg": "1",
@@ -1096,6 +1223,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2HBM_PREFCAM_INSERTS.UPI_ALLCH",
"PerPkg": "1",
@@ -1104,6 +1232,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2HBM_PREFCAM_INSERTS.XPT_ALLCH",
"PerPkg": "1",
@@ -1113,6 +1242,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.ALLCH",
"PerPkg": "1",
@@ -1121,6 +1251,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1129,6 +1260,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1137,6 +1269,7 @@
},
{
"BriefDescription": "All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.ALLCH",
"PerPkg": "1",
@@ -1145,6 +1278,7 @@
},
{
"BriefDescription": ": Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.CH0",
"PerPkg": "1",
@@ -1153,6 +1287,7 @@
},
{
"BriefDescription": ": Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5f",
"EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.CH1",
"PerPkg": "1",
@@ -1161,6 +1296,7 @@
},
{
"BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
"PerPkg": "1",
@@ -1169,6 +1305,7 @@
},
{
"BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.CIS",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.CIS",
"PerPkg": "1",
@@ -1177,6 +1314,7 @@
},
{
"BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.SQUASHED",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.SQUASHED",
"PerPkg": "1",
@@ -1185,6 +1323,7 @@
},
{
"BriefDescription": "UNC_M2HBM_PREFCAM_RxC_OCCUPANCY",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M2HBM_PREFCAM_RxC_OCCUPANCY",
"FCMask": "0x00000000",
@@ -1194,6 +1333,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M2HBM_RxC_AD.INSERTS",
"FCMask": "0x00000000",
@@ -1204,6 +1344,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M2HBM_RxC_AD_INSERTS",
"PerPkg": "1",
@@ -1212,6 +1353,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M2HBM_RxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -1219,6 +1361,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) : BL Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M2HBM_RxC_BL.INSERTS",
"FCMask": "0x00000000",
@@ -1230,6 +1373,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) : BL Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M2HBM_RxC_BL_INSERTS",
"PerPkg": "1",
@@ -1239,6 +1383,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M2HBM_RxC_BL_OCCUPANCY",
"PerPkg": "1",
@@ -1246,6 +1391,7 @@
},
{
"BriefDescription": "Number AD Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M2HBM_TGR_AD_CREDITS",
"PerPkg": "1",
@@ -1253,6 +1399,7 @@
},
{
"BriefDescription": "Number BL Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_M2HBM_TGR_BL_CREDITS",
"PerPkg": "1",
@@ -1260,6 +1407,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2HBM_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -1268,6 +1416,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2HBM_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -1276,6 +1425,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2HBM_TRACKER_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1284,6 +1434,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2HBM_TRACKER_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1292,6 +1443,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) : AD Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M2HBM_TxC_AD.INSERTS",
"FCMask": "0x00000000",
@@ -1303,6 +1455,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) : AD Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M2HBM_TxC_AD_INSERTS",
"PerPkg": "1",
@@ -1312,6 +1465,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x07",
"EventName": "UNC_M2HBM_TxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -1319,6 +1473,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) : Inserts - CMS0 - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x0E",
"EventName": "UNC_M2HBM_TxC_BL.INSERTS_CMS0",
"FCMask": "0x00000000",
@@ -1330,6 +1485,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) : Inserts - CMS1 - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x0E",
"EventName": "UNC_M2HBM_TxC_BL.INSERTS_CMS1",
"FCMask": "0x00000000",
@@ -1341,6 +1497,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Occupancy : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x0f",
"EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -1349,6 +1506,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Occupancy : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x0f",
"EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.CMS0",
"PerPkg": "1",
@@ -1357,6 +1515,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Occupancy : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x0f",
"EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.CMS1",
"PerPkg": "1",
@@ -1365,6 +1524,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2HBM_WPQ_FLUSH.CH0",
"PerPkg": "1",
@@ -1373,6 +1533,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2HBM_WPQ_FLUSH.CH1",
"PerPkg": "1",
@@ -1381,6 +1542,7 @@
},
{
"BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Regular : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2HBM_WPQ_NO_REG_CRD.CHN0",
"PerPkg": "1",
@@ -1389,6 +1551,7 @@
},
{
"BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Regular : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2HBM_WPQ_NO_REG_CRD.CHN1",
"PerPkg": "1",
@@ -1397,6 +1560,7 @@
},
{
"BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Special : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2HBM_WPQ_NO_SPEC_CRD.CHN0",
"PerPkg": "1",
@@ -1405,6 +1569,7 @@
},
{
"BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Special : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2HBM_WPQ_NO_SPEC_CRD.CHN1",
"PerPkg": "1",
@@ -1413,6 +1578,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2HBM_WR_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -1421,6 +1587,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2HBM_WR_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -1429,6 +1596,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_INSERTS.CH0",
"PerPkg": "1",
@@ -1437,6 +1605,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_INSERTS.CH1",
"PerPkg": "1",
@@ -1445,6 +1614,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1453,6 +1623,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1461,6 +1632,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2HBM_WR_TRACKER_POSTED_INSERTS.CH0",
"PerPkg": "1",
@@ -1469,6 +1641,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2HBM_WR_TRACKER_POSTED_INSERTS.CH1",
"PerPkg": "1",
@@ -1477,6 +1650,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2HBM_WR_TRACKER_POSTED_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -1485,6 +1659,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2HBM_WR_TRACKER_POSTED_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -1493,6 +1668,7 @@
},
{
"BriefDescription": "Activate due to read, write, underfill, or bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.ALL",
"PerPkg": "1",
@@ -1502,6 +1678,7 @@
},
{
"BriefDescription": "Activate due to read",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.RD",
"PerPkg": "1",
@@ -1511,6 +1688,7 @@
},
{
"BriefDescription": "HBM Activate Count : Activate due to Read in PCH0",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.RD_PCH0",
"PerPkg": "1",
@@ -1520,6 +1698,7 @@
},
{
"BriefDescription": "HBM Activate Count : Activate due to Read in PCH1",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.RD_PCH1",
"PerPkg": "1",
@@ -1529,6 +1708,7 @@
},
{
"BriefDescription": "HBM Activate Count : Underfill Read transaction on Page Empty or Page Miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.UFILL",
"PerPkg": "1",
@@ -1538,6 +1718,7 @@
},
{
"BriefDescription": "HBM Activate Count",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.UFILL_PCH0",
"PerPkg": "1",
@@ -1547,6 +1728,7 @@
},
{
"BriefDescription": "HBM Activate Count",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.UFILL_PCH1",
"PerPkg": "1",
@@ -1556,6 +1738,7 @@
},
{
"BriefDescription": "Activate due to write",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.WR",
"PerPkg": "1",
@@ -1565,6 +1748,7 @@
},
{
"BriefDescription": "HBM Activate Count : Activate due to Write in PCH0",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.WR_PCH0",
"PerPkg": "1",
@@ -1574,6 +1758,7 @@
},
{
"BriefDescription": "HBM Activate Count : Activate due to Write in PCH1",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_MCHBM_ACT_COUNT.WR_PCH1",
"PerPkg": "1",
@@ -1583,6 +1768,7 @@
},
{
"BriefDescription": "All CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.ALL",
"PerPkg": "1",
@@ -1591,6 +1777,7 @@
},
{
"BriefDescription": "Pseudo Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.PCH0",
"PerPkg": "1",
@@ -1600,6 +1787,7 @@
},
{
"BriefDescription": "Pseudo Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.PCH1",
"PerPkg": "1",
@@ -1609,6 +1797,7 @@
},
{
"BriefDescription": "Read CAS commands issued (regular and underfill)",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.RD",
"PerPkg": "1",
@@ -1617,6 +1806,7 @@
},
{
"BriefDescription": "Regular read CAS commands with precharge",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.RD_PRE_REG",
"PerPkg": "1",
@@ -1625,6 +1815,7 @@
},
{
"BriefDescription": "Underfill read CAS commands with precharge",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.RD_PRE_UNDERFILL",
"PerPkg": "1",
@@ -1633,6 +1824,7 @@
},
{
"BriefDescription": "Regular read CAS commands issued (does not include underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.RD_REG",
"PerPkg": "1",
@@ -1641,6 +1833,7 @@
},
{
"BriefDescription": "Underfill read CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.RD_UNDERFILL",
"PerPkg": "1",
@@ -1649,6 +1842,7 @@
},
{
"BriefDescription": "Write CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.WR",
"PerPkg": "1",
@@ -1657,6 +1851,7 @@
},
{
"BriefDescription": "HBM RD_CAS and WR_CAS Commands. : HBM WR_CAS commands w/o auto-pre",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.WR_NONPRE",
"PerPkg": "1",
@@ -1665,6 +1860,7 @@
},
{
"BriefDescription": "Write CAS commands with precharge",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_MCHBM_CAS_COUNT.WR_PRE",
"PerPkg": "1",
@@ -1673,6 +1869,7 @@
},
{
"BriefDescription": "Pseudo Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.PCH0",
"PerPkg": "1",
@@ -1681,6 +1878,7 @@
},
{
"BriefDescription": "Pseudo Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.PCH1",
"PerPkg": "1",
@@ -1689,6 +1887,7 @@
},
{
"BriefDescription": "Read CAS Command in Interleaved Mode (32B)",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_32B",
"PerPkg": "1",
@@ -1697,6 +1896,7 @@
},
{
"BriefDescription": "Read CAS Command in Regular Mode (64B) in Pseudochannel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_64B",
"PerPkg": "1",
@@ -1705,6 +1905,7 @@
},
{
"BriefDescription": "Underfill Read CAS Command in Interleaved Mode (32B)",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_UFILL_32B",
"PerPkg": "1",
@@ -1713,6 +1914,7 @@
},
{
"BriefDescription": "Underfill Read CAS Command in Regular Mode (64B) in Pseudochannel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_UFILL_64B",
"PerPkg": "1",
@@ -1721,6 +1923,7 @@
},
{
"BriefDescription": "Write CAS Command in Interleaved Mode (32B)",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.WR_32B",
"PerPkg": "1",
@@ -1729,6 +1932,7 @@
},
{
"BriefDescription": "Write CAS Command in Regular Mode (64B) in Pseudochannel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.WR_64B",
"PerPkg": "1",
@@ -1737,6 +1941,7 @@
},
{
"BriefDescription": "IMC Clockticks at DCLK frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_MCHBM_CLOCKTICKS",
"PerPkg": "1",
@@ -1745,6 +1950,7 @@
},
{
"BriefDescription": "HBM Precharge All Commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_MCHBM_HBM_PREALL.PCH0",
"PerPkg": "1",
@@ -1754,6 +1960,7 @@
},
{
"BriefDescription": "HBM Precharge All Commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_MCHBM_HBM_PREALL.PCH1",
"PerPkg": "1",
@@ -1763,6 +1970,7 @@
},
{
"BriefDescription": "All Precharge Commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_MCHBM_HBM_PRE_ALL",
"PerPkg": "1",
@@ -1772,6 +1980,7 @@
},
{
"BriefDescription": "IMC Clockticks at HCLK frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_MCHBM_HCLOCKTICKS",
"PerPkg": "1",
@@ -1779,6 +1988,7 @@
},
{
"BriefDescription": "All precharge events",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.ALL",
"PerPkg": "1",
@@ -1788,6 +1998,7 @@
},
{
"BriefDescription": "Precharge from MC page table",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.PGT",
"PerPkg": "1",
@@ -1797,6 +2008,7 @@
},
{
"BriefDescription": "HBM Precharge commands. : Precharges from Page Table",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.PGT_PCH0",
"PerPkg": "1",
@@ -1806,6 +2018,7 @@
},
{
"BriefDescription": "HBM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.PGT_PCH1",
"PerPkg": "1",
@@ -1815,6 +2028,7 @@
},
{
"BriefDescription": "Precharge due to read on page miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.RD",
"PerPkg": "1",
@@ -1824,6 +2038,7 @@
},
{
"BriefDescription": "HBM Precharge commands. : Precharge due to read",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.RD_PCH0",
"PerPkg": "1",
@@ -1833,6 +2048,7 @@
},
{
"BriefDescription": "HBM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.RD_PCH1",
"PerPkg": "1",
@@ -1842,6 +2058,7 @@
},
{
"BriefDescription": "HBM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.UFILL",
"PerPkg": "1",
@@ -1851,6 +2068,7 @@
},
{
"BriefDescription": "HBM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.UFILL_PCH0",
"PerPkg": "1",
@@ -1860,6 +2078,7 @@
},
{
"BriefDescription": "HBM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.UFILL_PCH1",
"PerPkg": "1",
@@ -1869,6 +2088,7 @@
},
{
"BriefDescription": "Precharge due to write on page miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.WR",
"PerPkg": "1",
@@ -1878,6 +2098,7 @@
},
{
"BriefDescription": "HBM Precharge commands. : Precharge due to write",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.WR_PCH0",
"PerPkg": "1",
@@ -1887,6 +2108,7 @@
},
{
"BriefDescription": "HBM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_MCHBM_PRE_COUNT.WR_PCH1",
"PerPkg": "1",
@@ -1896,6 +2118,7 @@
},
{
"BriefDescription": "Counts the number of cycles where the read buffer has greater than UMASK elements. NOTE: Umask must be set to the maximum number of elements in the queue (24 entries for SPR).",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_MCHBM_RDB_FULL",
"PerPkg": "1",
@@ -1903,6 +2126,7 @@
},
{
"BriefDescription": "Counts the number of inserts into the read buffer.",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_MCHBM_RDB_INSERTS",
"PerPkg": "1",
@@ -1911,6 +2135,7 @@
},
{
"BriefDescription": "Read Data Buffer Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_MCHBM_RDB_INSERTS.PCH0",
"PerPkg": "1",
@@ -1919,6 +2144,7 @@
},
{
"BriefDescription": "Read Data Buffer Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_MCHBM_RDB_INSERTS.PCH1",
"PerPkg": "1",
@@ -1927,6 +2153,7 @@
},
{
"BriefDescription": "Counts the number of elements in the read buffer per cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_MCHBM_RDB_OCCUPANCY",
"PerPkg": "1",
@@ -1934,6 +2161,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_MCHBM_RPQ_INSERTS.PCH0",
"PerPkg": "1",
@@ -1943,6 +2171,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_MCHBM_RPQ_INSERTS.PCH1",
"PerPkg": "1",
@@ -1952,6 +2181,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_MCHBM_RPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
@@ -1960,6 +2190,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_MCHBM_RPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
@@ -1968,6 +2199,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_MCHBM_WPQ_INSERTS.PCH0",
"PerPkg": "1",
@@ -1977,6 +2209,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_MCHBM_WPQ_INSERTS.PCH1",
"PerPkg": "1",
@@ -1986,6 +2219,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_MCHBM_WPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
@@ -1994,6 +2228,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_MCHBM_WPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
@@ -2002,6 +2237,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_MCHBM_WPQ_READ_HIT",
"FCMask": "0x00000000",
@@ -2012,6 +2248,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_MCHBM_WPQ_READ_HIT.PCH0",
"PerPkg": "1",
@@ -2021,6 +2258,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_MCHBM_WPQ_READ_HIT.PCH1",
"PerPkg": "1",
@@ -2030,6 +2268,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_MCHBM_WPQ_WRITE_HIT",
"FCMask": "0x00000000",
@@ -2040,6 +2279,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_MCHBM_WPQ_WRITE_HIT.PCH0",
"PerPkg": "1",
@@ -2049,6 +2289,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_MCHBM_WPQ_WRITE_HIT.PCH1",
"PerPkg": "1",
@@ -2058,6 +2299,7 @@
},
{
"BriefDescription": "Activate due to read, write, underfill, or bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M_ACT_COUNT.ALL",
"PerPkg": "1",
@@ -2067,6 +2309,7 @@
},
{
"BriefDescription": "All DRAM CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.ALL",
"PerPkg": "1",
@@ -2076,6 +2319,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.PCH0",
"PerPkg": "1",
@@ -2085,6 +2329,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.PCH1",
"PerPkg": "1",
@@ -2094,6 +2339,7 @@
},
{
"BriefDescription": "All DRAM read CAS commands issued (including underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD",
"PerPkg": "1",
@@ -2103,6 +2349,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_PRE_REG",
"PerPkg": "1",
@@ -2112,6 +2359,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL",
"PerPkg": "1",
@@ -2121,6 +2369,7 @@
},
{
"BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_REG",
"PerPkg": "1",
@@ -2130,6 +2379,7 @@
},
{
"BriefDescription": "DRAM underfill read CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
"PerPkg": "1",
@@ -2139,6 +2389,7 @@
},
{
"BriefDescription": "All DRAM write CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.WR",
"PerPkg": "1",
@@ -2148,6 +2399,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.WR_NONPRE",
"PerPkg": "1",
@@ -2157,6 +2409,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M_CAS_COUNT.WR_PRE",
"PerPkg": "1",
@@ -2166,6 +2419,7 @@
},
{
"BriefDescription": "Pseudo Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.PCH0",
"PerPkg": "1",
@@ -2174,6 +2428,7 @@
},
{
"BriefDescription": "Pseudo Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.PCH1",
"PerPkg": "1",
@@ -2182,6 +2437,7 @@
},
{
"BriefDescription": "Read CAS Command in Interleaved Mode (32B)",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_32B",
"PerPkg": "1",
@@ -2190,6 +2446,7 @@
},
{
"BriefDescription": "Read CAS Command in Regular Mode (64B) in Pseudochannel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_64B",
"PerPkg": "1",
@@ -2198,6 +2455,7 @@
},
{
"BriefDescription": "Underfill Read CAS Command in Interleaved Mode (32B)",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_UFILL_32B",
"PerPkg": "1",
@@ -2206,6 +2464,7 @@
},
{
"BriefDescription": "Underfill Read CAS Command in Regular Mode (64B) in Pseudochannel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_UFILL_64B",
"PerPkg": "1",
@@ -2214,6 +2473,7 @@
},
{
"BriefDescription": "Write CAS Command in Interleaved Mode (32B)",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.WR_32B",
"PerPkg": "1",
@@ -2222,6 +2482,7 @@
},
{
"BriefDescription": "Write CAS Command in Regular Mode (64B) in Pseudochannel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M_CAS_ISSUED_REQ_LEN.WR_64B",
"PerPkg": "1",
@@ -2230,6 +2491,7 @@
},
{
"BriefDescription": "IMC Clockticks at DCLK frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M_CLOCKTICKS",
"PerPkg": "1",
@@ -2239,6 +2501,7 @@
},
{
"BriefDescription": "DRAM Precharge All Commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M_DRAM_PRE_ALL",
"PerPkg": "1",
@@ -2248,6 +2511,7 @@
},
{
"BriefDescription": "IMC Clockticks at HCLK frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M_HCLOCKTICKS",
"PerPkg": "1",
@@ -2256,6 +2520,7 @@
},
{
"BriefDescription": "UNC_M_PCLS.RD",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M_PCLS.RD",
"PerPkg": "1",
@@ -2264,6 +2529,7 @@
},
{
"BriefDescription": "UNC_M_PCLS.TOTAL",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M_PCLS.TOTAL",
"PerPkg": "1",
@@ -2272,6 +2538,7 @@
},
{
"BriefDescription": "UNC_M_PCLS.WR",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M_PCLS.WR",
"PerPkg": "1",
@@ -2280,6 +2547,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M_PMM_RPQ_INSERTS",
"PerPkg": "1",
@@ -2288,6 +2556,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH0",
"PerPkg": "1",
@@ -2297,6 +2566,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH1",
"PerPkg": "1",
@@ -2306,6 +2576,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH0",
"PerPkg": "1",
@@ -2315,6 +2586,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH1",
"PerPkg": "1",
@@ -2324,6 +2596,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH0",
"PerPkg": "1",
@@ -2333,6 +2606,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH1",
"PerPkg": "1",
@@ -2342,6 +2616,7 @@
},
{
"BriefDescription": "PMM (for IXP) Write Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M_PMM_WPQ_CYCLES_NE",
"PerPkg": "1",
@@ -2349,6 +2624,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xe7",
"EventName": "UNC_M_PMM_WPQ_INSERTS",
"PerPkg": "1",
@@ -2357,6 +2633,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -2366,6 +2643,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH0",
"PerPkg": "1",
@@ -2375,6 +2653,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH1",
"PerPkg": "1",
@@ -2384,6 +2663,7 @@
},
{
"BriefDescription": "PMM (for IXP) Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.CAS",
"PerPkg": "1",
@@ -2393,6 +2673,7 @@
},
{
"BriefDescription": "PMM (for IXP) Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.PWR",
"PerPkg": "1",
@@ -2402,6 +2683,7 @@
},
{
"BriefDescription": "Channel PPD Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M_POWER_CHANNEL_PPD",
"PerPkg": "1",
@@ -2410,6 +2692,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_0",
"PerPkg": "1",
@@ -2419,6 +2702,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_1",
"PerPkg": "1",
@@ -2428,6 +2712,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_2",
"PerPkg": "1",
@@ -2437,6 +2722,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_3",
"PerPkg": "1",
@@ -2446,6 +2732,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT0",
"PerPkg": "1",
@@ -2455,6 +2742,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT1",
"PerPkg": "1",
@@ -2464,6 +2752,7 @@
},
{
"BriefDescription": "Clock-Enabled Self-Refresh",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M_POWER_SELF_REFRESH",
"PerPkg": "1",
@@ -2472,6 +2761,7 @@
},
{
"BriefDescription": "Precharge due to read, write, underfill, or PGT.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.ALL",
"PerPkg": "1",
@@ -2481,6 +2771,7 @@
},
{
"BriefDescription": "DRAM Precharge commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.PGT",
"PerPkg": "1",
@@ -2490,6 +2781,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharges from Page Table",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.PGT_PCH0",
"PerPkg": "1",
@@ -2499,6 +2791,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.PGT_PCH1",
"PerPkg": "1",
@@ -2508,6 +2801,7 @@
},
{
"BriefDescription": "Precharge due to read on page miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.RD",
"PerPkg": "1",
@@ -2517,6 +2811,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to read",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.RD_PCH0",
"PerPkg": "1",
@@ -2526,6 +2821,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.RD_PCH1",
"PerPkg": "1",
@@ -2535,6 +2831,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.UFILL",
"PerPkg": "1",
@@ -2544,6 +2841,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.UFILL_PCH0",
"PerPkg": "1",
@@ -2553,6 +2851,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.UFILL_PCH1",
"PerPkg": "1",
@@ -2562,6 +2861,7 @@
},
{
"BriefDescription": "Precharge due to write on page miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.WR",
"PerPkg": "1",
@@ -2571,6 +2871,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to write",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.WR_PCH0",
"PerPkg": "1",
@@ -2580,6 +2881,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M_PRE_COUNT.WR_PCH1",
"PerPkg": "1",
@@ -2589,6 +2891,7 @@
},
{
"BriefDescription": "Counts the number of cycles where the read buffer has greater than UMASK elements. This includes reads to both DDR and PMEM. NOTE: Umask must be set to the maximum number of elements in the queue (24 entries for SPR).",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M_RDB_FULL",
"PerPkg": "1",
@@ -2596,6 +2899,7 @@
},
{
"BriefDescription": "Counts the number of inserts into the read buffer destined for DDR. Does not count reads destined for PMEM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M_RDB_INSERTS",
"PerPkg": "1",
@@ -2604,6 +2908,7 @@
},
{
"BriefDescription": "Read Data Buffer Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M_RDB_INSERTS.PCH0",
"PerPkg": "1",
@@ -2612,6 +2917,7 @@
},
{
"BriefDescription": "Read Data Buffer Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M_RDB_INSERTS.PCH1",
"PerPkg": "1",
@@ -2620,6 +2926,7 @@
},
{
"BriefDescription": "Counts the number of cycles where there's at least one element in the read buffer. This includes reads to both DDR and PMEM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M_RDB_NE",
"PerPkg": "1",
@@ -2628,6 +2935,7 @@
},
{
"BriefDescription": "Read Data Buffer Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M_RDB_NE.PCH0",
"PerPkg": "1",
@@ -2636,6 +2944,7 @@
},
{
"BriefDescription": "Read Data Buffer Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M_RDB_NE.PCH1",
"PerPkg": "1",
@@ -2644,6 +2953,7 @@
},
{
"BriefDescription": "Counts the number of cycles where there's at least one element in the read buffer. This includes reads to both DDR and PMEM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M_RDB_NOT_EMPTY",
"PerPkg": "1",
@@ -2652,6 +2962,7 @@
},
{
"BriefDescription": "Counts the number of elements in the read buffer, including reads to both DDR and PMEM.",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M_RDB_OCCUPANCY",
"PerPkg": "1",
@@ -2659,6 +2970,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS.PCH0",
"PerPkg": "1",
@@ -2668,6 +2980,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS.PCH1",
"PerPkg": "1",
@@ -2677,6 +2990,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M_RPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
@@ -2685,6 +2999,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M_RPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
@@ -2693,6 +3008,7 @@
},
{
"BriefDescription": "Scoreboard accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.ACCEPTS",
"PerPkg": "1",
@@ -2701,6 +3017,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Write Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.FM_RD_CMPS",
"PerPkg": "1",
@@ -2709,6 +3026,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Write Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.FM_WR_CMPS",
"PerPkg": "1",
@@ -2717,6 +3035,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : FM read completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.NM_RD_CMPS",
"PerPkg": "1",
@@ -2725,6 +3044,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : FM write completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.NM_WR_CMPS",
"PerPkg": "1",
@@ -2733,6 +3053,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Read Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.RD_ACCEPTS",
"PerPkg": "1",
@@ -2741,6 +3062,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Read Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.RD_REJECTS",
"PerPkg": "1",
@@ -2749,6 +3071,7 @@
},
{
"BriefDescription": "Scoreboard rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.REJECTS",
"PerPkg": "1",
@@ -2757,6 +3080,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : NM read completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.WR_ACCEPTS",
"PerPkg": "1",
@@ -2765,6 +3089,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : NM write completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.WR_REJECTS",
"PerPkg": "1",
@@ -2773,6 +3098,7 @@
},
{
"BriefDescription": ": Alloc",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.ALLOC",
"PerPkg": "1",
@@ -2781,6 +3107,7 @@
},
{
"BriefDescription": ": Dealloc",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.DEALLOC",
"PerPkg": "1",
@@ -2789,6 +3116,7 @@
},
{
"BriefDescription": ": Near Mem Write Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.FM_RD_STARVED",
"PerPkg": "1",
@@ -2797,6 +3125,7 @@
},
{
"BriefDescription": ": Far Mem Write Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.FM_TGR_WR_STARVED",
"PerPkg": "1",
@@ -2805,6 +3134,7 @@
},
{
"BriefDescription": ": Far Mem Read Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.FM_WR_STARVED",
"PerPkg": "1",
@@ -2813,6 +3143,7 @@
},
{
"BriefDescription": ": Valid",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.NM_RD_STARVED",
"PerPkg": "1",
@@ -2821,6 +3152,7 @@
},
{
"BriefDescription": ": Near Mem Read Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.NM_WR_STARVED",
"PerPkg": "1",
@@ -2829,6 +3161,7 @@
},
{
"BriefDescription": ": Reject",
+ "Counter": "0,1,2,3",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.VLD",
"PerPkg": "1",
@@ -2837,6 +3170,7 @@
},
{
"BriefDescription": "Scoreboard Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xd1",
"EventName": "UNC_M_SB_CYCLES_FULL",
"PerPkg": "1",
@@ -2844,6 +3178,7 @@
},
{
"BriefDescription": "Scoreboard Cycles Not-Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M_SB_CYCLES_NE",
"PerPkg": "1",
@@ -2851,6 +3186,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Block region reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M_SB_INSERTS.BLOCK_RDS",
"PerPkg": "1",
@@ -2859,6 +3195,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Block region writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M_SB_INSERTS.BLOCK_WRS",
"PerPkg": "1",
@@ -2867,6 +3204,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Persistent Mem reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M_SB_INSERTS.PMM_RDS",
"PerPkg": "1",
@@ -2875,6 +3213,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Persistent Mem writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M_SB_INSERTS.PMM_WRS",
"PerPkg": "1",
@@ -2883,6 +3222,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M_SB_INSERTS.RDS",
"PerPkg": "1",
@@ -2891,6 +3231,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M_SB_INSERTS.WRS",
"PerPkg": "1",
@@ -2899,6 +3240,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Block region reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M_SB_OCCUPANCY.BLOCK_RDS",
"PerPkg": "1",
@@ -2907,6 +3249,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Block region writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M_SB_OCCUPANCY.BLOCK_WRS",
"PerPkg": "1",
@@ -2915,6 +3258,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Persistent Mem reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M_SB_OCCUPANCY.PMM_RDS",
"PerPkg": "1",
@@ -2923,6 +3267,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Persistent Mem writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M_SB_OCCUPANCY.PMM_WRS",
"PerPkg": "1",
@@ -2931,6 +3276,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M_SB_OCCUPANCY.RDS",
"PerPkg": "1",
@@ -2939,6 +3285,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Inserts : All",
+ "Counter": "0,1,2,3",
"EventCode": "0xda",
"EventName": "UNC_M_SB_PREF_INSERTS.ALL",
"PerPkg": "1",
@@ -2947,6 +3294,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Inserts : DDR4",
+ "Counter": "0,1,2,3",
"EventCode": "0xda",
"EventName": "UNC_M_SB_PREF_INSERTS.DDR",
"PerPkg": "1",
@@ -2955,6 +3303,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Inserts : PMM",
+ "Counter": "0,1,2,3",
"EventCode": "0xda",
"EventName": "UNC_M_SB_PREF_INSERTS.PMM",
"PerPkg": "1",
@@ -2963,6 +3312,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Occupancy : All",
+ "Counter": "0,1,2,3",
"EventCode": "0xdb",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -2971,6 +3321,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Occupancy : DDR4",
+ "Counter": "0,1,2,3",
"EventCode": "0xdb",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.DDR",
"PerPkg": "1",
@@ -2979,6 +3330,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Occupancy : Persistent Mem",
+ "Counter": "0,1,2,3",
"EventCode": "0xDB",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.PMM",
"FCMask": "0x00000000",
@@ -2989,6 +3341,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M_SB_REJECT.CANARY",
"PerPkg": "1",
@@ -2997,6 +3350,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M_SB_REJECT.DDR_EARLY_CMP",
"PerPkg": "1",
@@ -3005,6 +3359,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected : FM requests rejected due to full address conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M_SB_REJECT.FM_ADDR_CNFLT",
"PerPkg": "1",
@@ -3013,6 +3368,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected : NM requests rejected due to set conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M_SB_REJECT.NM_SET_CNFLT",
"PerPkg": "1",
@@ -3021,6 +3377,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected : Patrol requests rejected due to set conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M_SB_REJECT.PATROL_SET_CNFLT",
"PerPkg": "1",
@@ -3029,6 +3386,7 @@
},
{
"BriefDescription": ": Far Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.FM_RD",
"PerPkg": "1",
@@ -3037,6 +3395,7 @@
},
{
"BriefDescription": ": Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.FM_TGR",
"PerPkg": "1",
@@ -3045,6 +3404,7 @@
},
{
"BriefDescription": ": Far Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.FM_WR",
"PerPkg": "1",
@@ -3053,6 +3413,7 @@
},
{
"BriefDescription": ": Near Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.NM_RD",
"PerPkg": "1",
@@ -3061,6 +3422,7 @@
},
{
"BriefDescription": ": Near Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.NM_WR",
"PerPkg": "1",
@@ -3069,6 +3431,7 @@
},
{
"BriefDescription": ": Far Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.FM_RD",
"PerPkg": "1",
@@ -3077,6 +3440,7 @@
},
{
"BriefDescription": ": Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.FM_TGR",
"PerPkg": "1",
@@ -3085,6 +3449,7 @@
},
{
"BriefDescription": ": Far Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.FM_WR",
"PerPkg": "1",
@@ -3093,6 +3458,7 @@
},
{
"BriefDescription": ": Near Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.NM_RD",
"PerPkg": "1",
@@ -3101,6 +3467,7 @@
},
{
"BriefDescription": ": Near Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.NM_WR",
"PerPkg": "1",
@@ -3109,6 +3476,7 @@
},
{
"BriefDescription": ": Far Mem Read",
+ "Counter": "0,1,2,3",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.FM_RD",
"PerPkg": "1",
@@ -3117,6 +3485,7 @@
},
{
"BriefDescription": ": Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.FM_TGR",
"PerPkg": "1",
@@ -3125,6 +3494,7 @@
},
{
"BriefDescription": ": Far Mem Write",
+ "Counter": "0,1,2,3",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.FM_WR",
"PerPkg": "1",
@@ -3133,6 +3503,7 @@
},
{
"BriefDescription": ": Near Mem Read",
+ "Counter": "0,1,2,3",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.NM_RD",
"PerPkg": "1",
@@ -3141,6 +3512,7 @@
},
{
"BriefDescription": ": Near Mem Write",
+ "Counter": "0,1,2,3",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.NM_WR",
"PerPkg": "1",
@@ -3149,6 +3521,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.DDR4_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.DDR4_CMP",
"PerPkg": "1",
@@ -3157,6 +3530,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.NEW",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.NEW",
"PerPkg": "1",
@@ -3165,6 +3539,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.OCC",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.OCC",
"PerPkg": "1",
@@ -3173,6 +3548,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM0_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.PMM0_CMP",
"PerPkg": "1",
@@ -3181,6 +3557,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM1_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.PMM1_CMP",
"PerPkg": "1",
@@ -3189,6 +3566,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM2_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.PMM2_CMP",
"PerPkg": "1",
@@ -3197,6 +3575,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.RD_HIT",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.RD_HIT",
"PerPkg": "1",
@@ -3205,6 +3584,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.RD_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xdd",
"EventName": "UNC_M_SB_TAGGED.RD_MISS",
"PerPkg": "1",
@@ -3213,6 +3593,7 @@
},
{
"BriefDescription": "2LM Tag check hit in near memory cache (DDR4)",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M_TAGCHK.HIT",
"PerPkg": "1",
@@ -3221,6 +3602,7 @@
},
{
"BriefDescription": "2LM Tag check miss, no data at this line",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M_TAGCHK.MISS_CLEAN",
"PerPkg": "1",
@@ -3229,6 +3611,7 @@
},
{
"BriefDescription": "2LM Tag check miss, existing data may be evicted to PMM",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M_TAGCHK.MISS_DIRTY",
"PerPkg": "1",
@@ -3237,6 +3620,7 @@
},
{
"BriefDescription": "2LM Tag check hit due to memory read",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M_TAGCHK.NM_RD_HIT",
"PerPkg": "1",
@@ -3245,6 +3629,7 @@
},
{
"BriefDescription": "2LM Tag check hit due to memory write",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M_TAGCHK.NM_WR_HIT",
"PerPkg": "1",
@@ -3253,6 +3638,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS.PCH0",
"PerPkg": "1",
@@ -3262,6 +3648,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS.PCH1",
"PerPkg": "1",
@@ -3271,6 +3658,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M_WPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
@@ -3279,6 +3667,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_WPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
@@ -3287,6 +3676,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M_WPQ_READ_HIT",
"FCMask": "0x00000000",
@@ -3297,6 +3687,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M_WPQ_WRITE_HIT",
"FCMask": "0x00000000",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json
index 8948e85074f0..4d669afb121a 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "PCU PCLK Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_P_CLOCKTICKS",
"PerPkg": "1",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_P_CORE_TRANSITION_CYCLES",
"PerPkg": "1",
@@ -16,6 +18,7 @@
},
{
"BriefDescription": "UNC_P_DEMOTIONS",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_P_DEMOTIONS",
"PerPkg": "1",
@@ -23,6 +26,7 @@
},
{
"BriefDescription": "Phase Shed 0 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_P_FIVR_PS_PS0_CYCLES",
"PerPkg": "1",
@@ -31,6 +35,7 @@
},
{
"BriefDescription": "Phase Shed 1 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_P_FIVR_PS_PS1_CYCLES",
"PerPkg": "1",
@@ -39,6 +44,7 @@
},
{
"BriefDescription": "Phase Shed 2 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x77",
"EventName": "UNC_P_FIVR_PS_PS2_CYCLES",
"PerPkg": "1",
@@ -47,6 +53,7 @@
},
{
"BriefDescription": "Phase Shed 3 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x78",
"EventName": "UNC_P_FIVR_PS_PS3_CYCLES",
"PerPkg": "1",
@@ -55,6 +62,7 @@
},
{
"BriefDescription": "AVX256 Frequency Clipping",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_P_FREQ_CLIP_AVX256",
"PerPkg": "1",
@@ -62,6 +70,7 @@
},
{
"BriefDescription": "AVX512 Frequency Clipping",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_P_FREQ_CLIP_AVX512",
"PerPkg": "1",
@@ -69,6 +78,7 @@
},
{
"BriefDescription": "Thermal Strongest Upper Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
"PerPkg": "1",
@@ -77,6 +87,7 @@
},
{
"BriefDescription": "Power Strongest Upper Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
"PerPkg": "1",
@@ -85,6 +96,7 @@
},
{
"BriefDescription": "IO P Limit Strongest Lower Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x73",
"EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES",
"PerPkg": "1",
@@ -93,6 +105,7 @@
},
{
"BriefDescription": "Cycles spent changing Frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_P_FREQ_TRANS_CYCLES",
"PerPkg": "1",
@@ -101,6 +114,7 @@
},
{
"BriefDescription": "Memory Phase Shedding Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x2f",
"EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES",
"PerPkg": "1",
@@ -109,6 +123,7 @@
},
{
"BriefDescription": "Package C State Residency - C0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2a",
"EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES",
"PerPkg": "1",
@@ -117,6 +132,7 @@
},
{
"BriefDescription": "Package C State Residency - C2E",
+ "Counter": "0,1,2,3",
"EventCode": "0x2b",
"EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES",
"PerPkg": "1",
@@ -125,6 +141,7 @@
},
{
"BriefDescription": "Package C State Residency - C6",
+ "Counter": "0,1,2,3",
"EventCode": "0x2d",
"EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES",
"PerPkg": "1",
@@ -140,6 +157,7 @@
},
{
"BriefDescription": "Number of cores in C0",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",
"PerPkg": "1",
@@ -148,6 +166,7 @@
},
{
"BriefDescription": "Number of cores in C3",
+ "Counter": "0,1,2,3",
"EventCode": "0x36",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C3",
"PerPkg": "1",
@@ -156,6 +175,7 @@
},
{
"BriefDescription": "Number of cores in C6",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",
"PerPkg": "1",
@@ -164,6 +184,7 @@
},
{
"BriefDescription": "External Prochot",
+ "Counter": "0,1,2,3",
"EventCode": "0x0a",
"EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
"PerPkg": "1",
@@ -172,6 +193,7 @@
},
{
"BriefDescription": "Internal Prochot",
+ "Counter": "0,1,2,3",
"EventCode": "0x09",
"EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES",
"PerPkg": "1",
@@ -180,6 +202,7 @@
},
{
"BriefDescription": "Total Core C State Transition Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_P_TOTAL_TRANSITION_CYCLES",
"PerPkg": "1",
@@ -188,6 +211,7 @@
},
{
"BriefDescription": "VR Hot",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_P_VR_HOT_CYCLES",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json
index a1e3b8d2ebe7..609a9549cbf3 100644
--- a/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json
+++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Loads that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.STLB_HIT",
"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",
@@ -18,6 +20,7 @@
},
{
"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -34,6 +38,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 2M/4M page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 4K page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -50,6 +56,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for a demand load in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "DTLB_LOAD_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",
@@ -58,6 +65,7 @@
},
{
"BriefDescription": "Stores that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.STLB_HIT",
"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",
@@ -66,6 +74,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",
@@ -75,6 +84,7 @@
},
{
"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -83,6 +93,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 1G page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -91,6 +102,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 2M/4M page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -99,6 +111,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 4K page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -107,6 +120,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for a store in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "DTLB_STORE_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",
@@ -115,6 +129,7 @@
},
{
"BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "ITLB_MISSES.STLB_HIT",
"PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
@@ -123,6 +138,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction fetch) request.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x11",
"EventName": "ITLB_MISSES.WALK_ACTIVE",
@@ -132,6 +148,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "ITLB_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -140,6 +157,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -148,6 +166,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "ITLB_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -156,6 +175,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for an outstanding code request in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "ITLB_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 04/18] perf pmu-events: Add counter info into JSON files for SapphireRapids
2023-12-12 23:02 ` [RFC PATCH v3 04/18] perf pmu-events: Add counter info into JSON files for SapphireRapids weilin.wang
@ 2024-01-24 4:53 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 4:53 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> The added new fields are required in the hardware aware grouping method.
> Currently, the format of added fields are temporary for experiments.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> .../arch/x86/sapphirerapids/cache.json | 104 ++++
> .../arch/x86/sapphirerapids/counter.json | 16 +
> .../x86/sapphirerapids/floating-point.json | 25 +
> .../arch/x86/sapphirerapids/frontend.json | 59 ++
> .../arch/x86/sapphirerapids/memory.json | 44 ++
> .../arch/x86/sapphirerapids/other.json | 40 ++
> .../arch/x86/sapphirerapids/pipeline.json | 118 ++++
> .../arch/x86/sapphirerapids/uncore-cache.json | 514 ++++++++++++++++++
> .../arch/x86/sapphirerapids/uncore-cxl.json | 56 ++
> .../sapphirerapids/uncore-interconnect.json | 476 ++++++++++++++++
> .../arch/x86/sapphirerapids/uncore-io.json | 373 +++++++++++++
> .../x86/sapphirerapids/uncore-memory.json | 391 +++++++++++++
> .../arch/x86/sapphirerapids/uncore-power.json | 24 +
> .../x86/sapphirerapids/virtual-memory.json | 20 +
> 14 files changed, 2260 insertions(+)
> create mode 100644 tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json
>
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json
> index 9606e76b98d6..67d5150f5c0b 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/cache.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "L1D.HWPF_MISS",
> + "Counter": "0,1,2,3",
Given the list of counters, "Counters" seems a more intuitive name
than "Counter".
Thanks,
Ian
> "EventCode": "0x51",
> "EventName": "L1D.HWPF_MISS",
> "SampleAfterValue": "1000003",
> @@ -8,6 +9,7 @@
> },
> {
> "BriefDescription": "Counts the number of cache lines replaced in L1 data cache.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "L1D.REPLACEMENT",
> "PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
> @@ -16,6 +18,7 @@
> },
> {
> "BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "L1D_PEND_MISS.FB_FULL",
> "PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
> @@ -24,6 +27,7 @@
> },
> {
> "BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EdgeDetect": "1",
> "EventCode": "0x48",
> @@ -34,6 +38,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event L1D_PEND_MISS.L2_STALLS",
> + "Counter": "0,1,2,3",
> "Deprecated": "1",
> "EventCode": "0x48",
> "EventName": "L1D_PEND_MISS.L2_STALL",
> @@ -42,6 +47,7 @@
> },
> {
> "BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 resources.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "L1D_PEND_MISS.L2_STALLS",
> "PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
> @@ -50,6 +56,7 @@
> },
> {
> "BriefDescription": "Number of L1D misses that are outstanding",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "L1D_PEND_MISS.PENDING",
> "PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",
> @@ -58,6 +65,7 @@
> },
> {
> "BriefDescription": "Cycles with L1D load Misses outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x48",
> "EventName": "L1D_PEND_MISS.PENDING_CYCLES",
> @@ -67,6 +75,7 @@
> },
> {
> "BriefDescription": "L2 cache lines filling L2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "L2_LINES_IN.ALL",
> "PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
> @@ -75,6 +84,7 @@
> },
> {
> "BriefDescription": "L2_LINES_OUT.NON_SILENT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "L2_LINES_OUT.NON_SILENT",
> "SampleAfterValue": "200003",
> @@ -82,6 +92,7 @@
> },
> {
> "BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered by an L2 cache fill.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "L2_LINES_OUT.SILENT",
> "PublicDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
> @@ -90,6 +101,7 @@
> },
> {
> "BriefDescription": "Cache lines that have been L2 hardware prefetched but not used by demand accesses",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "L2_LINES_OUT.USELESS_HWPF",
> "PublicDescription": "Counts the number of cache lines that have been prefetched by the L2 hardware prefetcher but not used by demand access when evicted from the L2 cache",
> @@ -98,6 +110,7 @@
> },
> {
> "BriefDescription": "All accesses to L2 cache [This event is alias to L2_RQSTS.REFERENCES]",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_REQUEST.ALL",
> "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.REFERENCES]",
> @@ -106,6 +119,7 @@
> },
> {
> "BriefDescription": "Read requests with true-miss in L2 cache. [This event is alias to L2_RQSTS.MISS]",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_REQUEST.MISS",
> "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_RQSTS.MISS]",
> @@ -114,6 +128,7 @@
> },
> {
> "BriefDescription": "L2 code requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.ALL_CODE_RD",
> "PublicDescription": "Counts the total number of L2 code requests.",
> @@ -122,6 +137,7 @@
> },
> {
> "BriefDescription": "Demand Data Read access L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",
> "PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",
> @@ -130,6 +146,7 @@
> },
> {
> "BriefDescription": "Demand requests that miss L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.ALL_DEMAND_MISS",
> "PublicDescription": "Counts demand requests that miss L2 cache.",
> @@ -138,6 +155,7 @@
> },
> {
> "BriefDescription": "Demand requests to L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",
> "PublicDescription": "Counts demand requests to L2 cache.",
> @@ -146,6 +164,7 @@
> },
> {
> "BriefDescription": "L2_RQSTS.ALL_HWPF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.ALL_HWPF",
> "SampleAfterValue": "200003",
> @@ -153,6 +172,7 @@
> },
> {
> "BriefDescription": "RFO requests to L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.ALL_RFO",
> "PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",
> @@ -161,6 +181,7 @@
> },
> {
> "BriefDescription": "L2 cache hits when fetching instructions, code reads.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.CODE_RD_HIT",
> "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",
> @@ -169,6 +190,7 @@
> },
> {
> "BriefDescription": "L2 cache misses when fetching instructions",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.CODE_RD_MISS",
> "PublicDescription": "Counts L2 cache misses when fetching instructions.",
> @@ -177,6 +199,7 @@
> },
> {
> "BriefDescription": "Demand Data Read requests that hit L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
> "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",
> @@ -185,6 +208,7 @@
> },
> {
> "BriefDescription": "Demand Data Read miss L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",
> "PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",
> @@ -193,6 +217,7 @@
> },
> {
> "BriefDescription": "L2_RQSTS.HWPF_MISS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.HWPF_MISS",
> "SampleAfterValue": "200003",
> @@ -200,6 +225,7 @@
> },
> {
> "BriefDescription": "Read requests with true-miss in L2 cache. [This event is alias to L2_REQUEST.MISS]",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.MISS",
> "PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.MISS]",
> @@ -208,6 +234,7 @@
> },
> {
> "BriefDescription": "All accesses to L2 cache [This event is alias to L2_REQUEST.ALL]",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.REFERENCES",
> "PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. [This event is alias to L2_REQUEST.ALL]",
> @@ -216,6 +243,7 @@
> },
> {
> "BriefDescription": "RFO requests that hit L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.RFO_HIT",
> "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
> @@ -224,6 +252,7 @@
> },
> {
> "BriefDescription": "RFO requests that miss L2 cache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.RFO_MISS",
> "PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
> @@ -232,6 +261,7 @@
> },
> {
> "BriefDescription": "SW prefetch requests that hit L2 cache.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.SWPF_HIT",
> "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
> @@ -240,6 +270,7 @@
> },
> {
> "BriefDescription": "SW prefetch requests that miss L2 cache.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "L2_RQSTS.SWPF_MISS",
> "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
> @@ -248,6 +279,7 @@
> },
> {
> "BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetches to the L3)",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x2e",
> "EventName": "LONGEST_LAT_CACHE.MISS",
> "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
> @@ -256,6 +288,7 @@
> },
> {
> "BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetches to the L3)",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x2e",
> "EventName": "LONGEST_LAT_CACHE.REFERENCE",
> "PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
> @@ -264,6 +297,7 @@
> },
> {
> "BriefDescription": "Retired load instructions.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.ALL_LOADS",
> @@ -274,6 +308,7 @@
> },
> {
> "BriefDescription": "Retired store instructions.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.ALL_STORES",
> @@ -284,6 +319,7 @@
> },
> {
> "BriefDescription": "All retired memory instructions.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.ANY",
> @@ -294,6 +330,7 @@
> },
> {
> "BriefDescription": "Retired load instructions with locked access.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.LOCK_LOADS",
> @@ -304,6 +341,7 @@
> },
> {
> "BriefDescription": "Retired load instructions that split across a cacheline boundary.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.SPLIT_LOADS",
> @@ -314,6 +352,7 @@
> },
> {
> "BriefDescription": "Retired store instructions that split across a cacheline boundary.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.SPLIT_STORES",
> @@ -324,6 +363,7 @@
> },
> {
> "BriefDescription": "Retired load instructions that miss the STLB.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
> @@ -334,6 +374,7 @@
> },
> {
> "BriefDescription": "Retired store instructions that miss the STLB.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd0",
> "EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",
> @@ -344,6 +385,7 @@
> },
> {
> "BriefDescription": "Completed demand load uops that miss the L1 d-cache.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x43",
> "EventName": "MEM_LOAD_COMPLETED.L1_MISS_ANY",
> "PublicDescription": "Number of completed demand load requests that missed the L1 data cache including shadow misses (FB hits, merge to an ongoing L1D miss)",
> @@ -352,6 +394,7 @@
> },
> {
> "BriefDescription": "Retired load instructions whose data sources were HitM responses from shared L3",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd2",
> "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",
> @@ -362,6 +405,7 @@
> },
> {
> "BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd2",
> "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",
> @@ -372,6 +416,7 @@
> },
> {
> "BriefDescription": "Retired load instructions whose data sources were hits in L3 without snoops required",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd2",
> "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE",
> @@ -382,6 +427,7 @@
> },
> {
> "BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd2",
> "EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",
> @@ -392,6 +438,7 @@
> },
> {
> "BriefDescription": "Retired load instructions which data sources missed L3 but serviced from local dram",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd3",
> "EventName": "MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM",
> @@ -402,6 +449,7 @@
> },
> {
> "BriefDescription": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd3",
> "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
> @@ -411,6 +459,7 @@
> },
> {
> "BriefDescription": "Retired load instructions whose data sources was forwarded from a remote cache",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd3",
> "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD",
> @@ -421,6 +470,7 @@
> },
> {
> "BriefDescription": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd3",
> "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
> @@ -430,6 +480,7 @@
> },
> {
> "BriefDescription": "Retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd3",
> "EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM",
> "PublicDescription": "Counts retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source and the data request missed L3.",
> @@ -438,6 +489,7 @@
> },
> {
> "BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd4",
> "EventName": "MEM_LOAD_MISC_RETIRED.UC",
> @@ -448,6 +500,7 @@
> },
> {
> "BriefDescription": "Number of completed demand load requests that missed the L1, but hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be brought into L1, but data is not yet ready in L1.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.FB_HIT",
> @@ -458,6 +511,7 @@
> },
> {
> "BriefDescription": "Retired load instructions with L1 cache hits as data sources",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.L1_HIT",
> @@ -468,6 +522,7 @@
> },
> {
> "BriefDescription": "Retired load instructions missed L1 cache as data sources",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.L1_MISS",
> @@ -478,6 +533,7 @@
> },
> {
> "BriefDescription": "Retired load instructions with L2 cache hits as data sources",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.L2_HIT",
> @@ -488,6 +544,7 @@
> },
> {
> "BriefDescription": "Retired load instructions missed L2 cache as data sources",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.L2_MISS",
> @@ -498,6 +555,7 @@
> },
> {
> "BriefDescription": "Retired load instructions with L3 cache hits as data sources",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.L3_HIT",
> @@ -508,6 +566,7 @@
> },
> {
> "BriefDescription": "Retired load instructions missed L3 cache as data sources",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.L3_MISS",
> @@ -518,6 +577,7 @@
> },
> {
> "BriefDescription": "Retired load instructions with local Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
> + "Counter": "0,1,2,3",
> "Data_LA": "1",
> "EventCode": "0xd1",
> "EventName": "MEM_LOAD_RETIRED.LOCAL_PMM",
> @@ -528,6 +588,7 @@
> },
> {
> "BriefDescription": "MEM_STORE_RETIRED.L2_HIT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "MEM_STORE_RETIRED.L2_HIT",
> "SampleAfterValue": "200003",
> @@ -535,6 +596,7 @@
> },
> {
> "BriefDescription": "Retired memory uops for any access",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe5",
> "EventName": "MEM_UOP_RETIRED.ANY",
> "PublicDescription": "Number of retired micro-operations (uops) for load or store memory accesses",
> @@ -543,6 +605,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that hit in the L3 or were snooped from another core's caches on the same socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.L3_HIT",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -552,6 +615,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -561,6 +625,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.SNC_CACHE.HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -570,6 +635,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.SNC_CACHE.HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -579,6 +645,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that hit in the L3 or were snooped from another core's caches on the same socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.L3_HIT",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -588,6 +655,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -597,6 +665,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that resulted in a snoop that hit in another core, which did not forward the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_NO_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -606,6 +675,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that resulted in a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -615,6 +685,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.REMOTE_CACHE.SNOOP_HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -624,6 +695,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.REMOTE_CACHE.SNOOP_HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -633,6 +705,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.SNC_CACHE.HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -642,6 +715,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.SNC_CACHE.HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -651,6 +725,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit in the L3 or were snooped from another core's caches on the same socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.L3_HIT",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -660,6 +735,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -669,6 +745,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.SNC_CACHE.HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -678,6 +755,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.SNC_CACHE.HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -687,6 +765,7 @@
> },
> {
> "BriefDescription": "Counts hardware prefetches to the L3 only that hit in the L3 or were snooped from another core's caches on the same socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L3.L3_HIT",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -696,6 +775,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches on the same socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_HIT",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -705,6 +785,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -714,6 +795,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop that hit in another core, which did not forward the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HIT_NO_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -723,6 +805,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -732,6 +815,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop was sent and data was returned (Modified or Not Modified).",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -741,6 +825,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -750,6 +835,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -759,6 +845,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.SNC_CACHE.HITM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -768,6 +855,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.SNC_CACHE.HIT_WITH_FWD",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -777,6 +865,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO), hardware prefetch RFOs (which bring data to L2), and software prefetches for exclusive ownership (PREFETCHW) that hit to a (M)odified cacheline in the L3 or snoop filter.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.RFO_TO_CORE.L3_HIT_M",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -786,6 +875,7 @@
> },
> {
> "BriefDescription": "Counts streaming stores that hit in the L3 or were snooped from another core's caches on the same socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.STREAMING_WR.L3_HIT",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -795,6 +885,7 @@
> },
> {
> "BriefDescription": "OFFCORE_REQUESTS.ALL_REQUESTS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",
> "SampleAfterValue": "100003",
> @@ -802,6 +893,7 @@
> },
> {
> "BriefDescription": "Demand and prefetch data reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "OFFCORE_REQUESTS.DATA_RD",
> "PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",
> @@ -810,6 +902,7 @@
> },
> {
> "BriefDescription": "Demand Data Read requests sent to uncore",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",
> "PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",
> @@ -818,6 +911,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",
> + "Counter": "0,1,2,3",
> "Deprecated": "1",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",
> @@ -826,6 +920,7 @@
> },
> {
> "BriefDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
> @@ -834,6 +929,7 @@
> },
> {
> "BriefDescription": "Cycles where at least 1 outstanding demand data read request is pending.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",
> @@ -842,6 +938,7 @@
> },
> {
> "BriefDescription": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
> @@ -850,6 +947,7 @@
> },
> {
> "BriefDescription": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DATA_RD",
> "SampleAfterValue": "1000003",
> @@ -857,6 +955,7 @@
> },
> {
> "BriefDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",
> "PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending. Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",
> @@ -865,6 +964,7 @@
> },
> {
> "BriefDescription": "Counts bus locks, accounts for cache line split locks and UC locks.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "SQ_MISC.BUS_LOCK",
> "PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically. Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",
> @@ -873,6 +973,7 @@
> },
> {
> "BriefDescription": "Number of PREFETCHNTA instructions executed.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "SW_PREFETCH_ACCESS.NTA",
> "PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",
> @@ -881,6 +982,7 @@
> },
> {
> "BriefDescription": "Number of PREFETCHW instructions executed.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "SW_PREFETCH_ACCESS.PREFETCHW",
> "PublicDescription": "Counts the number of PREFETCHW instructions executed.",
> @@ -889,6 +991,7 @@
> },
> {
> "BriefDescription": "Number of PREFETCHT0 instructions executed.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "SW_PREFETCH_ACCESS.T0",
> "PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",
> @@ -897,6 +1000,7 @@
> },
> {
> "BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "SW_PREFETCH_ACCESS.T1_T2",
> "PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json
> new file mode 100644
> index 000000000000..5f8c0b7c8d19
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/counter.json
> @@ -0,0 +1,16 @@
> +[
> + {
> + "Size": "8",
> + "FixedSize": "4"
> + },
> + {
> + "Unit": "UBOX",
> + "Size": "2",
> + "FixedSize": "0"
> + },
> + {
> + "Unit": "IRP",
> + "Size": "2",
> + "FixedSize": "0"
> + }
> +]
> \ No newline at end of file
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json
> index 4a9d211e9d4f..5b144ac504ed 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/floating-point.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "ARITH.FPDIV_ACTIVE",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xb0",
> "EventName": "ARITH.FPDIV_ACTIVE",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "Counts all microcode FP assists.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc1",
> "EventName": "ASSISTS.FP",
> "PublicDescription": "Counts all microcode Floating Point assists.",
> @@ -17,6 +19,7 @@
> },
> {
> "BriefDescription": "ASSISTS.SSE_AVX_MIX",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc1",
> "EventName": "ASSISTS.SSE_AVX_MIX",
> "SampleAfterValue": "1000003",
> @@ -24,6 +27,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_DISPATCHED.PORT_0",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb3",
> "EventName": "FP_ARITH_DISPATCHED.PORT_0",
> "SampleAfterValue": "2000003",
> @@ -31,6 +35,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_DISPATCHED.PORT_1",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb3",
> "EventName": "FP_ARITH_DISPATCHED.PORT_1",
> "SampleAfterValue": "2000003",
> @@ -38,6 +43,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_DISPATCHED.PORT_5",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb3",
> "EventName": "FP_ARITH_DISPATCHED.PORT_5",
> "SampleAfterValue": "2000003",
> @@ -45,6 +51,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",
> "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -53,6 +60,7 @@
> },
> {
> "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
> "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -61,6 +69,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",
> "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -69,6 +78,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",
> "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -77,6 +87,7 @@
> },
> {
> "BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",
> "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -85,6 +96,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",
> "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -93,6 +105,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",
> "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -101,6 +114,7 @@
> },
> {
> "BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",
> "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -109,6 +123,7 @@
> },
> {
> "BriefDescription": "Number of SSE/AVX computational scalar floating-point instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* scalar, double and single precision floating-point: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.SCALAR",
> "PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -117,6 +132,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
> "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -125,6 +141,7 @@
> },
> {
> "BriefDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
> "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -133,6 +150,7 @@
> },
> {
> "BriefDescription": "Number of any Vector retired FP arithmetic instructions",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc7",
> "EventName": "FP_ARITH_INST_RETIRED.VECTOR",
> "PublicDescription": "Number of any Vector retired FP arithmetic instructions. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
> @@ -141,6 +159,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.128B_PACKED_HALF",
> "SampleAfterValue": "100003",
> @@ -148,6 +167,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.256B_PACKED_HALF",
> "SampleAfterValue": "100003",
> @@ -155,6 +175,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.512B_PACKED_HALF",
> "SampleAfterValue": "100003",
> @@ -162,6 +183,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF",
> "SampleAfterValue": "100003",
> @@ -169,6 +191,7 @@
> },
> {
> "BriefDescription": "Number of all Scalar Half-Precision FP arithmetic instructions(1) retired - regular and complex.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.SCALAR",
> "PublicDescription": "FP_ARITH_INST_RETIRED2.SCALAR",
> @@ -177,6 +200,7 @@
> },
> {
> "BriefDescription": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.SCALAR_HALF",
> "SampleAfterValue": "100003",
> @@ -184,6 +208,7 @@
> },
> {
> "BriefDescription": "Number of all Vector (also called packed) Half-Precision FP arithmetic instructions(1) retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcf",
> "EventName": "FP_ARITH_INST_RETIRED2.VECTOR",
> "PublicDescription": "FP_ARITH_INST_RETIRED2.VECTOR",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json
> index 9e53da55d0c1..b89f07e7cb93 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/frontend.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Clears due to Unknown Branches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "BACLEARS.ANY",
> "PublicDescription": "Number of times the front-end is resteered when it finds a branch instruction in a fetch line. This is called Unknown Branch which occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "Stalls caused by changing prefix length of the instruction.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "DECODE.LCP",
> "PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk.",
> @@ -17,6 +19,7 @@
> },
> {
> "BriefDescription": "Cycles the Microcode Sequencer is busy.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "DECODE.MS_BUSY",
> "SampleAfterValue": "500009",
> @@ -24,6 +27,7 @@
> },
> {
> "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x61",
> "EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",
> "PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",
> @@ -32,6 +36,7 @@
> },
> {
> "BriefDescription": "Retired Instructions who experienced DSB miss.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",
> "MSRIndex": "0x3F7",
> @@ -39,10 +44,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.DSB_MISS",
> "MSRIndex": "0x3F7",
> @@ -50,10 +57,12 @@
> "PEBS": "1",
> "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired Instructions who experienced iTLB true miss.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.ITLB_MISS",
> "MSRIndex": "0x3F7",
> @@ -61,10 +70,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired Instructions who experienced Instruction L1 Cache true miss.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.L1I_MISS",
> "MSRIndex": "0x3F7",
> @@ -72,10 +83,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired Instructions who experienced Instruction L2 Cache true miss.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.L2_MISS",
> "MSRIndex": "0x3F7",
> @@ -83,10 +96,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_1",
> "MSRIndex": "0x3F7",
> @@ -94,10 +109,12 @@
> "PEBS": "1",
> "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_128",
> "MSRIndex": "0x3F7",
> @@ -105,10 +122,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_16",
> "MSRIndex": "0x3F7",
> @@ -116,10 +135,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_2",
> "MSRIndex": "0x3F7",
> @@ -127,10 +148,12 @@
> "PEBS": "1",
> "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_256",
> "MSRIndex": "0x3F7",
> @@ -138,10 +161,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",
> "MSRIndex": "0x3F7",
> @@ -149,10 +174,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_32",
> "MSRIndex": "0x3F7",
> @@ -160,10 +187,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_4",
> "MSRIndex": "0x3F7",
> @@ -171,10 +200,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_512",
> "MSRIndex": "0x3F7",
> @@ -182,10 +213,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_64",
> "MSRIndex": "0x3F7",
> @@ -193,10 +226,12 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.LATENCY_GE_8",
> "MSRIndex": "0x3F7",
> @@ -204,20 +239,24 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "FRONTEND_RETIRED.MS_FLOWS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.MS_FLOWS",
> "MSRIndex": "0x3F7",
> "MSRValue": "0x8",
> "PEBS": "1",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.STLB_MISS",
> "MSRIndex": "0x3F7",
> @@ -225,20 +264,24 @@
> "PEBS": "1",
> "PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "FRONTEND_RETIRED.UNKNOWN_BRANCH",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc6",
> "EventName": "FRONTEND_RETIRED.UNKNOWN_BRANCH",
> "MSRIndex": "0x3F7",
> "MSRValue": "0x17",
> "PEBS": "1",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x80",
> "EventName": "ICACHE_DATA.STALLS",
> "PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The decode pipeline works at a 32 Byte granularity.",
> @@ -247,6 +290,7 @@
> },
> {
> "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x83",
> "EventName": "ICACHE_TAG.STALLS",
> "PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss.",
> @@ -255,6 +299,7 @@
> },
> {
> "BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x79",
> "EventName": "IDQ.DSB_CYCLES_ANY",
> @@ -264,6 +309,7 @@
> },
> {
> "BriefDescription": "Cycles DSB is delivering optimal number of Uops",
> + "Counter": "0,1,2,3",
> "CounterMask": "6",
> "EventCode": "0x79",
> "EventName": "IDQ.DSB_CYCLES_OK",
> @@ -273,6 +319,7 @@
> },
> {
> "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",
> + "Counter": "0,1,2,3",
> "EventCode": "0x79",
> "EventName": "IDQ.DSB_UOPS",
> "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",
> @@ -281,6 +328,7 @@
> },
> {
> "BriefDescription": "Cycles MITE is delivering any Uop",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x79",
> "EventName": "IDQ.MITE_CYCLES_ANY",
> @@ -290,6 +338,7 @@
> },
> {
> "BriefDescription": "Cycles MITE is delivering optimal number of Uops",
> + "Counter": "0,1,2,3",
> "CounterMask": "6",
> "EventCode": "0x79",
> "EventName": "IDQ.MITE_CYCLES_OK",
> @@ -299,6 +348,7 @@
> },
> {
> "BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path",
> + "Counter": "0,1,2,3",
> "EventCode": "0x79",
> "EventName": "IDQ.MITE_UOPS",
> "PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",
> @@ -307,6 +357,7 @@
> },
> {
> "BriefDescription": "Cycles when uops are being delivered to IDQ while MS is busy",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x79",
> "EventName": "IDQ.MS_CYCLES_ANY",
> @@ -316,6 +367,7 @@
> },
> {
> "BriefDescription": "Number of switches from DSB or MITE to the MS",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EdgeDetect": "1",
> "EventCode": "0x79",
> @@ -326,6 +378,7 @@
> },
> {
> "BriefDescription": "Uops delivered to IDQ while MS is busy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x79",
> "EventName": "IDQ.MS_UOPS",
> "PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS).",
> @@ -334,6 +387,7 @@
> },
> {
> "BriefDescription": "Uops not delivered by IDQ when backend of the machine is not stalled [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x9c",
> "EventName": "IDQ_BUBBLES.CORE",
> "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_UOPS_NOT_DELIVERED.CORE]",
> @@ -342,6 +396,7 @@
> },
> {
> "BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE]",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "6",
> "EventCode": "0x9c",
> "EventName": "IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE",
> @@ -351,6 +406,7 @@
> },
> {
> "BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled [This event is alias to IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK]",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0x9c",
> "EventName": "IDQ_BUBBLES.CYCLES_FE_WAS_OK",
> @@ -361,6 +417,7 @@
> },
> {
> "BriefDescription": "Uops not delivered by IDQ when backend of the machine is not stalled [This event is alias to IDQ_BUBBLES.CORE]",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x9c",
> "EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",
> "PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle. [This event is alias to IDQ_BUBBLES.CORE]",
> @@ -369,6 +426,7 @@
> },
> {
> "BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled [This event is alias to IDQ_BUBBLES.CYCLES_0_UOPS_DELIV.CORE]",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "6",
> "EventCode": "0x9c",
> "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",
> @@ -378,6 +436,7 @@
> },
> {
> "BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled [This event is alias to IDQ_BUBBLES.CYCLES_FE_WAS_OK]",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0x9c",
> "EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json
> index e8bf7c9c44e1..4c1f257bfd0e 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/memory.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "6",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "Number of machine clears due to memory ordering conflicts.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc3",
> "EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
> "PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",
> @@ -17,6 +19,7 @@
> },
> {
> "BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "2",
> "EventCode": "0x47",
> "EventName": "MEMORY_ACTIVITY.CYCLES_L1D_MISS",
> @@ -25,6 +28,7 @@
> },
> {
> "BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "3",
> "EventCode": "0x47",
> "EventName": "MEMORY_ACTIVITY.STALLS_L1D_MISS",
> @@ -33,6 +37,7 @@
> },
> {
> "BriefDescription": "Execution stalls while L2 cache miss demand cacheable load request is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "5",
> "EventCode": "0x47",
> "EventName": "MEMORY_ACTIVITY.STALLS_L2_MISS",
> @@ -42,6 +47,7 @@
> },
> {
> "BriefDescription": "Execution stalls while L3 cache miss demand cacheable load request is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "9",
> "EventCode": "0x47",
> "EventName": "MEMORY_ACTIVITY.STALLS_L3_MISS",
> @@ -51,6 +57,7 @@
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
> @@ -59,10 +66,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "1009",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
> @@ -71,10 +80,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "20011",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
> @@ -83,10 +94,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "503",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
> @@ -95,10 +108,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "100007",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
> @@ -107,10 +122,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "100003",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
> @@ -119,10 +136,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "101",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
> @@ -131,10 +150,12 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "2003",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.",
> + "Counter": "1,2,3,4,5,6,7",
> "Data_LA": "1",
> "EventCode": "0xcd",
> "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
> @@ -143,6 +164,7 @@
> "PEBS": "2",
> "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.",
> "SampleAfterValue": "50021",
> + "TakenAlone": "1",
> "UMask": "0x1"
> },
> {
> @@ -157,6 +179,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the local socket's L1, L2, or L3 caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.L3_MISS",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -166,6 +189,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2, or L3 caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.L3_MISS",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -175,6 +199,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the local socket's L1, L2, or L3 caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.L3_MISS",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -184,6 +209,7 @@
> },
> {
> "BriefDescription": "Counts hardware prefetches to the L3 only that missed the local socket's L1, L2, and L3 caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L3.L3_MISS",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -193,6 +219,7 @@
> },
> {
> "BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L3.L3_MISS_LOCAL",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -202,6 +229,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_MISS",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -211,6 +239,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_MISS_LOCAL",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -220,6 +249,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that missed the L3 Cache and were supplied by the local socket (DRAM or PMM), whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM or DRAM accesses that are controlled by the close or distant SNC Cluster. It does not count misses to the L3 which go to Local CXL Type 2 Memory or Local Non DRAM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.L3_MISS_LOCAL_SOCKET",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -229,6 +259,7 @@
> },
> {
> "BriefDescription": "Counts streaming stores that missed the local socket's L1, L2, and L3 caches.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.STREAMING_WR.L3_MISS",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -238,6 +269,7 @@
> },
> {
> "BriefDescription": "Counts streaming stores that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.STREAMING_WR.L3_MISS_LOCAL",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -247,6 +279,7 @@
> },
> {
> "BriefDescription": "Counts demand data read requests that miss the L3 cache.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
> "SampleAfterValue": "100003",
> @@ -254,6 +287,7 @@
> },
> {
> "BriefDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",
> "PublicDescription": "For every cycle, increments by the number of demand data read requests pending that are known to have missed the L3 cache. Note that this does not capture all elapsed cycles while requests are outstanding - only cycles from when the requests were known by the requesting core to have missed the L3 cache.",
> @@ -262,6 +296,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution aborted.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.ABORTED",
> "PublicDescription": "Counts the number of times RTM abort was triggered.",
> @@ -270,6 +305,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.ABORTED_EVENTS",
> "PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).",
> @@ -278,6 +314,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.ABORTED_MEM",
> "PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",
> @@ -286,6 +323,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.ABORTED_MEMTYPE",
> "PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",
> @@ -294,6 +332,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",
> "PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",
> @@ -302,6 +341,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution successfully committed",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.COMMIT",
> "PublicDescription": "Counts the number of times RTM commit succeeded.",
> @@ -310,6 +350,7 @@
> },
> {
> "BriefDescription": "Number of times an RTM execution started.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc9",
> "EventName": "RTM_RETIRED.START",
> "PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",
> @@ -318,6 +359,7 @@
> },
> {
> "BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "TX_MEM.ABORT_CAPACITY_READ",
> "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",
> @@ -326,6 +368,7 @@
> },
> {
> "BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional writes.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "TX_MEM.ABORT_CAPACITY_WRITE",
> "PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",
> @@ -334,6 +377,7 @@
> },
> {
> "BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "TX_MEM.ABORT_CONFLICT",
> "PublicDescription": "Counts the number of times a TSX line had a cache conflict.",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json
> index 442ef3807a9d..5a5ead85b902 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/other.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "ASSISTS.PAGE_FAULT",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc1",
> "EventName": "ASSISTS.PAGE_FAULT",
> "SampleAfterValue": "1000003",
> @@ -8,6 +9,7 @@
> },
> {
> "BriefDescription": "Counts the cycles where the AMX (Advance Matrix Extension) unit is busy performing an operation.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb7",
> "EventName": "EXE.AMX_BUSY",
> "SampleAfterValue": "2000003",
> @@ -15,6 +17,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -24,6 +27,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -33,6 +37,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.LOCAL_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -42,6 +47,7 @@
> },
> {
> "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_CODE_RD.SNC_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -51,6 +57,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -60,6 +67,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by DRAM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -69,6 +77,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.LOCAL_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -78,6 +87,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by PMM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM accesses that are controlled by the close or distant SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.LOCAL_SOCKET_PMM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -87,6 +97,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by PMM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.PMM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -96,6 +107,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.REMOTE_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -105,6 +117,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by PMM attached to another socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.REMOTE_PMM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -114,6 +127,7 @@
> },
> {
> "BriefDescription": "Counts demand data reads that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_DATA_RD.SNC_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -123,6 +137,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -132,6 +147,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -141,6 +157,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.LOCAL_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -150,6 +167,7 @@
> },
> {
> "BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.DEMAND_RFO.SNC_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -159,6 +177,7 @@
> },
> {
> "BriefDescription": "Counts data load hardware prefetch requests to the L1 data cache that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L1D.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -168,6 +187,7 @@
> },
> {
> "BriefDescription": "Counts hardware prefetches (which bring data to L2) that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L2.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -177,6 +197,7 @@
> },
> {
> "BriefDescription": "Counts hardware prefetches to the L3 only that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L3.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -186,6 +207,7 @@
> },
> {
> "BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline was homed in a remote socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.HWPF_L3.REMOTE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -195,6 +217,7 @@
> },
> {
> "BriefDescription": "Counts writebacks of modified cachelines and streaming stores that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.MODIFIED_WRITE.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -204,6 +227,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -213,6 +237,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -222,6 +247,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.LOCAL_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -231,6 +257,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts DRAM accesses that are controlled by the close or distant SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -240,6 +267,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM accesses that are controlled by the close or distant SNC Cluster.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_PMM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -249,6 +277,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by a remote socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -258,6 +287,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to another socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -267,6 +297,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM or PMM attached to another socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE_MEMORY",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -276,6 +307,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to another socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.REMOTE_PMM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -285,6 +317,7 @@
> },
> {
> "BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.READS_TO_CORE.SNC_DRAM",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -294,6 +327,7 @@
> },
> {
> "BriefDescription": "Counts streaming stores that have any type of response.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -303,6 +337,7 @@
> },
> {
> "BriefDescription": "Counts Demand RFOs, ItoM's, PREFECTHW's, Hardware RFO Prefetches to the L1/L2 and Streaming stores that likely resulted in a store to Memory (DRAM or PMM)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2A,0x2B",
> "EventName": "OCR.WRITE_ESTIMATE.MEMORY",
> "MSRIndex": "0x1a6,0x1a7",
> @@ -312,6 +347,7 @@
> },
> {
> "BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa5",
> "EventName": "RS.EMPTY",
> "PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch mispredictions or i-cache misses)",
> @@ -320,6 +356,7 @@
> },
> {
> "BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EdgeDetect": "1",
> "EventCode": "0xa5",
> @@ -331,6 +368,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event RS.EMPTY_COUNT",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "Deprecated": "1",
> "EdgeDetect": "1",
> @@ -342,6 +380,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event RS.EMPTY",
> + "Counter": "0,1,2,3,4,5,6,7",
> "Deprecated": "1",
> "EventCode": "0xa5",
> "EventName": "RS_EMPTY.CYCLES",
> @@ -350,6 +389,7 @@
> },
> {
> "BriefDescription": "Cycles the uncore cannot take further requests",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x2d",
> "EventName": "XQ.FULL_CYCLES",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
> index 6dcf3b763af4..d52c264fa50d 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/pipeline.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "AMX retired arithmetic BF16 operations.",
> + "Counter": "0",
> "EventCode": "0xce",
> "EventName": "AMX_OPS_RETIRED.BF16",
> "PublicDescription": "Number of AMX-based retired arithmetic bfloat16 (BF16) floating-point operations. Counts TDPBF16PS FP instructions. SW to use operation multiplier of 4",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "AMX retired arithmetic integer 8-bit operations.",
> + "Counter": "0",
> "EventCode": "0xce",
> "EventName": "AMX_OPS_RETIRED.INT8",
> "PublicDescription": "Number of AMX-based retired arithmetic integer operations of 8-bit width source operands. Counts TDPB[SS,UU,US,SU]D instructions. SW should use operation multiplier of 8.",
> @@ -17,6 +19,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event ARITH.DIV_ACTIVE",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "Deprecated": "1",
> "EventCode": "0xb0",
> @@ -26,6 +29,7 @@
> },
> {
> "BriefDescription": "Cycles when divide unit is busy executing divide or square root operations.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xb0",
> "EventName": "ARITH.DIV_ACTIVE",
> @@ -35,6 +39,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event ARITH.FPDIV_ACTIVE",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "Deprecated": "1",
> "EventCode": "0xb0",
> @@ -44,6 +49,7 @@
> },
> {
> "BriefDescription": "This event counts the cycles the integer divider is busy.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xb0",
> "EventName": "ARITH.IDIV_ACTIVE",
> @@ -52,6 +58,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event ARITH.IDIV_ACTIVE",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "Deprecated": "1",
> "EventCode": "0xb0",
> @@ -61,6 +68,7 @@
> },
> {
> "BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc1",
> "EventName": "ASSISTS.ANY",
> "PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware. Examples include AD (page Access Dirty), FP and AVX related assists.",
> @@ -69,6 +77,7 @@
> },
> {
> "BriefDescription": "All branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.ALL_BRANCHES",
> "PEBS": "1",
> @@ -77,6 +86,7 @@
> },
> {
> "BriefDescription": "Conditional branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.COND",
> "PEBS": "1",
> @@ -86,6 +96,7 @@
> },
> {
> "BriefDescription": "Not taken branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.COND_NTAKEN",
> "PEBS": "1",
> @@ -95,6 +106,7 @@
> },
> {
> "BriefDescription": "Taken conditional branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.COND_TAKEN",
> "PEBS": "1",
> @@ -104,6 +116,7 @@
> },
> {
> "BriefDescription": "Far branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.FAR_BRANCH",
> "PEBS": "1",
> @@ -113,6 +126,7 @@
> },
> {
> "BriefDescription": "Indirect near branch instructions retired (excluding returns)",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.INDIRECT",
> "PEBS": "1",
> @@ -122,6 +136,7 @@
> },
> {
> "BriefDescription": "Direct and indirect near call instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.NEAR_CALL",
> "PEBS": "1",
> @@ -131,6 +146,7 @@
> },
> {
> "BriefDescription": "Return instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.NEAR_RETURN",
> "PEBS": "1",
> @@ -140,6 +156,7 @@
> },
> {
> "BriefDescription": "Taken branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc4",
> "EventName": "BR_INST_RETIRED.NEAR_TAKEN",
> "PEBS": "1",
> @@ -149,6 +166,7 @@
> },
> {
> "BriefDescription": "All mispredicted branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.ALL_BRANCHES",
> "PEBS": "1",
> @@ -157,6 +175,7 @@
> },
> {
> "BriefDescription": "Mispredicted conditional branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.COND",
> "PEBS": "1",
> @@ -166,6 +185,7 @@
> },
> {
> "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.COND_NTAKEN",
> "PEBS": "1",
> @@ -175,6 +195,7 @@
> },
> {
> "BriefDescription": "number of branch instructions retired that were mispredicted and taken.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.COND_TAKEN",
> "PEBS": "1",
> @@ -184,6 +205,7 @@
> },
> {
> "BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns)",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.INDIRECT",
> "PEBS": "1",
> @@ -193,6 +215,7 @@
> },
> {
> "BriefDescription": "Mispredicted indirect CALL retired.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.INDIRECT_CALL",
> "PEBS": "1",
> @@ -202,6 +225,7 @@
> },
> {
> "BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.NEAR_TAKEN",
> "PEBS": "1",
> @@ -211,6 +235,7 @@
> },
> {
> "BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc5",
> "EventName": "BR_MISP_RETIRED.RET",
> "PEBS": "1",
> @@ -220,6 +245,7 @@
> },
> {
> "BriefDescription": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xec",
> "EventName": "CPU_CLK_UNHALTED.C01",
> "PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup time but more power saving optimized state. This state can be entered via the TPAUSE or UMWAIT instructions.",
> @@ -228,6 +254,7 @@
> },
> {
> "BriefDescription": "Core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xec",
> "EventName": "CPU_CLK_UNHALTED.C02",
> "PublicDescription": "Counts core clocks when the thread is in the C0.2 light-weight faster wakeup time but less power saving optimized state. This state can be entered via the TPAUSE or UMWAIT instructions.",
> @@ -236,6 +263,7 @@
> },
> {
> "BriefDescription": "Core clocks when the thread is in the C0.1 or C0.2 or running a PAUSE in C0 ACPI state.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xec",
> "EventName": "CPU_CLK_UNHALTED.C0_WAIT",
> "PublicDescription": "Counts core clocks when the thread is in the C0.1 or C0.2 power saving optimized states (TPAUSE or UMWAIT instructions) or running the PAUSE instruction.",
> @@ -244,6 +272,7 @@
> },
> {
> "BriefDescription": "Cycle counts are evenly distributed between active threads in the Core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xec",
> "EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",
> "PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
> @@ -252,6 +281,7 @@
> },
> {
> "BriefDescription": "Core crystal clock cycles when this thread is unhalted and the other thread is halted.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x3c",
> "EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",
> "PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",
> @@ -260,6 +290,7 @@
> },
> {
> "BriefDescription": "CPU_CLK_UNHALTED.PAUSE",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xec",
> "EventName": "CPU_CLK_UNHALTED.PAUSE",
> "SampleAfterValue": "2000003",
> @@ -267,6 +298,7 @@
> },
> {
> "BriefDescription": "CPU_CLK_UNHALTED.PAUSE_INST",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EdgeDetect": "1",
> "EventCode": "0xec",
> @@ -276,6 +308,7 @@
> },
> {
> "BriefDescription": "Core crystal clock cycles. Cycle counts are evenly distributed between active threads in the Core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x3c",
> "EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",
> "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
> @@ -284,6 +317,7 @@
> },
> {
> "BriefDescription": "Reference cycles when the core is not in halt state.",
> + "Counter": "Fixed counter 2",
> "EventName": "CPU_CLK_UNHALTED.REF_TSC",
> "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
> "SampleAfterValue": "2000003",
> @@ -291,6 +325,7 @@
> },
> {
> "BriefDescription": "Reference cycles when the core is not in halt state.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x3c",
> "EventName": "CPU_CLK_UNHALTED.REF_TSC_P",
> "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
> @@ -299,6 +334,7 @@
> },
> {
> "BriefDescription": "Core cycles when the thread is not in halt state",
> + "Counter": "Fixed counter 1",
> "EventName": "CPU_CLK_UNHALTED.THREAD",
> "PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.",
> "SampleAfterValue": "2000003",
> @@ -306,6 +342,7 @@
> },
> {
> "BriefDescription": "Thread cycles when thread is not in halt state",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x3c",
> "EventName": "CPU_CLK_UNHALTED.THREAD_P",
> "PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",
> @@ -313,6 +350,7 @@
> },
> {
> "BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "8",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",
> @@ -321,6 +359,7 @@
> },
> {
> "BriefDescription": "Cycles while L2 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",
> @@ -329,6 +368,7 @@
> },
> {
> "BriefDescription": "Cycles while memory subsystem has an outstanding load.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "16",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",
> @@ -337,6 +377,7 @@
> },
> {
> "BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "12",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",
> @@ -345,6 +386,7 @@
> },
> {
> "BriefDescription": "Execution stalls while L2 cache miss demand load is outstanding.",
> + "Counter": "0,1,2,3",
> "CounterMask": "5",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",
> @@ -353,6 +395,7 @@
> },
> {
> "BriefDescription": "Total execution stalls.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "4",
> "EventCode": "0xa3",
> "EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",
> @@ -361,6 +404,7 @@
> },
> {
> "BriefDescription": "Cycles total of 1 uop is executed on all ports and Reservation Station was not empty.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.1_PORTS_UTIL",
> "PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",
> @@ -369,6 +413,7 @@
> },
> {
> "BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was not empty.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.2_PORTS_UTIL",
> "PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",
> @@ -377,6 +422,7 @@
> },
> {
> "BriefDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station was not empty.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.3_PORTS_UTIL",
> "PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",
> @@ -385,6 +431,7 @@
> },
> {
> "BriefDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station was not empty.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.4_PORTS_UTIL",
> "PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",
> @@ -393,6 +440,7 @@
> },
> {
> "BriefDescription": "Execution stalls while memory subsystem has an outstanding load.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "5",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",
> @@ -401,6 +449,7 @@
> },
> {
> "BriefDescription": "Cycles where the Store Buffer was full and no loads caused an execution stall.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "2",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.BOUND_ON_STORES",
> @@ -410,6 +459,7 @@
> },
> {
> "BriefDescription": "Cycles no uop executed while RS was not empty, the SB was not full and there was no outstanding load.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa6",
> "EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",
> "PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",
> @@ -418,6 +468,7 @@
> },
> {
> "BriefDescription": "Instruction decoders utilized in a cycle",
> + "Counter": "0,1,2,3",
> "EventCode": "0x75",
> "EventName": "INST_DECODED.DECODERS",
> "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
> @@ -426,6 +477,7 @@
> },
> {
> "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
> + "Counter": "Fixed counter 0",
> "EventName": "INST_RETIRED.ANY",
> "PEBS": "1",
> "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter.",
> @@ -434,6 +486,7 @@
> },
> {
> "BriefDescription": "Number of instructions retired. General Counter - architectural event",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc0",
> "EventName": "INST_RETIRED.ANY_P",
> "PEBS": "1",
> @@ -442,6 +495,7 @@
> },
> {
> "BriefDescription": "INST_RETIRED.MACRO_FUSED",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc0",
> "EventName": "INST_RETIRED.MACRO_FUSED",
> "SampleAfterValue": "2000003",
> @@ -449,6 +503,7 @@
> },
> {
> "BriefDescription": "Retired NOP instructions.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc0",
> "EventName": "INST_RETIRED.NOP",
> "PublicDescription": "Counts all retired NOP or ENDBR32/64 instructions",
> @@ -457,6 +512,7 @@
> },
> {
> "BriefDescription": "Precise instruction retired with PEBS precise-distribution",
> + "Counter": "Fixed counter 0",
> "EventName": "INST_RETIRED.PREC_DIST",
> "PEBS": "1",
> "PublicDescription": "A version of INST_RETIRED that allows for a precise distribution of samples across instructions retired. It utilizes the Precise Distribution of Instructions Retired (PDIR++) feature to fix bias in how retired instructions get sampled. Use on Fixed Counter 0.",
> @@ -465,6 +521,7 @@
> },
> {
> "BriefDescription": "Iterations of Repeat string retired instructions.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc0",
> "EventName": "INST_RETIRED.REP_ITERATION",
> "PublicDescription": "Number of iterations of Repeat (REP) string retired instructions such as MOVS, CMPS, and SCAS. Each has a byte, word, and doubleword version and string instructions can be repeated using a repetition prefix, REP, that allows their architectural execution to be repeated a number of times as specified by the RCX register. Note the number of iterations is implementation-dependent.",
> @@ -473,6 +530,7 @@
> },
> {
> "BriefDescription": "Clears speculative count",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EdgeDetect": "1",
> "EventCode": "0xad",
> @@ -483,6 +541,7 @@
> },
> {
> "BriefDescription": "Counts cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xad",
> "EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",
> "PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
> @@ -491,6 +550,7 @@
> },
> {
> "BriefDescription": "INT_MISC.MBA_STALLS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xad",
> "EventName": "INT_MISC.MBA_STALLS",
> "SampleAfterValue": "1000003",
> @@ -498,6 +558,7 @@
> },
> {
> "BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for this thread",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xad",
> "EventName": "INT_MISC.RECOVERY_CYCLES",
> "PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",
> @@ -506,15 +567,18 @@
> },
> {
> "BriefDescription": "INT_MISC.UNKNOWN_BRANCH_CYCLES",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xad",
> "EventName": "INT_MISC.UNKNOWN_BRANCH_CYCLES",
> "MSRIndex": "0x3F7",
> "MSRValue": "0x7",
> "SampleAfterValue": "1000003",
> + "TakenAlone": "1",
> "UMask": "0x40"
> },
> {
> "BriefDescription": "TMA slots where uops got dropped",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xad",
> "EventName": "INT_MISC.UOP_DROPPING",
> "PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",
> @@ -523,6 +587,7 @@
> },
> {
> "BriefDescription": "INT_VEC_RETIRED.128BIT",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.128BIT",
> "SampleAfterValue": "1000003",
> @@ -530,6 +595,7 @@
> },
> {
> "BriefDescription": "INT_VEC_RETIRED.256BIT",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.256BIT",
> "SampleAfterValue": "1000003",
> @@ -537,6 +603,7 @@
> },
> {
> "BriefDescription": "integer ADD, SUB, SAD 128-bit vector instructions.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.ADD_128",
> "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 128-bit vector instructions.",
> @@ -545,6 +612,7 @@
> },
> {
> "BriefDescription": "integer ADD, SUB, SAD 256-bit vector instructions.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.ADD_256",
> "PublicDescription": "Number of retired integer ADD/SUB (regular or horizontal), SAD 256-bit vector instructions.",
> @@ -553,6 +621,7 @@
> },
> {
> "BriefDescription": "INT_VEC_RETIRED.MUL_256",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.MUL_256",
> "SampleAfterValue": "1000003",
> @@ -560,6 +629,7 @@
> },
> {
> "BriefDescription": "INT_VEC_RETIRED.SHUFFLES",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.SHUFFLES",
> "SampleAfterValue": "1000003",
> @@ -567,6 +637,7 @@
> },
> {
> "BriefDescription": "INT_VEC_RETIRED.VNNI_128",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.VNNI_128",
> "SampleAfterValue": "1000003",
> @@ -574,6 +645,7 @@
> },
> {
> "BriefDescription": "INT_VEC_RETIRED.VNNI_256",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe7",
> "EventName": "INT_VEC_RETIRED.VNNI_256",
> "SampleAfterValue": "1000003",
> @@ -581,6 +653,7 @@
> },
> {
> "BriefDescription": "False dependencies in MOB due to partial compare on address.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "LD_BLOCKS.ADDRESS_ALIAS",
> "PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",
> @@ -589,6 +662,7 @@
> },
> {
> "BriefDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "LD_BLOCKS.NO_SR",
> "PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
> @@ -597,6 +671,7 @@
> },
> {
> "BriefDescription": "Loads blocked due to overlapping with a preceding store that cannot be forwarded.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "LD_BLOCKS.STORE_FORWARD",
> "PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",
> @@ -605,6 +680,7 @@
> },
> {
> "BriefDescription": "Counts the number of demand load dispatches that hit L1D fill buffer (FB) allocated for software prefetch.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "LOAD_HIT_PREFETCH.SWPF",
> "PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
> @@ -613,6 +689,7 @@
> },
> {
> "BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xa8",
> "EventName": "LSD.CYCLES_ACTIVE",
> @@ -622,6 +699,7 @@
> },
> {
> "BriefDescription": "Cycles optimal number of Uops delivered by the LSD, but did not come from the decoder.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "6",
> "EventCode": "0xa8",
> "EventName": "LSD.CYCLES_OK",
> @@ -631,6 +709,7 @@
> },
> {
> "BriefDescription": "Number of Uops delivered by the LSD.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa8",
> "EventName": "LSD.UOPS",
> "PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
> @@ -639,6 +718,7 @@
> },
> {
> "BriefDescription": "Number of machine clears (nukes) of any type.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EdgeDetect": "1",
> "EventCode": "0xc3",
> @@ -649,6 +729,7 @@
> },
> {
> "BriefDescription": "Self-modifying code (SMC) detected.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc3",
> "EventName": "MACHINE_CLEARS.SMC",
> "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
> @@ -657,6 +738,7 @@
> },
> {
> "BriefDescription": "LFENCE instructions retired",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xe0",
> "EventName": "MISC2_RETIRED.LFENCE",
> "PublicDescription": "number of LFENCE retired instructions",
> @@ -665,6 +747,7 @@
> },
> {
> "BriefDescription": "Increments whenever there is an update to the LBR array.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xcc",
> "EventName": "MISC_RETIRED.LBR_INSERTS",
> "PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",
> @@ -673,6 +756,7 @@
> },
> {
> "BriefDescription": "Cycles stalled due to no store buffers available. (not including draining form sync).",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa2",
> "EventName": "RESOURCE_STALLS.SB",
> "PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",
> @@ -681,6 +765,7 @@
> },
> {
> "BriefDescription": "Counts cycles where the pipeline is stalled due to serializing operations.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa2",
> "EventName": "RESOURCE_STALLS.SCOREBOARD",
> "SampleAfterValue": "100003",
> @@ -688,6 +773,7 @@
> },
> {
> "BriefDescription": "TMA slots where no uops were being issued due to lack of back-end resources.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa4",
> "EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",
> "PublicDescription": "Number of slots in TMA method where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",
> @@ -712,6 +798,7 @@
> },
> {
> "BriefDescription": "TOPDOWN.MEMORY_BOUND_SLOTS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa4",
> "EventName": "TOPDOWN.MEMORY_BOUND_SLOTS",
> "SampleAfterValue": "10000003",
> @@ -719,6 +806,7 @@
> },
> {
> "BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",
> + "Counter": "Fixed counter 3",
> "EventName": "TOPDOWN.SLOTS",
> "PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3).",
> "SampleAfterValue": "10000003",
> @@ -726,6 +814,7 @@
> },
> {
> "BriefDescription": "TMA slots available for an unhalted logical processor. General counter - architectural event",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xa4",
> "EventName": "TOPDOWN.SLOTS_P",
> "PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",
> @@ -734,6 +823,7 @@
> },
> {
> "BriefDescription": "UOPS_DECODED.DEC0_UOPS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x76",
> "EventName": "UOPS_DECODED.DEC0_UOPS",
> "SampleAfterValue": "1000003",
> @@ -741,6 +831,7 @@
> },
> {
> "BriefDescription": "Uops executed on port 0",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_0",
> "PublicDescription": "Number of uops dispatch to execution port 0.",
> @@ -749,6 +840,7 @@
> },
> {
> "BriefDescription": "Uops executed on port 1",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_1",
> "PublicDescription": "Number of uops dispatch to execution port 1.",
> @@ -757,6 +849,7 @@
> },
> {
> "BriefDescription": "Uops executed on ports 2, 3 and 10",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_2_3_10",
> "PublicDescription": "Number of uops dispatch to execution ports 2, 3 and 10",
> @@ -765,6 +858,7 @@
> },
> {
> "BriefDescription": "Uops executed on ports 4 and 9",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_4_9",
> "PublicDescription": "Number of uops dispatch to execution ports 4 and 9",
> @@ -773,6 +867,7 @@
> },
> {
> "BriefDescription": "Uops executed on ports 5 and 11",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_5_11",
> "PublicDescription": "Number of uops dispatch to execution ports 5 and 11",
> @@ -781,6 +876,7 @@
> },
> {
> "BriefDescription": "Uops executed on port 6",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_6",
> "PublicDescription": "Number of uops dispatch to execution port 6.",
> @@ -789,6 +885,7 @@
> },
> {
> "BriefDescription": "Uops executed on ports 7 and 8",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb2",
> "EventName": "UOPS_DISPATCHED.PORT_7_8",
> "PublicDescription": "Number of uops dispatch to execution ports 7 and 8.",
> @@ -797,6 +894,7 @@
> },
> {
> "BriefDescription": "Number of uops executed on the core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CORE",
> "PublicDescription": "Counts the number of uops executed from any thread.",
> @@ -805,6 +903,7 @@
> },
> {
> "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",
> @@ -814,6 +913,7 @@
> },
> {
> "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "2",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",
> @@ -823,6 +923,7 @@
> },
> {
> "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "3",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",
> @@ -832,6 +933,7 @@
> },
> {
> "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "4",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",
> @@ -841,6 +943,7 @@
> },
> {
> "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CYCLES_GE_1",
> @@ -850,6 +953,7 @@
> },
> {
> "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "2",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CYCLES_GE_2",
> @@ -859,6 +963,7 @@
> },
> {
> "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "3",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CYCLES_GE_3",
> @@ -868,6 +973,7 @@
> },
> {
> "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "4",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.CYCLES_GE_4",
> @@ -877,6 +983,7 @@
> },
> {
> "BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.STALLS",
> @@ -887,6 +994,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event UOPS_EXECUTED.STALLS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "Deprecated": "1",
> "EventCode": "0xb1",
> @@ -897,6 +1005,7 @@
> },
> {
> "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.THREAD",
> "SampleAfterValue": "2000003",
> @@ -904,6 +1013,7 @@
> },
> {
> "BriefDescription": "Counts the number of x87 uops dispatched.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xb1",
> "EventName": "UOPS_EXECUTED.X87",
> "PublicDescription": "Counts the number of x87 uops executed.",
> @@ -912,6 +1022,7 @@
> },
> {
> "BriefDescription": "Uops that RAT issues to RS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xae",
> "EventName": "UOPS_ISSUED.ANY",
> "PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",
> @@ -920,6 +1031,7 @@
> },
> {
> "BriefDescription": "Cycles with retired uop(s).",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xc2",
> "EventName": "UOPS_RETIRED.CYCLES",
> @@ -929,6 +1041,7 @@
> },
> {
> "BriefDescription": "Retired uops except the last uop of each instruction.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc2",
> "EventName": "UOPS_RETIRED.HEAVY",
> "PublicDescription": "Counts the number of retired micro-operations (uops) except the last uop of each instruction. An instruction that is decoded into less than two uops does not contribute to the count.",
> @@ -937,15 +1050,18 @@
> },
> {
> "BriefDescription": "UOPS_RETIRED.MS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc2",
> "EventName": "UOPS_RETIRED.MS",
> "MSRIndex": "0x3F7",
> "MSRValue": "0x8",
> "SampleAfterValue": "2000003",
> + "TakenAlone": "1",
> "UMask": "0x4"
> },
> {
> "BriefDescription": "Retirement slots used.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0xc2",
> "EventName": "UOPS_RETIRED.SLOTS",
> "PublicDescription": "Counts the retirement slots used each cycle.",
> @@ -954,6 +1070,7 @@
> },
> {
> "BriefDescription": "Cycles without actually retired uops.",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "EventCode": "0xc2",
> "EventName": "UOPS_RETIRED.STALLS",
> @@ -964,6 +1081,7 @@
> },
> {
> "BriefDescription": "This event is deprecated. Refer to new event UOPS_RETIRED.STALLS",
> + "Counter": "0,1,2,3,4,5,6,7",
> "CounterMask": "1",
> "Deprecated": "1",
> "EventCode": "0xc2",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
> index cf6fa70f37c1..fc3ecfc0e5a7 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken",
> + "Counter": "0,1,2,3",
> "EventCode": "0x57",
> "EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE",
> "PerPkg": "1",
> @@ -10,6 +11,7 @@
> },
> {
> "BriefDescription": "CHA to iMC Bypass : Not Taken",
> + "Counter": "0,1,2,3",
> "EventCode": "0x57",
> "EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN",
> "PerPkg": "1",
> @@ -19,6 +21,7 @@
> },
> {
> "BriefDescription": "CHA to iMC Bypass : Taken",
> + "Counter": "0,1,2,3",
> "EventCode": "0x57",
> "EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN",
> "PerPkg": "1",
> @@ -28,6 +31,7 @@
> },
> {
> "BriefDescription": "CHA Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_CHA_CLOCKTICKS",
> "PerPkg": "1",
> @@ -36,6 +40,7 @@
> },
> {
> "BriefDescription": "CMS Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_CHA_CMS_CLOCKTICKS",
> "PerPkg": "1",
> @@ -43,6 +48,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Any Cycle with Multiple Snoops",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.ANY_GTONE",
> "PerPkg": "1",
> @@ -52,6 +58,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.ANY_ONE",
> "PerPkg": "1",
> @@ -61,6 +68,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Multiple Core Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.CORE_GTONE",
> "PerPkg": "1",
> @@ -70,6 +78,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Single Core Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.CORE_ONE",
> "PerPkg": "1",
> @@ -79,6 +88,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Multiple Eviction",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE",
> "PerPkg": "1",
> @@ -88,6 +98,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Single Eviction",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.EVICT_ONE",
> "PerPkg": "1",
> @@ -97,6 +108,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Multiple External Snoops",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.EXT_GTONE",
> "PerPkg": "1",
> @@ -106,6 +118,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Single External Snoops",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.EXT_ONE",
> "PerPkg": "1",
> @@ -115,6 +128,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Multiple Snoop Targets from Remote",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE",
> "PerPkg": "1",
> @@ -124,6 +138,7 @@
> },
> {
> "BriefDescription": "Core Cross Snoops Issued : Single Snoop Target from Remote",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_CHA_CORE_SNP.REMOTE_ONE",
> "PerPkg": "1",
> @@ -133,6 +148,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6e",
> "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD",
> "PerPkg": "1",
> @@ -141,6 +157,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6e",
> "EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C",
> "PerPkg": "1",
> @@ -149,6 +166,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6e",
> "EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC",
> "PerPkg": "1",
> @@ -157,6 +175,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP",
> "PerPkg": "1",
> @@ -165,6 +184,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO",
> "PerPkg": "1",
> @@ -173,6 +193,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL",
> "PerPkg": "1",
> @@ -181,6 +202,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.GO",
> "PerPkg": "1",
> @@ -189,6 +211,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL",
> "PerPkg": "1",
> @@ -197,6 +220,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS",
> "PerPkg": "1",
> @@ -205,6 +229,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.NOP",
> "PerPkg": "1",
> @@ -213,6 +238,7 @@
> },
> {
> "BriefDescription": "Direct GO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6d",
> "EventName": "UNC_CHA_DIRECT_GO_OPC.PULL",
> "PerPkg": "1",
> @@ -221,6 +247,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x53",
> "EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP",
> "PerPkg": "1",
> @@ -230,6 +257,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x53",
> "EventName": "UNC_CHA_DIR_LOOKUP.SNP",
> "PerPkg": "1",
> @@ -239,6 +267,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_CHA_DIR_UPDATE.HA",
> "PerPkg": "1",
> @@ -248,6 +277,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_CHA_DIR_UPDATE.TOR",
> "PerPkg": "1",
> @@ -257,6 +287,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Down",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN",
> "PerPkg": "1",
> @@ -266,6 +297,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Up",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP",
> "PerPkg": "1",
> @@ -275,6 +307,7 @@
> },
> {
> "BriefDescription": "Read request from a remote socket which hit in the HitMe Cache to a line In the E state",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_CHA_HITME_HIT.EX_RDS",
> "PerPkg": "1",
> @@ -284,6 +317,7 @@
> },
> {
> "BriefDescription": "Counts Number of Hits in HitMe Cache : Shared hit and op is RdInvOwn, RdInv, Inv*",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ",
> "PerPkg": "1",
> @@ -292,6 +326,7 @@
> },
> {
> "BriefDescription": "Counts Number of Hits in HitMe Cache : op is WbMtoE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_CHA_HITME_HIT.WBMTOE",
> "PerPkg": "1",
> @@ -300,6 +335,7 @@
> },
> {
> "BriefDescription": "Counts Number of Hits in HitMe Cache : op is WbMtoI, WbPushMtoI, WbFlush, or WbMtoS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S",
> "PerPkg": "1",
> @@ -308,6 +344,7 @@
> },
> {
> "BriefDescription": "Counts Number of times HitMe Cache is accessed : op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5e",
> "EventName": "UNC_CHA_HITME_LOOKUP.READ",
> "PerPkg": "1",
> @@ -316,6 +353,7 @@
> },
> {
> "BriefDescription": "Counts Number of times HitMe Cache is accessed : op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5e",
> "EventName": "UNC_CHA_HITME_LOOKUP.WRITE",
> "PerPkg": "1",
> @@ -324,6 +362,7 @@
> },
> {
> "BriefDescription": "Counts Number of Misses in HitMe Cache : No SF/LLC HitS/F and op is RdInvOwn",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN",
> "PerPkg": "1",
> @@ -332,6 +371,7 @@
> },
> {
> "BriefDescription": "Counts Number of Misses in HitMe Cache : op is RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "UNC_CHA_HITME_MISS.READ_OR_INV",
> "PerPkg": "1",
> @@ -340,6 +380,7 @@
> },
> {
> "BriefDescription": "Counts Number of Misses in HitMe Cache : SF/LLC HitS/F and op is RdInvOwn",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN",
> "PerPkg": "1",
> @@ -348,6 +389,7 @@
> },
> {
> "BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Deallocate HitME$ on Reads without RspFwdI*",
> + "Counter": "0,1,2,3",
> "EventCode": "0x61",
> "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE",
> "PerPkg": "1",
> @@ -356,6 +398,7 @@
> },
> {
> "BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : op is RspIFwd or RspIFwdWb for a local request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x61",
> "EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC",
> "PerPkg": "1",
> @@ -365,6 +408,7 @@
> },
> {
> "BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Update HitMe Cache on RdInvOwn even if not RspFwdI*",
> + "Counter": "0,1,2,3",
> "EventCode": "0x61",
> "EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN",
> "PerPkg": "1",
> @@ -373,6 +417,7 @@
> },
> {
> "BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : op is RspIFwd or RspIFwdWb for a remote request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x61",
> "EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM",
> "PerPkg": "1",
> @@ -382,6 +427,7 @@
> },
> {
> "BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Update HitMe Cache to SHARed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x61",
> "EventName": "UNC_CHA_HITME_UPDATE.SHARED",
> "PerPkg": "1",
> @@ -390,6 +436,7 @@
> },
> {
> "BriefDescription": "Normal priority reads issued to the memory controller from the CHA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x59",
> "EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL",
> "PerPkg": "1",
> @@ -399,6 +446,7 @@
> },
> {
> "BriefDescription": "HA to iMC Reads Issued : ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x59",
> "EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY",
> "PerPkg": "1",
> @@ -408,6 +456,7 @@
> },
> {
> "BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line Non-ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5b",
> "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL",
> "PerPkg": "1",
> @@ -417,6 +466,7 @@
> },
> {
> "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Full Line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5b",
> "EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY",
> "PerPkg": "1",
> @@ -426,6 +476,7 @@
> },
> {
> "BriefDescription": "CHA to iMC Full Line Writes Issued : Partial Non-ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5b",
> "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL",
> "PerPkg": "1",
> @@ -435,6 +486,7 @@
> },
> {
> "BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Partial",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5b",
> "EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY",
> "PerPkg": "1",
> @@ -444,6 +496,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Any Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.ALL",
> "PerPkg": "1",
> @@ -453,6 +506,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : All transactions from Remote Agents",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.ALL_REMOTE",
> "PerPkg": "1",
> @@ -462,6 +516,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : All Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.ANY_F",
> "PerPkg": "1",
> @@ -470,6 +525,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : CRd Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.CODE",
> "PerPkg": "1",
> @@ -479,6 +535,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : CRd Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F",
> "PerPkg": "1",
> @@ -487,6 +544,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Local non-prefetch requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F",
> "PerPkg": "1",
> @@ -495,6 +553,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD",
> "PerPkg": "1",
> @@ -504,6 +563,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Data Reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL",
> "PerPkg": "1",
> @@ -513,6 +573,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Data Read Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F",
> "PerPkg": "1",
> @@ -521,6 +582,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Demand Data Reads, Core and LLC prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL",
> "PerPkg": "1",
> @@ -530,6 +592,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Data Read Misses",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS",
> "PerPkg": "1",
> @@ -539,6 +602,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : E State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.E",
> "PerPkg": "1",
> @@ -548,6 +612,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : F State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.F",
> "PerPkg": "1",
> @@ -557,6 +622,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Flush or Invalidate Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV",
> "PerPkg": "1",
> @@ -566,6 +632,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Flush",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F",
> "PerPkg": "1",
> @@ -574,6 +641,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.I",
> "PerPkg": "1",
> @@ -583,6 +651,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Local LLC prefetch requests (from LLC)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL_F",
> "PerPkg": "1",
> @@ -591,6 +660,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Transactions homed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCALLY_HOMED_ADDRESS",
> "PerPkg": "1",
> @@ -600,6 +670,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : CRd Requests that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_CODE",
> "PerPkg": "1",
> @@ -609,6 +680,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DATA_RD",
> "PerPkg": "1",
> @@ -618,6 +690,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Demand CRd Requests that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_CODE",
> "PerPkg": "1",
> @@ -627,6 +700,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Demand Data Reads that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_DATA_RD",
> "PerPkg": "1",
> @@ -636,6 +710,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Demand RFO Requests that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_DMND_RFO",
> "PerPkg": "1",
> @@ -645,6 +720,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Transactions homed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F",
> "PerPkg": "1",
> @@ -653,6 +729,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Flush or Invalidate Requests that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_FLUSH_INV",
> "PerPkg": "1",
> @@ -662,6 +739,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Prefetch requests to the LLC that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_LLC_PF",
> "PerPkg": "1",
> @@ -671,6 +749,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Prefetches that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF",
> "PerPkg": "1",
> @@ -680,6 +759,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : CRd Prefetches that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_CODE",
> "PerPkg": "1",
> @@ -689,6 +769,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Prefetches that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_DATA_RD",
> "PerPkg": "1",
> @@ -698,6 +779,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : RFO Prefetches that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_PF_RFO",
> "PerPkg": "1",
> @@ -707,6 +789,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : RFO Requests that come from the local socket (usually the core)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_RFO",
> "PerPkg": "1",
> @@ -716,6 +799,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : M State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.M",
> "PerPkg": "1",
> @@ -725,6 +809,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : All Misses",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL",
> "PerPkg": "1",
> @@ -734,6 +819,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Write Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F",
> "PerPkg": "1",
> @@ -742,6 +828,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Remote non-snoop requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.PREF_OR_DMND_REMOTE_F",
> "PerPkg": "1",
> @@ -750,6 +837,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Transactions homed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTELY_HOMED_ADDRESS",
> "PerPkg": "1",
> @@ -759,6 +847,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : CRd Requests that come from a Remote socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_CODE",
> "PerPkg": "1",
> @@ -768,6 +857,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Data Read Requests that come from a Remote socket",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_DATA_RD",
> "PerPkg": "1",
> @@ -777,6 +867,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Transactions homed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_F",
> "PerPkg": "1",
> @@ -785,6 +876,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Flush or Invalidate requests that come from a Remote socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_FLUSH_INV",
> "PerPkg": "1",
> @@ -794,6 +886,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Filters Requests for those that write info into the cache that come from a remote socket",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_OTHER",
> "PerPkg": "1",
> @@ -803,6 +896,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : RFO Requests that come from a Remote socket.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_RFO",
> "PerPkg": "1",
> @@ -812,6 +906,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Remote snoop requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP_F",
> "PerPkg": "1",
> @@ -820,6 +915,7 @@
> },
> {
> "BriefDescription": "Cache and Snoop Filter Lookups; Snoop Requests from a Remote Socket",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP",
> "PerPkg": "1",
> @@ -829,6 +925,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : RFO Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.RFO",
> "PerPkg": "1",
> @@ -838,6 +935,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : RFO Request Filter",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.RFO_F",
> "PerPkg": "1",
> @@ -846,6 +944,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Locally HOMed RFOs - Demand and Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.RFO_LOCAL",
> "PerPkg": "1",
> @@ -855,6 +954,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.S",
> "PerPkg": "1",
> @@ -864,6 +964,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : SnoopFilter - E State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.SF_E",
> "PerPkg": "1",
> @@ -873,6 +974,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : SnoopFilter - H State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.SF_H",
> "PerPkg": "1",
> @@ -882,6 +984,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : SnoopFilter - S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.SF_S",
> "PerPkg": "1",
> @@ -891,6 +994,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL",
> "PerPkg": "1",
> @@ -900,6 +1004,7 @@
> },
> {
> "BriefDescription": "Cache Lookups : Remote Writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_CHA_LLC_LOOKUP.WRITE_REMOTE",
> "PerPkg": "1",
> @@ -909,6 +1014,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : Lines in E state",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.E_STATE",
> "PerPkg": "1",
> @@ -918,6 +1024,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : IA traffic",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.IA",
> "PerPkg": "1",
> @@ -927,6 +1034,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : IO traffic",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.IO",
> "PerPkg": "1",
> @@ -936,6 +1044,7 @@
> },
> {
> "BriefDescription": "All LLC lines in E state that are victimized on a fill from an IO device",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.IO_E",
> "PerPkg": "1",
> @@ -945,6 +1054,7 @@
> },
> {
> "BriefDescription": "All LLC lines in F or S state that are victimized on a fill from an IO device",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.IO_FS",
> "PerPkg": "1",
> @@ -954,6 +1064,7 @@
> },
> {
> "BriefDescription": "All LLC lines in M state that are victimized on a fill from an IO device",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.IO_M",
> "PerPkg": "1",
> @@ -963,6 +1074,7 @@
> },
> {
> "BriefDescription": "All LLC lines in any state that are victimized on a fill from an IO device",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.IO_MESF",
> "PerPkg": "1",
> @@ -972,6 +1084,7 @@
> },
> {
> "BriefDescription": "Lines Victimized; Local - All Lines",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL",
> "PerPkg": "1",
> @@ -981,6 +1094,7 @@
> },
> {
> "BriefDescription": "Lines Victimized",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E",
> "PerPkg": "1",
> @@ -990,6 +1104,7 @@
> },
> {
> "BriefDescription": "Lines Victimized",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M",
> "PerPkg": "1",
> @@ -999,6 +1114,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : Local Only",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY",
> "PerPkg": "1",
> @@ -1007,6 +1123,7 @@
> },
> {
> "BriefDescription": "Lines Victimized",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S",
> "PerPkg": "1",
> @@ -1016,6 +1133,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : Lines in M state",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.M_STATE",
> "PerPkg": "1",
> @@ -1025,6 +1143,7 @@
> },
> {
> "BriefDescription": "Lines Victimized; Remote - All Lines",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL",
> "PerPkg": "1",
> @@ -1034,6 +1153,7 @@
> },
> {
> "BriefDescription": "Lines Victimized",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E",
> "PerPkg": "1",
> @@ -1043,6 +1163,7 @@
> },
> {
> "BriefDescription": "Lines Victimized",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M",
> "PerPkg": "1",
> @@ -1052,6 +1173,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : Remote Only",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ONLY",
> "PerPkg": "1",
> @@ -1060,6 +1182,7 @@
> },
> {
> "BriefDescription": "Lines Victimized",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S",
> "PerPkg": "1",
> @@ -1069,6 +1192,7 @@
> },
> {
> "BriefDescription": "Lines Victimized : Lines in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.S_STATE",
> "PerPkg": "1",
> @@ -1078,6 +1202,7 @@
> },
> {
> "BriefDescription": "All LLC lines in E state that are victimized on a fill",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E",
> "PerPkg": "1",
> @@ -1087,6 +1212,7 @@
> },
> {
> "BriefDescription": "All LLC lines in M state that are victimized on a fill",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M",
> "PerPkg": "1",
> @@ -1096,6 +1222,7 @@
> },
> {
> "BriefDescription": "All LLC lines in S state that are victimized on a fill",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S",
> "PerPkg": "1",
> @@ -1105,6 +1232,7 @@
> },
> {
> "BriefDescription": "Cbo Misc : CV0 Prefetch Miss",
> + "Counter": "0,1,2,3",
> "EventCode": "0x39",
> "EventName": "UNC_CHA_MISC.CV0_PREF_MISS",
> "PerPkg": "1",
> @@ -1114,6 +1242,7 @@
> },
> {
> "BriefDescription": "Cbo Misc : CV0 Prefetch Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x39",
> "EventName": "UNC_CHA_MISC.CV0_PREF_VIC",
> "PerPkg": "1",
> @@ -1123,6 +1252,7 @@
> },
> {
> "BriefDescription": "Number of times that an RFO hit in S state.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x39",
> "EventName": "UNC_CHA_MISC.RFO_HIT_S",
> "PerPkg": "1",
> @@ -1132,6 +1262,7 @@
> },
> {
> "BriefDescription": "Cbo Misc : Silent Snoop Eviction",
> + "Counter": "0,1,2,3",
> "EventCode": "0x39",
> "EventName": "UNC_CHA_MISC.RSPI_WAS_FSE",
> "PerPkg": "1",
> @@ -1141,6 +1272,7 @@
> },
> {
> "BriefDescription": "Cbo Misc : Write Combining Aliasing",
> + "Counter": "0,1,2,3",
> "EventCode": "0x39",
> "EventName": "UNC_CHA_MISC.WC_ALIASING",
> "PerPkg": "1",
> @@ -1150,6 +1282,7 @@
> },
> {
> "BriefDescription": "OSB Snoop Broadcast : Local InvItoE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x55",
> "EventName": "UNC_CHA_OSB.LOCAL_INVITOE",
> "PerPkg": "1",
> @@ -1159,6 +1292,7 @@
> },
> {
> "BriefDescription": "OSB Snoop Broadcast : Local Rd",
> + "Counter": "0,1,2,3",
> "EventCode": "0x55",
> "EventName": "UNC_CHA_OSB.LOCAL_READ",
> "PerPkg": "1",
> @@ -1168,6 +1302,7 @@
> },
> {
> "BriefDescription": "OSB Snoop Broadcast : Off",
> + "Counter": "0,1,2,3",
> "EventCode": "0x55",
> "EventName": "UNC_CHA_OSB.OFF_PWRHEURISTIC",
> "PerPkg": "1",
> @@ -1177,6 +1312,7 @@
> },
> {
> "BriefDescription": "OSB Snoop Broadcast : Remote Rd",
> + "Counter": "0,1,2,3",
> "EventCode": "0x55",
> "EventName": "UNC_CHA_OSB.REMOTE_READ",
> "PerPkg": "1",
> @@ -1186,6 +1322,7 @@
> },
> {
> "BriefDescription": "OSB Snoop Broadcast : Remote Rd InvItoE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x55",
> "EventName": "UNC_CHA_OSB.REMOTE_READINVITOE",
> "PerPkg": "1",
> @@ -1195,6 +1332,7 @@
> },
> {
> "BriefDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadcast",
> + "Counter": "0,1,2,3",
> "EventCode": "0x55",
> "EventName": "UNC_CHA_OSB.RFO_HITS_SNP_BCAST",
> "PerPkg": "1",
> @@ -1204,6 +1342,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x65",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
> "PerPkg": "1",
> @@ -1212,6 +1351,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x65",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
> "PerPkg": "1",
> @@ -1220,6 +1360,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x65",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
> "PerPkg": "1",
> @@ -1228,6 +1369,7 @@
> },
> {
> "BriefDescription": "Memory Mode related events; Counts the number of times CHA saw a Near Memory set conflict in SF/LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x64",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC",
> "PerPkg": "1",
> @@ -1237,6 +1379,7 @@
> },
> {
> "BriefDescription": "Memory Mode related events; Counts the number of times CHA saw a Near memory set conflict in SF/LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x64",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF",
> "PerPkg": "1",
> @@ -1246,6 +1389,7 @@
> },
> {
> "BriefDescription": "Memory Mode related events; Counts the number of times CHA saw a Near Memory set conflict in TOR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x64",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR",
> "PerPkg": "1",
> @@ -1255,6 +1399,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x70",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC",
> "PerPkg": "1",
> @@ -1263,6 +1408,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x70",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
> "PerPkg": "1",
> @@ -1271,6 +1417,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
> + "Counter": "0,1,2,3",
> "EventCode": "0x70",
> "EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
> "PerPkg": "1",
> @@ -1279,6 +1426,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT",
> "PerPkg": "1",
> @@ -1287,6 +1435,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.REJ_IRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.REJ_IRQ",
> "PerPkg": "1",
> @@ -1295,6 +1444,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP",
> "PerPkg": "1",
> @@ -1303,6 +1453,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.SLOW_INSERT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.SLOW_INSERT",
> "PerPkg": "1",
> @@ -1311,6 +1462,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.THROTTLE",
> "PerPkg": "1",
> @@ -1319,6 +1471,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_IRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.THROTTLE_IRQ",
> "PerPkg": "1",
> @@ -1327,6 +1480,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_PRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x66",
> "EventName": "UNC_CHA_PMM_QOS.THROTTLE_PRQ",
> "PerPkg": "1",
> @@ -1335,6 +1489,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO",
> "PerPkg": "1",
> @@ -1344,6 +1499,7 @@
> },
> {
> "BriefDescription": "Number of SLOW TOR Request inserted to ha_pmm_tor_req_fifo",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO",
> "PerPkg": "1",
> @@ -1352,6 +1508,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_CHA_READ_NO_CREDITS.MC0",
> "PerPkg": "1",
> @@ -1361,6 +1518,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_CHA_READ_NO_CREDITS.MC1",
> "PerPkg": "1",
> @@ -1370,6 +1528,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_CHA_READ_NO_CREDITS.MC2",
> "PerPkg": "1",
> @@ -1379,6 +1538,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_CHA_READ_NO_CREDITS.MC3",
> "PerPkg": "1",
> @@ -1388,6 +1548,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_CHA_READ_NO_CREDITS.MC4",
> "PerPkg": "1",
> @@ -1397,6 +1558,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_CHA_READ_NO_CREDITS.MC5",
> "PerPkg": "1",
> @@ -1406,6 +1568,7 @@
> },
> {
> "BriefDescription": "Requests for exclusive ownership of a cache line without receiving data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.INVITOE",
> "PerPkg": "1",
> @@ -1415,6 +1578,7 @@
> },
> {
> "BriefDescription": "Local requests for exclusive ownership of a cache line without receiving data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL",
> "PerPkg": "1",
> @@ -1424,6 +1588,7 @@
> },
> {
> "BriefDescription": "Remote requests for exclusive ownership of a cache line without receiving data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE",
> "PerPkg": "1",
> @@ -1433,6 +1598,7 @@
> },
> {
> "BriefDescription": "Read requests made into the CHA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.READS",
> "PerPkg": "1",
> @@ -1442,6 +1608,7 @@
> },
> {
> "BriefDescription": "Read requests from a unit on this socket",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.READS_LOCAL",
> "PerPkg": "1",
> @@ -1451,6 +1618,7 @@
> },
> {
> "BriefDescription": "Read requests from a remote socket",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.READS_REMOTE",
> "PerPkg": "1",
> @@ -1460,6 +1628,7 @@
> },
> {
> "BriefDescription": "Write requests made into the CHA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.WRITES",
> "PerPkg": "1",
> @@ -1469,6 +1638,7 @@
> },
> {
> "BriefDescription": "Write Requests from a unit on this socket",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL",
> "PerPkg": "1",
> @@ -1478,6 +1648,7 @@
> },
> {
> "BriefDescription": "Read and Write Requests; Writes Remote",
> + "Counter": "0,1,2,3",
> "EventCode": "0x50",
> "EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE",
> "PerPkg": "1",
> @@ -1487,6 +1658,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : IPQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.IPQ",
> "PerPkg": "1",
> @@ -1496,6 +1668,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : IRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.IRQ",
> "PerPkg": "1",
> @@ -1505,6 +1678,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ",
> "PerPkg": "1",
> @@ -1514,6 +1688,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : PRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.PRQ",
> "PerPkg": "1",
> @@ -1523,6 +1698,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : PRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ",
> "PerPkg": "1",
> @@ -1532,6 +1708,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : RRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.RRQ",
> "PerPkg": "1",
> @@ -1541,6 +1718,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Allocations : WBQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "UNC_CHA_RxC_INSERTS.WBQ",
> "PerPkg": "1",
> @@ -1550,6 +1728,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -1559,6 +1738,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -1568,6 +1748,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI",
> "PerPkg": "1",
> @@ -1577,6 +1758,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -1586,6 +1768,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -1595,6 +1778,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -1604,6 +1788,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0",
> "PerPkg": "1",
> @@ -1613,6 +1798,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI",
> "PerPkg": "1",
> @@ -1622,6 +1808,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP",
> "PerPkg": "1",
> @@ -1630,6 +1817,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0",
> "PerPkg": "1",
> @@ -1639,6 +1827,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA",
> "PerPkg": "1",
> @@ -1647,6 +1836,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LLC OR SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -1656,6 +1846,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM",
> "PerPkg": "1",
> @@ -1664,6 +1855,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH",
> "PerPkg": "1",
> @@ -1673,6 +1865,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM",
> "PerPkg": "1",
> @@ -1682,6 +1875,7 @@
> },
> {
> "BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM",
> "PerPkg": "1",
> @@ -1690,6 +1884,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -1699,6 +1894,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -1708,6 +1904,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI",
> "PerPkg": "1",
> @@ -1717,6 +1914,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -1726,6 +1924,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -1735,6 +1934,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -1744,6 +1944,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0",
> "PerPkg": "1",
> @@ -1753,6 +1954,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI",
> "PerPkg": "1",
> @@ -1762,6 +1964,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP",
> "PerPkg": "1",
> @@ -1770,6 +1973,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0",
> "PerPkg": "1",
> @@ -1779,6 +1983,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA",
> "PerPkg": "1",
> @@ -1787,6 +1992,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LLC or SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -1796,6 +2002,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM",
> "PerPkg": "1",
> @@ -1804,6 +2011,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Request Queue Rejects; PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH",
> "PerPkg": "1",
> @@ -1812,6 +2020,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM",
> "PerPkg": "1",
> @@ -1821,6 +2030,7 @@
> },
> {
> "BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM",
> "PerPkg": "1",
> @@ -1829,6 +2039,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -1838,6 +2049,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -1847,6 +2059,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI",
> "PerPkg": "1",
> @@ -1856,6 +2069,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -1865,6 +2079,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -1874,6 +2089,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -1883,6 +2099,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0",
> "PerPkg": "1",
> @@ -1892,6 +2109,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI",
> "PerPkg": "1",
> @@ -1901,6 +2119,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -1910,6 +2129,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -1919,6 +2139,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI",
> "PerPkg": "1",
> @@ -1928,6 +2149,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -1937,6 +2159,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -1946,6 +2169,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -1955,6 +2179,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0",
> "PerPkg": "1",
> @@ -1964,6 +2189,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI",
> "PerPkg": "1",
> @@ -1973,6 +2199,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0",
> "PerPkg": "1",
> @@ -1982,6 +2209,7 @@
> },
> {
> "BriefDescription": "ISMQ Rejects - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA",
> "PerPkg": "1",
> @@ -1991,6 +2219,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0",
> "PerPkg": "1",
> @@ -2000,6 +2229,7 @@
> },
> {
> "BriefDescription": "ISMQ Retries - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA",
> "PerPkg": "1",
> @@ -2036,6 +2266,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -2045,6 +2276,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -2054,6 +2286,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI",
> "PerPkg": "1",
> @@ -2063,6 +2296,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -2072,6 +2306,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -2081,6 +2316,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -2090,6 +2326,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0",
> "PerPkg": "1",
> @@ -2099,6 +2336,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI",
> "PerPkg": "1",
> @@ -2108,6 +2346,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP",
> "PerPkg": "1",
> @@ -2117,6 +2356,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0",
> "PerPkg": "1",
> @@ -2126,6 +2366,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA",
> "PerPkg": "1",
> @@ -2135,6 +2376,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : LLC OR SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -2144,6 +2386,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM",
> "PerPkg": "1",
> @@ -2153,6 +2396,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH",
> "PerPkg": "1",
> @@ -2162,6 +2406,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM",
> "PerPkg": "1",
> @@ -2171,6 +2416,7 @@
> },
> {
> "BriefDescription": "Other Retries - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM",
> "PerPkg": "1",
> @@ -2180,6 +2426,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -2189,6 +2436,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -2198,6 +2446,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI",
> "PerPkg": "1",
> @@ -2207,6 +2456,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -2216,6 +2466,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -2225,6 +2476,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -2234,6 +2486,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0",
> "PerPkg": "1",
> @@ -2243,6 +2496,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI",
> "PerPkg": "1",
> @@ -2252,6 +2506,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP",
> "PerPkg": "1",
> @@ -2260,6 +2515,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0",
> "PerPkg": "1",
> @@ -2269,6 +2525,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA",
> "PerPkg": "1",
> @@ -2277,6 +2534,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LLC OR SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -2286,6 +2544,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM",
> "PerPkg": "1",
> @@ -2294,6 +2553,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH",
> "PerPkg": "1",
> @@ -2303,6 +2563,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM",
> "PerPkg": "1",
> @@ -2312,6 +2573,7 @@
> },
> {
> "BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM",
> "PerPkg": "1",
> @@ -2320,6 +2582,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -2329,6 +2592,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -2338,6 +2602,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI",
> "PerPkg": "1",
> @@ -2347,6 +2612,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -2356,6 +2622,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -2365,6 +2632,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -2374,6 +2642,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0",
> "PerPkg": "1",
> @@ -2383,6 +2652,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI",
> "PerPkg": "1",
> @@ -2392,6 +2662,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP",
> "PerPkg": "1",
> @@ -2401,6 +2672,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0",
> "PerPkg": "1",
> @@ -2410,6 +2682,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA",
> "PerPkg": "1",
> @@ -2419,6 +2692,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -2428,6 +2702,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM",
> "PerPkg": "1",
> @@ -2437,6 +2712,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH",
> "PerPkg": "1",
> @@ -2446,6 +2722,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM",
> "PerPkg": "1",
> @@ -2455,6 +2732,7 @@
> },
> {
> "BriefDescription": "Request Queue Retries - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM",
> "PerPkg": "1",
> @@ -2464,6 +2742,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -2473,6 +2752,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -2482,6 +2762,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI",
> "PerPkg": "1",
> @@ -2491,6 +2772,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -2500,6 +2782,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -2509,6 +2792,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -2518,6 +2802,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0",
> "PerPkg": "1",
> @@ -2527,6 +2812,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI",
> "PerPkg": "1",
> @@ -2536,6 +2822,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP",
> "PerPkg": "1",
> @@ -2545,6 +2832,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0",
> "PerPkg": "1",
> @@ -2554,6 +2842,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA",
> "PerPkg": "1",
> @@ -2563,6 +2852,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : LLC OR SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -2572,6 +2862,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM",
> "PerPkg": "1",
> @@ -2581,6 +2872,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH",
> "PerPkg": "1",
> @@ -2590,6 +2882,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM",
> "PerPkg": "1",
> @@ -2599,6 +2892,7 @@
> },
> {
> "BriefDescription": "RRQ Rejects - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM",
> "PerPkg": "1",
> @@ -2608,6 +2902,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : AD REQ on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0",
> "PerPkg": "1",
> @@ -2617,6 +2912,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : AD RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0",
> "PerPkg": "1",
> @@ -2626,6 +2922,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : Non UPI AK Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI",
> "PerPkg": "1",
> @@ -2635,6 +2932,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : BL NCB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0",
> "PerPkg": "1",
> @@ -2644,6 +2942,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : BL NCS on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0",
> "PerPkg": "1",
> @@ -2653,6 +2952,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : BL RSP on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0",
> "PerPkg": "1",
> @@ -2662,6 +2962,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : BL WB on VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0",
> "PerPkg": "1",
> @@ -2671,6 +2972,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 0 : Non UPI IV Request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI",
> "PerPkg": "1",
> @@ -2680,6 +2982,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : Allow Snoop",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP",
> "PerPkg": "1",
> @@ -2689,6 +2992,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : ANY0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0",
> "PerPkg": "1",
> @@ -2698,6 +3002,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : HA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA",
> "PerPkg": "1",
> @@ -2707,6 +3012,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : LLC OR SF Way",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY",
> "PerPkg": "1",
> @@ -2716,6 +3022,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : LLC Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM",
> "PerPkg": "1",
> @@ -2725,6 +3032,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : PhyAddr Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH",
> "PerPkg": "1",
> @@ -2734,6 +3042,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : SF Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM",
> "PerPkg": "1",
> @@ -2743,6 +3052,7 @@
> },
> {
> "BriefDescription": "WBQ Rejects - Set 1 : Victim",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM",
> "PerPkg": "1",
> @@ -2752,6 +3062,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.ALL",
> "PerPkg": "1",
> @@ -2761,6 +3072,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : Broadcast snoop for Local Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL",
> "PerPkg": "1",
> @@ -2770,6 +3082,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : Broadcast snoops for Remote Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE",
> "PerPkg": "1",
> @@ -2779,6 +3092,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : Directed snoops for Local Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL",
> "PerPkg": "1",
> @@ -2788,6 +3102,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : Directed snoops for Remote Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE",
> "PerPkg": "1",
> @@ -2797,6 +3112,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : Broadcast or directed Snoops sent for Local Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.LOCAL",
> "PerPkg": "1",
> @@ -2806,6 +3122,7 @@
> },
> {
> "BriefDescription": "Snoops Sent : Broadcast or directed Snoops sent for Remote Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x51",
> "EventName": "UNC_CHA_SNOOPS_SENT.REMOTE",
> "PerPkg": "1",
> @@ -2815,6 +3132,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received : RSPCNFLCT*",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCT",
> "PerPkg": "1",
> @@ -2824,6 +3142,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received : RspFwd",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPFWD",
> "PerPkg": "1",
> @@ -2833,6 +3152,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received : Rsp*Fwd*WB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPFWDWB",
> "PerPkg": "1",
> @@ -2842,6 +3162,7 @@
> },
> {
> "BriefDescription": "RspI Snoop Responses Received",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPI",
> "PerPkg": "1",
> @@ -2851,6 +3172,7 @@
> },
> {
> "BriefDescription": "RspIFwd Snoop Responses Received",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD",
> "PerPkg": "1",
> @@ -2860,6 +3182,7 @@
> },
> {
> "BriefDescription": "RspS Snoop Responses Received",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPS",
> "PerPkg": "1",
> @@ -2869,6 +3192,7 @@
> },
> {
> "BriefDescription": "RspSFwd Snoop Responses Received",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD",
> "PerPkg": "1",
> @@ -2878,6 +3202,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received : Rsp*WB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_CHA_SNOOP_RESP.RSPWB",
> "PerPkg": "1",
> @@ -2887,6 +3212,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : RspCnflct",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT",
> "PerPkg": "1",
> @@ -2896,6 +3222,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : RspFwd",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD",
> "PerPkg": "1",
> @@ -2905,6 +3232,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB",
> "PerPkg": "1",
> @@ -2914,6 +3242,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : RspI",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI",
> "PerPkg": "1",
> @@ -2923,6 +3252,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : RspIFwd",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD",
> "PerPkg": "1",
> @@ -2932,6 +3262,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : RspS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS",
> "PerPkg": "1",
> @@ -2941,6 +3272,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : RspSFwd",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD",
> "PerPkg": "1",
> @@ -2950,6 +3282,7 @@
> },
> {
> "BriefDescription": "Snoop Responses Received Local : Rsp*WB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB",
> "PerPkg": "1",
> @@ -2959,6 +3292,7 @@
> },
> {
> "BriefDescription": "Misc Snoop Responses Received : MtoI RspIDataM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6b",
> "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM",
> "PerPkg": "1",
> @@ -2967,6 +3301,7 @@
> },
> {
> "BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6b",
> "EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM",
> "PerPkg": "1",
> @@ -2975,6 +3310,7 @@
> },
> {
> "BriefDescription": "Misc Snoop Responses Received : Pull Data Partial - Hit LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6b",
> "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC",
> "PerPkg": "1",
> @@ -2983,6 +3319,7 @@
> },
> {
> "BriefDescription": "Misc Snoop Responses Received : Pull Data Partial - Hit SF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6b",
> "EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF",
> "PerPkg": "1",
> @@ -2991,6 +3328,7 @@
> },
> {
> "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hit LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6b",
> "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC",
> "PerPkg": "1",
> @@ -2999,6 +3337,7 @@
> },
> {
> "BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hit SF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6b",
> "EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF",
> "PerPkg": "1",
> @@ -3007,6 +3346,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.ALL",
> "PerPkg": "1",
> @@ -3016,6 +3356,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DDR Access",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.DDR",
> "PerPkg": "1",
> @@ -3024,6 +3365,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : SF/LLC Evictions",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.EVICT",
> "PerPkg": "1",
> @@ -3033,6 +3375,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just Hits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.HIT",
> "PerPkg": "1",
> @@ -3041,6 +3384,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; All from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA",
> "PerPkg": "1",
> @@ -3050,6 +3394,7 @@
> },
> {
> "BriefDescription": "TOR Inserts;CLFlush from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH",
> "PerPkg": "1",
> @@ -3059,6 +3404,7 @@
> },
> {
> "BriefDescription": "TOR Inserts;CLFlushOpt from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT",
> "PerPkg": "1",
> @@ -3068,6 +3414,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; CRd from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD",
> "PerPkg": "1",
> @@ -3077,6 +3424,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; CRd Pref from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF",
> "PerPkg": "1",
> @@ -3086,6 +3434,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD",
> "PerPkg": "1",
> @@ -3095,6 +3444,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE",
> "PerPkg": "1",
> @@ -3104,6 +3454,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Opt from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT",
> "PerPkg": "1",
> @@ -3113,6 +3464,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Opt Pref from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF",
> "PerPkg": "1",
> @@ -3122,6 +3474,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Pref from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF",
> "PerPkg": "1",
> @@ -3131,6 +3484,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; Hits from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT",
> "PerPkg": "1",
> @@ -3140,6 +3494,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; CRd hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD",
> "PerPkg": "1",
> @@ -3149,6 +3504,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; CRd Pref hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF",
> "PerPkg": "1",
> @@ -3158,6 +3514,7 @@
> },
> {
> "BriefDescription": "All requests issued from IA cores to CXL accelerator memory regions that hit the LLC.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC",
> "PerPkg": "1",
> @@ -3166,6 +3523,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3175,6 +3533,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD",
> "PerPkg": "1",
> @@ -3184,6 +3543,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Hit the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE",
> "PerPkg": "1",
> @@ -3193,6 +3553,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Opt hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT",
> "PerPkg": "1",
> @@ -3202,6 +3563,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Opt Pref hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF",
> "PerPkg": "1",
> @@ -3211,6 +3573,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Pref hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF",
> "PerPkg": "1",
> @@ -3220,6 +3583,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Hit LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM",
> "PerPkg": "1",
> @@ -3229,6 +3593,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefCode hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE",
> "PerPkg": "1",
> @@ -3238,6 +3603,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefData hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA",
> "PerPkg": "1",
> @@ -3247,6 +3613,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefRFO hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO",
> "PerPkg": "1",
> @@ -3256,6 +3623,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO",
> "PerPkg": "1",
> @@ -3265,6 +3633,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO Pref hits from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF",
> "PerPkg": "1",
> @@ -3274,6 +3643,7 @@
> },
> {
> "BriefDescription": "TOR Inserts;ItoM from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM",
> "PerPkg": "1",
> @@ -3283,6 +3653,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cores",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR",
> "PerPkg": "1",
> @@ -3292,6 +3663,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefCode from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE",
> "PerPkg": "1",
> @@ -3301,6 +3673,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefData from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA",
> "PerPkg": "1",
> @@ -3310,6 +3683,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefRFO from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO",
> "PerPkg": "1",
> @@ -3319,6 +3693,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; misses from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",
> "PerPkg": "1",
> @@ -3328,6 +3703,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for CRd misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD",
> "PerPkg": "1",
> @@ -3337,6 +3713,7 @@
> },
> {
> "BriefDescription": "CRds and equivalent opcodes issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRDMORPH_CXL_ACC",
> "PerPkg": "1",
> @@ -3345,6 +3722,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL",
> "PerPkg": "1",
> @@ -3354,6 +3732,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; CRd Pref misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF",
> "PerPkg": "1",
> @@ -3363,6 +3742,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL",
> "PerPkg": "1",
> @@ -3372,6 +3752,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE",
> "PerPkg": "1",
> @@ -3381,6 +3762,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE",
> "PerPkg": "1",
> @@ -3390,6 +3772,7 @@
> },
> {
> "BriefDescription": "All requests issued from IA cores to CXL accelerator memory regions that miss the LLC.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC",
> "PerPkg": "1",
> @@ -3398,6 +3781,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3407,6 +3791,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRd misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD",
> "PerPkg": "1",
> @@ -3416,6 +3801,7 @@
> },
> {
> "BriefDescription": "DRds and equivalent opcodes issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDMORPH_CXL_ACC",
> "PerPkg": "1",
> @@ -3424,6 +3810,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE",
> "PerPkg": "1",
> @@ -3433,6 +3820,7 @@
> },
> {
> "BriefDescription": "DRds issued from an IA core which miss the L3 and target memory in a CXL type 2 memory expander card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC",
> "PerPkg": "1",
> @@ -3441,6 +3829,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3450,6 +3839,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRds issued by IA Cores targeting DDR Mem that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR",
> "PerPkg": "1",
> @@ -3459,6 +3849,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRd misses from local IA targeting local memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL",
> "PerPkg": "1",
> @@ -3468,6 +3859,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR",
> "PerPkg": "1",
> @@ -3477,6 +3869,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM",
> "PerPkg": "1",
> @@ -3486,6 +3879,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Opt misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT",
> "PerPkg": "1",
> @@ -3495,6 +3889,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3504,6 +3899,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; DRd Opt Pref misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF",
> "PerPkg": "1",
> @@ -3513,6 +3909,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3522,6 +3919,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRds issued by iA Cores targeting PMM Mem that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM",
> "PerPkg": "1",
> @@ -3531,6 +3929,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRd Pref misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF",
> "PerPkg": "1",
> @@ -3540,6 +3939,7 @@
> },
> {
> "BriefDescription": "L2 data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC",
> "PerPkg": "1",
> @@ -3548,6 +3948,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3557,6 +3958,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR",
> "PerPkg": "1",
> @@ -3566,6 +3968,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting local memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL",
> "PerPkg": "1",
> @@ -3575,6 +3978,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR",
> "PerPkg": "1",
> @@ -3584,6 +3988,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM",
> "PerPkg": "1",
> @@ -3593,6 +3998,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM",
> "PerPkg": "1",
> @@ -3602,6 +4008,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRd Pref misses from local IA targeting remote memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE",
> "PerPkg": "1",
> @@ -3611,6 +4018,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR",
> "PerPkg": "1",
> @@ -3620,6 +4028,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM",
> "PerPkg": "1",
> @@ -3629,6 +4038,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for DRd misses from local IA targeting remote memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE",
> "PerPkg": "1",
> @@ -3638,6 +4048,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR",
> "PerPkg": "1",
> @@ -3647,6 +4058,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM",
> "PerPkg": "1",
> @@ -3656,6 +4068,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Missed LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM",
> "PerPkg": "1",
> @@ -3665,6 +4078,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefCode misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE",
> "PerPkg": "1",
> @@ -3674,6 +4088,7 @@
> },
> {
> "BriefDescription": "LLC Prefetch Code transactions issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE_CXL_ACC",
> "PerPkg": "1",
> @@ -3682,6 +4097,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefData misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA",
> "PerPkg": "1",
> @@ -3691,6 +4107,7 @@
> },
> {
> "BriefDescription": "LLC data prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC",
> "PerPkg": "1",
> @@ -3699,6 +4116,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3708,6 +4126,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; LLCPrefRFO misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO",
> "PerPkg": "1",
> @@ -3717,6 +4136,7 @@
> },
> {
> "BriefDescription": "L2 RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC",
> "PerPkg": "1",
> @@ -3725,6 +4145,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3734,6 +4155,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR",
> "PerPkg": "1",
> @@ -3743,6 +4165,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM",
> "PerPkg": "1",
> @@ -3752,6 +4175,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR",
> "PerPkg": "1",
> @@ -3761,6 +4185,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM",
> "PerPkg": "1",
> @@ -3770,6 +4195,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR",
> "PerPkg": "1",
> @@ -3779,6 +4205,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM",
> "PerPkg": "1",
> @@ -3788,6 +4215,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR",
> "PerPkg": "1",
> @@ -3797,6 +4225,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM",
> "PerPkg": "1",
> @@ -3806,6 +4235,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO",
> "PerPkg": "1",
> @@ -3815,6 +4245,7 @@
> },
> {
> "BriefDescription": "RFO and L2 RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFOMORPH_CXL_ACC",
> "PerPkg": "1",
> @@ -3823,6 +4254,7 @@
> },
> {
> "BriefDescription": "RFOs issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC",
> "PerPkg": "1",
> @@ -3831,6 +4263,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3840,6 +4273,7 @@
> },
> {
> "BriefDescription": "TOR Inserts RFO misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL",
> "PerPkg": "1",
> @@ -3849,6 +4283,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO pref misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF",
> "PerPkg": "1",
> @@ -3858,6 +4293,7 @@
> },
> {
> "BriefDescription": "LLC RFO prefetches issued from an IA core which miss the L3 and target memory in a CXL type 2 accelerator.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC",
> "PerPkg": "1",
> @@ -3866,6 +4302,7 @@
> },
> {
> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_ACC_LOCAL",
> "PerPkg": "1",
> @@ -3875,6 +4312,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO prefetch misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL",
> "PerPkg": "1",
> @@ -3884,6 +4322,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO prefetch misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE",
> "PerPkg": "1",
> @@ -3893,6 +4332,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO misses from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE",
> "PerPkg": "1",
> @@ -3902,6 +4342,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that Missed LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF",
> "PerPkg": "1",
> @@ -3911,6 +4352,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL",
> "PerPkg": "1",
> @@ -3920,6 +4362,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that Missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF",
> "PerPkg": "1",
> @@ -3929,6 +4372,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR",
> "PerPkg": "1",
> @@ -3938,6 +4382,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM",
> "PerPkg": "1",
> @@ -3947,6 +4392,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR",
> "PerPkg": "1",
> @@ -3956,6 +4402,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM",
> "PerPkg": "1",
> @@ -3965,6 +4412,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Missed LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL",
> "PerPkg": "1",
> @@ -3974,6 +4422,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO",
> "PerPkg": "1",
> @@ -3983,6 +4432,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO pref from local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF",
> "PerPkg": "1",
> @@ -3992,6 +4442,7 @@
> },
> {
> "BriefDescription": "TOR Inserts;SpecItoM from Local IA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM",
> "PerPkg": "1",
> @@ -4001,6 +4452,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE",
> "PerPkg": "1",
> @@ -4010,6 +4462,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI",
> "PerPkg": "1",
> @@ -4019,6 +4472,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE",
> "PerPkg": "1",
> @@ -4028,6 +4482,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. Modified Write Backs",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI",
> "PerPkg": "1",
> @@ -4037,6 +4492,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI",
> "PerPkg": "1",
> @@ -4046,6 +4502,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLs issued by iA Cores",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL",
> "PerPkg": "1",
> @@ -4055,6 +4512,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WCiLF issued by iA Cores",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF",
> "PerPkg": "1",
> @@ -4064,6 +4522,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; All from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO",
> "PerPkg": "1",
> @@ -4073,6 +4532,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH",
> "PerPkg": "1",
> @@ -4082,6 +4542,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; Hits from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT",
> "PerPkg": "1",
> @@ -4091,6 +4552,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; ItoM hits from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM",
> "PerPkg": "1",
> @@ -4100,6 +4562,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR",
> "PerPkg": "1",
> @@ -4109,6 +4572,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RdCur and FsRdCur hits from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR",
> "PerPkg": "1",
> @@ -4118,6 +4582,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO hits from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO",
> "PerPkg": "1",
> @@ -4127,6 +4592,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for ItoM from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM",
> "PerPkg": "1",
> @@ -4136,6 +4602,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for ItoMCacheNears from IO devices.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR",
> "PerPkg": "1",
> @@ -4145,6 +4612,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; Misses from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS",
> "PerPkg": "1",
> @@ -4154,6 +4622,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; ItoM misses from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM",
> "PerPkg": "1",
> @@ -4163,6 +4632,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR",
> "PerPkg": "1",
> @@ -4172,6 +4642,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RdCur and FsRdCur misses from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR",
> "PerPkg": "1",
> @@ -4181,6 +4652,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO misses from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO",
> "PerPkg": "1",
> @@ -4190,6 +4662,7 @@
> },
> {
> "BriefDescription": "TOR Inserts for RdCur from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR",
> "PerPkg": "1",
> @@ -4199,6 +4672,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; RFO from local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_RFO",
> "PerPkg": "1",
> @@ -4208,6 +4682,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI",
> "PerPkg": "1",
> @@ -4217,6 +4692,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : IPQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IPQ",
> "PerPkg": "1",
> @@ -4226,6 +4702,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : IRQ - iA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA",
> "PerPkg": "1",
> @@ -4235,6 +4712,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : IRQ - Non iA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA",
> "PerPkg": "1",
> @@ -4244,6 +4722,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just ISOC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.ISOC",
> "PerPkg": "1",
> @@ -4252,6 +4731,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just Local Targets",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT",
> "PerPkg": "1",
> @@ -4260,6 +4740,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : All from Local iA and IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL",
> "PerPkg": "1",
> @@ -4269,6 +4750,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : All from Local iA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.LOC_IA",
> "PerPkg": "1",
> @@ -4278,6 +4760,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : All from Local IO",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.LOC_IO",
> "PerPkg": "1",
> @@ -4287,6 +4770,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of the extended umask field",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC",
> "PerPkg": "1",
> @@ -4295,6 +4779,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just Misses",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.MISS",
> "PerPkg": "1",
> @@ -4303,6 +4788,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : MMCFG Access",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.MMCFG",
> "PerPkg": "1",
> @@ -4311,6 +4797,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : MMIO Access",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.MMIO",
> "PerPkg": "1",
> @@ -4319,6 +4806,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just NearMem",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.NEARMEM",
> "PerPkg": "1",
> @@ -4327,6 +4815,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just NonCoherent",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.NONCOH",
> "PerPkg": "1",
> @@ -4335,6 +4824,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just NotNearMem",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM",
> "PerPkg": "1",
> @@ -4343,6 +4833,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : PMM Access",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.PMM",
> "PerPkg": "1",
> @@ -4351,6 +4842,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in b[29:19] of the extended umask field",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC",
> "PerPkg": "1",
> @@ -4359,6 +4851,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : PRQ - IOSF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF",
> "PerPkg": "1",
> @@ -4368,6 +4861,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : PRQ - Non IOSF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF",
> "PerPkg": "1",
> @@ -4377,6 +4871,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : Just Remote Targets",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT",
> "PerPkg": "1",
> @@ -4385,6 +4880,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : All from Remote",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.REM_ALL",
> "PerPkg": "1",
> @@ -4394,6 +4890,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : All Snoops from Remote",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.REM_SNPS",
> "PerPkg": "1",
> @@ -4403,6 +4900,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : RRQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.RRQ",
> "PerPkg": "1",
> @@ -4412,6 +4910,7 @@
> },
> {
> "BriefDescription": "TOR Inserts; All Snoops from Remote",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.SNPS_FROM_REM",
> "PerPkg": "1",
> @@ -4421,6 +4920,7 @@
> },
> {
> "BriefDescription": "TOR Inserts : WBQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_CHA_TOR_INSERTS.WBQ",
> "PerPkg": "1",
> @@ -5825,6 +6325,7 @@
> },
> {
> "BriefDescription": "WbPushMtoI : Pushed to LLC",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_CHA_WB_PUSH_MTOI.LLC",
> "PerPkg": "1",
> @@ -5834,6 +6335,7 @@
> },
> {
> "BriefDescription": "WbPushMtoI : Pushed to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_CHA_WB_PUSH_MTOI.MEM",
> "PerPkg": "1",
> @@ -5843,6 +6345,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5a",
> "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0",
> "PerPkg": "1",
> @@ -5852,6 +6355,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5a",
> "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1",
> "PerPkg": "1",
> @@ -5861,6 +6365,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5a",
> "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2",
> "PerPkg": "1",
> @@ -5870,6 +6375,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5a",
> "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3",
> "PerPkg": "1",
> @@ -5879,6 +6385,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5a",
> "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4",
> "PerPkg": "1",
> @@ -5888,6 +6395,7 @@
> },
> {
> "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5a",
> "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5",
> "PerPkg": "1",
> @@ -5897,6 +6405,7 @@
> },
> {
> "BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6f",
> "EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT",
> "PerPkg": "1",
> @@ -5906,6 +6415,7 @@
> },
> {
> "BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6f",
> "EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD",
> "PerPkg": "1",
> @@ -5915,6 +6425,7 @@
> },
> {
> "BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6f",
> "EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT",
> "PerPkg": "1",
> @@ -5924,6 +6435,7 @@
> },
> {
> "BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6f",
> "EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD",
> "PerPkg": "1",
> @@ -5933,6 +6445,7 @@
> },
> {
> "BriefDescription": "XPT Prefetches : Sent (on 0?)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6f",
> "EventName": "UNC_CHA_XPT_PREF.SENT0",
> "PerPkg": "1",
> @@ -5942,6 +6455,7 @@
> },
> {
> "BriefDescription": "XPT Prefetches : Sent (on 1?)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x6f",
> "EventName": "UNC_CHA_XPT_PREF.SENT1",
> "PerPkg": "1",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json
> index f3e84fd88de3..147903614004 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cxl.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Counts the number of lfclk ticks",
> + "Counter": "0,1,2,3,4,5,6,7",
> "EventCode": "0x01",
> "EventName": "UNC_CXLCM_CLOCKTICKS",
> "PerPkg": "1",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Mem Rxx AGF 0",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_DATA",
> "PerPkg": "1",
> @@ -17,6 +19,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Req AGF0",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ0",
> "PerPkg": "1",
> @@ -25,6 +28,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Rsp AGF",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_REQ1",
> "PerPkg": "1",
> @@ -33,6 +37,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Data AGF",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP0",
> "PerPkg": "1",
> @@ -41,6 +46,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Rsp AGF",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.CACHE_RSP1",
> "PerPkg": "1",
> @@ -49,6 +55,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Req AGF 1",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_DATA",
> "PerPkg": "1",
> @@ -57,6 +64,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Mem Data AGF",
> + "Counter": "4,5,6,7",
> "EventCode": "0x43",
> "EventName": "UNC_CXLCM_RxC_AGF_INSERTS.MEM_REQ",
> "PerPkg": "1",
> @@ -65,6 +73,7 @@
> },
> {
> "BriefDescription": "Count the number of Flits with AK set",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.AK_HDR",
> "PerPkg": "1",
> @@ -73,6 +82,7 @@
> },
> {
> "BriefDescription": "Count the number of Flits with BE set",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.BE_HDR",
> "PerPkg": "1",
> @@ -81,6 +91,7 @@
> },
> {
> "BriefDescription": "Count the number of control flits received",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.CTRL",
> "PerPkg": "1",
> @@ -89,6 +100,7 @@
> },
> {
> "BriefDescription": "Count the number of Headerless flits received",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.NO_HDR",
> "PerPkg": "1",
> @@ -97,6 +109,7 @@
> },
> {
> "BriefDescription": "Count the number of protocol flits received",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.PROT",
> "PerPkg": "1",
> @@ -105,6 +118,7 @@
> },
> {
> "BriefDescription": "Count the number of Flits with SZ set",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.SZ_HDR",
> "PerPkg": "1",
> @@ -113,6 +127,7 @@
> },
> {
> "BriefDescription": "Count the number of flits received",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.VALID",
> "PerPkg": "1",
> @@ -121,6 +136,7 @@
> },
> {
> "BriefDescription": "Count the number of valid messages in the flit",
> + "Counter": "4,5,6,7",
> "EventCode": "0x4b",
> "EventName": "UNC_CXLCM_RxC_FLITS.VALID_MSG",
> "PerPkg": "1",
> @@ -129,6 +145,7 @@
> },
> {
> "BriefDescription": "Count the number of CRC errors detected",
> + "Counter": "4,5,6,7",
> "EventCode": "0x40",
> "EventName": "UNC_CXLCM_RxC_MISC.CRC_ERRORS",
> "PerPkg": "1",
> @@ -137,6 +154,7 @@
> },
> {
> "BriefDescription": "Count the number of Init flits sent",
> + "Counter": "4,5,6,7",
> "EventCode": "0x40",
> "EventName": "UNC_CXLCM_RxC_MISC.INIT",
> "PerPkg": "1",
> @@ -145,6 +163,7 @@
> },
> {
> "BriefDescription": "Count the number of LLCRD flits sent",
> + "Counter": "4,5,6,7",
> "EventCode": "0x40",
> "EventName": "UNC_CXLCM_RxC_MISC.LLCRD",
> "PerPkg": "1",
> @@ -153,6 +172,7 @@
> },
> {
> "BriefDescription": "Count the number of Retry flits sent",
> + "Counter": "4,5,6,7",
> "EventCode": "0x40",
> "EventName": "UNC_CXLCM_RxC_MISC.RETRY",
> "PerPkg": "1",
> @@ -161,6 +181,7 @@
> },
> {
> "BriefDescription": "Number of cycles the Packing Buffer is Full",
> + "Counter": "4,5,6,7",
> "EventCode": "0x52",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_DATA",
> "PerPkg": "1",
> @@ -169,6 +190,7 @@
> },
> {
> "BriefDescription": "Number of cycles the Packing Buffer is Full",
> + "Counter": "4,5,6,7",
> "EventCode": "0x52",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_REQ",
> "PerPkg": "1",
> @@ -177,6 +199,7 @@
> },
> {
> "BriefDescription": "Number of cycles the Packing Buffer is Full",
> + "Counter": "4,5,6,7",
> "EventCode": "0x52",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.CACHE_RSP",
> "PerPkg": "1",
> @@ -185,6 +208,7 @@
> },
> {
> "BriefDescription": "Number of cycles the Packing Buffer is Full",
> + "Counter": "4,5,6,7",
> "EventCode": "0x52",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_DATA",
> "PerPkg": "1",
> @@ -193,6 +217,7 @@
> },
> {
> "BriefDescription": "Number of cycles the Packing Buffer is Full",
> + "Counter": "4,5,6,7",
> "EventCode": "0x52",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_FULL.MEM_REQ",
> "PerPkg": "1",
> @@ -201,6 +226,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Data Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x41",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_DATA",
> "PerPkg": "1",
> @@ -209,6 +235,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Req Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x41",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_REQ",
> "PerPkg": "1",
> @@ -217,6 +244,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Rsp Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x41",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.CACHE_RSP",
> "PerPkg": "1",
> @@ -225,6 +253,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Mem Data Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x41",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_DATA",
> "PerPkg": "1",
> @@ -233,6 +262,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Mem Rxx Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x41",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_REQ",
> "PerPkg": "1",
> @@ -241,6 +271,7 @@
> },
> {
> "BriefDescription": "Number of cycles of Not Empty for Cache Data Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x42",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_DATA",
> "PerPkg": "1",
> @@ -249,6 +280,7 @@
> },
> {
> "BriefDescription": "Number of cycles of Not Empty for Cache Req Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x42",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_REQ",
> "PerPkg": "1",
> @@ -257,6 +289,7 @@
> },
> {
> "BriefDescription": "Number of cycles of Not Empty for Cache Rsp Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x42",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.CACHE_RSP",
> "PerPkg": "1",
> @@ -265,6 +298,7 @@
> },
> {
> "BriefDescription": "Number of cycles of Not Empty for Mem Data Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x42",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_DATA",
> "PerPkg": "1",
> @@ -273,6 +307,7 @@
> },
> {
> "BriefDescription": "Number of cycles of Not Empty for Mem Rxx Packing buffer",
> + "Counter": "4,5,6,7",
> "EventCode": "0x42",
> "EventName": "UNC_CXLCM_RxC_PACK_BUF_NE.MEM_REQ",
> "PerPkg": "1",
> @@ -281,6 +316,7 @@
> },
> {
> "BriefDescription": "Count the number of Flits with AK set",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.AK_HDR",
> "PerPkg": "1",
> @@ -289,6 +325,7 @@
> },
> {
> "BriefDescription": "Count the number of Flits with BE set",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.BE_HDR",
> "PerPkg": "1",
> @@ -297,6 +334,7 @@
> },
> {
> "BriefDescription": "Count the number of control flits packed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.CTRL",
> "PerPkg": "1",
> @@ -305,6 +343,7 @@
> },
> {
> "BriefDescription": "Count the number of Headerless flits packed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.NO_HDR",
> "PerPkg": "1",
> @@ -313,6 +352,7 @@
> },
> {
> "BriefDescription": "Count the number of protocol flits packed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.PROT",
> "PerPkg": "1",
> @@ -321,6 +361,7 @@
> },
> {
> "BriefDescription": "Count the number of Flits with SZ set",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.SZ_HDR",
> "PerPkg": "1",
> @@ -329,6 +370,7 @@
> },
> {
> "BriefDescription": "Count the number of flits packed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_CXLCM_TxC_FLITS.VALID",
> "PerPkg": "1",
> @@ -337,6 +379,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Data Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_DATA",
> "PerPkg": "1",
> @@ -345,6 +388,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Req Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ0",
> "PerPkg": "1",
> @@ -353,6 +397,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Rsp1 Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_REQ1",
> "PerPkg": "1",
> @@ -361,6 +406,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Rsp0 Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP0",
> "PerPkg": "1",
> @@ -369,6 +415,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Cache Req Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.CACHE_RSP1",
> "PerPkg": "1",
> @@ -377,6 +424,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Mem Data Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_DATA",
> "PerPkg": "1",
> @@ -385,6 +433,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to Mem Rxx Packing buffer",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLCM_TxC_PACK_BUF_INSERTS.MEM_REQ",
> "PerPkg": "1",
> @@ -393,6 +442,7 @@
> },
> {
> "BriefDescription": "Counts the number of uclk ticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_CXLDP_CLOCKTICKS",
> "PerPkg": "1",
> @@ -401,6 +451,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to M2S Data AGF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA",
> "PerPkg": "1",
> @@ -409,6 +460,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to M2S Req AGF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.M2S_REQ",
> "PerPkg": "1",
> @@ -417,6 +469,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to U2C Data AGF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_DATA",
> "PerPkg": "1",
> @@ -425,6 +478,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to U2C Req AGF",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_REQ",
> "PerPkg": "1",
> @@ -433,6 +487,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to U2C Rsp AGF 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP0",
> "PerPkg": "1",
> @@ -441,6 +496,7 @@
> },
> {
> "BriefDescription": "Number of Allocation to U2C Rsp AGF 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_CXLDP_TxC_AGF_INSERTS.U2C_RSP1",
> "PerPkg": "1",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
> index 09d840c7da4c..ee023a574bd2 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-interconnect.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Total IRP occupancy of inbound read and write requests to coherent memory.",
> + "Counter": "0,1",
> "EventCode": "0x0f",
> "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM",
> "PerPkg": "1",
> @@ -10,6 +11,7 @@
> },
> {
> "BriefDescription": "IRP Clockticks",
> + "Counter": "0,1",
> "EventCode": "0x01",
> "EventName": "UNC_I_CLOCKTICKS",
> "PerPkg": "1",
> @@ -18,6 +20,7 @@
> },
> {
> "BriefDescription": "FAF RF full",
> + "Counter": "0,1",
> "EventCode": "0x17",
> "EventName": "UNC_I_FAF_FULL",
> "PerPkg": "1",
> @@ -25,6 +28,7 @@
> },
> {
> "BriefDescription": "FAF - request insert from TC.",
> + "Counter": "0,1",
> "EventCode": "0x18",
> "EventName": "UNC_I_FAF_INSERTS",
> "PerPkg": "1",
> @@ -32,6 +36,7 @@
> },
> {
> "BriefDescription": "FAF occupancy",
> + "Counter": "0,1",
> "EventCode": "0x19",
> "EventName": "UNC_I_FAF_OCCUPANCY",
> "PerPkg": "1",
> @@ -39,6 +44,7 @@
> },
> {
> "BriefDescription": "FAF allocation -- sent to ADQ",
> + "Counter": "0,1",
> "EventCode": "0x16",
> "EventName": "UNC_I_FAF_TRANSACTIONS",
> "PerPkg": "1",
> @@ -46,6 +52,7 @@
> },
> {
> "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)",
> + "Counter": "0,1",
> "EventCode": "0x20",
> "EventName": "UNC_I_IRP_ALL.EVICTS",
> "PerPkg": "1",
> @@ -54,6 +61,7 @@
> },
> {
> "BriefDescription": ": All Inserts Inbound (p2p + faf + cset)",
> + "Counter": "0,1",
> "EventCode": "0x20",
> "EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS",
> "PerPkg": "1",
> @@ -62,6 +70,7 @@
> },
> {
> "BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)",
> + "Counter": "0,1",
> "EventCode": "0x20",
> "EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS",
> "PerPkg": "1",
> @@ -70,6 +79,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
> "PerPkg": "1",
> @@ -78,6 +88,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.2ND_RD_INSERT",
> "PerPkg": "1",
> @@ -86,6 +97,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.2ND_WR_INSERT",
> "PerPkg": "1",
> @@ -94,6 +106,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.FAST_REJ",
> "PerPkg": "1",
> @@ -102,6 +115,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.FAST_REQ",
> "PerPkg": "1",
> @@ -110,6 +124,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.FAST_XFER",
> "PerPkg": "1",
> @@ -118,6 +133,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.PF_ACK_HINT",
> "PerPkg": "1",
> @@ -126,6 +142,7 @@
> },
> {
> "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
> + "Counter": "0,1",
> "EventCode": "0x1e",
> "EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF",
> "PerPkg": "1",
> @@ -134,6 +151,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Lost Forward",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.LOST_FWD",
> "PerPkg": "1",
> @@ -143,6 +161,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Received Invalid",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.SEC_RCVD_INVLD",
> "PerPkg": "1",
> @@ -152,6 +171,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Received Valid",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.SEC_RCVD_VLD",
> "PerPkg": "1",
> @@ -161,6 +181,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.SLOW_E",
> "PerPkg": "1",
> @@ -170,6 +191,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.SLOW_I",
> "PerPkg": "1",
> @@ -179,6 +201,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.SLOW_M",
> "PerPkg": "1",
> @@ -188,6 +211,7 @@
> },
> {
> "BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line",
> + "Counter": "0,1",
> "EventCode": "0x1f",
> "EventName": "UNC_I_MISC1.SLOW_S",
> "PerPkg": "1",
> @@ -197,6 +221,7 @@
> },
> {
> "BriefDescription": "Responses to snoops of any type that hit M, E, S or I line in the IIO",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.ALL_HIT",
> "PerPkg": "1",
> @@ -206,6 +231,7 @@
> },
> {
> "BriefDescription": "Responses to snoops of any type that hit E or S line in the IIO cache",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES",
> "PerPkg": "1",
> @@ -215,6 +241,7 @@
> },
> {
> "BriefDescription": "Responses to snoops of any type that hit I line in the IIO cache",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I",
> "PerPkg": "1",
> @@ -224,6 +251,7 @@
> },
> {
> "BriefDescription": "Responses to snoops of any type that hit M line in the IIO cache",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M",
> "PerPkg": "1",
> @@ -233,6 +261,7 @@
> },
> {
> "BriefDescription": "Responses to snoops of any type that miss the IIO cache",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.ALL_MISS",
> "PerPkg": "1",
> @@ -242,6 +271,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : Hit E or S",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.HIT_ES",
> "PerPkg": "1",
> @@ -250,6 +280,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : Hit I",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.HIT_I",
> "PerPkg": "1",
> @@ -258,6 +289,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : Hit M",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.HIT_M",
> "PerPkg": "1",
> @@ -266,6 +298,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : Miss",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.MISS",
> "PerPkg": "1",
> @@ -274,6 +307,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : SnpCode",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.SNPCODE",
> "PerPkg": "1",
> @@ -282,6 +316,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : SnpData",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.SNPDATA",
> "PerPkg": "1",
> @@ -290,6 +325,7 @@
> },
> {
> "BriefDescription": "Snoop Responses : SnpInv",
> + "Counter": "0,1",
> "EventCode": "0x12",
> "EventName": "UNC_I_SNOOP_RESP.SNPINV",
> "PerPkg": "1",
> @@ -298,6 +334,7 @@
> },
> {
> "BriefDescription": "Inbound write (fast path) requests received by the IRP.",
> + "Counter": "0,1",
> "EventCode": "0x11",
> "EventName": "UNC_I_TRANSACTIONS.WR_PREF",
> "PerPkg": "1",
> @@ -307,6 +344,7 @@
> },
> {
> "BriefDescription": "AK Egress Allocations",
> + "Counter": "0,1",
> "EventCode": "0x0b",
> "EventName": "UNC_I_TxC_AK_INSERTS",
> "PerPkg": "1",
> @@ -314,6 +352,7 @@
> },
> {
> "BriefDescription": "BL DRS Egress Cycles Full",
> + "Counter": "0,1",
> "EventCode": "0x05",
> "EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL",
> "PerPkg": "1",
> @@ -321,6 +360,7 @@
> },
> {
> "BriefDescription": "BL DRS Egress Inserts",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_I_TxC_BL_DRS_INSERTS",
> "PerPkg": "1",
> @@ -328,6 +368,7 @@
> },
> {
> "BriefDescription": "BL DRS Egress Occupancy",
> + "Counter": "0,1",
> "EventCode": "0x08",
> "EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY",
> "PerPkg": "1",
> @@ -335,6 +376,7 @@
> },
> {
> "BriefDescription": "BL NCB Egress Cycles Full",
> + "Counter": "0,1",
> "EventCode": "0x06",
> "EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL",
> "PerPkg": "1",
> @@ -342,6 +384,7 @@
> },
> {
> "BriefDescription": "BL NCB Egress Inserts",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_I_TxC_BL_NCB_INSERTS",
> "PerPkg": "1",
> @@ -349,6 +392,7 @@
> },
> {
> "BriefDescription": "BL NCB Egress Occupancy",
> + "Counter": "0,1",
> "EventCode": "0x09",
> "EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY",
> "PerPkg": "1",
> @@ -356,6 +400,7 @@
> },
> {
> "BriefDescription": "BL NCS Egress Cycles Full",
> + "Counter": "0,1",
> "EventCode": "0x07",
> "EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL",
> "PerPkg": "1",
> @@ -363,6 +408,7 @@
> },
> {
> "BriefDescription": "BL NCS Egress Inserts",
> + "Counter": "0,1",
> "EventCode": "0x04",
> "EventName": "UNC_I_TxC_BL_NCS_INSERTS",
> "PerPkg": "1",
> @@ -370,6 +416,7 @@
> },
> {
> "BriefDescription": "BL NCS Egress Occupancy",
> + "Counter": "0,1",
> "EventCode": "0x0a",
> "EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY",
> "PerPkg": "1",
> @@ -377,6 +424,7 @@
> },
> {
> "BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES",
> + "Counter": "0,1",
> "EventCode": "0x1c",
> "EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES",
> "PerPkg": "1",
> @@ -385,6 +433,7 @@
> },
> {
> "BriefDescription": "No AD0 Egress Credits Stalls",
> + "Counter": "0,1",
> "EventCode": "0x1a",
> "EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES",
> "PerPkg": "1",
> @@ -393,6 +442,7 @@
> },
> {
> "BriefDescription": "No AD1 Egress Credits Stalls",
> + "Counter": "0,1",
> "EventCode": "0x1b",
> "EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES",
> "PerPkg": "1",
> @@ -401,6 +451,7 @@
> },
> {
> "BriefDescription": "No BL Egress Credit Stalls",
> + "Counter": "0,1",
> "EventCode": "0x1d",
> "EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES",
> "PerPkg": "1",
> @@ -409,6 +460,7 @@
> },
> {
> "BriefDescription": "Outbound Read Requests",
> + "Counter": "0,1",
> "EventCode": "0x0d",
> "EventName": "UNC_I_TxS_DATA_INSERTS_NCB",
> "PerPkg": "1",
> @@ -417,6 +469,7 @@
> },
> {
> "BriefDescription": "Outbound Read Requests",
> + "Counter": "0,1",
> "EventCode": "0x0e",
> "EventName": "UNC_I_TxS_DATA_INSERTS_NCS",
> "PerPkg": "1",
> @@ -425,6 +478,7 @@
> },
> {
> "BriefDescription": "Outbound Request Queue Occupancy",
> + "Counter": "0,1",
> "EventCode": "0x0c",
> "EventName": "UNC_I_TxS_REQUEST_OCCUPANCY",
> "PerPkg": "1",
> @@ -433,6 +487,7 @@
> },
> {
> "BriefDescription": "M2M Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_M2M_CLOCKTICKS",
> "PerPkg": "1",
> @@ -441,6 +496,7 @@
> },
> {
> "BriefDescription": "CMS Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_M2M_CMS_CLOCKTICKS",
> "PerPkg": "1",
> @@ -448,6 +504,7 @@
> },
> {
> "BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE",
> "PerPkg": "1",
> @@ -456,6 +513,7 @@
> },
> {
> "BriefDescription": "Cycles when direct to core mode, which bypasses the CHA, was disabled : Non Cisgress",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
> "PerPkg": "1",
> @@ -465,6 +523,7 @@
> },
> {
> "BriefDescription": "Counts the time when FM didn't do d2c for fill reads (cross tile case)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED",
> "PerPkg": "1",
> @@ -472,6 +531,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to core transaction were overridden",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE",
> "PerPkg": "1",
> @@ -480,6 +540,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to core transaction was overridden : Cisgress",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE.CISGRESS",
> "PerPkg": "1",
> @@ -488,6 +549,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to core transaction was overridden : 2LM Hit?",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE.PMM_HIT",
> "PerPkg": "1",
> @@ -496,6 +558,7 @@
> },
> {
> "BriefDescription": "Number of times a direct to UPI transaction was overridden.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1C",
> "EventName": "UNC_M2M_DIRECT2UPITXN_OVERRIDE.PMM_HIT",
> "PerPkg": "1",
> @@ -505,6 +568,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS",
> "PerPkg": "1",
> @@ -513,6 +577,7 @@
> },
> {
> "BriefDescription": "Cycles when direct to Intel UPI was disabled",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE",
> "PerPkg": "1",
> @@ -521,6 +586,7 @@
> },
> {
> "BriefDescription": "Cycles when Direct2UPI was Disabled : Cisgress D2U Ignored",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1A",
> "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.CISGRESS",
> "PerPkg": "1",
> @@ -530,6 +596,7 @@
> },
> {
> "BriefDescription": "Cycles when Direct2UPI was Disabled : Egress Ignored D2U",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1A",
> "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.EGRESS",
> "PerPkg": "1",
> @@ -539,6 +606,7 @@
> },
> {
> "BriefDescription": "Cycles when Direct2UPI was Disabled : Non Cisgress D2U Ignored",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1A",
> "EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
> "PerPkg": "1",
> @@ -548,6 +616,7 @@
> },
> {
> "BriefDescription": "Messages sent direct to the Intel UPI",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2M_DIRECT2UPI_TAKEN",
> "PerPkg": "1",
> @@ -557,6 +626,7 @@
> },
> {
> "BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1c",
> "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE",
> "PerPkg": "1",
> @@ -565,6 +635,7 @@
> },
> {
> "BriefDescription": "Number of times a direct to UPI transaction was overridden.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1C",
> "EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE.CISGRESS",
> "PerPkg": "1",
> @@ -573,6 +644,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A",
> "PerPkg": "1",
> @@ -581,6 +653,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I",
> "PerPkg": "1",
> @@ -589,6 +662,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P",
> "PerPkg": "1",
> @@ -597,6 +671,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S",
> "PerPkg": "1",
> @@ -605,6 +680,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A",
> "PerPkg": "1",
> @@ -613,6 +689,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I",
> "PerPkg": "1",
> @@ -621,6 +698,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P",
> "PerPkg": "1",
> @@ -629,6 +707,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S",
> "PerPkg": "1",
> @@ -637,6 +716,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY",
> "PerPkg": "1",
> @@ -646,6 +726,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A",
> "PerPkg": "1",
> @@ -655,6 +736,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I",
> "PerPkg": "1",
> @@ -664,6 +746,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S",
> "PerPkg": "1",
> @@ -673,6 +756,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A",
> "PerPkg": "1",
> @@ -681,6 +765,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I",
> "PerPkg": "1",
> @@ -689,6 +774,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P",
> "PerPkg": "1",
> @@ -697,6 +783,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S",
> "PerPkg": "1",
> @@ -705,6 +792,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A",
> "PerPkg": "1",
> @@ -713,6 +801,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I",
> "PerPkg": "1",
> @@ -721,6 +810,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P",
> "PerPkg": "1",
> @@ -729,6 +819,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S",
> "PerPkg": "1",
> @@ -737,6 +828,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from A to I",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I",
> "PerPkg": "1",
> @@ -745,6 +837,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from A to S",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S",
> "PerPkg": "1",
> @@ -753,6 +846,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY",
> "PerPkg": "1",
> @@ -761,6 +855,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_I_HIT_NON_PMM",
> "PerPkg": "1",
> @@ -770,6 +865,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_I_MISS_NON_PMM",
> "PerPkg": "1",
> @@ -779,6 +875,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_S_HIT_NON_PMM",
> "PerPkg": "1",
> @@ -788,6 +885,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.A_TO_S_MISS_NON_PMM",
> "PerPkg": "1",
> @@ -797,6 +895,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.HIT_NON_PMM",
> "PerPkg": "1",
> @@ -806,6 +905,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from I to A",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A",
> "PerPkg": "1",
> @@ -814,6 +914,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from I to S",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S",
> "PerPkg": "1",
> @@ -822,6 +923,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_A_HIT_NON_PMM",
> "PerPkg": "1",
> @@ -831,6 +933,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_A_MISS_NON_PMM",
> "PerPkg": "1",
> @@ -840,6 +943,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_S_HIT_NON_PMM",
> "PerPkg": "1",
> @@ -849,6 +953,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.I_TO_S_MISS_NON_PMM",
> "PerPkg": "1",
> @@ -858,6 +963,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.MISS_NON_PMM",
> "PerPkg": "1",
> @@ -867,6 +973,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from S to A",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A",
> "PerPkg": "1",
> @@ -875,6 +982,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from S to I",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I",
> "PerPkg": "1",
> @@ -883,6 +991,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_A_HIT_NON_PMM",
> "PerPkg": "1",
> @@ -892,6 +1001,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_A_MISS_NON_PMM",
> "PerPkg": "1",
> @@ -901,6 +1011,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_I_HIT_NON_PMM",
> "PerPkg": "1",
> @@ -910,6 +1021,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2M_DIRECTORY_UPDATE.S_TO_I_MISS_NON_PMM",
> "PerPkg": "1",
> @@ -919,6 +1031,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Down",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN",
> "PerPkg": "1",
> @@ -928,6 +1041,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Up",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP",
> "PerPkg": "1",
> @@ -937,6 +1051,7 @@
> },
> {
> "BriefDescription": "Count when Starve Glocab counter is at 7",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2M_IGR_STARVE_WINNER.MASK7",
> "PerPkg": "1",
> @@ -945,6 +1060,7 @@
> },
> {
> "BriefDescription": "Reads to iMC issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.ALL",
> "PerPkg": "1",
> @@ -953,6 +1069,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0.TO_NM1LM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0.TO_NM1LM",
> "PerPkg": "1",
> @@ -961,6 +1078,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0.TO_NMCache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0.TO_NMCache",
> "PerPkg": "1",
> @@ -969,6 +1087,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_ALL",
> "FCMask": "0x00000000",
> @@ -979,6 +1098,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_FROM_TGR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR",
> "PerPkg": "1",
> @@ -987,6 +1107,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_ISOCH",
> "PerPkg": "1",
> @@ -995,6 +1116,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_NORMAL",
> "FCMask": "0x00000000",
> @@ -1005,6 +1127,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE",
> "PerPkg": "1",
> @@ -1013,6 +1136,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM",
> "PerPkg": "1",
> @@ -1021,6 +1145,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH0_TO_PMM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH0_TO_PMM",
> "FCMask": "0x00000000",
> @@ -1031,6 +1156,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1.TO_NM1LM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1.TO_NM1LM",
> "PerPkg": "1",
> @@ -1039,6 +1165,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1.TO_NMCache",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1.TO_NMCache",
> "PerPkg": "1",
> @@ -1047,6 +1174,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_ALL",
> "FCMask": "0x00000000",
> @@ -1057,6 +1185,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_FROM_TGR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR",
> "PerPkg": "1",
> @@ -1065,6 +1194,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_ISOCH",
> "PerPkg": "1",
> @@ -1073,6 +1203,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_NORMAL",
> "FCMask": "0x00000000",
> @@ -1083,6 +1214,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE",
> "PerPkg": "1",
> @@ -1091,6 +1223,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM",
> "PerPkg": "1",
> @@ -1099,6 +1232,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.CH1_TO_PMM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.CH1_TO_PMM",
> "FCMask": "0x00000000",
> @@ -1109,6 +1243,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.FROM_TGR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.FROM_TGR",
> "PerPkg": "1",
> @@ -1117,6 +1252,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.ISOCH",
> "PerPkg": "1",
> @@ -1125,6 +1261,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.NORMAL",
> "PerPkg": "1",
> @@ -1133,6 +1270,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE",
> "PerPkg": "1",
> @@ -1141,6 +1279,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM",
> "PerPkg": "1",
> @@ -1149,6 +1288,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.TO_NM1LM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.TO_NM1LM",
> "PerPkg": "1",
> @@ -1157,6 +1297,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.TO_NMCACHE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.TO_NMCACHE",
> "PerPkg": "1",
> @@ -1165,6 +1306,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_READS.TO_PMM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2M_IMC_READS.TO_PMM",
> "PerPkg": "1",
> @@ -1173,6 +1315,7 @@
> },
> {
> "BriefDescription": "All Writes - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.ALL",
> "PerPkg": "1",
> @@ -1181,6 +1324,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0.NI",
> "PerPkg": "1",
> @@ -1188,6 +1332,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_ALL",
> "FCMask": "0x00000000",
> @@ -1198,6 +1343,7 @@
> },
> {
> "BriefDescription": "From TGR - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR",
> "PerPkg": "1",
> @@ -1205,6 +1351,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_FULL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL",
> "FCMask": "0x00000000",
> @@ -1215,6 +1362,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH",
> "PerPkg": "1",
> @@ -1223,6 +1371,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_NI",
> "PerPkg": "1",
> @@ -1230,6 +1379,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive Miss - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS",
> "PerPkg": "1",
> @@ -1237,6 +1387,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_PARTIAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL",
> "FCMask": "0x00000000",
> @@ -1247,6 +1398,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH",
> "PerPkg": "1",
> @@ -1255,6 +1407,7 @@
> },
> {
> "BriefDescription": "DDR, acting as Cache - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_CACHE",
> "PerPkg": "1",
> @@ -1263,6 +1416,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM",
> "PerPkg": "1",
> @@ -1271,6 +1425,7 @@
> },
> {
> "BriefDescription": "PMM - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH0_TO_PMM",
> "FCMask": "0x00000000",
> @@ -1282,6 +1437,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1.NI",
> "PerPkg": "1",
> @@ -1289,6 +1445,7 @@
> },
> {
> "BriefDescription": "All Writes - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_ALL",
> "FCMask": "0x00000000",
> @@ -1299,6 +1456,7 @@
> },
> {
> "BriefDescription": "From TGR - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR",
> "PerPkg": "1",
> @@ -1306,6 +1464,7 @@
> },
> {
> "BriefDescription": "Full Line Non-ISOCH - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL",
> "FCMask": "0x00000000",
> @@ -1316,6 +1475,7 @@
> },
> {
> "BriefDescription": "ISOCH Full Line - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH",
> "PerPkg": "1",
> @@ -1324,6 +1484,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_NI",
> "PerPkg": "1",
> @@ -1331,6 +1492,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive Miss - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS",
> "PerPkg": "1",
> @@ -1338,6 +1500,7 @@
> },
> {
> "BriefDescription": "Partial Non-ISOCH - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL",
> "FCMask": "0x00000000",
> @@ -1348,6 +1511,7 @@
> },
> {
> "BriefDescription": "ISOCH Partial - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH",
> "PerPkg": "1",
> @@ -1356,6 +1520,7 @@
> },
> {
> "BriefDescription": "DDR, acting as Cache - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_CACHE",
> "PerPkg": "1",
> @@ -1364,6 +1529,7 @@
> },
> {
> "BriefDescription": "DDR - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_MEM",
> "PerPkg": "1",
> @@ -1372,6 +1538,7 @@
> },
> {
> "BriefDescription": "PMM - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.CH1_TO_PMM",
> "FCMask": "0x00000000",
> @@ -1383,6 +1550,7 @@
> },
> {
> "BriefDescription": "From TGR - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.FROM_TGR",
> "PerPkg": "1",
> @@ -1390,6 +1558,7 @@
> },
> {
> "BriefDescription": "Full Non-ISOCH - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.FULL",
> "PerPkg": "1",
> @@ -1398,6 +1567,7 @@
> },
> {
> "BriefDescription": "ISOCH Full Line - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH",
> "PerPkg": "1",
> @@ -1406,6 +1576,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.NI",
> "PerPkg": "1",
> @@ -1413,6 +1584,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive Miss - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.NI_MISS",
> "PerPkg": "1",
> @@ -1420,6 +1592,7 @@
> },
> {
> "BriefDescription": "Partial Non-ISOCH - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.PARTIAL",
> "PerPkg": "1",
> @@ -1428,6 +1601,7 @@
> },
> {
> "BriefDescription": "ISOCH Partial - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH",
> "PerPkg": "1",
> @@ -1436,6 +1610,7 @@
> },
> {
> "BriefDescription": "DDR, acting as Cache - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_CACHE",
> "PerPkg": "1",
> @@ -1444,6 +1619,7 @@
> },
> {
> "BriefDescription": "DDR - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_MEM",
> "PerPkg": "1",
> @@ -1452,6 +1628,7 @@
> },
> {
> "BriefDescription": "PMM - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2M_IMC_WRITES.TO_PMM",
> "PerPkg": "1",
> @@ -1460,6 +1637,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_M2M_PREFCAM_CIS_DROPS",
> "PerPkg": "1",
> @@ -1467,6 +1645,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI",
> "PerPkg": "1",
> @@ -1475,6 +1654,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT",
> "PerPkg": "1",
> @@ -1483,6 +1663,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI",
> "PerPkg": "1",
> @@ -1491,6 +1672,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT",
> "PerPkg": "1",
> @@ -1499,6 +1681,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped : UPI - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.UPI_ALLCH",
> "PerPkg": "1",
> @@ -1507,6 +1690,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH",
> "PerPkg": "1",
> @@ -1515,6 +1699,7 @@
> },
> {
> "BriefDescription": ": UPI - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.UPI_ALLCH",
> "PerPkg": "1",
> @@ -1523,6 +1708,7 @@
> },
> {
> "BriefDescription": ": XPT - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPT_ALLCH",
> "PerPkg": "1",
> @@ -1531,6 +1717,7 @@
> },
> {
> "BriefDescription": "Demands Not Merged with CAMed Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5E",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.RD_MERGED",
> "PerPkg": "1",
> @@ -1539,6 +1726,7 @@
> },
> {
> "BriefDescription": "Demands Not Merged with CAMed Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5E",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.WR_MERGED",
> "PerPkg": "1",
> @@ -1547,6 +1735,7 @@
> },
> {
> "BriefDescription": "Demands Not Merged with CAMed Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5E",
> "EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.WR_SQUASHED",
> "PerPkg": "1",
> @@ -1555,6 +1744,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_UPI",
> "PerPkg": "1",
> @@ -1563,6 +1753,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT",
> "PerPkg": "1",
> @@ -1571,6 +1762,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_UPI",
> "PerPkg": "1",
> @@ -1579,6 +1771,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT",
> "PerPkg": "1",
> @@ -1587,6 +1780,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH",
> "PerPkg": "1",
> @@ -1595,6 +1789,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH",
> "PerPkg": "1",
> @@ -1604,6 +1799,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Occupancy : All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH",
> "PerPkg": "1",
> @@ -1612,6 +1808,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1620,6 +1817,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1628,6 +1826,7 @@
> },
> {
> "BriefDescription": "All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5F",
> "EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH",
> "PerPkg": "1",
> @@ -1636,6 +1835,7 @@
> },
> {
> "BriefDescription": ": Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0",
> "PerPkg": "1",
> @@ -1644,6 +1844,7 @@
> },
> {
> "BriefDescription": ": Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1",
> "PerPkg": "1",
> @@ -1652,6 +1853,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
> "PerPkg": "1",
> @@ -1660,6 +1862,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS",
> "PerPkg": "1",
> @@ -1668,6 +1871,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT",
> "PerPkg": "1",
> @@ -1676,6 +1880,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED",
> "PerPkg": "1",
> @@ -1684,6 +1889,7 @@
> },
> {
> "BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY",
> "PerPkg": "1",
> @@ -1691,6 +1897,7 @@
> },
> {
> "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_M2M_RxC_AD_INSERTS",
> "PerPkg": "1",
> @@ -1699,6 +1906,7 @@
> },
> {
> "BriefDescription": "AD Ingress (from CMS) Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M2M_RxC_AD_OCCUPANCY",
> "PerPkg": "1",
> @@ -1706,6 +1914,7 @@
> },
> {
> "BriefDescription": "Clean NearMem Read Hit",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1F",
> "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN",
> "PerPkg": "1",
> @@ -1715,6 +1924,7 @@
> },
> {
> "BriefDescription": "Dirty NearMem Read Hit",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1F",
> "EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY",
> "PerPkg": "1",
> @@ -1724,6 +1934,7 @@
> },
> {
> "BriefDescription": "Tag Hit : Clean NearMem Underfill Hit",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1F",
> "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN",
> "PerPkg": "1",
> @@ -1733,6 +1944,7 @@
> },
> {
> "BriefDescription": "Tag Hit : Dirty NearMem Underfill Hit",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1F",
> "EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY",
> "PerPkg": "1",
> @@ -1742,6 +1954,7 @@
> },
> {
> "BriefDescription": "UNC_M2M_TAG_MISS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4b",
> "EventName": "UNC_M2M_TAG_MISS",
> "PerPkg": "1",
> @@ -1750,6 +1963,7 @@
> },
> {
> "BriefDescription": "Number AD Ingress Credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M2M_TGR_AD_CREDITS",
> "PerPkg": "1",
> @@ -1757,6 +1971,7 @@
> },
> {
> "BriefDescription": "Number BL Ingress Credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_M2M_TGR_BL_CREDITS",
> "PerPkg": "1",
> @@ -1764,6 +1979,7 @@
> },
> {
> "BriefDescription": "Tracker Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2M_TRACKER_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1772,6 +1988,7 @@
> },
> {
> "BriefDescription": "Tracker Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2M_TRACKER_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1780,6 +1997,7 @@
> },
> {
> "BriefDescription": "Tracker Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1788,6 +2006,7 @@
> },
> {
> "BriefDescription": "Tracker Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1796,6 +2015,7 @@
> },
> {
> "BriefDescription": "WPQ Flush : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2M_WPQ_FLUSH.CH0",
> "PerPkg": "1",
> @@ -1804,6 +2024,7 @@
> },
> {
> "BriefDescription": "WPQ Flush : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2M_WPQ_FLUSH.CH1",
> "PerPkg": "1",
> @@ -1812,6 +2033,7 @@
> },
> {
> "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0",
> "PerPkg": "1",
> @@ -1820,6 +2042,7 @@
> },
> {
> "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1",
> "PerPkg": "1",
> @@ -1828,6 +2051,7 @@
> },
> {
> "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x38",
> "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0",
> "PerPkg": "1",
> @@ -1836,6 +2060,7 @@
> },
> {
> "BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x38",
> "EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1",
> "PerPkg": "1",
> @@ -1844,6 +2069,7 @@
> },
> {
> "BriefDescription": "Write Tracker Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1852,6 +2078,7 @@
> },
> {
> "BriefDescription": "Write Tracker Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1860,6 +2087,7 @@
> },
> {
> "BriefDescription": "Write Tracker Cycles Not Empty : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_M2M_WR_TRACKER_NE.CH0",
> "PerPkg": "1",
> @@ -1868,6 +2096,7 @@
> },
> {
> "BriefDescription": "Write Tracker Cycles Not Empty : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_M2M_WR_TRACKER_NE.CH1",
> "PerPkg": "1",
> @@ -1876,6 +2105,7 @@
> },
> {
> "BriefDescription": "Write Tracker Cycles Not Empty : Mirror",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR",
> "PerPkg": "1",
> @@ -1884,6 +2114,7 @@
> },
> {
> "BriefDescription": "Write Tracker Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR",
> "PerPkg": "1",
> @@ -1892,6 +2123,7 @@
> },
> {
> "BriefDescription": "Write Tracker Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR",
> "PerPkg": "1",
> @@ -1900,6 +2132,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1908,6 +2141,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1916,6 +2150,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1924,6 +2159,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1932,6 +2168,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1940,6 +2177,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1948,6 +2186,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1956,6 +2195,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1964,6 +2204,7 @@
> },
> {
> "BriefDescription": "CBox AD Credits Empty : Requests",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ",
> "PerPkg": "1",
> @@ -1973,6 +2214,7 @@
> },
> {
> "BriefDescription": "CBox AD Credits Empty : Snoops",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP",
> "PerPkg": "1",
> @@ -1982,6 +2224,7 @@
> },
> {
> "BriefDescription": "CBox AD Credits Empty : VNA Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA",
> "PerPkg": "1",
> @@ -1991,6 +2234,7 @@
> },
> {
> "BriefDescription": "CBox AD Credits Empty : Writebacks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB",
> "PerPkg": "1",
> @@ -2000,6 +2244,7 @@
> },
> {
> "BriefDescription": "M3UPI Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_M3UPI_CLOCKTICKS",
> "PerPkg": "1",
> @@ -2008,6 +2253,7 @@
> },
> {
> "BriefDescription": "M3UPI CMS Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_M3UPI_CMS_CLOCKTICKS",
> "PerPkg": "1",
> @@ -2015,6 +2261,7 @@
> },
> {
> "BriefDescription": "D2C Sent",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_M3UPI_D2C_SENT",
> "PerPkg": "1",
> @@ -2023,6 +2270,7 @@
> },
> {
> "BriefDescription": "D2U Sent",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_M3UPI_D2U_SENT",
> "PerPkg": "1",
> @@ -2031,6 +2279,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Down",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN",
> "PerPkg": "1",
> @@ -2040,6 +2289,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Up",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP",
> "PerPkg": "1",
> @@ -2049,6 +2299,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : IIO0 and IIO1 share the same ring destination. (1 VN0 credit only)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO1_NCB",
> "PerPkg": "1",
> @@ -2058,6 +2309,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : IIO2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB",
> "PerPkg": "1",
> @@ -2067,6 +2319,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : IIO3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB",
> "PerPkg": "1",
> @@ -2076,6 +2329,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : IIO4",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB",
> "PerPkg": "1",
> @@ -2085,6 +2339,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : IIO5",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB",
> "PerPkg": "1",
> @@ -2094,6 +2349,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : All IIO targets for NCS are in single mask. ORs them together",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS",
> "PerPkg": "1",
> @@ -2103,6 +2359,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : Selected M2p BL NCS credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL",
> "PerPkg": "1",
> @@ -2112,6 +2369,7 @@
> },
> {
> "BriefDescription": "M2 BL Credits Empty : IIO5",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.UBOX_NCB",
> "PerPkg": "1",
> @@ -2121,6 +2379,7 @@
> },
> {
> "BriefDescription": "Multi Slot Flit Received : AD - Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3e",
> "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0",
> "PerPkg": "1",
> @@ -2130,6 +2389,7 @@
> },
> {
> "BriefDescription": "Multi Slot Flit Received : AD - Slot 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3e",
> "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1",
> "PerPkg": "1",
> @@ -2139,6 +2399,7 @@
> },
> {
> "BriefDescription": "Multi Slot Flit Received : AD - Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3e",
> "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2",
> "PerPkg": "1",
> @@ -2148,6 +2409,7 @@
> },
> {
> "BriefDescription": "Multi Slot Flit Received : AK - Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3e",
> "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0",
> "PerPkg": "1",
> @@ -2157,6 +2419,7 @@
> },
> {
> "BriefDescription": "Multi Slot Flit Received : AK - Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3e",
> "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2",
> "PerPkg": "1",
> @@ -2166,6 +2429,7 @@
> },
> {
> "BriefDescription": "Multi Slot Flit Received : BL - Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3e",
> "EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0",
> "PerPkg": "1",
> @@ -2625,6 +2889,7 @@
> },
> {
> "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL Arb",
> + "Counter": "0,1,2",
> "EventCode": "0x40",
> "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB",
> "PerPkg": "1",
> @@ -2634,6 +2899,7 @@
> },
> {
> "BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idle",
> + "Counter": "0,1,2",
> "EventCode": "0x40",
> "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE",
> "PerPkg": "1",
> @@ -2643,6 +2909,7 @@
> },
> {
> "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 1",
> + "Counter": "0,1,2",
> "EventCode": "0x40",
> "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT",
> "PerPkg": "1",
> @@ -2652,6 +2919,7 @@
> },
> {
> "BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 2",
> + "Counter": "0,1,2",
> "EventCode": "0x40",
> "EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT",
> "PerPkg": "1",
> @@ -3296,6 +3564,7 @@
> },
> {
> "BriefDescription": "Message Held : Can't Slot AD",
> + "Counter": "0,1,2",
> "EventCode": "0x50",
> "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD",
> "PerPkg": "1",
> @@ -3305,6 +3574,7 @@
> },
> {
> "BriefDescription": "Message Held : Can't Slot BL",
> + "Counter": "0,1,2",
> "EventCode": "0x50",
> "EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL",
> "PerPkg": "1",
> @@ -3314,6 +3584,7 @@
> },
> {
> "BriefDescription": "Message Held : Parallel Attempt",
> + "Counter": "0,1,2",
> "EventCode": "0x50",
> "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT",
> "PerPkg": "1",
> @@ -3323,6 +3594,7 @@
> },
> {
> "BriefDescription": "Message Held : Parallel Success",
> + "Counter": "0,1,2",
> "EventCode": "0x50",
> "EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS",
> "PerPkg": "1",
> @@ -3332,6 +3604,7 @@
> },
> {
> "BriefDescription": "Message Held : VN0",
> + "Counter": "0,1,2",
> "EventCode": "0x50",
> "EventName": "UNC_M3UPI_RxC_HELD.VN0",
> "PerPkg": "1",
> @@ -3341,6 +3614,7 @@
> },
> {
> "BriefDescription": "Message Held : VN1",
> + "Counter": "0,1,2",
> "EventCode": "0x50",
> "EventName": "UNC_M3UPI_RxC_HELD.VN1",
> "PerPkg": "1",
> @@ -3350,6 +3624,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : REQ on AD",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ",
> "PerPkg": "1",
> @@ -3359,6 +3634,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : RSP on AD",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP",
> "PerPkg": "1",
> @@ -3368,6 +3644,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : SNP on AD",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP",
> "PerPkg": "1",
> @@ -3377,6 +3654,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : NCB on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB",
> "PerPkg": "1",
> @@ -3386,6 +3664,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : NCS on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS",
> "PerPkg": "1",
> @@ -3395,6 +3674,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : RSP on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP",
> "PerPkg": "1",
> @@ -3404,6 +3684,7 @@
> },
> {
> "BriefDescription": "VN0 message can't slot into flit : WB on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4e",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB",
> "PerPkg": "1",
> @@ -3413,6 +3694,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : REQ on AD",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ",
> "PerPkg": "1",
> @@ -3422,6 +3704,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : RSP on AD",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP",
> "PerPkg": "1",
> @@ -3431,6 +3714,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : SNP on AD",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP",
> "PerPkg": "1",
> @@ -3440,6 +3724,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : NCB on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB",
> "PerPkg": "1",
> @@ -3449,6 +3734,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : NCS on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS",
> "PerPkg": "1",
> @@ -3458,6 +3744,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : RSP on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP",
> "PerPkg": "1",
> @@ -3467,6 +3754,7 @@
> },
> {
> "BriefDescription": "VN1 message can't slot into flit : WB on BL",
> + "Counter": "0,1,2",
> "EventCode": "0x4f",
> "EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB",
> "PerPkg": "1",
> @@ -3674,6 +3962,7 @@
> },
> {
> "BriefDescription": "AD FlowQ Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2C",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS",
> "FCMask": "0x00000000",
> @@ -3684,6 +3973,7 @@
> },
> {
> "BriefDescription": "AD FlowQ Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0",
> "PerPkg": "1",
> @@ -3693,6 +3983,7 @@
> },
> {
> "BriefDescription": "AD FlowQ Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1",
> "PerPkg": "1",
> @@ -3702,6 +3993,7 @@
> },
> {
> "BriefDescription": "AD FlowQ Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2",
> "PerPkg": "1",
> @@ -3711,6 +4003,7 @@
> },
> {
> "BriefDescription": "AD FlowQ Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2c",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP",
> "PerPkg": "1",
> @@ -3720,6 +4013,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN0 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ",
> "PerPkg": "1",
> @@ -3729,6 +4023,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN0 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP",
> "PerPkg": "1",
> @@ -3738,6 +4033,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN0 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP",
> "PerPkg": "1",
> @@ -3747,6 +4043,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN0 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB",
> "PerPkg": "1",
> @@ -3756,6 +4053,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN1 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ",
> "PerPkg": "1",
> @@ -3765,6 +4063,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN1 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP",
> "PerPkg": "1",
> @@ -3774,6 +4073,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN1 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP",
> "PerPkg": "1",
> @@ -3783,6 +4083,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Not Empty : VN1 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB",
> "PerPkg": "1",
> @@ -3792,6 +4093,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN0 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ",
> "PerPkg": "1",
> @@ -3801,6 +4103,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN0 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP",
> "PerPkg": "1",
> @@ -3810,6 +4113,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN0 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP",
> "PerPkg": "1",
> @@ -3819,6 +4123,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN0 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB",
> "PerPkg": "1",
> @@ -3828,6 +4133,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN1 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ",
> "PerPkg": "1",
> @@ -3837,6 +4143,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN1 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP",
> "PerPkg": "1",
> @@ -3846,6 +4153,7 @@
> },
> {
> "BriefDescription": "AD Flow Q Inserts : VN1 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP",
> "PerPkg": "1",
> @@ -3911,6 +4219,7 @@
> },
> {
> "BriefDescription": "AK Flow Q Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS",
> "PerPkg": "1",
> @@ -3997,6 +4306,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN0 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ",
> "PerPkg": "1",
> @@ -4006,6 +4316,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN0 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP",
> "PerPkg": "1",
> @@ -4015,6 +4326,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN0 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP",
> "PerPkg": "1",
> @@ -4024,6 +4336,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN0 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB",
> "PerPkg": "1",
> @@ -4033,6 +4346,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN1 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ",
> "PerPkg": "1",
> @@ -4042,6 +4356,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN1 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP",
> "PerPkg": "1",
> @@ -4051,6 +4366,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN1 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP",
> "PerPkg": "1",
> @@ -4060,6 +4376,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Not Empty : VN1 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB",
> "PerPkg": "1",
> @@ -4069,6 +4386,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN0 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB",
> "PerPkg": "1",
> @@ -4078,6 +4396,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN0 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS",
> "PerPkg": "1",
> @@ -4087,6 +4406,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN0 NCS Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP",
> "PerPkg": "1",
> @@ -4096,6 +4416,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN0 NCB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB",
> "PerPkg": "1",
> @@ -4105,6 +4426,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN1 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB",
> "PerPkg": "1",
> @@ -4114,6 +4436,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN1 WB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS",
> "PerPkg": "1",
> @@ -4123,6 +4446,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN1_NCB Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP",
> "PerPkg": "1",
> @@ -4132,6 +4456,7 @@
> },
> {
> "BriefDescription": "BL Flow Q Inserts : VN1_NCS Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB",
> "PerPkg": "1",
> @@ -4253,6 +4578,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VN0 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ",
> "PerPkg": "1",
> @@ -4262,6 +4588,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VN0 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP",
> "PerPkg": "1",
> @@ -4271,6 +4598,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VN0 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP",
> "PerPkg": "1",
> @@ -4280,6 +4608,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VN1 REQ Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ",
> "PerPkg": "1",
> @@ -4289,6 +4618,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VN1 RSP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP",
> "PerPkg": "1",
> @@ -4298,6 +4628,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VN1 SNP Messages",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP",
> "PerPkg": "1",
> @@ -4307,6 +4638,7 @@
> },
> {
> "BriefDescription": "UPI0 AD Credits Empty : VNA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA",
> "PerPkg": "1",
> @@ -4379,6 +4711,7 @@
> },
> {
> "BriefDescription": "FlowQ Generated Prefetch",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN",
> "PerPkg": "1",
> @@ -4826,6 +5159,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AD Bouncable)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.AD_BNC",
> "PerPkg": "1",
> @@ -4835,6 +5169,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AD credited)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.AD_CRD",
> "PerPkg": "1",
> @@ -4844,6 +5179,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AK)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.AK",
> "PerPkg": "1",
> @@ -4853,6 +5189,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (AKC)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.AKC",
> "PerPkg": "1",
> @@ -4862,6 +5199,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (BL Bouncable)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.BL_BNC",
> "PerPkg": "1",
> @@ -4871,6 +5209,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (BL credited)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.BL_CRD",
> "PerPkg": "1",
> @@ -4880,6 +5219,7 @@
> },
> {
> "BriefDescription": "Number of allocations into the CRS Egress used to queue up requests destined to the mesh (IV)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_MDF_CRS_TxR_INSERTS.IV",
> "PerPkg": "1",
> @@ -4889,6 +5229,7 @@
> },
> {
> "BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AD)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AD",
> "PerPkg": "1",
> @@ -4898,6 +5239,7 @@
> },
> {
> "BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AK)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AK",
> "PerPkg": "1",
> @@ -4907,6 +5249,7 @@
> },
> {
> "BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (AKC)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.AKC",
> "PerPkg": "1",
> @@ -4916,6 +5259,7 @@
> },
> {
> "BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (BL)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.BL",
> "PerPkg": "1",
> @@ -4925,6 +5269,7 @@
> },
> {
> "BriefDescription": "Number of cycles incoming messages from the vertical ring that are bounced at the SBO\r\nIngress (V-EMIB) (IV)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_MDF_CRS_TxR_V_BOUNCES.IV",
> "PerPkg": "1",
> @@ -4934,6 +5279,7 @@
> },
> {
> "BriefDescription": "Counts the number of cycles when the distress signals are asserted based on SBO Ingress threshold",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_MDF_FAST_ASSERTED.AD_BNC",
> "PerPkg": "1",
> @@ -4943,6 +5289,7 @@
> },
> {
> "BriefDescription": "Counts the number of cycles when the distress signals are asserted based on SBO Ingress threshold",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_MDF_FAST_ASSERTED.BL_CRD",
> "PerPkg": "1",
> @@ -4952,6 +5299,7 @@
> },
> {
> "BriefDescription": "UPI Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_UPI_CLOCKTICKS",
> "PerPkg": "1",
> @@ -4960,6 +5308,7 @@
> },
> {
> "BriefDescription": "Direct packet attempts : D2C",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C",
> "PerPkg": "1",
> @@ -4969,6 +5318,7 @@
> },
> {
> "BriefDescription": "Direct packet attempts : D2K",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K",
> "PerPkg": "1",
> @@ -4978,6 +5328,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
> "PerPkg": "1",
> @@ -4986,6 +5337,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
> "PerPkg": "1",
> @@ -4994,6 +5346,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
> "PerPkg": "1",
> @@ -5002,6 +5355,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
> "PerPkg": "1",
> @@ -5010,6 +5364,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
> "PerPkg": "1",
> @@ -5018,6 +5373,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
> "PerPkg": "1",
> @@ -5026,6 +5382,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
> "PerPkg": "1",
> @@ -5034,6 +5391,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
> "PerPkg": "1",
> @@ -5042,6 +5400,7 @@
> },
> {
> "BriefDescription": "Cycles in L1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_UPI_L1_POWER_CYCLES",
> "PerPkg": "1",
> @@ -5050,6 +5409,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
> + "Counter": "0,1,2,3",
> "EventCode": "0x14",
> "EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
> "PerPkg": "1",
> @@ -5058,6 +5418,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x14",
> "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
> "PerPkg": "1",
> @@ -5066,6 +5427,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x14",
> "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
> "PerPkg": "1",
> @@ -5074,6 +5436,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x14",
> "EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
> "PerPkg": "1",
> @@ -5082,6 +5445,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
> + "Counter": "0,1,2,3",
> "EventCode": "0x14",
> "EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
> "PerPkg": "1",
> @@ -5090,6 +5454,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
> + "Counter": "0,1,2,3",
> "EventCode": "0x16",
> "EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
> "PerPkg": "1",
> @@ -5097,6 +5462,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
> "PerPkg": "1",
> @@ -5105,6 +5471,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
> "PerPkg": "1",
> @@ -5113,6 +5480,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
> "PerPkg": "1",
> @@ -5121,6 +5489,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
> "PerPkg": "1",
> @@ -5129,6 +5498,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
> "PerPkg": "1",
> @@ -5137,6 +5507,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
> "PerPkg": "1",
> @@ -5145,6 +5516,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
> "PerPkg": "1",
> @@ -5153,6 +5525,7 @@
> },
> {
> "BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_UPI_PHY_INIT_CYCLES",
> "PerPkg": "1",
> @@ -5160,6 +5533,7 @@
> },
> {
> "BriefDescription": "L1 Req Nack",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_UPI_POWER_L1_NACK",
> "PerPkg": "1",
> @@ -5168,6 +5542,7 @@
> },
> {
> "BriefDescription": "L1 Req (same as L1 Ack).",
> + "Counter": "0,1,2,3",
> "EventCode": "0x22",
> "EventName": "UNC_UPI_POWER_L1_REQ",
> "PerPkg": "1",
> @@ -5176,6 +5551,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
> "PerPkg": "1",
> @@ -5184,6 +5560,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
> "PerPkg": "1",
> @@ -5192,6 +5569,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
> "PerPkg": "1",
> @@ -5200,6 +5578,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
> "PerPkg": "1",
> @@ -5208,6 +5587,7 @@
> },
> {
> "BriefDescription": "Cycles in L0p",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_UPI_RxL0P_POWER_CYCLES",
> "PerPkg": "1",
> @@ -5216,6 +5596,7 @@
> },
> {
> "BriefDescription": "Cycles in L0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_UPI_RxL0_POWER_CYCLES",
> "PerPkg": "1",
> @@ -5224,6 +5605,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.DATA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.DATA",
> "PerPkg": "1",
> @@ -5232,6 +5614,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.LLCRD",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.LLCRD",
> "PerPkg": "1",
> @@ -5240,6 +5623,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.LLCTRL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.LLCTRL",
> "PerPkg": "1",
> @@ -5248,6 +5632,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.NULL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.NULL",
> "PerPkg": "1",
> @@ -5256,6 +5641,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.PROTHDR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.PROTHDR",
> "PerPkg": "1",
> @@ -5264,6 +5650,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT0",
> "PerPkg": "1",
> @@ -5272,6 +5659,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT1",
> "PerPkg": "1",
> @@ -5280,6 +5668,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4B",
> "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
> "PerPkg": "1",
> @@ -5288,6 +5677,7 @@
> },
> {
> "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB",
> "PerPkg": "1",
> @@ -5297,6 +5687,7 @@
> },
> {
> "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass, Match Opcode",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC",
> "PerPkg": "1",
> @@ -5306,6 +5697,7 @@
> },
> {
> "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS",
> "PerPkg": "1",
> @@ -5315,6 +5707,7 @@
> },
> {
> "BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard, Match Opcode",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC",
> "PerPkg": "1",
> @@ -5324,6 +5717,7 @@
> },
> {
> "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x31",
> "EventName": "UNC_UPI_RxL_BYPASSED.SLOT0",
> "PerPkg": "1",
> @@ -5333,6 +5727,7 @@
> },
> {
> "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x31",
> "EventName": "UNC_UPI_RxL_BYPASSED.SLOT1",
> "PerPkg": "1",
> @@ -5342,6 +5737,7 @@
> },
> {
> "BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x31",
> "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
> "PerPkg": "1",
> @@ -5351,6 +5747,7 @@
> },
> {
> "BriefDescription": "CRC Errors Detected",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0b",
> "EventName": "UNC_UPI_RxL_CRC_ERRORS",
> "PerPkg": "1",
> @@ -5359,6 +5756,7 @@
> },
> {
> "BriefDescription": "LLR Requests Sent",
> + "Counter": "0,1,2,3",
> "EventCode": "0x08",
> "EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT",
> "PerPkg": "1",
> @@ -5367,6 +5765,7 @@
> },
> {
> "BriefDescription": "VN0 Credit Consumed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x39",
> "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0",
> "PerPkg": "1",
> @@ -5375,6 +5774,7 @@
> },
> {
> "BriefDescription": "VN1 Credit Consumed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x3a",
> "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1",
> "PerPkg": "1",
> @@ -5383,6 +5783,7 @@
> },
> {
> "BriefDescription": "VNA Credit Consumed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x38",
> "EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA",
> "FCMask": "0x00000000",
> @@ -5393,6 +5794,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : All Data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.ALL_DATA",
> "PerPkg": "1",
> @@ -5402,6 +5804,7 @@
> },
> {
> "BriefDescription": "Null FLITs received from any slot",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.ALL_NULL",
> "PerPkg": "1",
> @@ -5410,6 +5813,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.DATA",
> "PerPkg": "1",
> @@ -5419,6 +5823,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Idle",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.IDLE",
> "PerPkg": "1",
> @@ -5428,6 +5833,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : LLCRD Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.LLCRD",
> "PerPkg": "1",
> @@ -5437,6 +5843,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : LLCTRL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.LLCTRL",
> "PerPkg": "1",
> @@ -5446,6 +5853,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : All Non Data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.NON_DATA",
> "PerPkg": "1",
> @@ -5455,6 +5863,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.NULL",
> "PerPkg": "1",
> @@ -5464,6 +5873,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Protocol Header",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.PROTHDR",
> "PerPkg": "1",
> @@ -5473,6 +5883,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.SLOT0",
> "PerPkg": "1",
> @@ -5482,6 +5893,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Slot 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.SLOT1",
> "PerPkg": "1",
> @@ -5491,6 +5903,7 @@
> },
> {
> "BriefDescription": "Valid Flits Received : Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
> "PerPkg": "1",
> @@ -5500,6 +5913,7 @@
> },
> {
> "BriefDescription": "RxQ Flit Buffer Allocations : Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x30",
> "EventName": "UNC_UPI_RxL_INSERTS.SLOT0",
> "PerPkg": "1",
> @@ -5509,6 +5923,7 @@
> },
> {
> "BriefDescription": "RxQ Flit Buffer Allocations : Slot 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x30",
> "EventName": "UNC_UPI_RxL_INSERTS.SLOT1",
> "PerPkg": "1",
> @@ -5518,6 +5933,7 @@
> },
> {
> "BriefDescription": "RxQ Flit Buffer Allocations : Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x30",
> "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
> "PerPkg": "1",
> @@ -5527,6 +5943,7 @@
> },
> {
> "BriefDescription": "RxQ Occupancy - All Packets : Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0",
> "PerPkg": "1",
> @@ -5536,6 +5953,7 @@
> },
> {
> "BriefDescription": "RxQ Occupancy - All Packets : Slot 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1",
> "PerPkg": "1",
> @@ -5545,6 +5963,7 @@
> },
> {
> "BriefDescription": "RxQ Occupancy - All Packets : Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
> "PerPkg": "1",
> @@ -5554,6 +5973,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
> "PerPkg": "1",
> @@ -5562,6 +5982,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
> "PerPkg": "1",
> @@ -5570,6 +5991,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
> "PerPkg": "1",
> @@ -5578,6 +6000,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
> "PerPkg": "1",
> @@ -5586,6 +6009,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
> "PerPkg": "1",
> @@ -5594,6 +6018,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
> "PerPkg": "1",
> @@ -5602,6 +6027,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
> "PerPkg": "1",
> @@ -5610,6 +6036,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
> "PerPkg": "1",
> @@ -5618,6 +6045,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
> "PerPkg": "1",
> @@ -5626,6 +6054,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
> "PerPkg": "1",
> @@ -5634,6 +6063,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
> "PerPkg": "1",
> @@ -5642,6 +6072,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
> "PerPkg": "1",
> @@ -5650,6 +6081,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
> "PerPkg": "1",
> @@ -5658,6 +6090,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
> "PerPkg": "1",
> @@ -5666,6 +6099,7 @@
> },
> {
> "BriefDescription": "Cycles in L0p",
> + "Counter": "0,1,2,3",
> "EventCode": "0x27",
> "EventName": "UNC_UPI_TxL0P_POWER_CYCLES",
> "PerPkg": "1",
> @@ -5674,6 +6108,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
> + "Counter": "0,1,2,3",
> "EventCode": "0x28",
> "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
> "PerPkg": "1",
> @@ -5681,6 +6116,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
> + "Counter": "0,1,2,3",
> "EventCode": "0x29",
> "EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
> "PerPkg": "1",
> @@ -5688,6 +6124,7 @@
> },
> {
> "BriefDescription": "Cycles in L0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x26",
> "EventName": "UNC_UPI_TxL0_POWER_CYCLES",
> "PerPkg": "1",
> @@ -5696,6 +6133,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.DATA",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.DATA",
> "PerPkg": "1",
> @@ -5704,6 +6142,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.LLCRD",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.LLCRD",
> "PerPkg": "1",
> @@ -5712,6 +6151,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.LLCTRL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.LLCTRL",
> "PerPkg": "1",
> @@ -5720,6 +6160,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.NULL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.NULL",
> "PerPkg": "1",
> @@ -5728,6 +6169,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.PROTHDR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.PROTHDR",
> "PerPkg": "1",
> @@ -5736,6 +6178,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT0",
> "PerPkg": "1",
> @@ -5744,6 +6187,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT1",
> "PerPkg": "1",
> @@ -5752,6 +6196,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4A",
> "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
> "PerPkg": "1",
> @@ -5760,6 +6205,7 @@
> },
> {
> "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB",
> "PerPkg": "1",
> @@ -5769,6 +6215,7 @@
> },
> {
> "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass, Match Opcode",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC",
> "PerPkg": "1",
> @@ -5778,6 +6225,7 @@
> },
> {
> "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS",
> "PerPkg": "1",
> @@ -5787,6 +6235,7 @@
> },
> {
> "BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard, Match Opcode",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC",
> "PerPkg": "1",
> @@ -5796,6 +6245,7 @@
> },
> {
> "BriefDescription": "Tx Flit Buffer Bypassed",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_UPI_TxL_BYPASSED",
> "PerPkg": "1",
> @@ -5804,6 +6254,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : All Data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA",
> "PerPkg": "1",
> @@ -5813,6 +6264,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : All LLCRD Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.ALL_LLCRD",
> "PerPkg": "1",
> @@ -5822,6 +6274,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : All LLCTRL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.ALL_LLCTRL",
> "PerPkg": "1",
> @@ -5831,6 +6284,7 @@
> },
> {
> "BriefDescription": "All Null Flits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.ALL_NULL",
> "PerPkg": "1",
> @@ -5839,6 +6293,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : All Protocol Header",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.ALL_PROTHDR",
> "PerPkg": "1",
> @@ -5848,6 +6303,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.DATA",
> "PerPkg": "1",
> @@ -5857,6 +6313,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Idle",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.IDLE",
> "PerPkg": "1",
> @@ -5866,6 +6323,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : LLCRD Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.LLCRD",
> "PerPkg": "1",
> @@ -5875,6 +6333,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : LLCTRL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.LLCTRL",
> "PerPkg": "1",
> @@ -5884,6 +6343,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : All Non Data",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.NON_DATA",
> "PerPkg": "1",
> @@ -5893,6 +6353,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.NULL",
> "PerPkg": "1",
> @@ -5902,6 +6363,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Protocol Header",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.PROTHDR",
> "PerPkg": "1",
> @@ -5911,6 +6373,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Slot 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.SLOT0",
> "PerPkg": "1",
> @@ -5920,6 +6383,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Slot 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.SLOT1",
> "PerPkg": "1",
> @@ -5929,6 +6393,7 @@
> },
> {
> "BriefDescription": "Valid Flits Sent : Slot 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_UPI_TxL_FLITS.SLOT2",
> "PerPkg": "1",
> @@ -5938,6 +6403,7 @@
> },
> {
> "BriefDescription": "Tx Flit Buffer Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_UPI_TxL_INSERTS",
> "PerPkg": "1",
> @@ -5946,6 +6412,7 @@
> },
> {
> "BriefDescription": "Tx Flit Buffer Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_UPI_TxL_OCCUPANCY",
> "PerPkg": "1",
> @@ -5954,6 +6421,7 @@
> },
> {
> "BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
> + "Counter": "0,1,2,3",
> "EventCode": "0x45",
> "EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
> "PerPkg": "1",
> @@ -5961,6 +6429,7 @@
> },
> {
> "BriefDescription": "VNA Credits Pending Return - Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY",
> "PerPkg": "1",
> @@ -5969,6 +6438,7 @@
> },
> {
> "BriefDescription": "Message Received : Doorbell",
> + "Counter": "0,1",
> "EventCode": "0x42",
> "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD",
> "PerPkg": "1",
> @@ -5977,6 +6447,7 @@
> },
> {
> "BriefDescription": "Message Received : Interrupt",
> + "Counter": "0,1",
> "EventCode": "0x42",
> "EventName": "UNC_U_EVENT_MSG.INT_PRIO",
> "PerPkg": "1",
> @@ -5986,6 +6457,7 @@
> },
> {
> "BriefDescription": "Message Received : IPI",
> + "Counter": "0,1",
> "EventCode": "0x42",
> "EventName": "UNC_U_EVENT_MSG.IPI_RCVD",
> "PerPkg": "1",
> @@ -5995,6 +6467,7 @@
> },
> {
> "BriefDescription": "Message Received : MSI",
> + "Counter": "0,1",
> "EventCode": "0x42",
> "EventName": "UNC_U_EVENT_MSG.MSI_RCVD",
> "PerPkg": "1",
> @@ -6004,6 +6477,7 @@
> },
> {
> "BriefDescription": "Message Received : VLW",
> + "Counter": "0,1",
> "EventCode": "0x42",
> "EventName": "UNC_U_EVENT_MSG.VLW_RCVD",
> "PerPkg": "1",
> @@ -6157,6 +6631,7 @@
> },
> {
> "BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK",
> + "Counter": "0,1",
> "EventCode": "0x45",
> "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK",
> "PerPkg": "1",
> @@ -6190,6 +6665,7 @@
> },
> {
> "BriefDescription": "RACU Request",
> + "Counter": "0,1",
> "EventCode": "0x46",
> "EventName": "UNC_U_RACU_REQUESTS",
> "PerPkg": "1",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json
> index 8b5f54fed103..caf82e7ba92b 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-io.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "1",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN",
> "PerPkg": "1",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "2",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN",
> "PerPkg": "1",
> @@ -17,6 +19,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "3",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN",
> "PerPkg": "1",
> @@ -25,6 +28,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "4",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN",
> "PerPkg": "1",
> @@ -33,6 +37,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "5",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN",
> "PerPkg": "1",
> @@ -41,6 +46,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "6",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN",
> "PerPkg": "1",
> @@ -49,6 +55,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "7",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN",
> "PerPkg": "1",
> @@ -57,6 +64,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "8",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN",
> "PerPkg": "1",
> @@ -65,6 +73,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "9",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART0_FREERUN",
> "PerPkg": "1",
> @@ -73,6 +82,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "10",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART1_FREERUN",
> "PerPkg": "1",
> @@ -81,6 +91,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "11",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART2_FREERUN",
> "PerPkg": "1",
> @@ -89,6 +100,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "12",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART3_FREERUN",
> "PerPkg": "1",
> @@ -97,6 +109,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "13",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART4_FREERUN",
> "PerPkg": "1",
> @@ -105,6 +118,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "14",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART5_FREERUN",
> "PerPkg": "1",
> @@ -113,6 +127,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "15",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART6_FREERUN",
> "PerPkg": "1",
> @@ -121,6 +136,7 @@
> },
> {
> "BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
> + "Counter": "16",
> "EventCode": "0xff",
> "EventName": "UNC_IIO_BANDWIDTH_OUT.PART7_FREERUN",
> "PerPkg": "1",
> @@ -129,6 +145,7 @@
> },
> {
> "BriefDescription": "IIO Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_IIO_CLOCKTICKS",
> "PerPkg": "1",
> @@ -146,6 +163,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",
> "FCMask": "0x07",
> @@ -157,6 +175,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",
> "FCMask": "0x07",
> @@ -168,6 +187,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",
> "FCMask": "0x07",
> @@ -179,6 +199,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2",
> "FCMask": "0x07",
> @@ -190,6 +211,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3",
> "FCMask": "0x07",
> @@ -201,6 +223,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 4",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4",
> "FCMask": "0x07",
> @@ -212,6 +235,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 5",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5",
> "FCMask": "0x07",
> @@ -223,6 +247,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 6",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6",
> "FCMask": "0x07",
> @@ -234,6 +259,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 7",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc2",
> "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7",
> "FCMask": "0x07",
> @@ -245,6 +271,7 @@
> },
> {
> "BriefDescription": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
> "FCMask": "0x07",
> @@ -254,6 +281,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 0",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0",
> "FCMask": "0x07",
> @@ -265,6 +293,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 1",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1",
> "FCMask": "0x07",
> @@ -276,6 +305,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 2",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2",
> "FCMask": "0x07",
> @@ -287,6 +317,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 3",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3",
> "FCMask": "0x07",
> @@ -298,6 +329,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 4",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4",
> "FCMask": "0x07",
> @@ -309,6 +341,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 5",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5",
> "FCMask": "0x07",
> @@ -320,6 +353,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 6",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6",
> "FCMask": "0x07",
> @@ -331,6 +365,7 @@
> },
> {
> "BriefDescription": "PCIe Completion Buffer Occupancy : Part 7",
> + "Counter": "2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7",
> "FCMask": "0x07",
> @@ -342,6 +377,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part0-7",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.ALL_PARTS",
> "FCMask": "0x07",
> @@ -352,6 +388,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part0",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",
> "FCMask": "0x07",
> @@ -363,6 +400,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part1",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",
> "FCMask": "0x07",
> @@ -374,6 +412,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part2",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",
> "FCMask": "0x07",
> @@ -385,6 +424,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part3",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",
> "FCMask": "0x07",
> @@ -396,6 +436,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4",
> "FCMask": "0x07",
> @@ -407,6 +448,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5",
> "FCMask": "0x07",
> @@ -418,6 +460,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6",
> "FCMask": "0x07",
> @@ -429,6 +472,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7",
> "FCMask": "0x07",
> @@ -440,6 +484,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made to IIO Part0-7 by the CPU",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.ALL_PARTS",
> "FCMask": "0x07",
> @@ -450,6 +495,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0",
> "FCMask": "0x07",
> @@ -461,6 +507,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1",
> "FCMask": "0x07",
> @@ -472,6 +519,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made to IIO Part0 by the CPU",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",
> "FCMask": "0x07",
> @@ -483,6 +531,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made to IIO Part1 by the CPU",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",
> "FCMask": "0x07",
> @@ -494,6 +543,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made to IIO Part2 by the CPU",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",
> "FCMask": "0x07",
> @@ -505,6 +555,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made to IIO Part3 by the CPU",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",
> "FCMask": "0x07",
> @@ -516,6 +567,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4",
> "FCMask": "0x07",
> @@ -527,6 +579,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5",
> "FCMask": "0x07",
> @@ -538,6 +591,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6",
> "FCMask": "0x07",
> @@ -549,6 +603,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7",
> "FCMask": "0x07",
> @@ -560,6 +615,7 @@
> },
> {
> "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0",
> "FCMask": "0x07",
> @@ -571,6 +627,7 @@
> },
> {
> "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1",
> "FCMask": "0x07",
> @@ -582,6 +639,7 @@
> },
> {
> "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2",
> "FCMask": "0x07",
> @@ -593,6 +651,7 @@
> },
> {
> "BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3",
> "FCMask": "0x07",
> @@ -604,6 +663,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4",
> "FCMask": "0x07",
> @@ -615,6 +675,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5",
> "FCMask": "0x07",
> @@ -626,6 +687,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6",
> "FCMask": "0x07",
> @@ -637,6 +699,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7",
> "FCMask": "0x07",
> @@ -648,6 +711,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0",
> "FCMask": "0x07",
> @@ -659,6 +723,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1",
> "FCMask": "0x07",
> @@ -670,6 +735,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2",
> "FCMask": "0x07",
> @@ -681,6 +747,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3",
> "FCMask": "0x07",
> @@ -692,6 +759,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4",
> "FCMask": "0x07",
> @@ -703,6 +771,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5",
> "FCMask": "0x07",
> @@ -714,6 +783,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6",
> "FCMask": "0x07",
> @@ -725,6 +795,7 @@
> },
> {
> "BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7",
> "FCMask": "0x07",
> @@ -736,6 +807,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.ALL_PARTS",
> "FCMask": "0x07",
> @@ -747,6 +819,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0",
> "FCMask": "0x07",
> @@ -758,6 +831,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1",
> "FCMask": "0x07",
> @@ -769,6 +843,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2",
> "FCMask": "0x07",
> @@ -780,6 +855,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3",
> "FCMask": "0x07",
> @@ -791,6 +867,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4",
> "FCMask": "0x07",
> @@ -802,6 +879,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5",
> "FCMask": "0x07",
> @@ -813,6 +891,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6",
> "FCMask": "0x07",
> @@ -824,6 +903,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7",
> "FCMask": "0x07",
> @@ -835,6 +915,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by IIO Part0-7 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS",
> "FCMask": "0x07",
> @@ -845,6 +926,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by IIO Part0 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",
> "FCMask": "0x07",
> @@ -856,6 +938,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by IIO Part1 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",
> "FCMask": "0x07",
> @@ -867,6 +950,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by IIO Part2 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",
> "FCMask": "0x07",
> @@ -878,6 +962,7 @@
> },
> {
> "BriefDescription": "Read request for 4 bytes made by IIO Part3 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
> "FCMask": "0x07",
> @@ -889,6 +974,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4",
> "FCMask": "0x07",
> @@ -900,6 +986,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5",
> "FCMask": "0x07",
> @@ -911,6 +998,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6",
> "FCMask": "0x07",
> @@ -922,6 +1010,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7",
> "FCMask": "0x07",
> @@ -933,6 +1022,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made by IIO Part0-7 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS",
> "FCMask": "0x07",
> @@ -943,6 +1033,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made by IIO Part0 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",
> "FCMask": "0x07",
> @@ -954,6 +1045,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made by IIO Part1 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",
> "FCMask": "0x07",
> @@ -965,6 +1057,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made by IIO Part2 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",
> "FCMask": "0x07",
> @@ -976,6 +1069,7 @@
> },
> {
> "BriefDescription": "Write request of 4 bytes made by IIO Part3 to Memory",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
> "FCMask": "0x07",
> @@ -987,6 +1081,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4",
> "FCMask": "0x07",
> @@ -998,6 +1093,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5",
> "FCMask": "0x07",
> @@ -1009,6 +1105,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6",
> "FCMask": "0x07",
> @@ -1020,6 +1117,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7",
> "FCMask": "0x07",
> @@ -1031,6 +1129,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",
> "FCMask": "0x07",
> @@ -1042,6 +1141,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",
> "FCMask": "0x07",
> @@ -1053,6 +1153,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",
> "FCMask": "0x07",
> @@ -1064,6 +1165,7 @@
> },
> {
> "BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",
> "FCMask": "0x07",
> @@ -1075,6 +1177,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4",
> "FCMask": "0x07",
> @@ -1086,6 +1189,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5",
> "FCMask": "0x07",
> @@ -1097,6 +1201,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6",
> "FCMask": "0x07",
> @@ -1108,6 +1213,7 @@
> },
> {
> "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1",
> "EventCode": "0x83",
> "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7",
> "FCMask": "0x07",
> @@ -1119,6 +1225,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests : Passing data to be written",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA",
> "FCMask": "0x07",
> @@ -1130,6 +1237,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests : Issuing final read or write of line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR",
> "FCMask": "0x07",
> @@ -1141,6 +1249,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests : Processing response from IOMMU",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT",
> "FCMask": "0x07",
> @@ -1152,6 +1261,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests : Issuing to IOMMU",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ",
> "FCMask": "0x07",
> @@ -1163,6 +1273,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests : Request Ownership",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN",
> "FCMask": "0x07",
> @@ -1174,6 +1285,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests : Writing line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_IIO_INBOUND_ARB_REQ.WR",
> "FCMask": "0x07",
> @@ -1185,6 +1297,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests granted : Passing data to be written",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "UNC_IIO_INBOUND_ARB_WON.DATA",
> "FCMask": "0x07",
> @@ -1196,6 +1309,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests granted : Issuing final read or write of line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR",
> "FCMask": "0x07",
> @@ -1207,6 +1321,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests granted : Processing response from IOMMU",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT",
> "FCMask": "0x07",
> @@ -1218,6 +1333,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests granted : Issuing to IOMMU",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ",
> "FCMask": "0x07",
> @@ -1229,6 +1345,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests granted : Request Ownership",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN",
> "FCMask": "0x07",
> @@ -1240,6 +1357,7 @@
> },
> {
> "BriefDescription": "Incoming arbitration requests granted : Writing line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x87",
> "EventName": "UNC_IIO_INBOUND_ARB_WON.WR",
> "FCMask": "0x07",
> @@ -1300,6 +1418,7 @@
> },
> {
> "BriefDescription": ": PWC Hit to a 2M page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS",
> "PerPkg": "1",
> @@ -1309,6 +1428,7 @@
> },
> {
> "BriefDescription": ": PWT Hit to a 256T page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.PWC_256T_HITS",
> "PerPkg": "1",
> @@ -1318,6 +1438,7 @@
> },
> {
> "BriefDescription": ": PWC Hit to a 4K page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS",
> "PerPkg": "1",
> @@ -1327,6 +1448,7 @@
> },
> {
> "BriefDescription": ": PWC Hit to a 1G page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS",
> "PerPkg": "1",
> @@ -1336,6 +1458,7 @@
> },
> {
> "BriefDescription": ": PageWalk cache fill",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS",
> "PerPkg": "1",
> @@ -1345,6 +1468,7 @@
> },
> {
> "BriefDescription": ": PageWalk cache lookup",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS",
> "PerPkg": "1",
> @@ -1354,6 +1478,7 @@
> },
> {
> "BriefDescription": ": PWC Hit to a 2M page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.SLPWC_1G_HITS",
> "PerPkg": "1",
> @@ -1363,6 +1488,7 @@
> },
> {
> "BriefDescription": ": PWC Hit to a 2M page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.SLPWC_256T_HITS",
> "PerPkg": "1",
> @@ -1372,6 +1498,7 @@
> },
> {
> "BriefDescription": ": PWC Hit to a 1G page",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_IIO_IOMMU1.SLPWC_512G_HITS",
> "PerPkg": "1",
> @@ -1381,6 +1508,7 @@
> },
> {
> "BriefDescription": ": Global IOTLB invalidation cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x43",
> "EventName": "UNC_IIO_IOMMU3.PWT_OCCUPANCY_MSB",
> "PerPkg": "1",
> @@ -1391,6 +1519,7 @@
> },
> {
> "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0",
> "PerPkg": "1",
> @@ -1401,6 +1530,7 @@
> },
> {
> "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus and PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1",
> "PerPkg": "1",
> @@ -1411,6 +1541,7 @@
> },
> {
> "BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus and !(PCIE bus)",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1",
> "PerPkg": "1",
> @@ -1421,6 +1552,7 @@
> },
> {
> "BriefDescription": "AND Mask/match for debug bus : PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_IIO_MASK_MATCH_AND.BUS1",
> "PerPkg": "1",
> @@ -1431,6 +1563,7 @@
> },
> {
> "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus) and PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1",
> "PerPkg": "1",
> @@ -1441,6 +1574,7 @@
> },
> {
> "BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus) and !(PCIE bus)",
> + "Counter": "0,1",
> "EventCode": "0x02",
> "EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1",
> "PerPkg": "1",
> @@ -1451,6 +1585,7 @@
> },
> {
> "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0",
> "PerPkg": "1",
> @@ -1461,6 +1596,7 @@
> },
> {
> "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus and PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1",
> "PerPkg": "1",
> @@ -1471,6 +1607,7 @@
> },
> {
> "BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus and !(PCIE bus)",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1",
> "PerPkg": "1",
> @@ -1481,6 +1618,7 @@
> },
> {
> "BriefDescription": "OR Mask/match for debug bus : PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_IIO_MASK_MATCH_OR.BUS1",
> "PerPkg": "1",
> @@ -1491,6 +1629,7 @@
> },
> {
> "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus) and PCIE bus",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1",
> "PerPkg": "1",
> @@ -1501,6 +1640,7 @@
> },
> {
> "BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus) and !(PCIE bus)",
> + "Counter": "0,1",
> "EventCode": "0x03",
> "EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1",
> "PerPkg": "1",
> @@ -1511,6 +1651,7 @@
> },
> {
> "BriefDescription": "Number requests PCIe makes of the main die : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0x85",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL",
> "FCMask": "0x07",
> @@ -1522,6 +1663,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Abort",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT",
> "FCMask": "0x07",
> @@ -1532,6 +1674,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Confined P2P",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P",
> "FCMask": "0x07",
> @@ -1542,6 +1685,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Local P2P",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P",
> "FCMask": "0x07",
> @@ -1552,6 +1696,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Multi-cast",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST",
> "FCMask": "0x07",
> @@ -1562,6 +1707,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM",
> "FCMask": "0x07",
> @@ -1572,6 +1718,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : MsgB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB",
> "FCMask": "0x07",
> @@ -1582,6 +1729,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Remote P2P",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P",
> "FCMask": "0x07",
> @@ -1592,6 +1740,7 @@
> },
> {
> "BriefDescription": "Num requests sent by PCIe - by target : Ubox",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8e",
> "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX",
> "FCMask": "0x07",
> @@ -1602,6 +1751,7 @@
> },
> {
> "BriefDescription": "ITC address map 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x8f",
> "EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU",
> "PerPkg": "1",
> @@ -1611,6 +1761,7 @@
> },
> {
> "BriefDescription": "Outbound cacheline requests issued : 64B requests issued to device",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd0",
> "EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO",
> "FCMask": "0x07",
> @@ -1622,6 +1773,7 @@
> },
> {
> "BriefDescription": "Outbound TLP (transaction layer packet) requests issued : To device",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd1",
> "EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO",
> "FCMask": "0x07",
> @@ -1633,6 +1785,7 @@
> },
> {
> "BriefDescription": "PWT occupancy. Does not include 9th bit of occupancy (will undercount if PWT is greater than 255 per cycle).",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_IIO_PWT_OCCUPANCY",
> "PerPkg": "1",
> @@ -1643,6 +1796,7 @@
> },
> {
> "BriefDescription": "Request Ownership : PCIe Request complete",
> + "Counter": "0,1,2,3",
> "EventCode": "0x91",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA",
> "FCMask": "0x07",
> @@ -1654,6 +1808,7 @@
> },
> {
> "BriefDescription": "Request Ownership : Writing line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x91",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR",
> "FCMask": "0x07",
> @@ -1665,6 +1820,7 @@
> },
> {
> "BriefDescription": "Request Ownership : Issuing final read or write of line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x91",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN",
> "FCMask": "0x07",
> @@ -1676,6 +1832,7 @@
> },
> {
> "BriefDescription": "Request Ownership : Passing data to be written",
> + "Counter": "0,1,2,3",
> "EventCode": "0x91",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR",
> "FCMask": "0x07",
> @@ -1687,6 +1844,7 @@
> },
> {
> "BriefDescription": "Processing response from IOMMU : Passing data to be written",
> + "Counter": "0,1,2,3",
> "EventCode": "0x92",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR",
> "FCMask": "0x07",
> @@ -1698,6 +1856,7 @@
> },
> {
> "BriefDescription": "Processing response from IOMMU : Issuing final read or write of line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x92",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT",
> "FCMask": "0x07",
> @@ -1708,6 +1867,7 @@
> },
> {
> "BriefDescription": "Processing response from IOMMU : Request Ownership",
> + "Counter": "0,1,2,3",
> "EventCode": "0x92",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ",
> "FCMask": "0x07",
> @@ -1719,6 +1879,7 @@
> },
> {
> "BriefDescription": "Processing response from IOMMU : Writing line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x92",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN",
> "FCMask": "0x07",
> @@ -1730,6 +1891,7 @@
> },
> {
> "BriefDescription": "PCIe Request - pass complete : Passing data to be written",
> + "Counter": "0,1,2,3",
> "EventCode": "0x90",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA",
> "FCMask": "0x07",
> @@ -1741,6 +1903,7 @@
> },
> {
> "BriefDescription": "PCIe Request - pass complete : Issuing final read or write of line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x90",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR",
> "FCMask": "0x07",
> @@ -1752,6 +1915,7 @@
> },
> {
> "BriefDescription": "PCIe Request - pass complete : Request Ownership",
> + "Counter": "0,1,2,3",
> "EventCode": "0x90",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN",
> "FCMask": "0x07",
> @@ -1763,6 +1927,7 @@
> },
> {
> "BriefDescription": "PCIe Request - pass complete : Writing line",
> + "Counter": "0,1,2,3",
> "EventCode": "0x90",
> "EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR",
> "FCMask": "0x07",
> @@ -1774,6 +1939,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part0",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",
> "FCMask": "0x07",
> @@ -1785,6 +1951,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part1",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",
> "FCMask": "0x07",
> @@ -1796,6 +1963,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part2",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",
> "FCMask": "0x07",
> @@ -1807,6 +1975,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part3",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",
> "FCMask": "0x07",
> @@ -1818,6 +1987,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4",
> "FCMask": "0x07",
> @@ -1829,6 +1999,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5",
> "FCMask": "0x07",
> @@ -1840,6 +2011,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6",
> "FCMask": "0x07",
> @@ -1851,6 +2023,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7",
> "FCMask": "0x07",
> @@ -1862,6 +2035,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",
> "FCMask": "0x07",
> @@ -1873,6 +2047,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",
> "FCMask": "0x07",
> @@ -1884,6 +2059,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",
> "FCMask": "0x07",
> @@ -1895,6 +2071,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",
> "FCMask": "0x07",
> @@ -1906,6 +2083,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4",
> "FCMask": "0x07",
> @@ -1917,6 +2095,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5",
> "FCMask": "0x07",
> @@ -1928,6 +2107,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6",
> "FCMask": "0x07",
> @@ -1939,6 +2119,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7",
> "FCMask": "0x07",
> @@ -1950,6 +2131,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0",
> "FCMask": "0x07",
> @@ -1961,6 +2143,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1",
> "FCMask": "0x07",
> @@ -1972,6 +2155,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2",
> "FCMask": "0x07",
> @@ -1983,6 +2167,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3",
> "FCMask": "0x07",
> @@ -1994,6 +2179,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4",
> "FCMask": "0x07",
> @@ -2005,6 +2191,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5",
> "FCMask": "0x07",
> @@ -2016,6 +2203,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6",
> "FCMask": "0x07",
> @@ -2027,6 +2215,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc1",
> "EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7",
> "FCMask": "0x07",
> @@ -2038,6 +2227,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0",
> "FCMask": "0x07",
> @@ -2049,6 +2239,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1",
> "FCMask": "0x07",
> @@ -2060,6 +2251,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2",
> "FCMask": "0x07",
> @@ -2071,6 +2263,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3",
> "FCMask": "0x07",
> @@ -2082,6 +2275,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4",
> "FCMask": "0x07",
> @@ -2093,6 +2287,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5",
> "FCMask": "0x07",
> @@ -2104,6 +2299,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6",
> "FCMask": "0x07",
> @@ -2115,6 +2311,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7",
> "FCMask": "0x07",
> @@ -2126,6 +2323,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part0 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0",
> "FCMask": "0x07",
> @@ -2137,6 +2335,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part1 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1",
> "FCMask": "0x07",
> @@ -2148,6 +2347,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part2 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2",
> "FCMask": "0x07",
> @@ -2159,6 +2359,7 @@
> },
> {
> "BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part3 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3",
> "FCMask": "0x07",
> @@ -2170,6 +2371,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4",
> "FCMask": "0x07",
> @@ -2181,6 +2383,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5",
> "FCMask": "0x07",
> @@ -2192,6 +2395,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6",
> "FCMask": "0x07",
> @@ -2203,6 +2407,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7",
> "FCMask": "0x07",
> @@ -2214,6 +2419,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part0 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",
> "FCMask": "0x07",
> @@ -2225,6 +2431,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part1 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",
> "FCMask": "0x07",
> @@ -2236,6 +2443,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part2 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",
> "FCMask": "0x07",
> @@ -2247,6 +2455,7 @@
> },
> {
> "BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part3 to Memory",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",
> "FCMask": "0x07",
> @@ -2258,6 +2467,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4",
> "FCMask": "0x07",
> @@ -2269,6 +2479,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5",
> "FCMask": "0x07",
> @@ -2280,6 +2491,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6",
> "FCMask": "0x07",
> @@ -2291,6 +2503,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7",
> "FCMask": "0x07",
> @@ -2302,6 +2515,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0",
> "FCMask": "0x07",
> @@ -2313,6 +2527,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1",
> "FCMask": "0x07",
> @@ -2324,6 +2539,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2",
> "FCMask": "0x07",
> @@ -2335,6 +2551,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3",
> "FCMask": "0x07",
> @@ -2346,6 +2563,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4",
> "FCMask": "0x07",
> @@ -2357,6 +2575,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5",
> "FCMask": "0x07",
> @@ -2368,6 +2587,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6",
> "FCMask": "0x07",
> @@ -2379,6 +2599,7 @@
> },
> {
> "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x84",
> "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7",
> "FCMask": "0x07",
> @@ -2390,6 +2611,7 @@
> },
> {
> "BriefDescription": "M2P Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_M2P_CLOCKTICKS",
> "PerPkg": "1",
> @@ -2398,6 +2620,7 @@
> },
> {
> "BriefDescription": "CMS Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_M2P_CMS_CLOCKTICKS",
> "PerPkg": "1",
> @@ -2405,6 +2628,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Down",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN",
> "PerPkg": "1",
> @@ -2414,6 +2638,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Up",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP",
> "PerPkg": "1",
> @@ -2423,6 +2648,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credit Acquired : DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0",
> "PerPkg": "1",
> @@ -2432,6 +2658,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credit Acquired : DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1",
> "PerPkg": "1",
> @@ -2441,6 +2668,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credit Acquired : NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0",
> "PerPkg": "1",
> @@ -2450,6 +2678,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credit Acquired : NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1",
> "PerPkg": "1",
> @@ -2459,6 +2688,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credit Acquired : NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0",
> "PerPkg": "1",
> @@ -2468,6 +2698,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credit Acquired : NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1",
> "PerPkg": "1",
> @@ -2477,6 +2708,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS",
> "PerPkg": "1",
> @@ -2486,6 +2718,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB",
> "PerPkg": "1",
> @@ -2495,6 +2728,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x34",
> "EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS",
> "PerPkg": "1",
> @@ -2504,6 +2738,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0",
> "PerPkg": "1",
> @@ -2513,6 +2748,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1",
> "PerPkg": "1",
> @@ -2522,6 +2758,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0",
> "PerPkg": "1",
> @@ -2531,6 +2768,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1",
> "PerPkg": "1",
> @@ -2540,6 +2778,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0",
> "PerPkg": "1",
> @@ -2549,6 +2788,7 @@
> },
> {
> "BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1",
> "PerPkg": "1",
> @@ -2558,6 +2798,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB",
> "PerPkg": "1",
> @@ -2566,6 +2807,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS",
> "PerPkg": "1",
> @@ -2574,6 +2816,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB",
> "PerPkg": "1",
> @@ -2582,6 +2825,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS",
> "PerPkg": "1",
> @@ -2590,6 +2834,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB",
> "PerPkg": "1",
> @@ -2598,6 +2843,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS",
> "PerPkg": "1",
> @@ -2606,6 +2852,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF3 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB",
> "PerPkg": "1",
> @@ -2614,6 +2861,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF3 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x46",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS",
> "PerPkg": "1",
> @@ -2622,6 +2870,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF4 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB",
> "PerPkg": "1",
> @@ -2630,6 +2879,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF4 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS",
> "PerPkg": "1",
> @@ -2638,6 +2888,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF5 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB",
> "PerPkg": "1",
> @@ -2646,6 +2897,7 @@
> },
> {
> "BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF5 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS",
> "PerPkg": "1",
> @@ -2654,6 +2906,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB",
> "PerPkg": "1",
> @@ -2662,6 +2915,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS",
> "PerPkg": "1",
> @@ -2670,6 +2924,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB",
> "PerPkg": "1",
> @@ -2678,6 +2933,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS",
> "PerPkg": "1",
> @@ -2686,6 +2942,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB",
> "PerPkg": "1",
> @@ -2694,6 +2951,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS",
> "PerPkg": "1",
> @@ -2702,6 +2960,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF3 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB",
> "PerPkg": "1",
> @@ -2710,6 +2969,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF3 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS",
> "PerPkg": "1",
> @@ -2718,6 +2978,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF4 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB",
> "PerPkg": "1",
> @@ -2726,6 +2987,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF4 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS",
> "PerPkg": "1",
> @@ -2734,6 +2996,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF5 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB",
> "PerPkg": "1",
> @@ -2742,6 +3005,7 @@
> },
> {
> "BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF5 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS",
> "PerPkg": "1",
> @@ -2750,6 +3014,7 @@
> },
> {
> "BriefDescription": "Local P2P Shared Credits Returned : Agent0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0",
> "PerPkg": "1",
> @@ -2758,6 +3023,7 @@
> },
> {
> "BriefDescription": "Local P2P Shared Credits Returned : Agent1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1",
> "PerPkg": "1",
> @@ -2766,6 +3032,7 @@
> },
> {
> "BriefDescription": "Local P2P Shared Credits Returned : Agent2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2",
> "PerPkg": "1",
> @@ -2774,6 +3041,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0",
> "PerPkg": "1",
> @@ -2782,6 +3050,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1",
> "PerPkg": "1",
> @@ -2790,6 +3059,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2",
> "PerPkg": "1",
> @@ -2798,6 +3068,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3",
> "PerPkg": "1",
> @@ -2806,6 +3077,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent4",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4",
> "PerPkg": "1",
> @@ -2814,6 +3086,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent5",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5",
> "PerPkg": "1",
> @@ -2822,6 +3095,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB",
> "PerPkg": "1",
> @@ -2830,6 +3104,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS",
> "PerPkg": "1",
> @@ -2838,6 +3113,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB",
> "PerPkg": "1",
> @@ -2846,6 +3122,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS",
> "PerPkg": "1",
> @@ -2854,6 +3131,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB",
> "PerPkg": "1",
> @@ -2862,6 +3140,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS",
> "PerPkg": "1",
> @@ -2870,6 +3149,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB",
> "PerPkg": "1",
> @@ -2878,6 +3158,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS",
> "PerPkg": "1",
> @@ -2886,6 +3167,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB",
> "PerPkg": "1",
> @@ -2894,6 +3176,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS",
> "PerPkg": "1",
> @@ -2902,6 +3185,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB",
> "PerPkg": "1",
> @@ -2910,6 +3194,7 @@
> },
> {
> "BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x41",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS",
> "PerPkg": "1",
> @@ -2918,6 +3203,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB",
> "PerPkg": "1",
> @@ -2926,6 +3212,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS",
> "PerPkg": "1",
> @@ -2934,6 +3221,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB",
> "PerPkg": "1",
> @@ -2942,6 +3230,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS",
> "PerPkg": "1",
> @@ -2950,6 +3239,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB",
> "PerPkg": "1",
> @@ -2958,6 +3248,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS",
> "PerPkg": "1",
> @@ -2966,6 +3257,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF3 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB",
> "PerPkg": "1",
> @@ -2974,6 +3266,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF3 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS",
> "PerPkg": "1",
> @@ -2982,6 +3275,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF4 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4b",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB",
> "PerPkg": "1",
> @@ -2990,6 +3284,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF4 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4b",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS",
> "PerPkg": "1",
> @@ -2998,6 +3293,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF5 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4b",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB",
> "PerPkg": "1",
> @@ -3006,6 +3302,7 @@
> },
> {
> "BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF5 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4b",
> "EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS",
> "PerPkg": "1",
> @@ -3014,6 +3311,7 @@
> },
> {
> "BriefDescription": "P2P Credit Occupancy : All",
> + "Counter": "0,1",
> "EventCode": "0x14",
> "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL",
> "PerPkg": "1",
> @@ -3022,6 +3320,7 @@
> },
> {
> "BriefDescription": "P2P Credit Occupancy : Local NCB",
> + "Counter": "0,1",
> "EventCode": "0x14",
> "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB",
> "PerPkg": "1",
> @@ -3030,6 +3329,7 @@
> },
> {
> "BriefDescription": "P2P Credit Occupancy : Local NCS",
> + "Counter": "0,1",
> "EventCode": "0x14",
> "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS",
> "PerPkg": "1",
> @@ -3038,6 +3338,7 @@
> },
> {
> "BriefDescription": "P2P Credit Occupancy : Remote NCB",
> + "Counter": "0,1",
> "EventCode": "0x14",
> "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB",
> "PerPkg": "1",
> @@ -3046,6 +3347,7 @@
> },
> {
> "BriefDescription": "P2P Credit Occupancy : Remote NCS",
> + "Counter": "0,1",
> "EventCode": "0x14",
> "EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS",
> "PerPkg": "1",
> @@ -3054,6 +3356,7 @@
> },
> {
> "BriefDescription": "Dedicated Credits Received : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0x16",
> "EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL",
> "PerPkg": "1",
> @@ -3062,6 +3365,7 @@
> },
> {
> "BriefDescription": "Dedicated Credits Received : Local NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x16",
> "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB",
> "PerPkg": "1",
> @@ -3070,6 +3374,7 @@
> },
> {
> "BriefDescription": "Dedicated Credits Received : Local NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x16",
> "EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS",
> "PerPkg": "1",
> @@ -3078,6 +3383,7 @@
> },
> {
> "BriefDescription": "Dedicated Credits Received : Remote NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x16",
> "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB",
> "PerPkg": "1",
> @@ -3086,6 +3392,7 @@
> },
> {
> "BriefDescription": "Dedicated Credits Received : Remote NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x16",
> "EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS",
> "PerPkg": "1",
> @@ -3094,6 +3401,7 @@
> },
> {
> "BriefDescription": "Shared Credits Received : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL",
> "PerPkg": "1",
> @@ -3102,6 +3410,7 @@
> },
> {
> "BriefDescription": "Shared Credits Received : Local NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB",
> "PerPkg": "1",
> @@ -3110,6 +3419,7 @@
> },
> {
> "BriefDescription": "Shared Credits Received : Local NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS",
> "PerPkg": "1",
> @@ -3118,6 +3428,7 @@
> },
> {
> "BriefDescription": "Shared Credits Received : Remote NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB",
> "PerPkg": "1",
> @@ -3126,6 +3437,7 @@
> },
> {
> "BriefDescription": "Shared Credits Received : Remote NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x15",
> "EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS",
> "PerPkg": "1",
> @@ -3134,6 +3446,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_DRS",
> "PerPkg": "1",
> @@ -3142,6 +3455,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCB",
> "PerPkg": "1",
> @@ -3150,6 +3464,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCS",
> "PerPkg": "1",
> @@ -3158,6 +3473,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_DRS",
> "PerPkg": "1",
> @@ -3166,6 +3482,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCB",
> "PerPkg": "1",
> @@ -3174,6 +3491,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCS",
> "PerPkg": "1",
> @@ -3182,6 +3500,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x49",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_DRS",
> "PerPkg": "1",
> @@ -3190,6 +3509,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x49",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCB",
> "PerPkg": "1",
> @@ -3198,6 +3518,7 @@
> },
> {
> "BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x49",
> "EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCS",
> "PerPkg": "1",
> @@ -3206,6 +3527,7 @@
> },
> {
> "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCB",
> "PerPkg": "1",
> @@ -3214,6 +3536,7 @@
> },
> {
> "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCS",
> "PerPkg": "1",
> @@ -3222,6 +3545,7 @@
> },
> {
> "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCB",
> "PerPkg": "1",
> @@ -3230,6 +3554,7 @@
> },
> {
> "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCS",
> "PerPkg": "1",
> @@ -3238,6 +3563,7 @@
> },
> {
> "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCB",
> "PerPkg": "1",
> @@ -3246,6 +3572,7 @@
> },
> {
> "BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCS",
> "PerPkg": "1",
> @@ -3254,6 +3581,7 @@
> },
> {
> "BriefDescription": "Remote P2P Shared Credits Returned : Agent0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0",
> "PerPkg": "1",
> @@ -3262,6 +3590,7 @@
> },
> {
> "BriefDescription": "Remote P2P Shared Credits Returned : Agent1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1",
> "PerPkg": "1",
> @@ -3270,6 +3599,7 @@
> },
> {
> "BriefDescription": "Remote P2P Shared Credits Returned : Agent2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2",
> "PerPkg": "1",
> @@ -3278,6 +3608,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x45",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0",
> "PerPkg": "1",
> @@ -3286,6 +3617,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x45",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1",
> "PerPkg": "1",
> @@ -3294,6 +3626,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent2",
> + "Counter": "0,1,2,3",
> "EventCode": "0x45",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2",
> "PerPkg": "1",
> @@ -3302,6 +3635,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_DRS",
> "PerPkg": "1",
> @@ -3310,6 +3644,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCB",
> "PerPkg": "1",
> @@ -3318,6 +3653,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCS",
> "PerPkg": "1",
> @@ -3326,6 +3662,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_DRS",
> "PerPkg": "1",
> @@ -3334,6 +3671,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCB",
> "PerPkg": "1",
> @@ -3342,6 +3680,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCS",
> "PerPkg": "1",
> @@ -3350,6 +3689,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x43",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_DRS",
> "PerPkg": "1",
> @@ -3358,6 +3698,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x43",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCB",
> "PerPkg": "1",
> @@ -3366,6 +3707,7 @@
> },
> {
> "BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x43",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCS",
> "PerPkg": "1",
> @@ -3374,6 +3716,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_DRS",
> "PerPkg": "1",
> @@ -3382,6 +3725,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCB",
> "PerPkg": "1",
> @@ -3390,6 +3734,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCS",
> "PerPkg": "1",
> @@ -3398,6 +3743,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_DRS",
> "PerPkg": "1",
> @@ -3406,6 +3752,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCB",
> "PerPkg": "1",
> @@ -3414,6 +3761,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCS",
> "PerPkg": "1",
> @@ -3422,6 +3770,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - DRS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_DRS",
> "PerPkg": "1",
> @@ -3430,6 +3779,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - NCB",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCB",
> "PerPkg": "1",
> @@ -3438,6 +3788,7 @@
> },
> {
> "BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - NCS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCS",
> "PerPkg": "1",
> @@ -3446,6 +3797,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.ALL",
> "PerPkg": "1",
> @@ -3455,6 +3807,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI",
> "PerPkg": "1",
> @@ -3464,6 +3817,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB",
> "PerPkg": "1",
> @@ -3473,6 +3827,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS",
> "PerPkg": "1",
> @@ -3482,6 +3837,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB",
> "PerPkg": "1",
> @@ -3491,6 +3847,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS",
> "PerPkg": "1",
> @@ -3500,6 +3857,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCB",
> "PerPkg": "1",
> @@ -3509,6 +3867,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCS",
> "PerPkg": "1",
> @@ -3518,6 +3877,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.ALL",
> "PerPkg": "1",
> @@ -3527,6 +3887,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI",
> "PerPkg": "1",
> @@ -3536,6 +3897,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB",
> "PerPkg": "1",
> @@ -3545,6 +3907,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS",
> "PerPkg": "1",
> @@ -3554,6 +3917,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB",
> "PerPkg": "1",
> @@ -3563,6 +3927,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS",
> "PerPkg": "1",
> @@ -3572,6 +3937,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCB",
> "PerPkg": "1",
> @@ -3581,6 +3947,7 @@
> },
> {
> "BriefDescription": "Ingress (from CMS) Queue Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "UNC_M2P_RxC_INSERTS.UPI_NCS",
> "PerPkg": "1",
> @@ -3590,6 +3957,7 @@
> },
> {
> "BriefDescription": "UNC_M2P_TxC_CREDITS.PMM",
> + "Counter": "0,1",
> "EventCode": "0x2d",
> "EventName": "UNC_M2P_TxC_CREDITS.PMM",
> "PerPkg": "1",
> @@ -3598,6 +3966,7 @@
> },
> {
> "BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ",
> + "Counter": "0,1",
> "EventCode": "0x2d",
> "EventName": "UNC_M2P_TxC_CREDITS.PRQ",
> "PerPkg": "1",
> @@ -3606,6 +3975,7 @@
> },
> {
> "BriefDescription": "Egress (to CMS) Cycles Full",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_0",
> "FCMask": "0x00000000",
> @@ -3617,6 +3987,7 @@
> },
> {
> "BriefDescription": "Egress (to CMS) Cycles Full",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_1",
> "FCMask": "0x00000000",
> @@ -3628,6 +3999,7 @@
> },
> {
> "BriefDescription": "Egress (to CMS) Cycles Not Empty",
> + "Counter": "0,1",
> "EventCode": "0x23",
> "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_0",
> "FCMask": "0x00000000",
> @@ -3639,6 +4011,7 @@
> },
> {
> "BriefDescription": "Egress (to CMS) Cycles Not Empty",
> + "Counter": "0,1",
> "EventCode": "0x23",
> "EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_1",
> "FCMask": "0x00000000",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json
> index 3ff9e9b722c8..20c064e818a9 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-memory.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Cycles - at UCLK",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_M2HBM_CLOCKTICKS",
> "PerPkg": "1",
> @@ -8,6 +9,7 @@
> },
> {
> "BriefDescription": "CMS Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0xc0",
> "EventName": "UNC_M2HBM_CMS_CLOCKTICKS",
> "PerPkg": "1",
> @@ -15,6 +17,7 @@
> },
> {
> "BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_DIRSTATE",
> "PerPkg": "1",
> @@ -23,6 +26,7 @@
> },
> {
> "BriefDescription": "Cycles when direct to core mode, which bypasses the CHA, was disabled : Non Cisgress",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
> "PerPkg": "1",
> @@ -32,6 +36,7 @@
> },
> {
> "BriefDescription": "Counts the time when FM didn't do d2c for fill reads (cross tile case)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_M2HBM_DIRECT2CORE_NOT_TAKEN_NOTFORKED",
> "PerPkg": "1",
> @@ -39,6 +44,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to core transaction were overridden",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2HBM_DIRECT2CORE_TXN_OVERRIDE",
> "PerPkg": "1",
> @@ -47,6 +53,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to core transaction was overridden : Cisgress",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M2HBM_DIRECT2CORE_TXN_OVERRIDE.CISGRESS",
> "PerPkg": "1",
> @@ -55,6 +62,7 @@
> },
> {
> "BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1b",
> "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_CREDITS",
> "PerPkg": "1",
> @@ -63,6 +71,7 @@
> },
> {
> "BriefDescription": "Cycles when direct to Intel UPI was disabled",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE",
> "PerPkg": "1",
> @@ -71,6 +80,7 @@
> },
> {
> "BriefDescription": "Cycles when Direct2UPI was Disabled : Cisgress D2U Ignored",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1A",
> "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.CISGRESS",
> "FCMask": "0x00000000",
> @@ -82,6 +92,7 @@
> },
> {
> "BriefDescription": "Cycles when Direct2UPI was Disabled : Egress Ignored D2U",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1A",
> "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.EGRESS",
> "FCMask": "0x00000000",
> @@ -93,6 +104,7 @@
> },
> {
> "BriefDescription": "Cycles when Direct2UPI was Disabled : Non Cisgress D2U Ignored",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1A",
> "EventName": "UNC_M2HBM_DIRECT2UPI_NOT_TAKEN_DIRSTATE.NON_CISGRESS",
> "FCMask": "0x00000000",
> @@ -104,6 +116,7 @@
> },
> {
> "BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1c",
> "EventName": "UNC_M2HBM_DIRECT2UPI_TXN_OVERRIDE",
> "PerPkg": "1",
> @@ -112,6 +125,7 @@
> },
> {
> "BriefDescription": "Number of times a direct to UPI transaction was overridden.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1c",
> "EventName": "UNC_M2HBM_DIRECT2UPI_TXN_OVERRIDE.CISGRESS",
> "PerPkg": "1",
> @@ -120,6 +134,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_A",
> "PerPkg": "1",
> @@ -128,6 +143,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_I",
> "PerPkg": "1",
> @@ -136,6 +152,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_P",
> "PerPkg": "1",
> @@ -144,6 +161,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On NonDirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.CLEAN_S",
> "PerPkg": "1",
> @@ -152,6 +170,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_A",
> "PerPkg": "1",
> @@ -160,6 +179,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_I",
> "PerPkg": "1",
> @@ -168,6 +188,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_P",
> "PerPkg": "1",
> @@ -176,6 +197,7 @@
> },
> {
> "BriefDescription": "Directory Hit : On Dirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1d",
> "EventName": "UNC_M2HBM_DIRECTORY_HIT.DIRTY_S",
> "PerPkg": "1",
> @@ -184,6 +206,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.ANY",
> "PerPkg": "1",
> @@ -193,6 +216,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_A",
> "PerPkg": "1",
> @@ -202,6 +226,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_I",
> "PerPkg": "1",
> @@ -211,6 +236,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M2HBM_DIRECTORY_LOOKUP.STATE_S",
> "PerPkg": "1",
> @@ -220,6 +246,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_A",
> "PerPkg": "1",
> @@ -228,6 +255,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_I",
> "PerPkg": "1",
> @@ -236,6 +264,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_P",
> "PerPkg": "1",
> @@ -244,6 +273,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On NonDirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.CLEAN_S",
> "PerPkg": "1",
> @@ -252,6 +282,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in A State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_A",
> "PerPkg": "1",
> @@ -260,6 +291,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in I State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_I",
> "PerPkg": "1",
> @@ -268,6 +300,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in L State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_P",
> "PerPkg": "1",
> @@ -276,6 +309,7 @@
> },
> {
> "BriefDescription": "Directory Miss : On Dirty Line in S State",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1e",
> "EventName": "UNC_M2HBM_DIRECTORY_MISS.DIRTY_S",
> "PerPkg": "1",
> @@ -284,6 +318,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from A to I",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A2I",
> "PerPkg": "1",
> @@ -292,6 +327,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from A to S",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A2S",
> "PerPkg": "1",
> @@ -300,6 +336,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.ANY",
> "PerPkg": "1",
> @@ -308,6 +345,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_I_HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -319,6 +357,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_I_MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -330,6 +369,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_S_HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -341,6 +381,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.A_TO_S_MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -352,6 +393,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -363,6 +405,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from I to A",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I2A",
> "PerPkg": "1",
> @@ -371,6 +414,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from I to S",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I2S",
> "PerPkg": "1",
> @@ -379,6 +423,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_A_HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -390,6 +435,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_A_MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -401,6 +447,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_S_HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -412,6 +459,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.I_TO_S_MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -423,6 +471,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -434,6 +483,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from S to A",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S2A",
> "PerPkg": "1",
> @@ -442,6 +492,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory update from S to I",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S2I",
> "PerPkg": "1",
> @@ -450,6 +501,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_A_HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -461,6 +513,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_A_MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -472,6 +525,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_I_HIT_NON_PMM",
> "FCMask": "0x00000000",
> @@ -483,6 +537,7 @@
> },
> {
> "BriefDescription": "Multi-socket cacheline Directory Updates",
> + "Counter": "0,1,2,3",
> "EventCode": "0x21",
> "EventName": "UNC_M2HBM_DIRECTORY_UPDATE.S_TO_I_MISS_NON_PMM",
> "FCMask": "0x00000000",
> @@ -494,6 +549,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on AkAd cmp message",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.AD",
> "PerPkg": "1",
> @@ -502,6 +558,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on any packet type",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.ALL",
> "PerPkg": "1",
> @@ -510,6 +567,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on Bl Cmp message",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.BL_CMP",
> "PerPkg": "1",
> @@ -518,6 +576,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on NM fill write message",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.CROSSTILE_NMWR",
> "PerPkg": "1",
> @@ -526,6 +585,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on D2Cha message",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.D2CHA",
> "PerPkg": "1",
> @@ -534,6 +594,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on D2c message",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.D2CORE",
> "PerPkg": "1",
> @@ -542,6 +603,7 @@
> },
> {
> "BriefDescription": "Count distress signalled on D2k message",
> + "Counter": "0,1,2,3",
> "EventCode": "0x67",
> "EventName": "UNC_M2HBM_DISTRESS.D2UPI",
> "PerPkg": "1",
> @@ -550,6 +612,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Down",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M2HBM_EGRESS_ORDERING.IV_SNOOPGO_DN",
> "PerPkg": "1",
> @@ -559,6 +622,7 @@
> },
> {
> "BriefDescription": "Egress Blocking due to Ordering requirements : Up",
> + "Counter": "0,1,2,3",
> "EventCode": "0xba",
> "EventName": "UNC_M2HBM_EGRESS_ORDERING.IV_SNOOPGO_UP",
> "PerPkg": "1",
> @@ -568,6 +632,7 @@
> },
> {
> "BriefDescription": "Count when Starve Glocab counter is at 7",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M2HBM_IGR_STARVE_WINNER.MASK7",
> "FCMask": "0x00000000",
> @@ -578,6 +643,7 @@
> },
> {
> "BriefDescription": "Reads to iMC issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.ALL",
> "PerPkg": "1",
> @@ -586,6 +652,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH0.ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH0.ALL",
> "PerPkg": "1",
> @@ -594,6 +661,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH0.NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH0.NORMAL",
> "PerPkg": "1",
> @@ -602,6 +670,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH0_ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH0_ALL",
> "FCMask": "0x00000000",
> @@ -612,6 +681,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH0_FROM_TGR",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH0_FROM_TGR",
> "PerPkg": "1",
> @@ -620,6 +690,7 @@
> },
> {
> "BriefDescription": "Critical Priority - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH0_ISOCH",
> "PerPkg": "1",
> @@ -628,6 +699,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH0_NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH0_NORMAL",
> "FCMask": "0x00000000",
> @@ -638,6 +710,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH1.ALL",
> "PerPkg": "1",
> @@ -646,6 +719,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH1.NORMAL",
> "PerPkg": "1",
> @@ -654,6 +728,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH1_ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH1_ALL",
> "FCMask": "0x00000000",
> @@ -664,6 +739,7 @@
> },
> {
> "BriefDescription": "From TGR - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH1_FROM_TGR",
> "PerPkg": "1",
> @@ -672,6 +748,7 @@
> },
> {
> "BriefDescription": "Critical Priority - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH1_ISOCH",
> "PerPkg": "1",
> @@ -680,6 +757,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.CH1_NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.CH1_NORMAL",
> "FCMask": "0x00000000",
> @@ -690,6 +768,7 @@
> },
> {
> "BriefDescription": "From TGR - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.FROM_TGR",
> "PerPkg": "1",
> @@ -698,6 +777,7 @@
> },
> {
> "BriefDescription": "Critical Priority - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.ISOCH",
> "PerPkg": "1",
> @@ -706,6 +786,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_READS.NORMAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M2HBM_IMC_READS.NORMAL",
> "PerPkg": "1",
> @@ -714,6 +795,7 @@
> },
> {
> "BriefDescription": "All Writes - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.ALL",
> "PerPkg": "1",
> @@ -722,6 +804,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0.ALL",
> "PerPkg": "1",
> @@ -730,6 +813,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.FULL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0.FULL",
> "PerPkg": "1",
> @@ -738,6 +822,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0.PARTIAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0.PARTIAL",
> "PerPkg": "1",
> @@ -746,6 +831,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_ALL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_ALL",
> "FCMask": "0x00000000",
> @@ -756,6 +842,7 @@
> },
> {
> "BriefDescription": "From TGR - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_FROM_TGR",
> "PerPkg": "1",
> @@ -763,6 +850,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_FULL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_FULL",
> "FCMask": "0x00000000",
> @@ -773,6 +861,7 @@
> },
> {
> "BriefDescription": "ISOCH Full Line - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_FULL_ISOCH",
> "PerPkg": "1",
> @@ -781,6 +870,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_NI",
> "FCMask": "0x00000000",
> @@ -790,6 +880,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive Miss - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_NI_MISS",
> "FCMask": "0x00000000",
> @@ -799,6 +890,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL",
> "FCMask": "0x00000000",
> @@ -809,6 +901,7 @@
> },
> {
> "BriefDescription": "ISOCH Partial - Ch0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH0_PARTIAL_ISOCH",
> "PerPkg": "1",
> @@ -817,6 +910,7 @@
> },
> {
> "BriefDescription": "All Writes - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1.ALL",
> "PerPkg": "1",
> @@ -825,6 +919,7 @@
> },
> {
> "BriefDescription": "Full Line Non-ISOCH - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1.FULL",
> "PerPkg": "1",
> @@ -833,6 +928,7 @@
> },
> {
> "BriefDescription": "Partial Non-ISOCH - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1.PARTIAL",
> "PerPkg": "1",
> @@ -841,6 +937,7 @@
> },
> {
> "BriefDescription": "All Writes - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_ALL",
> "FCMask": "0x00000000",
> @@ -851,6 +948,7 @@
> },
> {
> "BriefDescription": "From TGR - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_FROM_TGR",
> "PerPkg": "1",
> @@ -858,6 +956,7 @@
> },
> {
> "BriefDescription": "Full Line Non-ISOCH - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_FULL",
> "FCMask": "0x00000000",
> @@ -868,6 +967,7 @@
> },
> {
> "BriefDescription": "ISOCH Full Line - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_FULL_ISOCH",
> "PerPkg": "1",
> @@ -876,6 +976,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_NI",
> "FCMask": "0x00000000",
> @@ -885,6 +986,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive Miss - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_NI_MISS",
> "FCMask": "0x00000000",
> @@ -894,6 +996,7 @@
> },
> {
> "BriefDescription": "Partial Non-ISOCH - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_PARTIAL",
> "FCMask": "0x00000000",
> @@ -904,6 +1007,7 @@
> },
> {
> "BriefDescription": "ISOCH Partial - Ch1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.CH1_PARTIAL_ISOCH",
> "PerPkg": "1",
> @@ -912,6 +1016,7 @@
> },
> {
> "BriefDescription": "From TGR - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.FROM_TGR",
> "PerPkg": "1",
> @@ -919,6 +1024,7 @@
> },
> {
> "BriefDescription": "Full Non-ISOCH - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.FULL",
> "PerPkg": "1",
> @@ -927,6 +1033,7 @@
> },
> {
> "BriefDescription": "ISOCH Full Line - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.FULL_ISOCH",
> "PerPkg": "1",
> @@ -935,6 +1042,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.NI",
> "FCMask": "0x00000000",
> @@ -944,6 +1052,7 @@
> },
> {
> "BriefDescription": "Non-Inclusive Miss - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.NI_MISS",
> "FCMask": "0x00000000",
> @@ -953,6 +1062,7 @@
> },
> {
> "BriefDescription": "Partial Non-ISOCH - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.PARTIAL",
> "PerPkg": "1",
> @@ -961,6 +1071,7 @@
> },
> {
> "BriefDescription": "ISOCH Partial - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x25",
> "EventName": "UNC_M2HBM_IMC_WRITES.PARTIAL_ISOCH",
> "PerPkg": "1",
> @@ -969,6 +1080,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_PREFCAM_CIS_DROPS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5c",
> "EventName": "UNC_M2HBM_PREFCAM_CIS_DROPS",
> "PerPkg": "1",
> @@ -976,6 +1088,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH0_UPI",
> "PerPkg": "1",
> @@ -984,6 +1097,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH0_XPT",
> "PerPkg": "1",
> @@ -992,6 +1106,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH1_UPI",
> "PerPkg": "1",
> @@ -1000,6 +1115,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.CH1_XPT",
> "PerPkg": "1",
> @@ -1008,6 +1124,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped : UPI - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.UPI_ALLCH",
> "PerPkg": "1",
> @@ -1016,6 +1133,7 @@
> },
> {
> "BriefDescription": "Data Prefetches Dropped",
> + "Counter": "0,1,2,3",
> "EventCode": "0x58",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_DROPS.XPT_ALLCH",
> "PerPkg": "1",
> @@ -1024,6 +1142,7 @@
> },
> {
> "BriefDescription": ": UPI - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_MERGE.UPI_ALLCH",
> "PerPkg": "1",
> @@ -1032,6 +1151,7 @@
> },
> {
> "BriefDescription": ": XPT - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5d",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_MERGE.XPT_ALLCH",
> "PerPkg": "1",
> @@ -1040,6 +1160,7 @@
> },
> {
> "BriefDescription": "Demands Not Merged with CAMed Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5e",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.RD_MERGED",
> "PerPkg": "1",
> @@ -1048,6 +1169,7 @@
> },
> {
> "BriefDescription": "Demands Not Merged with CAMed Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5e",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.WR_MERGED",
> "PerPkg": "1",
> @@ -1056,6 +1178,7 @@
> },
> {
> "BriefDescription": "Demands Not Merged with CAMed Prefetches",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5e",
> "EventName": "UNC_M2HBM_PREFCAM_DEMAND_NO_MERGE.WR_SQUASHED",
> "PerPkg": "1",
> @@ -1064,6 +1187,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH0_UPI",
> "PerPkg": "1",
> @@ -1072,6 +1196,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH0_XPT",
> "PerPkg": "1",
> @@ -1080,6 +1205,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH1_UPI",
> "PerPkg": "1",
> @@ -1088,6 +1214,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2HBM_PREFCAM_INSERTS.CH1_XPT",
> "PerPkg": "1",
> @@ -1096,6 +1223,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : UPI - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2HBM_PREFCAM_INSERTS.UPI_ALLCH",
> "PerPkg": "1",
> @@ -1104,6 +1232,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Inserts : XPT - All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x56",
> "EventName": "UNC_M2HBM_PREFCAM_INSERTS.XPT_ALLCH",
> "PerPkg": "1",
> @@ -1113,6 +1242,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Occupancy : All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.ALLCH",
> "PerPkg": "1",
> @@ -1121,6 +1251,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1129,6 +1260,7 @@
> },
> {
> "BriefDescription": "Prefetch CAM Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x54",
> "EventName": "UNC_M2HBM_PREFCAM_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1137,6 +1269,7 @@
> },
> {
> "BriefDescription": "All Channels",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.ALLCH",
> "PerPkg": "1",
> @@ -1145,6 +1278,7 @@
> },
> {
> "BriefDescription": ": Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.CH0",
> "PerPkg": "1",
> @@ -1153,6 +1287,7 @@
> },
> {
> "BriefDescription": ": Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x5f",
> "EventName": "UNC_M2HBM_PREFCAM_RESP_MISS.CH1",
> "PerPkg": "1",
> @@ -1161,6 +1296,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
> "PerPkg": "1",
> @@ -1169,6 +1305,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.CIS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.CIS",
> "PerPkg": "1",
> @@ -1177,6 +1314,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.SQUASHED",
> + "Counter": "0,1,2,3",
> "EventCode": "0x62",
> "EventName": "UNC_M2HBM_PREFCAM_RxC_DEALLOCS.SQUASHED",
> "PerPkg": "1",
> @@ -1185,6 +1323,7 @@
> },
> {
> "BriefDescription": "UNC_M2HBM_PREFCAM_RxC_OCCUPANCY",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "UNC_M2HBM_PREFCAM_RxC_OCCUPANCY",
> "FCMask": "0x00000000",
> @@ -1194,6 +1333,7 @@
> },
> {
> "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_M2HBM_RxC_AD.INSERTS",
> "FCMask": "0x00000000",
> @@ -1204,6 +1344,7 @@
> },
> {
> "BriefDescription": "AD Ingress (from CMS) : AD Ingress (from CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_M2HBM_RxC_AD_INSERTS",
> "PerPkg": "1",
> @@ -1212,6 +1353,7 @@
> },
> {
> "BriefDescription": "AD Ingress (from CMS) Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M2HBM_RxC_AD_OCCUPANCY",
> "PerPkg": "1",
> @@ -1219,6 +1361,7 @@
> },
> {
> "BriefDescription": "BL Ingress (from CMS) : BL Ingress (from CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_M2HBM_RxC_BL.INSERTS",
> "FCMask": "0x00000000",
> @@ -1230,6 +1373,7 @@
> },
> {
> "BriefDescription": "BL Ingress (from CMS) : BL Ingress (from CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_M2HBM_RxC_BL_INSERTS",
> "PerPkg": "1",
> @@ -1239,6 +1383,7 @@
> },
> {
> "BriefDescription": "BL Ingress (from CMS) Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M2HBM_RxC_BL_OCCUPANCY",
> "PerPkg": "1",
> @@ -1246,6 +1391,7 @@
> },
> {
> "BriefDescription": "Number AD Ingress Credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2e",
> "EventName": "UNC_M2HBM_TGR_AD_CREDITS",
> "PerPkg": "1",
> @@ -1253,6 +1399,7 @@
> },
> {
> "BriefDescription": "Number BL Ingress Credits",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_M2HBM_TGR_BL_CREDITS",
> "PerPkg": "1",
> @@ -1260,6 +1407,7 @@
> },
> {
> "BriefDescription": "Tracker Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2HBM_TRACKER_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1268,6 +1416,7 @@
> },
> {
> "BriefDescription": "Tracker Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x32",
> "EventName": "UNC_M2HBM_TRACKER_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1276,6 +1425,7 @@
> },
> {
> "BriefDescription": "Tracker Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2HBM_TRACKER_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1284,6 +1434,7 @@
> },
> {
> "BriefDescription": "Tracker Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x33",
> "EventName": "UNC_M2HBM_TRACKER_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1292,6 +1443,7 @@
> },
> {
> "BriefDescription": "AD Egress (to CMS) : AD Egress (to CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M2HBM_TxC_AD.INSERTS",
> "FCMask": "0x00000000",
> @@ -1303,6 +1455,7 @@
> },
> {
> "BriefDescription": "AD Egress (to CMS) : AD Egress (to CMS) Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M2HBM_TxC_AD_INSERTS",
> "PerPkg": "1",
> @@ -1312,6 +1465,7 @@
> },
> {
> "BriefDescription": "AD Egress (to CMS) Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x07",
> "EventName": "UNC_M2HBM_TxC_AD_OCCUPANCY",
> "PerPkg": "1",
> @@ -1319,6 +1473,7 @@
> },
> {
> "BriefDescription": "BL Egress (to CMS) : Inserts - CMS0 - Near Side",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0E",
> "EventName": "UNC_M2HBM_TxC_BL.INSERTS_CMS0",
> "FCMask": "0x00000000",
> @@ -1330,6 +1485,7 @@
> },
> {
> "BriefDescription": "BL Egress (to CMS) : Inserts - CMS1 - Far Side",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0E",
> "EventName": "UNC_M2HBM_TxC_BL.INSERTS_CMS1",
> "FCMask": "0x00000000",
> @@ -1341,6 +1497,7 @@
> },
> {
> "BriefDescription": "BL Egress (to CMS) Occupancy : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0f",
> "EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.ALL",
> "PerPkg": "1",
> @@ -1349,6 +1506,7 @@
> },
> {
> "BriefDescription": "BL Egress (to CMS) Occupancy : Common Mesh Stop - Near Side",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0f",
> "EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.CMS0",
> "PerPkg": "1",
> @@ -1357,6 +1515,7 @@
> },
> {
> "BriefDescription": "BL Egress (to CMS) Occupancy : Common Mesh Stop - Far Side",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0f",
> "EventName": "UNC_M2HBM_TxC_BL_OCCUPANCY.CMS1",
> "PerPkg": "1",
> @@ -1365,6 +1524,7 @@
> },
> {
> "BriefDescription": "WPQ Flush : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2HBM_WPQ_FLUSH.CH0",
> "PerPkg": "1",
> @@ -1373,6 +1533,7 @@
> },
> {
> "BriefDescription": "WPQ Flush : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_M2HBM_WPQ_FLUSH.CH1",
> "PerPkg": "1",
> @@ -1381,6 +1542,7 @@
> },
> {
> "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Regular : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_M2HBM_WPQ_NO_REG_CRD.CHN0",
> "PerPkg": "1",
> @@ -1389,6 +1551,7 @@
> },
> {
> "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Regular : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_M2HBM_WPQ_NO_REG_CRD.CHN1",
> "PerPkg": "1",
> @@ -1397,6 +1560,7 @@
> },
> {
> "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Special : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x38",
> "EventName": "UNC_M2HBM_WPQ_NO_SPEC_CRD.CHN0",
> "PerPkg": "1",
> @@ -1405,6 +1569,7 @@
> },
> {
> "BriefDescription": "M2M and iMC WPQ Cycles w/Credits - Special : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x38",
> "EventName": "UNC_M2HBM_WPQ_NO_SPEC_CRD.CHN1",
> "PerPkg": "1",
> @@ -1413,6 +1578,7 @@
> },
> {
> "BriefDescription": "Write Tracker Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2HBM_WR_TRACKER_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1421,6 +1587,7 @@
> },
> {
> "BriefDescription": "Write Tracker Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x40",
> "EventName": "UNC_M2HBM_WR_TRACKER_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1429,6 +1596,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1437,6 +1605,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4d",
> "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1445,6 +1614,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1453,6 +1623,7 @@
> },
> {
> "BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4c",
> "EventName": "UNC_M2HBM_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1461,6 +1632,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Inserts : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_INSERTS.CH0",
> "PerPkg": "1",
> @@ -1469,6 +1641,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Inserts : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x48",
> "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_INSERTS.CH1",
> "PerPkg": "1",
> @@ -1477,6 +1650,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Occupancy : Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_OCCUPANCY.CH0",
> "PerPkg": "1",
> @@ -1485,6 +1659,7 @@
> },
> {
> "BriefDescription": "Write Tracker Posted Occupancy : Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M2HBM_WR_TRACKER_POSTED_OCCUPANCY.CH1",
> "PerPkg": "1",
> @@ -1493,6 +1668,7 @@
> },
> {
> "BriefDescription": "Activate due to read, write, underfill, or bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.ALL",
> "PerPkg": "1",
> @@ -1502,6 +1678,7 @@
> },
> {
> "BriefDescription": "Activate due to read",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.RD",
> "PerPkg": "1",
> @@ -1511,6 +1688,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count : Activate due to Read in PCH0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.RD_PCH0",
> "PerPkg": "1",
> @@ -1520,6 +1698,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count : Activate due to Read in PCH1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.RD_PCH1",
> "PerPkg": "1",
> @@ -1529,6 +1708,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count : Underfill Read transaction on Page Empty or Page Miss",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.UFILL",
> "PerPkg": "1",
> @@ -1538,6 +1718,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.UFILL_PCH0",
> "PerPkg": "1",
> @@ -1547,6 +1728,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.UFILL_PCH1",
> "PerPkg": "1",
> @@ -1556,6 +1738,7 @@
> },
> {
> "BriefDescription": "Activate due to write",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.WR",
> "PerPkg": "1",
> @@ -1565,6 +1748,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count : Activate due to Write in PCH0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.WR_PCH0",
> "PerPkg": "1",
> @@ -1574,6 +1758,7 @@
> },
> {
> "BriefDescription": "HBM Activate Count : Activate due to Write in PCH1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_MCHBM_ACT_COUNT.WR_PCH1",
> "PerPkg": "1",
> @@ -1583,6 +1768,7 @@
> },
> {
> "BriefDescription": "All CAS commands issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.ALL",
> "PerPkg": "1",
> @@ -1591,6 +1777,7 @@
> },
> {
> "BriefDescription": "Pseudo Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.PCH0",
> "PerPkg": "1",
> @@ -1600,6 +1787,7 @@
> },
> {
> "BriefDescription": "Pseudo Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.PCH1",
> "PerPkg": "1",
> @@ -1609,6 +1797,7 @@
> },
> {
> "BriefDescription": "Read CAS commands issued (regular and underfill)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.RD",
> "PerPkg": "1",
> @@ -1617,6 +1806,7 @@
> },
> {
> "BriefDescription": "Regular read CAS commands with precharge",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.RD_PRE_REG",
> "PerPkg": "1",
> @@ -1625,6 +1815,7 @@
> },
> {
> "BriefDescription": "Underfill read CAS commands with precharge",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.RD_PRE_UNDERFILL",
> "PerPkg": "1",
> @@ -1633,6 +1824,7 @@
> },
> {
> "BriefDescription": "Regular read CAS commands issued (does not include underfills)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.RD_REG",
> "PerPkg": "1",
> @@ -1641,6 +1833,7 @@
> },
> {
> "BriefDescription": "Underfill read CAS commands issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.RD_UNDERFILL",
> "PerPkg": "1",
> @@ -1649,6 +1842,7 @@
> },
> {
> "BriefDescription": "Write CAS commands issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.WR",
> "PerPkg": "1",
> @@ -1657,6 +1851,7 @@
> },
> {
> "BriefDescription": "HBM RD_CAS and WR_CAS Commands. : HBM WR_CAS commands w/o auto-pre",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.WR_NONPRE",
> "PerPkg": "1",
> @@ -1665,6 +1860,7 @@
> },
> {
> "BriefDescription": "Write CAS commands with precharge",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_MCHBM_CAS_COUNT.WR_PRE",
> "PerPkg": "1",
> @@ -1673,6 +1869,7 @@
> },
> {
> "BriefDescription": "Pseudo Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.PCH0",
> "PerPkg": "1",
> @@ -1681,6 +1878,7 @@
> },
> {
> "BriefDescription": "Pseudo Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.PCH1",
> "PerPkg": "1",
> @@ -1689,6 +1887,7 @@
> },
> {
> "BriefDescription": "Read CAS Command in Interleaved Mode (32B)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_32B",
> "PerPkg": "1",
> @@ -1697,6 +1896,7 @@
> },
> {
> "BriefDescription": "Read CAS Command in Regular Mode (64B) in Pseudochannel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_64B",
> "PerPkg": "1",
> @@ -1705,6 +1905,7 @@
> },
> {
> "BriefDescription": "Underfill Read CAS Command in Interleaved Mode (32B)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_UFILL_32B",
> "PerPkg": "1",
> @@ -1713,6 +1914,7 @@
> },
> {
> "BriefDescription": "Underfill Read CAS Command in Regular Mode (64B) in Pseudochannel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.RD_UFILL_64B",
> "PerPkg": "1",
> @@ -1721,6 +1923,7 @@
> },
> {
> "BriefDescription": "Write CAS Command in Interleaved Mode (32B)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.WR_32B",
> "PerPkg": "1",
> @@ -1729,6 +1932,7 @@
> },
> {
> "BriefDescription": "Write CAS Command in Regular Mode (64B) in Pseudochannel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_MCHBM_CAS_ISSUED_REQ_LEN.WR_64B",
> "PerPkg": "1",
> @@ -1737,6 +1941,7 @@
> },
> {
> "BriefDescription": "IMC Clockticks at DCLK frequency",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_MCHBM_CLOCKTICKS",
> "PerPkg": "1",
> @@ -1745,6 +1950,7 @@
> },
> {
> "BriefDescription": "HBM Precharge All Commands",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_MCHBM_HBM_PREALL.PCH0",
> "PerPkg": "1",
> @@ -1754,6 +1960,7 @@
> },
> {
> "BriefDescription": "HBM Precharge All Commands",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_MCHBM_HBM_PREALL.PCH1",
> "PerPkg": "1",
> @@ -1763,6 +1970,7 @@
> },
> {
> "BriefDescription": "All Precharge Commands",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_MCHBM_HBM_PRE_ALL",
> "PerPkg": "1",
> @@ -1772,6 +1980,7 @@
> },
> {
> "BriefDescription": "IMC Clockticks at HCLK frequency",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_MCHBM_HCLOCKTICKS",
> "PerPkg": "1",
> @@ -1779,6 +1988,7 @@
> },
> {
> "BriefDescription": "All precharge events",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.ALL",
> "PerPkg": "1",
> @@ -1788,6 +1998,7 @@
> },
> {
> "BriefDescription": "Precharge from MC page table",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.PGT",
> "PerPkg": "1",
> @@ -1797,6 +2008,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands. : Precharges from Page Table",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.PGT_PCH0",
> "PerPkg": "1",
> @@ -1806,6 +2018,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.PGT_PCH1",
> "PerPkg": "1",
> @@ -1815,6 +2028,7 @@
> },
> {
> "BriefDescription": "Precharge due to read on page miss",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.RD",
> "PerPkg": "1",
> @@ -1824,6 +2038,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands. : Precharge due to read",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.RD_PCH0",
> "PerPkg": "1",
> @@ -1833,6 +2048,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.RD_PCH1",
> "PerPkg": "1",
> @@ -1842,6 +2058,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.UFILL",
> "PerPkg": "1",
> @@ -1851,6 +2068,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.UFILL_PCH0",
> "PerPkg": "1",
> @@ -1860,6 +2078,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.UFILL_PCH1",
> "PerPkg": "1",
> @@ -1869,6 +2088,7 @@
> },
> {
> "BriefDescription": "Precharge due to write on page miss",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.WR",
> "PerPkg": "1",
> @@ -1878,6 +2098,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands. : Precharge due to write",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.WR_PCH0",
> "PerPkg": "1",
> @@ -1887,6 +2108,7 @@
> },
> {
> "BriefDescription": "HBM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_MCHBM_PRE_COUNT.WR_PCH1",
> "PerPkg": "1",
> @@ -1896,6 +2118,7 @@
> },
> {
> "BriefDescription": "Counts the number of cycles where the read buffer has greater than UMASK elements. NOTE: Umask must be set to the maximum number of elements in the queue (24 entries for SPR).",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_MCHBM_RDB_FULL",
> "PerPkg": "1",
> @@ -1903,6 +2126,7 @@
> },
> {
> "BriefDescription": "Counts the number of inserts into the read buffer.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_MCHBM_RDB_INSERTS",
> "PerPkg": "1",
> @@ -1911,6 +2135,7 @@
> },
> {
> "BriefDescription": "Read Data Buffer Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_MCHBM_RDB_INSERTS.PCH0",
> "PerPkg": "1",
> @@ -1919,6 +2144,7 @@
> },
> {
> "BriefDescription": "Read Data Buffer Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_MCHBM_RDB_INSERTS.PCH1",
> "PerPkg": "1",
> @@ -1927,6 +2153,7 @@
> },
> {
> "BriefDescription": "Counts the number of elements in the read buffer per cycle.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_MCHBM_RDB_OCCUPANCY",
> "PerPkg": "1",
> @@ -1934,6 +2161,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_MCHBM_RPQ_INSERTS.PCH0",
> "PerPkg": "1",
> @@ -1943,6 +2171,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_MCHBM_RPQ_INSERTS.PCH1",
> "PerPkg": "1",
> @@ -1952,6 +2181,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x80",
> "EventName": "UNC_MCHBM_RPQ_OCCUPANCY_PCH0",
> "PerPkg": "1",
> @@ -1960,6 +2190,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x81",
> "EventName": "UNC_MCHBM_RPQ_OCCUPANCY_PCH1",
> "PerPkg": "1",
> @@ -1968,6 +2199,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_MCHBM_WPQ_INSERTS.PCH0",
> "PerPkg": "1",
> @@ -1977,6 +2209,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_MCHBM_WPQ_INSERTS.PCH1",
> "PerPkg": "1",
> @@ -1986,6 +2219,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x82",
> "EventName": "UNC_MCHBM_WPQ_OCCUPANCY_PCH0",
> "PerPkg": "1",
> @@ -1994,6 +2228,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x83",
> "EventName": "UNC_MCHBM_WPQ_OCCUPANCY_PCH1",
> "PerPkg": "1",
> @@ -2002,6 +2237,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_MCHBM_WPQ_READ_HIT",
> "FCMask": "0x00000000",
> @@ -2012,6 +2248,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_MCHBM_WPQ_READ_HIT.PCH0",
> "PerPkg": "1",
> @@ -2021,6 +2258,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_MCHBM_WPQ_READ_HIT.PCH1",
> "PerPkg": "1",
> @@ -2030,6 +2268,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_MCHBM_WPQ_WRITE_HIT",
> "FCMask": "0x00000000",
> @@ -2040,6 +2279,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_MCHBM_WPQ_WRITE_HIT.PCH0",
> "PerPkg": "1",
> @@ -2049,6 +2289,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_MCHBM_WPQ_WRITE_HIT.PCH1",
> "PerPkg": "1",
> @@ -2058,6 +2299,7 @@
> },
> {
> "BriefDescription": "Activate due to read, write, underfill, or bypass",
> + "Counter": "0,1,2,3",
> "EventCode": "0x02",
> "EventName": "UNC_M_ACT_COUNT.ALL",
> "PerPkg": "1",
> @@ -2067,6 +2309,7 @@
> },
> {
> "BriefDescription": "All DRAM CAS commands issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.ALL",
> "PerPkg": "1",
> @@ -2076,6 +2319,7 @@
> },
> {
> "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.PCH0",
> "PerPkg": "1",
> @@ -2085,6 +2329,7 @@
> },
> {
> "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : Pseudo Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.PCH1",
> "PerPkg": "1",
> @@ -2094,6 +2339,7 @@
> },
> {
> "BriefDescription": "All DRAM read CAS commands issued (including underfills)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.RD",
> "PerPkg": "1",
> @@ -2103,6 +2349,7 @@
> },
> {
> "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.RD_PRE_REG",
> "PerPkg": "1",
> @@ -2112,6 +2359,7 @@
> },
> {
> "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL",
> "PerPkg": "1",
> @@ -2121,6 +2369,7 @@
> },
> {
> "BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.RD_REG",
> "PerPkg": "1",
> @@ -2130,6 +2379,7 @@
> },
> {
> "BriefDescription": "DRAM underfill read CAS commands issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
> "PerPkg": "1",
> @@ -2139,6 +2389,7 @@
> },
> {
> "BriefDescription": "All DRAM write CAS commands issued",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.WR",
> "PerPkg": "1",
> @@ -2148,6 +2399,7 @@
> },
> {
> "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.WR_NONPRE",
> "PerPkg": "1",
> @@ -2157,6 +2409,7 @@
> },
> {
> "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_M_CAS_COUNT.WR_PRE",
> "PerPkg": "1",
> @@ -2166,6 +2419,7 @@
> },
> {
> "BriefDescription": "Pseudo Channel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.PCH0",
> "PerPkg": "1",
> @@ -2174,6 +2428,7 @@
> },
> {
> "BriefDescription": "Pseudo Channel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.PCH1",
> "PerPkg": "1",
> @@ -2182,6 +2437,7 @@
> },
> {
> "BriefDescription": "Read CAS Command in Interleaved Mode (32B)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_32B",
> "PerPkg": "1",
> @@ -2190,6 +2446,7 @@
> },
> {
> "BriefDescription": "Read CAS Command in Regular Mode (64B) in Pseudochannel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_64B",
> "PerPkg": "1",
> @@ -2198,6 +2455,7 @@
> },
> {
> "BriefDescription": "Underfill Read CAS Command in Interleaved Mode (32B)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_UFILL_32B",
> "PerPkg": "1",
> @@ -2206,6 +2464,7 @@
> },
> {
> "BriefDescription": "Underfill Read CAS Command in Regular Mode (64B) in Pseudochannel 1",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.RD_UFILL_64B",
> "PerPkg": "1",
> @@ -2214,6 +2473,7 @@
> },
> {
> "BriefDescription": "Write CAS Command in Interleaved Mode (32B)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.WR_32B",
> "PerPkg": "1",
> @@ -2222,6 +2482,7 @@
> },
> {
> "BriefDescription": "Write CAS Command in Regular Mode (64B) in Pseudochannel 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x06",
> "EventName": "UNC_M_CAS_ISSUED_REQ_LEN.WR_64B",
> "PerPkg": "1",
> @@ -2230,6 +2491,7 @@
> },
> {
> "BriefDescription": "IMC Clockticks at DCLK frequency",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_M_CLOCKTICKS",
> "PerPkg": "1",
> @@ -2239,6 +2501,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge All Commands",
> + "Counter": "0,1,2,3",
> "EventCode": "0x44",
> "EventName": "UNC_M_DRAM_PRE_ALL",
> "PerPkg": "1",
> @@ -2248,6 +2511,7 @@
> },
> {
> "BriefDescription": "IMC Clockticks at HCLK frequency",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_M_HCLOCKTICKS",
> "PerPkg": "1",
> @@ -2256,6 +2520,7 @@
> },
> {
> "BriefDescription": "UNC_M_PCLS.RD",
> + "Counter": "0,1,2,3",
> "EventCode": "0xa0",
> "EventName": "UNC_M_PCLS.RD",
> "PerPkg": "1",
> @@ -2264,6 +2529,7 @@
> },
> {
> "BriefDescription": "UNC_M_PCLS.TOTAL",
> + "Counter": "0,1,2,3",
> "EventCode": "0xa0",
> "EventName": "UNC_M_PCLS.TOTAL",
> "PerPkg": "1",
> @@ -2272,6 +2538,7 @@
> },
> {
> "BriefDescription": "UNC_M_PCLS.WR",
> + "Counter": "0,1,2,3",
> "EventCode": "0xa0",
> "EventName": "UNC_M_PCLS.WR",
> "PerPkg": "1",
> @@ -2280,6 +2547,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe3",
> "EventName": "UNC_M_PMM_RPQ_INSERTS",
> "PerPkg": "1",
> @@ -2288,6 +2556,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe0",
> "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH0",
> "PerPkg": "1",
> @@ -2297,6 +2566,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe0",
> "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL_SCH1",
> "PerPkg": "1",
> @@ -2306,6 +2576,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xE0",
> "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH0",
> "PerPkg": "1",
> @@ -2315,6 +2586,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xE0",
> "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT_SCH1",
> "PerPkg": "1",
> @@ -2324,6 +2596,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe0",
> "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH0",
> "PerPkg": "1",
> @@ -2333,6 +2606,7 @@
> },
> {
> "BriefDescription": "PMM Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe0",
> "EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT_SCH1",
> "PerPkg": "1",
> @@ -2342,6 +2616,7 @@
> },
> {
> "BriefDescription": "PMM (for IXP) Write Queue Cycles Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe5",
> "EventName": "UNC_M_PMM_WPQ_CYCLES_NE",
> "PerPkg": "1",
> @@ -2349,6 +2624,7 @@
> },
> {
> "BriefDescription": "PMM Write Pending Queue inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe7",
> "EventName": "UNC_M_PMM_WPQ_INSERTS",
> "PerPkg": "1",
> @@ -2357,6 +2633,7 @@
> },
> {
> "BriefDescription": "PMM Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe4",
> "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL",
> "PerPkg": "1",
> @@ -2366,6 +2643,7 @@
> },
> {
> "BriefDescription": "PMM Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xE4",
> "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH0",
> "PerPkg": "1",
> @@ -2375,6 +2653,7 @@
> },
> {
> "BriefDescription": "PMM Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xE4",
> "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL_SCH1",
> "PerPkg": "1",
> @@ -2384,6 +2663,7 @@
> },
> {
> "BriefDescription": "PMM (for IXP) Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe4",
> "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.CAS",
> "PerPkg": "1",
> @@ -2393,6 +2673,7 @@
> },
> {
> "BriefDescription": "PMM (for IXP) Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0xe4",
> "EventName": "UNC_M_PMM_WPQ_OCCUPANCY.PWR",
> "PerPkg": "1",
> @@ -2402,6 +2683,7 @@
> },
> {
> "BriefDescription": "Channel PPD Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x85",
> "EventName": "UNC_M_POWER_CHANNEL_PPD",
> "PerPkg": "1",
> @@ -2410,6 +2692,7 @@
> },
> {
> "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_0",
> "PerPkg": "1",
> @@ -2419,6 +2702,7 @@
> },
> {
> "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_1",
> "PerPkg": "1",
> @@ -2428,6 +2712,7 @@
> },
> {
> "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_2",
> "PerPkg": "1",
> @@ -2437,6 +2722,7 @@
> },
> {
> "BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
> + "Counter": "0,1,2,3",
> "EventCode": "0x47",
> "EventName": "UNC_M_POWER_CKE_CYCLES.LOW_3",
> "PerPkg": "1",
> @@ -2446,6 +2732,7 @@
> },
> {
> "BriefDescription": "Throttle Cycles for Rank 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT0",
> "PerPkg": "1",
> @@ -2455,6 +2742,7 @@
> },
> {
> "BriefDescription": "Throttle Cycles for Rank 0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x86",
> "EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT1",
> "PerPkg": "1",
> @@ -2464,6 +2752,7 @@
> },
> {
> "BriefDescription": "Clock-Enabled Self-Refresh",
> + "Counter": "0,1,2,3",
> "EventCode": "0x43",
> "EventName": "UNC_M_POWER_SELF_REFRESH",
> "PerPkg": "1",
> @@ -2472,6 +2761,7 @@
> },
> {
> "BriefDescription": "Precharge due to read, write, underfill, or PGT.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.ALL",
> "PerPkg": "1",
> @@ -2481,6 +2771,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.PGT",
> "PerPkg": "1",
> @@ -2490,6 +2781,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands. : Precharges from Page Table",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.PGT_PCH0",
> "PerPkg": "1",
> @@ -2499,6 +2791,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.PGT_PCH1",
> "PerPkg": "1",
> @@ -2508,6 +2801,7 @@
> },
> {
> "BriefDescription": "Precharge due to read on page miss",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.RD",
> "PerPkg": "1",
> @@ -2517,6 +2811,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands. : Precharge due to read",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.RD_PCH0",
> "PerPkg": "1",
> @@ -2526,6 +2821,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.RD_PCH1",
> "PerPkg": "1",
> @@ -2535,6 +2831,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.UFILL",
> "PerPkg": "1",
> @@ -2544,6 +2841,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.UFILL_PCH0",
> "PerPkg": "1",
> @@ -2553,6 +2851,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.UFILL_PCH1",
> "PerPkg": "1",
> @@ -2562,6 +2861,7 @@
> },
> {
> "BriefDescription": "Precharge due to write on page miss",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.WR",
> "PerPkg": "1",
> @@ -2571,6 +2871,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands. : Precharge due to write",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.WR_PCH0",
> "PerPkg": "1",
> @@ -2580,6 +2881,7 @@
> },
> {
> "BriefDescription": "DRAM Precharge commands.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x03",
> "EventName": "UNC_M_PRE_COUNT.WR_PCH1",
> "PerPkg": "1",
> @@ -2589,6 +2891,7 @@
> },
> {
> "BriefDescription": "Counts the number of cycles where the read buffer has greater than UMASK elements. This includes reads to both DDR and PMEM. NOTE: Umask must be set to the maximum number of elements in the queue (24 entries for SPR).",
> + "Counter": "0,1,2,3",
> "EventCode": "0x19",
> "EventName": "UNC_M_RDB_FULL",
> "PerPkg": "1",
> @@ -2596,6 +2899,7 @@
> },
> {
> "BriefDescription": "Counts the number of inserts into the read buffer destined for DDR. Does not count reads destined for PMEM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M_RDB_INSERTS",
> "PerPkg": "1",
> @@ -2604,6 +2908,7 @@
> },
> {
> "BriefDescription": "Read Data Buffer Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M_RDB_INSERTS.PCH0",
> "PerPkg": "1",
> @@ -2612,6 +2917,7 @@
> },
> {
> "BriefDescription": "Read Data Buffer Inserts",
> + "Counter": "0,1,2,3",
> "EventCode": "0x17",
> "EventName": "UNC_M_RDB_INSERTS.PCH1",
> "PerPkg": "1",
> @@ -2620,6 +2926,7 @@
> },
> {
> "BriefDescription": "Counts the number of cycles where there's at least one element in the read buffer. This includes reads to both DDR and PMEM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M_RDB_NE",
> "PerPkg": "1",
> @@ -2628,6 +2935,7 @@
> },
> {
> "BriefDescription": "Read Data Buffer Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M_RDB_NE.PCH0",
> "PerPkg": "1",
> @@ -2636,6 +2944,7 @@
> },
> {
> "BriefDescription": "Read Data Buffer Not Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M_RDB_NE.PCH1",
> "PerPkg": "1",
> @@ -2644,6 +2953,7 @@
> },
> {
> "BriefDescription": "Counts the number of cycles where there's at least one element in the read buffer. This includes reads to both DDR and PMEM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x18",
> "EventName": "UNC_M_RDB_NOT_EMPTY",
> "PerPkg": "1",
> @@ -2652,6 +2962,7 @@
> },
> {
> "BriefDescription": "Counts the number of elements in the read buffer, including reads to both DDR and PMEM.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x1a",
> "EventName": "UNC_M_RDB_OCCUPANCY",
> "PerPkg": "1",
> @@ -2659,6 +2970,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M_RPQ_INSERTS.PCH0",
> "PerPkg": "1",
> @@ -2668,6 +2980,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x10",
> "EventName": "UNC_M_RPQ_INSERTS.PCH1",
> "PerPkg": "1",
> @@ -2677,6 +2990,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x80",
> "EventName": "UNC_M_RPQ_OCCUPANCY_PCH0",
> "PerPkg": "1",
> @@ -2685,6 +2999,7 @@
> },
> {
> "BriefDescription": "Read Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x81",
> "EventName": "UNC_M_RPQ_OCCUPANCY_PCH1",
> "PerPkg": "1",
> @@ -2693,6 +3008,7 @@
> },
> {
> "BriefDescription": "Scoreboard accepts",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.ACCEPTS",
> "PerPkg": "1",
> @@ -2701,6 +3017,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : Write Accepts",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.FM_RD_CMPS",
> "PerPkg": "1",
> @@ -2709,6 +3026,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : Write Rejects",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.FM_WR_CMPS",
> "PerPkg": "1",
> @@ -2717,6 +3035,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : FM read completions",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.NM_RD_CMPS",
> "PerPkg": "1",
> @@ -2725,6 +3044,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : FM write completions",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.NM_WR_CMPS",
> "PerPkg": "1",
> @@ -2733,6 +3053,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : Read Accepts",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.RD_ACCEPTS",
> "PerPkg": "1",
> @@ -2741,6 +3062,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : Read Rejects",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.RD_REJECTS",
> "PerPkg": "1",
> @@ -2749,6 +3071,7 @@
> },
> {
> "BriefDescription": "Scoreboard rejects",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.REJECTS",
> "PerPkg": "1",
> @@ -2757,6 +3080,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : NM read completions",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.WR_ACCEPTS",
> "PerPkg": "1",
> @@ -2765,6 +3089,7 @@
> },
> {
> "BriefDescription": "Scoreboard Accesses : NM write completions",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd2",
> "EventName": "UNC_M_SB_ACCESSES.WR_REJECTS",
> "PerPkg": "1",
> @@ -2773,6 +3098,7 @@
> },
> {
> "BriefDescription": ": Alloc",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.ALLOC",
> "PerPkg": "1",
> @@ -2781,6 +3107,7 @@
> },
> {
> "BriefDescription": ": Dealloc",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.DEALLOC",
> "PerPkg": "1",
> @@ -2789,6 +3116,7 @@
> },
> {
> "BriefDescription": ": Near Mem Write Starved",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.FM_RD_STARVED",
> "PerPkg": "1",
> @@ -2797,6 +3125,7 @@
> },
> {
> "BriefDescription": ": Far Mem Write Starved",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.FM_TGR_WR_STARVED",
> "PerPkg": "1",
> @@ -2805,6 +3134,7 @@
> },
> {
> "BriefDescription": ": Far Mem Read Starved",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.FM_WR_STARVED",
> "PerPkg": "1",
> @@ -2813,6 +3143,7 @@
> },
> {
> "BriefDescription": ": Valid",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.NM_RD_STARVED",
> "PerPkg": "1",
> @@ -2821,6 +3152,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read Starved",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.NM_WR_STARVED",
> "PerPkg": "1",
> @@ -2829,6 +3161,7 @@
> },
> {
> "BriefDescription": ": Reject",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd9",
> "EventName": "UNC_M_SB_CANARY.VLD",
> "PerPkg": "1",
> @@ -2837,6 +3170,7 @@
> },
> {
> "BriefDescription": "Scoreboard Cycles Full",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd1",
> "EventName": "UNC_M_SB_CYCLES_FULL",
> "PerPkg": "1",
> @@ -2844,6 +3178,7 @@
> },
> {
> "BriefDescription": "Scoreboard Cycles Not-Empty",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd0",
> "EventName": "UNC_M_SB_CYCLES_NE",
> "PerPkg": "1",
> @@ -2851,6 +3186,7 @@
> },
> {
> "BriefDescription": "Scoreboard Inserts : Block region reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd6",
> "EventName": "UNC_M_SB_INSERTS.BLOCK_RDS",
> "PerPkg": "1",
> @@ -2859,6 +3195,7 @@
> },
> {
> "BriefDescription": "Scoreboard Inserts : Block region writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd6",
> "EventName": "UNC_M_SB_INSERTS.BLOCK_WRS",
> "PerPkg": "1",
> @@ -2867,6 +3204,7 @@
> },
> {
> "BriefDescription": "Scoreboard Inserts : Persistent Mem reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd6",
> "EventName": "UNC_M_SB_INSERTS.PMM_RDS",
> "PerPkg": "1",
> @@ -2875,6 +3213,7 @@
> },
> {
> "BriefDescription": "Scoreboard Inserts : Persistent Mem writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd6",
> "EventName": "UNC_M_SB_INSERTS.PMM_WRS",
> "PerPkg": "1",
> @@ -2883,6 +3222,7 @@
> },
> {
> "BriefDescription": "Scoreboard Inserts : Reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd6",
> "EventName": "UNC_M_SB_INSERTS.RDS",
> "PerPkg": "1",
> @@ -2891,6 +3231,7 @@
> },
> {
> "BriefDescription": "Scoreboard Inserts : Writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd6",
> "EventName": "UNC_M_SB_INSERTS.WRS",
> "PerPkg": "1",
> @@ -2899,6 +3240,7 @@
> },
> {
> "BriefDescription": "Scoreboard Occupancy : Block region reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_M_SB_OCCUPANCY.BLOCK_RDS",
> "PerPkg": "1",
> @@ -2907,6 +3249,7 @@
> },
> {
> "BriefDescription": "Scoreboard Occupancy : Block region writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_M_SB_OCCUPANCY.BLOCK_WRS",
> "PerPkg": "1",
> @@ -2915,6 +3258,7 @@
> },
> {
> "BriefDescription": "Scoreboard Occupancy : Persistent Mem reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_M_SB_OCCUPANCY.PMM_RDS",
> "PerPkg": "1",
> @@ -2923,6 +3267,7 @@
> },
> {
> "BriefDescription": "Scoreboard Occupancy : Persistent Mem writes",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_M_SB_OCCUPANCY.PMM_WRS",
> "PerPkg": "1",
> @@ -2931,6 +3276,7 @@
> },
> {
> "BriefDescription": "Scoreboard Occupancy : Reads",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd5",
> "EventName": "UNC_M_SB_OCCUPANCY.RDS",
> "PerPkg": "1",
> @@ -2939,6 +3285,7 @@
> },
> {
> "BriefDescription": "Scoreboard Prefetch Inserts : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0xda",
> "EventName": "UNC_M_SB_PREF_INSERTS.ALL",
> "PerPkg": "1",
> @@ -2947,6 +3294,7 @@
> },
> {
> "BriefDescription": "Scoreboard Prefetch Inserts : DDR4",
> + "Counter": "0,1,2,3",
> "EventCode": "0xda",
> "EventName": "UNC_M_SB_PREF_INSERTS.DDR",
> "PerPkg": "1",
> @@ -2955,6 +3303,7 @@
> },
> {
> "BriefDescription": "Scoreboard Prefetch Inserts : PMM",
> + "Counter": "0,1,2,3",
> "EventCode": "0xda",
> "EventName": "UNC_M_SB_PREF_INSERTS.PMM",
> "PerPkg": "1",
> @@ -2963,6 +3312,7 @@
> },
> {
> "BriefDescription": "Scoreboard Prefetch Occupancy : All",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdb",
> "EventName": "UNC_M_SB_PREF_OCCUPANCY.ALL",
> "PerPkg": "1",
> @@ -2971,6 +3321,7 @@
> },
> {
> "BriefDescription": "Scoreboard Prefetch Occupancy : DDR4",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdb",
> "EventName": "UNC_M_SB_PREF_OCCUPANCY.DDR",
> "PerPkg": "1",
> @@ -2979,6 +3330,7 @@
> },
> {
> "BriefDescription": "Scoreboard Prefetch Occupancy : Persistent Mem",
> + "Counter": "0,1,2,3",
> "EventCode": "0xDB",
> "EventName": "UNC_M_SB_PREF_OCCUPANCY.PMM",
> "FCMask": "0x00000000",
> @@ -2989,6 +3341,7 @@
> },
> {
> "BriefDescription": "Number of Scoreboard Requests Rejected",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd4",
> "EventName": "UNC_M_SB_REJECT.CANARY",
> "PerPkg": "1",
> @@ -2997,6 +3350,7 @@
> },
> {
> "BriefDescription": "Number of Scoreboard Requests Rejected",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd4",
> "EventName": "UNC_M_SB_REJECT.DDR_EARLY_CMP",
> "PerPkg": "1",
> @@ -3005,6 +3359,7 @@
> },
> {
> "BriefDescription": "Number of Scoreboard Requests Rejected : FM requests rejected due to full address conflict",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd4",
> "EventName": "UNC_M_SB_REJECT.FM_ADDR_CNFLT",
> "PerPkg": "1",
> @@ -3013,6 +3368,7 @@
> },
> {
> "BriefDescription": "Number of Scoreboard Requests Rejected : NM requests rejected due to set conflict",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd4",
> "EventName": "UNC_M_SB_REJECT.NM_SET_CNFLT",
> "PerPkg": "1",
> @@ -3021,6 +3377,7 @@
> },
> {
> "BriefDescription": "Number of Scoreboard Requests Rejected : Patrol requests rejected due to set conflict",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd4",
> "EventName": "UNC_M_SB_REJECT.PATROL_SET_CNFLT",
> "PerPkg": "1",
> @@ -3029,6 +3386,7 @@
> },
> {
> "BriefDescription": ": Far Mem Read - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd7",
> "EventName": "UNC_M_SB_STRV_ALLOC.FM_RD",
> "PerPkg": "1",
> @@ -3037,6 +3395,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read - Clear",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd7",
> "EventName": "UNC_M_SB_STRV_ALLOC.FM_TGR",
> "PerPkg": "1",
> @@ -3045,6 +3404,7 @@
> },
> {
> "BriefDescription": ": Far Mem Write - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd7",
> "EventName": "UNC_M_SB_STRV_ALLOC.FM_WR",
> "PerPkg": "1",
> @@ -3053,6 +3413,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd7",
> "EventName": "UNC_M_SB_STRV_ALLOC.NM_RD",
> "PerPkg": "1",
> @@ -3061,6 +3422,7 @@
> },
> {
> "BriefDescription": ": Near Mem Write - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd7",
> "EventName": "UNC_M_SB_STRV_ALLOC.NM_WR",
> "PerPkg": "1",
> @@ -3069,6 +3431,7 @@
> },
> {
> "BriefDescription": ": Far Mem Read - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xde",
> "EventName": "UNC_M_SB_STRV_DEALLOC.FM_RD",
> "PerPkg": "1",
> @@ -3077,6 +3440,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read - Clear",
> + "Counter": "0,1,2,3",
> "EventCode": "0xde",
> "EventName": "UNC_M_SB_STRV_DEALLOC.FM_TGR",
> "PerPkg": "1",
> @@ -3085,6 +3449,7 @@
> },
> {
> "BriefDescription": ": Far Mem Write - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xde",
> "EventName": "UNC_M_SB_STRV_DEALLOC.FM_WR",
> "PerPkg": "1",
> @@ -3093,6 +3458,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xde",
> "EventName": "UNC_M_SB_STRV_DEALLOC.NM_RD",
> "PerPkg": "1",
> @@ -3101,6 +3467,7 @@
> },
> {
> "BriefDescription": ": Near Mem Write - Set",
> + "Counter": "0,1,2,3",
> "EventCode": "0xde",
> "EventName": "UNC_M_SB_STRV_DEALLOC.NM_WR",
> "PerPkg": "1",
> @@ -3109,6 +3476,7 @@
> },
> {
> "BriefDescription": ": Far Mem Read",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd8",
> "EventName": "UNC_M_SB_STRV_OCC.FM_RD",
> "PerPkg": "1",
> @@ -3117,6 +3485,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read - Clear",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd8",
> "EventName": "UNC_M_SB_STRV_OCC.FM_TGR",
> "PerPkg": "1",
> @@ -3125,6 +3494,7 @@
> },
> {
> "BriefDescription": ": Far Mem Write",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd8",
> "EventName": "UNC_M_SB_STRV_OCC.FM_WR",
> "PerPkg": "1",
> @@ -3133,6 +3503,7 @@
> },
> {
> "BriefDescription": ": Near Mem Read",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd8",
> "EventName": "UNC_M_SB_STRV_OCC.NM_RD",
> "PerPkg": "1",
> @@ -3141,6 +3512,7 @@
> },
> {
> "BriefDescription": ": Near Mem Write",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd8",
> "EventName": "UNC_M_SB_STRV_OCC.NM_WR",
> "PerPkg": "1",
> @@ -3149,6 +3521,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.DDR4_CMP",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.DDR4_CMP",
> "PerPkg": "1",
> @@ -3157,6 +3530,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.NEW",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.NEW",
> "PerPkg": "1",
> @@ -3165,6 +3539,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.OCC",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.OCC",
> "PerPkg": "1",
> @@ -3173,6 +3548,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.PMM0_CMP",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.PMM0_CMP",
> "PerPkg": "1",
> @@ -3181,6 +3557,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.PMM1_CMP",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.PMM1_CMP",
> "PerPkg": "1",
> @@ -3189,6 +3566,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.PMM2_CMP",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.PMM2_CMP",
> "PerPkg": "1",
> @@ -3197,6 +3575,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.RD_HIT",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.RD_HIT",
> "PerPkg": "1",
> @@ -3205,6 +3584,7 @@
> },
> {
> "BriefDescription": "UNC_M_SB_TAGGED.RD_MISS",
> + "Counter": "0,1,2,3",
> "EventCode": "0xdd",
> "EventName": "UNC_M_SB_TAGGED.RD_MISS",
> "PerPkg": "1",
> @@ -3213,6 +3593,7 @@
> },
> {
> "BriefDescription": "2LM Tag check hit in near memory cache (DDR4)",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd3",
> "EventName": "UNC_M_TAGCHK.HIT",
> "PerPkg": "1",
> @@ -3221,6 +3602,7 @@
> },
> {
> "BriefDescription": "2LM Tag check miss, no data at this line",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd3",
> "EventName": "UNC_M_TAGCHK.MISS_CLEAN",
> "PerPkg": "1",
> @@ -3229,6 +3611,7 @@
> },
> {
> "BriefDescription": "2LM Tag check miss, existing data may be evicted to PMM",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd3",
> "EventName": "UNC_M_TAGCHK.MISS_DIRTY",
> "PerPkg": "1",
> @@ -3237,6 +3620,7 @@
> },
> {
> "BriefDescription": "2LM Tag check hit due to memory read",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd3",
> "EventName": "UNC_M_TAGCHK.NM_RD_HIT",
> "PerPkg": "1",
> @@ -3245,6 +3629,7 @@
> },
> {
> "BriefDescription": "2LM Tag check hit due to memory write",
> + "Counter": "0,1,2,3",
> "EventCode": "0xd3",
> "EventName": "UNC_M_TAGCHK.NM_WR_HIT",
> "PerPkg": "1",
> @@ -3253,6 +3638,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M_WPQ_INSERTS.PCH0",
> "PerPkg": "1",
> @@ -3262,6 +3648,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Allocations",
> + "Counter": "0,1,2,3",
> "EventCode": "0x20",
> "EventName": "UNC_M_WPQ_INSERTS.PCH1",
> "PerPkg": "1",
> @@ -3271,6 +3658,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x82",
> "EventName": "UNC_M_WPQ_OCCUPANCY_PCH0",
> "PerPkg": "1",
> @@ -3279,6 +3667,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue Occupancy",
> + "Counter": "0,1,2,3",
> "EventCode": "0x83",
> "EventName": "UNC_M_WPQ_OCCUPANCY_PCH1",
> "PerPkg": "1",
> @@ -3287,6 +3676,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x23",
> "EventName": "UNC_M_WPQ_READ_HIT",
> "FCMask": "0x00000000",
> @@ -3297,6 +3687,7 @@
> },
> {
> "BriefDescription": "Write Pending Queue CAM Match",
> + "Counter": "0,1,2,3",
> "EventCode": "0x24",
> "EventName": "UNC_M_WPQ_WRITE_HIT",
> "FCMask": "0x00000000",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json
> index 8948e85074f0..4d669afb121a 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-power.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "PCU PCLK Clockticks",
> + "Counter": "0,1,2,3",
> "EventCode": "0x01",
> "EventName": "UNC_P_CLOCKTICKS",
> "PerPkg": "1",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES",
> + "Counter": "0,1,2,3",
> "EventCode": "0x60",
> "EventName": "UNC_P_CORE_TRANSITION_CYCLES",
> "PerPkg": "1",
> @@ -16,6 +18,7 @@
> },
> {
> "BriefDescription": "UNC_P_DEMOTIONS",
> + "Counter": "0,1,2,3",
> "EventCode": "0x30",
> "EventName": "UNC_P_DEMOTIONS",
> "PerPkg": "1",
> @@ -23,6 +26,7 @@
> },
> {
> "BriefDescription": "Phase Shed 0 Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x75",
> "EventName": "UNC_P_FIVR_PS_PS0_CYCLES",
> "PerPkg": "1",
> @@ -31,6 +35,7 @@
> },
> {
> "BriefDescription": "Phase Shed 1 Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x76",
> "EventName": "UNC_P_FIVR_PS_PS1_CYCLES",
> "PerPkg": "1",
> @@ -39,6 +44,7 @@
> },
> {
> "BriefDescription": "Phase Shed 2 Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x77",
> "EventName": "UNC_P_FIVR_PS_PS2_CYCLES",
> "PerPkg": "1",
> @@ -47,6 +53,7 @@
> },
> {
> "BriefDescription": "Phase Shed 3 Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x78",
> "EventName": "UNC_P_FIVR_PS_PS3_CYCLES",
> "PerPkg": "1",
> @@ -55,6 +62,7 @@
> },
> {
> "BriefDescription": "AVX256 Frequency Clipping",
> + "Counter": "0,1,2,3",
> "EventCode": "0x49",
> "EventName": "UNC_P_FREQ_CLIP_AVX256",
> "PerPkg": "1",
> @@ -62,6 +70,7 @@
> },
> {
> "BriefDescription": "AVX512 Frequency Clipping",
> + "Counter": "0,1,2,3",
> "EventCode": "0x4a",
> "EventName": "UNC_P_FREQ_CLIP_AVX512",
> "PerPkg": "1",
> @@ -69,6 +78,7 @@
> },
> {
> "BriefDescription": "Thermal Strongest Upper Limit Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x04",
> "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
> "PerPkg": "1",
> @@ -77,6 +87,7 @@
> },
> {
> "BriefDescription": "Power Strongest Upper Limit Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x05",
> "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
> "PerPkg": "1",
> @@ -85,6 +96,7 @@
> },
> {
> "BriefDescription": "IO P Limit Strongest Lower Limit Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x73",
> "EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES",
> "PerPkg": "1",
> @@ -93,6 +105,7 @@
> },
> {
> "BriefDescription": "Cycles spent changing Frequency",
> + "Counter": "0,1,2,3",
> "EventCode": "0x74",
> "EventName": "UNC_P_FREQ_TRANS_CYCLES",
> "PerPkg": "1",
> @@ -101,6 +114,7 @@
> },
> {
> "BriefDescription": "Memory Phase Shedding Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2f",
> "EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES",
> "PerPkg": "1",
> @@ -109,6 +123,7 @@
> },
> {
> "BriefDescription": "Package C State Residency - C0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2a",
> "EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES",
> "PerPkg": "1",
> @@ -117,6 +132,7 @@
> },
> {
> "BriefDescription": "Package C State Residency - C2E",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2b",
> "EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES",
> "PerPkg": "1",
> @@ -125,6 +141,7 @@
> },
> {
> "BriefDescription": "Package C State Residency - C6",
> + "Counter": "0,1,2,3",
> "EventCode": "0x2d",
> "EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES",
> "PerPkg": "1",
> @@ -140,6 +157,7 @@
> },
> {
> "BriefDescription": "Number of cores in C0",
> + "Counter": "0,1,2,3",
> "EventCode": "0x35",
> "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",
> "PerPkg": "1",
> @@ -148,6 +166,7 @@
> },
> {
> "BriefDescription": "Number of cores in C3",
> + "Counter": "0,1,2,3",
> "EventCode": "0x36",
> "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C3",
> "PerPkg": "1",
> @@ -156,6 +175,7 @@
> },
> {
> "BriefDescription": "Number of cores in C6",
> + "Counter": "0,1,2,3",
> "EventCode": "0x37",
> "EventName": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",
> "PerPkg": "1",
> @@ -164,6 +184,7 @@
> },
> {
> "BriefDescription": "External Prochot",
> + "Counter": "0,1,2,3",
> "EventCode": "0x0a",
> "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
> "PerPkg": "1",
> @@ -172,6 +193,7 @@
> },
> {
> "BriefDescription": "Internal Prochot",
> + "Counter": "0,1,2,3",
> "EventCode": "0x09",
> "EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES",
> "PerPkg": "1",
> @@ -180,6 +202,7 @@
> },
> {
> "BriefDescription": "Total Core C State Transition Cycles",
> + "Counter": "0,1,2,3",
> "EventCode": "0x72",
> "EventName": "UNC_P_TOTAL_TRANSITION_CYCLES",
> "PerPkg": "1",
> @@ -188,6 +211,7 @@
> },
> {
> "BriefDescription": "VR Hot",
> + "Counter": "0,1,2,3",
> "EventCode": "0x42",
> "EventName": "UNC_P_VR_HOT_CYCLES",
> "PerPkg": "1",
> diff --git a/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json b/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json
> index a1e3b8d2ebe7..609a9549cbf3 100644
> --- a/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json
> +++ b/tools/perf/pmu-events/arch/x86/sapphirerapids/virtual-memory.json
> @@ -1,6 +1,7 @@
> [
> {
> "BriefDescription": "Loads that miss the DTLB and hit the STLB.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.STLB_HIT",
> "PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",
> @@ -9,6 +10,7 @@
> },
> {
> "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",
> @@ -18,6 +20,7 @@
> },
> {
> "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
> "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -26,6 +29,7 @@
> },
> {
> "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",
> "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -34,6 +38,7 @@
> },
> {
> "BriefDescription": "Page walks completed due to a demand data load to a 2M/4M page.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",
> "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -42,6 +47,7 @@
> },
> {
> "BriefDescription": "Page walks completed due to a demand data load to a 4K page.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",
> "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -50,6 +56,7 @@
> },
> {
> "BriefDescription": "Number of page walks outstanding for a demand load in the PMH each cycle.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x12",
> "EventName": "DTLB_LOAD_MISSES.WALK_PENDING",
> "PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",
> @@ -58,6 +65,7 @@
> },
> {
> "BriefDescription": "Stores that miss the DTLB and hit the STLB.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.STLB_HIT",
> "PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",
> @@ -66,6 +74,7 @@
> },
> {
> "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",
> @@ -75,6 +84,7 @@
> },
> {
> "BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
> "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -83,6 +93,7 @@
> },
> {
> "BriefDescription": "Page walks completed due to a demand data store to a 1G page.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",
> "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -91,6 +102,7 @@
> },
> {
> "BriefDescription": "Page walks completed due to a demand data store to a 2M/4M page.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",
> "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -99,6 +111,7 @@
> },
> {
> "BriefDescription": "Page walks completed due to a demand data store to a 4K page.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",
> "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
> @@ -107,6 +120,7 @@
> },
> {
> "BriefDescription": "Number of page walks outstanding for a store in the PMH each cycle.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x13",
> "EventName": "DTLB_STORE_MISSES.WALK_PENDING",
> "PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",
> @@ -115,6 +129,7 @@
> },
> {
> "BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "ITLB_MISSES.STLB_HIT",
> "PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
> @@ -123,6 +138,7 @@
> },
> {
> "BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction fetch) request.",
> + "Counter": "0,1,2,3",
> "CounterMask": "1",
> "EventCode": "0x11",
> "EventName": "ITLB_MISSES.WALK_ACTIVE",
> @@ -132,6 +148,7 @@
> },
> {
> "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page sizes)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "ITLB_MISSES.WALK_COMPLETED",
> "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
> @@ -140,6 +157,7 @@
> },
> {
> "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",
> "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
> @@ -148,6 +166,7 @@
> },
> {
> "BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "ITLB_MISSES.WALK_COMPLETED_4K",
> "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
> @@ -156,6 +175,7 @@
> },
> {
> "BriefDescription": "Number of page walks outstanding for an outstanding code request in the PMH each cycle.",
> + "Counter": "0,1,2,3",
> "EventCode": "0x11",
> "EventName": "ITLB_MISSES.WALK_PENDING",
> "PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 05/18] perf pmu-events: Add event counter data for Cascadelakex
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (4 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 04/18] perf pmu-events: Add counter info into JSON files for SapphireRapids weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 06/18] perf pmu-events: Add event counter data for Icelakex weilin.wang
` (12 subsequent siblings)
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
The added new fields are required in this new grouping method. Currently,
the format of added fields are temporary for experiments.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
.../arch/x86/cascadelakex/cache.json | 1237 ++++++++++++++++
.../arch/x86/cascadelakex/counter.json | 16 +
.../arch/x86/cascadelakex/floating-point.json | 16 +
.../arch/x86/cascadelakex/frontend.json | 68 +
.../arch/x86/cascadelakex/memory.json | 751 ++++++++++
.../arch/x86/cascadelakex/other.json | 168 +++
.../arch/x86/cascadelakex/pipeline.json | 102 ++
.../arch/x86/cascadelakex/uncore-cache.json | 1138 +++++++++++++++
.../x86/cascadelakex/uncore-interconnect.json | 1272 +++++++++++++++++
.../arch/x86/cascadelakex/uncore-io.json | 394 +++++
.../arch/x86/cascadelakex/uncore-memory.json | 509 +++++++
.../arch/x86/cascadelakex/uncore-power.json | 25 +
.../arch/x86/cascadelakex/virtual-memory.json | 28 +
13 files changed, 5724 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/x86/cascadelakex/counter.json
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/cache.json b/tools/perf/pmu-events/arch/x86/cascadelakex/cache.json
index a842f05cb60d..be886ef71195 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/cache.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "L1D data line replacements",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "L1D.REPLACEMENT",
"PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of times a request needed a FB entry but there was no entry available for it. That is the FB unavailability was dominant reason for blocking the request. A request includes cacheable/uncacheable demands that is load, store or SW prefetch.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.FB_FULL",
"PublicDescription": "Number of times a request needed a FB (Fill Buffer) entry but there was no entry available for it. A request includes cacheable/uncacheable demands that are load, store or SW prefetch instructions.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "L1D miss outstandings duration in cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING",
"PublicDescription": "Counts duration of L1D miss outstanding, that is each cycle number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch.Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Cycles with L1D load Misses outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING_CYCLES",
@@ -35,6 +39,7 @@
{
"AnyThread": "1",
"BriefDescription": "Cycles with L1D load Misses outstanding from any thread on physical core.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING_CYCLES_ANY",
@@ -43,6 +48,7 @@
},
{
"BriefDescription": "L2 cache lines filling L2",
+ "Counter": "0,1,2,3",
"EventCode": "0xF1",
"EventName": "L2_LINES_IN.ALL",
"PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
@@ -51,6 +57,7 @@
},
{
"BriefDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines can be either in modified state or clean state. Modified lines may either be written back to L3 or directly written to memory and not allocated in L3. Clean lines may either be allocated in L3 or dropped",
+ "Counter": "0,1,2,3",
"EventCode": "0xF2",
"EventName": "L2_LINES_OUT.NON_SILENT",
"PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines can be either in modified state or clean state. Modified lines may either be written back to L3 or directly written to memory and not allocated in L3. Clean lines may either be allocated in L3 or dropped.",
@@ -59,6 +66,7 @@
},
{
"BriefDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared state. A non-threaded event.",
+ "Counter": "0,1,2,3",
"EventCode": "0xF2",
"EventName": "L2_LINES_OUT.SILENT",
"SampleAfterValue": "200003",
@@ -66,6 +74,7 @@
},
{
"BriefDescription": "Counts the number of lines that have been hardware prefetched but not used and now evicted by L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xF2",
"EventName": "L2_LINES_OUT.USELESS_HWPF",
"SampleAfterValue": "200003",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event L2_LINES_OUT.USELESS_HWPF",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xF2",
"EventName": "L2_LINES_OUT.USELESS_PREF",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "L2 code requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_CODE_RD",
"PublicDescription": "Counts the total number of L2 code requests.",
@@ -89,6 +100,7 @@
},
{
"BriefDescription": "Demand Data Read requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",
"PublicDescription": "Counts the number of demand Data Read requests (including requests from L1D hardware prefetchers). These loads may hit or miss L2 cache. Only non rejected loads are counted.",
@@ -97,6 +109,7 @@
},
{
"BriefDescription": "Demand requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_MISS",
"PublicDescription": "Demand requests that miss L2 cache.",
@@ -105,6 +118,7 @@
},
{
"BriefDescription": "Demand requests to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_REFERENCES",
"PublicDescription": "Demand requests to L2 cache.",
@@ -113,6 +127,7 @@
},
{
"BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_PF",
"PublicDescription": "Counts the total number of requests from the L2 hardware prefetchers.",
@@ -121,6 +136,7 @@
},
{
"BriefDescription": "RFO requests to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_RFO",
"PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",
@@ -129,6 +145,7 @@
},
{
"BriefDescription": "L2 cache hits when fetching instructions, code reads.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_HIT",
"PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",
@@ -137,6 +154,7 @@
},
{
"BriefDescription": "L2 cache misses when fetching instructions",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_MISS",
"PublicDescription": "Counts L2 cache misses when fetching instructions.",
@@ -145,6 +163,7 @@
},
{
"BriefDescription": "Demand Data Read requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
"PublicDescription": "Counts the number of demand Data Read requests, initiated by load instructions, that hit L2 cache",
@@ -153,6 +172,7 @@
},
{
"BriefDescription": "Demand Data Read miss L2, no rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",
"PublicDescription": "Counts the number of demand Data Read requests that miss L2 cache. Only not rejected loads are counted.",
@@ -161,6 +181,7 @@
},
{
"BriefDescription": "All requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.MISS",
"PublicDescription": "All requests that miss L2 cache.",
@@ -169,6 +190,7 @@
},
{
"BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.PF_HIT",
"PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that hit L2 cache.",
@@ -177,6 +199,7 @@
},
{
"BriefDescription": "Requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.PF_MISS",
"PublicDescription": "Counts requests from the L1/L2/L3 hardware prefetchers or Load software prefetches that miss L2 cache.",
@@ -185,6 +208,7 @@
},
{
"BriefDescription": "All L2 requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.REFERENCES",
"PublicDescription": "All L2 requests.",
@@ -193,6 +217,7 @@
},
{
"BriefDescription": "RFO requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_HIT",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
@@ -201,6 +226,7 @@
},
{
"BriefDescription": "RFO requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_MISS",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
@@ -209,6 +235,7 @@
},
{
"BriefDescription": "L2 writebacks that access L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xF0",
"EventName": "L2_TRANS.L2_WB",
"PublicDescription": "Counts L2 writebacks that access L2 cache.",
@@ -217,6 +244,7 @@
},
{
"BriefDescription": "Core-originated cacheable demand requests missed L3",
+ "Counter": "0,1,2,3",
"Errata": "SKL057",
"EventCode": "0x2E",
"EventName": "LONGEST_LAT_CACHE.MISS",
@@ -226,6 +254,7 @@
},
{
"BriefDescription": "Core-originated cacheable demand requests that refer to L3",
+ "Counter": "0,1,2,3",
"Errata": "SKL057",
"EventCode": "0x2E",
"EventName": "LONGEST_LAT_CACHE.REFERENCE",
@@ -235,6 +264,7 @@
},
{
"BriefDescription": "Retired load instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.ALL_LOADS",
@@ -245,6 +275,7 @@
},
{
"BriefDescription": "Retired store instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.ALL_STORES",
@@ -255,6 +286,7 @@
},
{
"BriefDescription": "All retired memory instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.ANY",
@@ -265,6 +297,7 @@
},
{
"BriefDescription": "Retired load instructions with locked access.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.LOCK_LOADS",
@@ -274,6 +307,7 @@
},
{
"BriefDescription": "Retired load instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.SPLIT_LOADS",
@@ -284,6 +318,7 @@
},
{
"BriefDescription": "Retired store instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.SPLIT_STORES",
@@ -294,6 +329,7 @@
},
{
"BriefDescription": "Retired load instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
@@ -304,6 +340,7 @@
},
{
"BriefDescription": "Retired store instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",
@@ -314,6 +351,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources were L3 and cross-core snoop hits in on-pkg core cache",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT",
@@ -324,6 +362,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources were HitM responses from shared L3",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM",
@@ -334,6 +373,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",
@@ -343,6 +383,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources were hits in L3 without snoops required",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE",
@@ -353,6 +394,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources missed L3 but serviced from local dram",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM",
@@ -363,6 +405,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources missed L3 but serviced from remote dram",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
@@ -372,6 +415,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources was forwarded from a remote cache",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD",
@@ -381,6 +425,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources was remote HITM",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
@@ -391,6 +436,7 @@
},
{
"BriefDescription": "Retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM",
@@ -401,6 +447,7 @@
},
{
"BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD4",
"EventName": "MEM_LOAD_MISC_RETIRED.UC",
@@ -410,6 +457,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources were load missed L1 but hit FB due to preceding miss to the same cache line with data not ready",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.FB_HIT",
@@ -420,6 +468,7 @@
},
{
"BriefDescription": "Retired load instructions with L1 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.L1_HIT",
@@ -430,6 +479,7 @@
},
{
"BriefDescription": "Retired load instructions missed L1 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.L1_MISS",
@@ -440,6 +490,7 @@
},
{
"BriefDescription": "Retired load instructions with L2 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.L2_HIT",
@@ -450,6 +501,7 @@
},
{
"BriefDescription": "Retired load instructions missed L2 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.L2_MISS",
@@ -460,6 +512,7 @@
},
{
"BriefDescription": "Retired load instructions with L3 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.L3_HIT",
@@ -470,6 +523,7 @@
},
{
"BriefDescription": "Retired load instructions missed L3 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.L3_MISS",
@@ -480,6 +534,7 @@
},
{
"BriefDescription": "Retired load instructions with local Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xD1",
"EventName": "MEM_LOAD_RETIRED.LOCAL_PMM",
@@ -490,6 +545,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -499,6 +555,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -508,6 +565,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -517,6 +575,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -526,6 +585,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -535,6 +595,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -544,6 +605,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -553,6 +615,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -562,6 +625,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -571,6 +635,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -580,6 +645,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -589,6 +655,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -598,6 +665,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -607,6 +675,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -616,6 +685,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -625,6 +695,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -634,6 +705,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -643,6 +715,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -652,6 +725,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -661,6 +735,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -670,6 +745,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -679,6 +755,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -688,6 +765,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -697,6 +775,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -706,6 +785,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -715,6 +795,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -724,6 +805,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -733,6 +815,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -742,6 +825,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -751,6 +835,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -760,6 +845,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -769,6 +855,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -778,6 +865,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -787,6 +875,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -796,6 +885,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -805,6 +895,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -814,6 +905,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -823,6 +915,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -832,6 +925,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -841,6 +935,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -850,6 +945,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -859,6 +955,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -868,6 +965,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -877,6 +975,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -886,6 +985,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -895,6 +995,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -904,6 +1005,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -913,6 +1015,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -922,6 +1025,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -931,6 +1035,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -940,6 +1045,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -949,6 +1055,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -958,6 +1065,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -967,6 +1075,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -976,6 +1085,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -985,6 +1095,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -994,6 +1105,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1003,6 +1115,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1012,6 +1125,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1021,6 +1135,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1030,6 +1145,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1039,6 +1155,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1048,6 +1165,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1057,6 +1175,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1066,6 +1185,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1075,6 +1195,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1084,6 +1205,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1093,6 +1215,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1102,6 +1225,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1111,6 +1235,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1120,6 +1245,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1129,6 +1255,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1138,6 +1265,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1147,6 +1275,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1156,6 +1285,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1165,6 +1295,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1174,6 +1305,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1183,6 +1315,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1192,6 +1325,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1201,6 +1335,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1210,6 +1345,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1219,6 +1355,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1228,6 +1365,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1237,6 +1375,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1246,6 +1385,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1255,6 +1395,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1264,6 +1405,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1273,6 +1415,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1282,6 +1425,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1291,6 +1435,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1300,6 +1445,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1309,6 +1455,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1318,6 +1465,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1327,6 +1475,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1336,6 +1485,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1345,6 +1495,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1354,6 +1505,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1363,6 +1515,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1372,6 +1525,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1381,6 +1535,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1390,6 +1545,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1399,6 +1555,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1408,6 +1565,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1417,6 +1575,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1426,6 +1585,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1435,6 +1595,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1444,6 +1605,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1453,6 +1615,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1462,6 +1625,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.ANY_SNOOP OCR.ALL_READS.L3_HIT.ANY_SNOOP OCR.ALL_READS.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1471,6 +1635,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1480,6 +1645,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1489,6 +1655,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1498,6 +1665,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1507,6 +1675,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1516,6 +1685,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.SNOOP_MISS OCR.ALL_READS.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1525,6 +1695,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT.SNOOP_NONE OCR.ALL_READS.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1534,6 +1705,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.ANY_SNOOP OCR.ALL_READS.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1543,6 +1715,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1552,6 +1725,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1561,6 +1735,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1570,6 +1745,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1579,6 +1755,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1588,6 +1765,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1597,6 +1775,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.ANY_SNOOP OCR.ALL_READS.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1606,6 +1785,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1615,6 +1795,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1624,6 +1805,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1633,6 +1815,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1642,6 +1825,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1651,6 +1835,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1660,6 +1845,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.ANY_SNOOP OCR.ALL_READS.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1669,6 +1855,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1678,6 +1865,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1687,6 +1875,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1696,6 +1885,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1705,6 +1895,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1714,6 +1905,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1723,6 +1915,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.ANY_SNOOP OCR.ALL_READS.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1732,6 +1925,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1741,6 +1935,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1750,6 +1945,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1759,6 +1955,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1768,6 +1965,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1777,6 +1975,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1786,6 +1985,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.ANY_SNOOP OCR.ALL_RFO.L3_HIT.ANY_SNOOP OCR.ALL_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1795,6 +1995,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1804,6 +2005,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1813,6 +2015,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1822,6 +2025,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1831,6 +2035,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1840,6 +2045,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.SNOOP_MISS OCR.ALL_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1849,6 +2055,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT.SNOOP_NONE OCR.ALL_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1858,6 +2065,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1867,6 +2075,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1876,6 +2085,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1885,6 +2095,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1894,6 +2105,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1903,6 +2115,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1912,6 +2125,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1921,6 +2135,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1930,6 +2145,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1939,6 +2155,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1948,6 +2165,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1957,6 +2175,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1966,6 +2185,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1975,6 +2195,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1984,6 +2205,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1993,6 +2215,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2002,6 +2225,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2011,6 +2235,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2020,6 +2245,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2029,6 +2255,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2038,6 +2265,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2047,6 +2275,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2056,6 +2285,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2065,6 +2295,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2074,6 +2305,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2083,6 +2315,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2092,6 +2325,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2101,6 +2335,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2110,6 +2345,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2119,6 +2355,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2128,6 +2365,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2137,6 +2375,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2146,6 +2385,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2155,6 +2395,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2164,6 +2405,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2173,6 +2415,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2182,6 +2425,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2191,6 +2435,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2200,6 +2445,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2209,6 +2455,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2218,6 +2465,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2227,6 +2475,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2236,6 +2485,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2245,6 +2495,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2254,6 +2505,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2263,6 +2515,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2272,6 +2525,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2281,6 +2535,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2290,6 +2545,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2299,6 +2555,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2308,6 +2565,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2317,6 +2575,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2326,6 +2585,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2335,6 +2595,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2344,6 +2605,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2353,6 +2615,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2362,6 +2625,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2371,6 +2635,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2380,6 +2645,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2389,6 +2655,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2398,6 +2665,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2407,6 +2675,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2416,6 +2685,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2425,6 +2695,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2434,6 +2705,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2443,6 +2715,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2452,6 +2725,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2461,6 +2735,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2470,6 +2745,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2479,6 +2755,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2488,6 +2765,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2497,6 +2775,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2506,6 +2785,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2515,6 +2795,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2524,6 +2805,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2533,6 +2815,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2542,6 +2825,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2551,6 +2835,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2560,6 +2845,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2569,6 +2855,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2578,6 +2865,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2587,6 +2875,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2596,6 +2885,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2605,6 +2895,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2614,6 +2905,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2623,6 +2915,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2632,6 +2925,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2641,6 +2935,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2650,6 +2945,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2659,6 +2955,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2668,6 +2965,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2677,6 +2975,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2686,6 +2985,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2695,6 +2995,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2704,6 +3005,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2713,6 +3015,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2722,6 +3025,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2731,6 +3035,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2740,6 +3045,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2749,6 +3055,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2758,6 +3065,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2767,6 +3075,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2776,6 +3085,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2785,6 +3095,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2794,6 +3105,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2803,6 +3115,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2812,6 +3125,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2821,6 +3135,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2830,6 +3145,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2839,6 +3155,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2848,6 +3165,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2857,6 +3175,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2866,6 +3185,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2875,6 +3195,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2884,6 +3205,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2893,6 +3215,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2902,6 +3225,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2911,6 +3235,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2920,6 +3245,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2929,6 +3255,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2938,6 +3265,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2947,6 +3275,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2956,6 +3285,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2965,6 +3295,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2974,6 +3305,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2983,6 +3315,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2992,6 +3325,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3001,6 +3335,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3010,6 +3345,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3019,6 +3355,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3028,6 +3365,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3037,6 +3375,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3046,6 +3385,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3055,6 +3395,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3064,6 +3405,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3073,6 +3415,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3082,6 +3425,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.ANY_SNOOP OCR.OTHER.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3091,6 +3435,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.HITM_OTHER_CORE OCR.OTHER.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3100,6 +3445,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3109,6 +3455,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3118,6 +3465,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3127,6 +3475,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3136,6 +3485,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3145,6 +3495,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3154,6 +3505,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3163,6 +3515,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3172,6 +3525,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3181,6 +3535,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3190,6 +3545,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3199,6 +3555,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3208,6 +3565,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3217,6 +3575,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3226,6 +3585,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3235,6 +3595,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3244,6 +3605,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3253,6 +3615,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3262,6 +3625,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3271,6 +3635,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3280,6 +3645,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3289,6 +3655,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3298,6 +3665,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3307,6 +3675,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3316,6 +3685,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3325,6 +3695,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3334,6 +3705,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3343,6 +3715,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3352,6 +3725,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3361,6 +3735,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3370,6 +3745,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3379,6 +3755,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3388,6 +3765,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3397,6 +3775,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3406,6 +3785,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3415,6 +3795,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3424,6 +3805,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3433,6 +3815,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3442,6 +3825,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3451,6 +3835,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3460,6 +3845,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3469,6 +3855,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3478,6 +3865,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3487,6 +3875,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3496,6 +3885,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3505,6 +3895,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3514,6 +3905,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3523,6 +3915,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3532,6 +3925,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3541,6 +3935,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3550,6 +3945,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3559,6 +3955,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3568,6 +3965,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3577,6 +3975,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3586,6 +3985,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3595,6 +3995,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3604,6 +4005,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3613,6 +4015,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3622,6 +4025,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3631,6 +4035,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3640,6 +4045,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3649,6 +4055,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3658,6 +4065,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3667,6 +4075,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3676,6 +4085,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3685,6 +4095,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3694,6 +4105,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3703,6 +4115,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3712,6 +4125,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3721,6 +4135,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3730,6 +4145,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3739,6 +4155,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3748,6 +4165,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3757,6 +4175,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3766,6 +4185,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3775,6 +4195,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3784,6 +4205,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3793,6 +4215,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3802,6 +4225,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3811,6 +4235,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3820,6 +4245,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3829,6 +4255,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3838,6 +4265,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3847,6 +4275,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3856,6 +4285,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3865,6 +4295,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3874,6 +4305,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3883,6 +4315,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3892,6 +4325,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3901,6 +4335,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3910,6 +4345,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3919,6 +4355,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3928,6 +4365,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3937,6 +4375,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3946,6 +4385,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3955,6 +4395,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3964,6 +4405,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3973,6 +4415,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3982,6 +4425,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3991,6 +4435,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4000,6 +4445,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4009,6 +4455,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4018,6 +4465,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4027,6 +4475,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4036,6 +4485,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4045,6 +4495,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4054,6 +4505,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4063,6 +4515,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4072,6 +4525,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4081,6 +4535,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4090,6 +4545,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4099,6 +4555,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4108,6 +4565,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4117,6 +4575,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4126,6 +4585,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4135,6 +4595,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4144,6 +4605,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4153,6 +4615,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4162,6 +4625,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4171,6 +4635,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4180,6 +4645,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4189,6 +4655,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4198,6 +4665,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4207,6 +4675,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4216,6 +4685,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4225,6 +4695,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4234,6 +4705,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4243,6 +4715,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4252,6 +4725,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4261,6 +4735,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4270,6 +4745,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4279,6 +4755,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4288,6 +4765,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4297,6 +4775,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4306,6 +4785,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4315,6 +4795,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4324,6 +4805,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4333,6 +4815,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4342,6 +4825,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4351,6 +4835,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4360,6 +4845,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4369,6 +4855,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4378,6 +4865,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4387,6 +4875,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4396,6 +4885,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4405,6 +4895,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4414,6 +4905,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4423,6 +4915,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4432,6 +4925,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4441,6 +4935,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4450,6 +4945,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4459,6 +4955,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4468,6 +4965,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4477,6 +4975,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4486,6 +4985,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4495,6 +4995,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4504,6 +5005,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4513,6 +5015,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4522,6 +5025,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4531,6 +5035,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4540,6 +5045,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4549,6 +5055,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4558,6 +5065,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4567,6 +5075,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4576,6 +5085,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4585,6 +5095,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4594,6 +5105,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4603,6 +5115,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4612,6 +5125,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4621,6 +5135,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4630,6 +5145,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4639,6 +5155,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4648,6 +5165,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4657,6 +5175,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4666,6 +5185,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4675,6 +5195,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4684,6 +5205,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4693,6 +5215,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4702,6 +5225,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4711,6 +5235,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4720,6 +5245,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4729,6 +5255,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4738,6 +5265,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4747,6 +5275,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4756,6 +5285,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4765,6 +5295,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4774,6 +5305,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4783,6 +5315,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4792,6 +5325,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4801,6 +5335,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4810,6 +5345,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4819,6 +5355,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4828,6 +5365,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_E.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4837,6 +5375,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4846,6 +5385,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4855,6 +5395,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4864,6 +5405,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4873,6 +5415,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4882,6 +5425,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4891,6 +5435,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_F.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4900,6 +5445,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4909,6 +5455,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4918,6 +5465,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4927,6 +5475,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4936,6 +5485,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -4945,6 +5495,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -4954,6 +5505,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_M.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4963,6 +5515,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -4972,6 +5525,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -4981,6 +5535,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4990,6 +5545,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -4999,6 +5555,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -5008,6 +5565,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -5017,6 +5575,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_HIT_S.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -5026,6 +5585,7 @@
},
{
"BriefDescription": "Demand and prefetch data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.ALL_DATA_RD",
"PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",
@@ -5034,6 +5594,7 @@
},
{
"BriefDescription": "Any memory transaction that reached the SQ.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",
"PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..",
@@ -5042,6 +5603,7 @@
},
{
"BriefDescription": "Cacheable and non-cacheable code read requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",
"PublicDescription": "Counts both cacheable and non-cacheable code read requests.",
@@ -5050,6 +5612,7 @@
},
{
"BriefDescription": "Demand Data Read requests sent to uncore",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",
"PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",
@@ -5058,6 +5621,7 @@
},
{
"BriefDescription": "Demand RFO requests including regular RFOs, locks, ItoM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.DEMAND_RFO",
"PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",
@@ -5066,6 +5630,7 @@
},
{
"BriefDescription": "Offcore requests buffer cannot take more entries for this thread core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "OFFCORE_REQUESTS_BUFFER.SQ_FULL",
"PublicDescription": "Counts the number of cases when the offcore requests buffer cannot take more entries for the core. This can happen when the superqueue does not contain eligible entries, or when L1D writeback pending FIFO requests is full.Note: Writeback pending FIFO has six entries.",
@@ -5074,6 +5639,7 @@
},
{
"BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",
"PublicDescription": "Counts the number of offcore outstanding cacheable Core Data Read transactions in the super queue every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",
@@ -5082,6 +5648,7 @@
},
{
"BriefDescription": "Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
@@ -5091,6 +5658,7 @@
},
{
"BriefDescription": "Cycles with offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",
@@ -5100,6 +5668,7 @@
},
{
"BriefDescription": "Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",
@@ -5109,6 +5678,7 @@
},
{
"BriefDescription": "Cycles with offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
@@ -5118,6 +5688,7 @@
},
{
"BriefDescription": "Offcore outstanding Code Reads transactions in the SuperQueue (SQ), queue to uncore, every cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",
"PublicDescription": "Counts the number of offcore outstanding Code Reads transactions in the super queue every cycle. The 'Offcore outstanding' state of the transaction lasts from the L2 miss until the sending transaction completion to requestor (SQ deallocation). See the corresponding Umask under OFFCORE_REQUESTS.",
@@ -5126,6 +5697,7 @@
},
{
"BriefDescription": "Offcore outstanding Demand Data Read transactions in uncore queue.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",
"PublicDescription": "Counts the number of offcore outstanding Demand Data Read transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor. See the corresponding Umask under OFFCORE_REQUESTS.Note: A prefetch promoted to Demand is counted from the promotion point.",
@@ -5134,6 +5706,7 @@
},
{
"BriefDescription": "Cycles with at least 6 offcore outstanding Demand Data Read transactions in uncore queue.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6",
@@ -5142,6 +5715,7 @@
},
{
"BriefDescription": "Offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore, every cycle",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO",
"PublicDescription": "Counts the number of offcore outstanding RFO (store) transactions in the super queue (SQ) every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",
@@ -5150,6 +5724,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.ANY_RESPONSE",
@@ -5160,6 +5735,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.ANY_SNOOP",
@@ -5170,6 +5746,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.HITM_OTHER_CORE",
@@ -5180,6 +5757,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -5190,6 +5768,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -5200,6 +5779,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
@@ -5210,6 +5790,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -5220,6 +5801,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.SNOOP_MISS",
@@ -5230,6 +5812,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT.SNOOP_NONE",
@@ -5240,6 +5823,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.ANY_SNOOP",
@@ -5250,6 +5834,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
@@ -5260,6 +5845,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -5270,6 +5856,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -5280,6 +5867,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -5290,6 +5878,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.SNOOP_MISS",
@@ -5300,6 +5889,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_E.SNOOP_NONE",
@@ -5310,6 +5900,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.ANY_SNOOP",
@@ -5320,6 +5911,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
@@ -5330,6 +5922,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -5340,6 +5933,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -5350,6 +5944,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -5360,6 +5955,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.SNOOP_MISS",
@@ -5370,6 +5966,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_F.SNOOP_NONE",
@@ -5380,6 +5977,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.ANY_SNOOP",
@@ -5390,6 +5988,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
@@ -5400,6 +5999,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -5410,6 +6010,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -5420,6 +6021,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -5430,6 +6032,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.SNOOP_MISS",
@@ -5440,6 +6043,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_M.SNOOP_NONE",
@@ -5450,6 +6054,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.ANY_SNOOP",
@@ -5460,6 +6065,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
@@ -5470,6 +6076,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -5480,6 +6087,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -5490,6 +6098,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -5500,6 +6109,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.SNOOP_MISS",
@@ -5510,6 +6120,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_HIT_S.SNOOP_NONE",
@@ -5520,6 +6131,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -5530,6 +6142,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -5540,6 +6153,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -5550,6 +6164,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
@@ -5560,6 +6175,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -5570,6 +6186,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -5580,6 +6197,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -5590,6 +6208,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -5600,6 +6219,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
@@ -5610,6 +6230,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
@@ -5620,6 +6241,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.ANY_RESPONSE",
@@ -5630,6 +6252,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.ANY_SNOOP",
@@ -5640,6 +6263,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.HITM_OTHER_CORE",
@@ -5650,6 +6274,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -5660,6 +6285,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -5670,6 +6296,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
@@ -5680,6 +6307,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -5690,6 +6318,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.SNOOP_MISS",
@@ -5700,6 +6329,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT.SNOOP_NONE",
@@ -5710,6 +6340,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.ANY_SNOOP",
@@ -5720,6 +6351,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
@@ -5730,6 +6362,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -5740,6 +6373,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -5750,6 +6384,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -5760,6 +6395,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_MISS",
@@ -5770,6 +6406,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_E.SNOOP_NONE",
@@ -5780,6 +6417,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.ANY_SNOOP",
@@ -5790,6 +6428,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
@@ -5800,6 +6439,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -5810,6 +6450,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -5820,6 +6461,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -5830,6 +6472,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_MISS",
@@ -5840,6 +6483,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_F.SNOOP_NONE",
@@ -5850,6 +6494,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.ANY_SNOOP",
@@ -5860,6 +6505,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
@@ -5870,6 +6516,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -5880,6 +6527,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -5890,6 +6538,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -5900,6 +6549,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_MISS",
@@ -5910,6 +6560,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_M.SNOOP_NONE",
@@ -5920,6 +6571,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.ANY_SNOOP",
@@ -5930,6 +6582,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
@@ -5940,6 +6593,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -5950,6 +6604,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -5960,6 +6615,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -5970,6 +6626,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_MISS",
@@ -5980,6 +6637,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_HIT_S.SNOOP_NONE",
@@ -5990,6 +6648,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -6000,6 +6659,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -6010,6 +6670,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -6020,6 +6681,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
@@ -6030,6 +6692,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -6040,6 +6703,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -6050,6 +6714,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -6060,6 +6725,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -6070,6 +6736,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
@@ -6080,6 +6747,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
@@ -6090,6 +6758,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.ANY_RESPONSE",
@@ -6100,6 +6769,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.ANY_SNOOP",
@@ -6110,6 +6780,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.HITM_OTHER_CORE",
@@ -6120,6 +6791,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -6130,6 +6802,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -6140,6 +6813,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.NO_SNOOP_NEEDED",
@@ -6150,6 +6824,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -6160,6 +6835,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.SNOOP_MISS",
@@ -6170,6 +6846,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT.SNOOP_NONE",
@@ -6180,6 +6857,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.ANY_SNOOP",
@@ -6190,6 +6868,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.HITM_OTHER_CORE",
@@ -6200,6 +6879,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -6210,6 +6890,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -6220,6 +6901,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -6230,6 +6912,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.SNOOP_MISS",
@@ -6240,6 +6923,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_E.SNOOP_NONE",
@@ -6250,6 +6934,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.ANY_SNOOP",
@@ -6260,6 +6945,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.HITM_OTHER_CORE",
@@ -6270,6 +6956,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -6280,6 +6967,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -6290,6 +6978,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -6300,6 +6989,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.SNOOP_MISS",
@@ -6310,6 +7000,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_F.SNOOP_NONE",
@@ -6320,6 +7011,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.ANY_SNOOP",
@@ -6330,6 +7022,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.HITM_OTHER_CORE",
@@ -6340,6 +7033,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -6350,6 +7044,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -6360,6 +7055,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -6370,6 +7066,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.SNOOP_MISS",
@@ -6380,6 +7077,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_M.SNOOP_NONE",
@@ -6390,6 +7088,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.ANY_SNOOP",
@@ -6400,6 +7099,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.HITM_OTHER_CORE",
@@ -6410,6 +7110,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -6420,6 +7121,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -6430,6 +7132,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -6440,6 +7143,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.SNOOP_MISS",
@@ -6450,6 +7154,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_HIT_S.SNOOP_NONE",
@@ -6460,6 +7165,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -6470,6 +7176,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -6480,6 +7187,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -6490,6 +7198,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP",
@@ -6500,6 +7209,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -6510,6 +7220,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -6520,6 +7231,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -6530,6 +7242,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -6540,6 +7253,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS",
@@ -6550,6 +7264,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE",
@@ -6560,6 +7275,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.ANY_RESPONSE",
@@ -6570,6 +7286,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.ANY_SNOOP",
@@ -6580,6 +7297,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.HITM_OTHER_CORE",
@@ -6590,6 +7308,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -6600,6 +7319,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -6610,6 +7330,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.NO_SNOOP_NEEDED",
@@ -6620,6 +7341,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -6630,6 +7352,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.SNOOP_MISS",
@@ -6640,6 +7363,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT.SNOOP_NONE",
@@ -6650,6 +7374,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.ANY_SNOOP",
@@ -6660,6 +7385,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.HITM_OTHER_CORE",
@@ -6670,6 +7396,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -6680,6 +7407,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -6690,6 +7418,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -6700,6 +7429,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.SNOOP_MISS",
@@ -6710,6 +7440,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_E.SNOOP_NONE",
@@ -6720,6 +7451,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.ANY_SNOOP",
@@ -6730,6 +7462,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.HITM_OTHER_CORE",
@@ -6740,6 +7473,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -6750,6 +7484,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -6760,6 +7495,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -6770,6 +7506,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.SNOOP_MISS",
@@ -6780,6 +7517,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_F.SNOOP_NONE",
@@ -6790,6 +7528,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.ANY_SNOOP",
@@ -6800,6 +7539,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.HITM_OTHER_CORE",
@@ -6810,6 +7550,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -6820,6 +7561,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -6830,6 +7572,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -6840,6 +7583,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.SNOOP_MISS",
@@ -6850,6 +7594,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_M.SNOOP_NONE",
@@ -6860,6 +7605,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.ANY_SNOOP",
@@ -6870,6 +7616,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.HITM_OTHER_CORE",
@@ -6880,6 +7627,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -6890,6 +7638,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -6900,6 +7649,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -6910,6 +7660,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.SNOOP_MISS",
@@ -6920,6 +7671,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_HIT_S.SNOOP_NONE",
@@ -6930,6 +7682,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -6940,6 +7693,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -6950,6 +7704,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -6960,6 +7715,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.ANY_SNOOP",
@@ -6970,6 +7726,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -6980,6 +7737,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -6990,6 +7748,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -7000,6 +7759,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -7010,6 +7770,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.SNOOP_MISS",
@@ -7020,6 +7781,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.SUPPLIER_NONE.SNOOP_NONE",
@@ -7030,6 +7792,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.ANY_RESPONSE",
@@ -7040,6 +7803,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.ANY_SNOOP",
@@ -7050,6 +7814,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.HITM_OTHER_CORE",
@@ -7060,6 +7825,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -7070,6 +7836,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -7080,6 +7847,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.NO_SNOOP_NEEDED",
@@ -7090,6 +7858,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -7100,6 +7869,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.SNOOP_MISS",
@@ -7110,6 +7880,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT.SNOOP_NONE",
@@ -7120,6 +7891,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.ANY_SNOOP",
@@ -7130,6 +7902,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.HITM_OTHER_CORE",
@@ -7140,6 +7913,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -7150,6 +7924,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -7160,6 +7935,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -7170,6 +7946,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.SNOOP_MISS",
@@ -7180,6 +7957,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_E.SNOOP_NONE",
@@ -7190,6 +7968,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.ANY_SNOOP",
@@ -7200,6 +7979,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.HITM_OTHER_CORE",
@@ -7210,6 +7990,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -7220,6 +8001,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -7230,6 +8012,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -7240,6 +8023,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.SNOOP_MISS",
@@ -7250,6 +8034,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_F.SNOOP_NONE",
@@ -7260,6 +8045,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.ANY_SNOOP",
@@ -7270,6 +8056,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.HITM_OTHER_CORE",
@@ -7280,6 +8067,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -7290,6 +8078,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -7300,6 +8089,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -7310,6 +8100,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.SNOOP_MISS",
@@ -7320,6 +8111,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_M.SNOOP_NONE",
@@ -7330,6 +8122,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.ANY_SNOOP",
@@ -7340,6 +8133,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.HITM_OTHER_CORE",
@@ -7350,6 +8144,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -7360,6 +8155,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -7370,6 +8166,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -7380,6 +8177,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.SNOOP_MISS",
@@ -7390,6 +8188,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_HIT_S.SNOOP_NONE",
@@ -7400,6 +8199,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -7410,6 +8210,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -7420,6 +8221,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -7430,6 +8232,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP",
@@ -7440,6 +8243,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -7450,6 +8254,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -7460,6 +8265,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -7470,6 +8276,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -7480,6 +8287,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS",
@@ -7490,6 +8298,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE",
@@ -7500,6 +8309,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.ANY_RESPONSE",
@@ -7510,6 +8320,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.ANY_SNOOP",
@@ -7520,6 +8331,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.HITM_OTHER_CORE",
@@ -7530,6 +8342,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -7540,6 +8353,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -7550,6 +8364,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.NO_SNOOP_NEEDED",
@@ -7560,6 +8375,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -7570,6 +8386,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_MISS",
@@ -7580,6 +8397,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT.SNOOP_NONE",
@@ -7590,6 +8408,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.ANY_SNOOP",
@@ -7600,6 +8419,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.HITM_OTHER_CORE",
@@ -7610,6 +8430,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -7620,6 +8441,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -7630,6 +8452,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -7640,6 +8463,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_MISS",
@@ -7650,6 +8474,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_E.SNOOP_NONE",
@@ -7660,6 +8485,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.ANY_SNOOP",
@@ -7670,6 +8496,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.HITM_OTHER_CORE",
@@ -7680,6 +8507,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -7690,6 +8518,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -7700,6 +8529,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -7710,6 +8540,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.SNOOP_MISS",
@@ -7720,6 +8551,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_F.SNOOP_NONE",
@@ -7730,6 +8562,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.ANY_SNOOP",
@@ -7740,6 +8573,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.HITM_OTHER_CORE",
@@ -7750,6 +8584,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -7760,6 +8595,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -7770,6 +8606,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -7780,6 +8617,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_MISS",
@@ -7790,6 +8628,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_M.SNOOP_NONE",
@@ -7800,6 +8639,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.ANY_SNOOP",
@@ -7810,6 +8650,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.HITM_OTHER_CORE",
@@ -7820,6 +8661,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -7830,6 +8672,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -7840,6 +8683,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -7850,6 +8694,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_MISS",
@@ -7860,6 +8705,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_HIT_S.SNOOP_NONE",
@@ -7870,6 +8716,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -7880,6 +8727,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -7890,6 +8738,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -7900,6 +8749,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP",
@@ -7910,6 +8760,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -7920,6 +8771,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -7930,6 +8782,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -7940,6 +8793,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -7950,6 +8804,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS",
@@ -7960,6 +8815,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE",
@@ -7970,6 +8826,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_RESPONSE",
@@ -7980,6 +8837,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.ANY_SNOOP",
@@ -7990,6 +8848,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.HITM_OTHER_CORE",
@@ -8000,6 +8859,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -8010,6 +8870,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -8020,6 +8881,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
@@ -8030,6 +8892,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -8040,6 +8903,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_MISS",
@@ -8050,6 +8914,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT.SNOOP_NONE",
@@ -8060,6 +8925,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.ANY_SNOOP",
@@ -8070,6 +8936,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
@@ -8080,6 +8947,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -8090,6 +8958,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -8100,6 +8969,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -8110,6 +8980,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_MISS",
@@ -8120,6 +8991,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_E.SNOOP_NONE",
@@ -8130,6 +9002,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.ANY_SNOOP",
@@ -8140,6 +9013,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
@@ -8150,6 +9024,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -8160,6 +9035,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -8170,6 +9046,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -8180,6 +9057,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.SNOOP_MISS",
@@ -8190,6 +9068,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_F.SNOOP_NONE",
@@ -8200,6 +9079,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.ANY_SNOOP",
@@ -8210,6 +9090,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
@@ -8220,6 +9101,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -8230,6 +9112,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -8240,6 +9123,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -8250,6 +9134,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_MISS",
@@ -8260,6 +9145,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_M.SNOOP_NONE",
@@ -8270,6 +9156,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.ANY_SNOOP",
@@ -8280,6 +9167,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
@@ -8290,6 +9178,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -8300,6 +9189,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -8310,6 +9200,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -8320,6 +9211,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_MISS",
@@ -8330,6 +9222,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_HIT_S.SNOOP_NONE",
@@ -8340,6 +9233,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -8350,6 +9244,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -8360,6 +9255,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -8370,6 +9266,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
@@ -8380,6 +9277,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -8390,6 +9288,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -8400,6 +9299,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -8410,6 +9310,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -8420,6 +9321,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
@@ -8430,6 +9332,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
@@ -8440,6 +9343,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_RESPONSE",
@@ -8450,6 +9354,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.ANY_SNOOP",
@@ -8460,6 +9365,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.HITM_OTHER_CORE",
@@ -8470,6 +9376,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -8480,6 +9387,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -8490,6 +9398,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.NO_SNOOP_NEEDED",
@@ -8500,6 +9409,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -8510,6 +9420,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_MISS",
@@ -8520,6 +9431,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT.SNOOP_NONE",
@@ -8530,6 +9442,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.ANY_SNOOP",
@@ -8540,6 +9453,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.HITM_OTHER_CORE",
@@ -8550,6 +9464,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -8560,6 +9475,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -8570,6 +9486,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -8580,6 +9497,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_MISS",
@@ -8590,6 +9508,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_E.SNOOP_NONE",
@@ -8600,6 +9519,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.ANY_SNOOP",
@@ -8610,6 +9530,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.HITM_OTHER_CORE",
@@ -8620,6 +9541,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -8630,6 +9552,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -8640,6 +9563,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -8650,6 +9574,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.SNOOP_MISS",
@@ -8660,6 +9585,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_F.SNOOP_NONE",
@@ -8670,6 +9596,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.ANY_SNOOP",
@@ -8680,6 +9607,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.HITM_OTHER_CORE",
@@ -8690,6 +9618,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -8700,6 +9629,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -8710,6 +9640,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -8720,6 +9651,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_MISS",
@@ -8730,6 +9662,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_M.SNOOP_NONE",
@@ -8740,6 +9673,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.ANY_SNOOP",
@@ -8750,6 +9684,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.HITM_OTHER_CORE",
@@ -8760,6 +9695,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -8770,6 +9706,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -8780,6 +9717,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -8790,6 +9728,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_MISS",
@@ -8800,6 +9739,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_HIT_S.SNOOP_NONE",
@@ -8810,6 +9750,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -8820,6 +9761,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -8830,6 +9772,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -8840,6 +9783,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP",
@@ -8850,6 +9794,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -8860,6 +9805,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -8870,6 +9816,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -8880,6 +9827,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -8890,6 +9838,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS",
@@ -8900,6 +9849,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE",
@@ -8910,6 +9860,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.ANY_RESPONSE",
@@ -8920,6 +9871,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.ANY_SNOOP",
@@ -8930,6 +9882,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.HITM_OTHER_CORE",
@@ -8940,6 +9893,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -8950,6 +9904,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -8960,6 +9915,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.NO_SNOOP_NEEDED",
@@ -8970,6 +9926,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -8980,6 +9937,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_MISS",
@@ -8990,6 +9948,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT.SNOOP_NONE",
@@ -9000,6 +9959,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.ANY_SNOOP",
@@ -9010,6 +9970,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.HITM_OTHER_CORE",
@@ -9020,6 +9981,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -9030,6 +9992,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -9040,6 +10003,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -9050,6 +10014,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_MISS",
@@ -9060,6 +10025,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_E.SNOOP_NONE",
@@ -9070,6 +10036,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.ANY_SNOOP",
@@ -9080,6 +10047,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.HITM_OTHER_CORE",
@@ -9090,6 +10058,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -9100,6 +10069,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -9110,6 +10080,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -9120,6 +10091,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.SNOOP_MISS",
@@ -9130,6 +10102,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_F.SNOOP_NONE",
@@ -9140,6 +10113,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.ANY_SNOOP",
@@ -9150,6 +10124,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.HITM_OTHER_CORE",
@@ -9160,6 +10135,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -9170,6 +10146,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -9180,6 +10157,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -9190,6 +10168,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_MISS",
@@ -9200,6 +10179,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_M.SNOOP_NONE",
@@ -9210,6 +10190,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.ANY_SNOOP",
@@ -9220,6 +10201,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.HITM_OTHER_CORE",
@@ -9230,6 +10212,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -9240,6 +10223,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -9250,6 +10234,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -9260,6 +10245,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_MISS",
@@ -9270,6 +10256,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_HIT_S.SNOOP_NONE",
@@ -9280,6 +10267,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -9290,6 +10278,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -9300,6 +10289,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -9310,6 +10300,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.ANY_SNOOP",
@@ -9320,6 +10311,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -9330,6 +10322,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -9340,6 +10333,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -9350,6 +10344,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -9360,6 +10355,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_MISS",
@@ -9370,6 +10366,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.SUPPLIER_NONE.SNOOP_NONE",
@@ -9380,6 +10377,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.ANY_RESPONSE",
@@ -9390,6 +10388,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.ANY_SNOOP",
@@ -9400,6 +10399,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.HITM_OTHER_CORE",
@@ -9410,6 +10410,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -9420,6 +10421,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -9430,6 +10432,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.NO_SNOOP_NEEDED",
@@ -9440,6 +10443,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -9450,6 +10454,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.SNOOP_MISS",
@@ -9460,6 +10465,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT.SNOOP_NONE",
@@ -9470,6 +10476,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.ANY_SNOOP",
@@ -9480,6 +10487,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.HITM_OTHER_CORE",
@@ -9490,6 +10498,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -9500,6 +10509,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -9510,6 +10520,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -9520,6 +10531,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.SNOOP_MISS",
@@ -9530,6 +10542,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_E.SNOOP_NONE",
@@ -9540,6 +10553,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.ANY_SNOOP",
@@ -9550,6 +10564,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.HITM_OTHER_CORE",
@@ -9560,6 +10575,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -9570,6 +10586,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -9580,6 +10597,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -9590,6 +10608,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.SNOOP_MISS",
@@ -9600,6 +10619,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_F.SNOOP_NONE",
@@ -9610,6 +10630,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.ANY_SNOOP",
@@ -9620,6 +10641,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.HITM_OTHER_CORE",
@@ -9630,6 +10652,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -9640,6 +10663,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -9650,6 +10674,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -9660,6 +10685,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.SNOOP_MISS",
@@ -9670,6 +10696,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_M.SNOOP_NONE",
@@ -9680,6 +10707,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.ANY_SNOOP",
@@ -9690,6 +10718,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.HITM_OTHER_CORE",
@@ -9700,6 +10729,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -9710,6 +10740,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -9720,6 +10751,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -9730,6 +10762,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.SNOOP_MISS",
@@ -9740,6 +10773,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_HIT_S.SNOOP_NONE",
@@ -9750,6 +10784,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -9760,6 +10795,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -9770,6 +10806,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -9780,6 +10817,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.ANY_SNOOP",
@@ -9790,6 +10828,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -9800,6 +10839,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -9810,6 +10850,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -9820,6 +10861,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -9830,6 +10872,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_MISS",
@@ -9840,6 +10883,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_NONE",
@@ -9850,6 +10894,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.ANY_RESPONSE",
@@ -9860,6 +10905,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.ANY_SNOOP",
@@ -9870,6 +10916,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.HITM_OTHER_CORE",
@@ -9880,6 +10927,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -9890,6 +10938,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -9900,6 +10949,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
@@ -9910,6 +10960,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -9920,6 +10971,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.SNOOP_MISS",
@@ -9930,6 +10982,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT.SNOOP_NONE",
@@ -9940,6 +10993,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.ANY_SNOOP",
@@ -9950,6 +11004,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
@@ -9960,6 +11015,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -9970,6 +11026,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -9980,6 +11037,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -9990,6 +11048,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.SNOOP_MISS",
@@ -10000,6 +11059,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_E.SNOOP_NONE",
@@ -10010,6 +11070,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.ANY_SNOOP",
@@ -10020,6 +11081,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
@@ -10030,6 +11092,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -10040,6 +11103,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -10050,6 +11114,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -10060,6 +11125,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.SNOOP_MISS",
@@ -10070,6 +11136,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_F.SNOOP_NONE",
@@ -10080,6 +11147,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.ANY_SNOOP",
@@ -10090,6 +11158,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
@@ -10100,6 +11169,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -10110,6 +11180,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -10120,6 +11191,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -10130,6 +11202,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.SNOOP_MISS",
@@ -10140,6 +11213,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_M.SNOOP_NONE",
@@ -10150,6 +11224,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.ANY_SNOOP",
@@ -10160,6 +11235,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
@@ -10170,6 +11246,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -10180,6 +11257,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -10190,6 +11268,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -10200,6 +11279,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.SNOOP_MISS",
@@ -10210,6 +11290,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_HIT_S.SNOOP_NONE",
@@ -10220,6 +11301,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -10230,6 +11312,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -10240,6 +11323,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -10250,6 +11334,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
@@ -10260,6 +11345,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -10270,6 +11356,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -10280,6 +11367,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -10290,6 +11378,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -10300,6 +11389,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
@@ -10310,6 +11400,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
@@ -10320,6 +11411,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.ANY_RESPONSE",
@@ -10330,6 +11422,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.ANY_SNOOP",
@@ -10340,6 +11433,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.HITM_OTHER_CORE",
@@ -10350,6 +11444,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -10360,6 +11455,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -10370,6 +11466,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.NO_SNOOP_NEEDED",
@@ -10380,6 +11477,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -10390,6 +11488,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.SNOOP_MISS",
@@ -10400,6 +11499,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT.SNOOP_NONE",
@@ -10410,6 +11510,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.ANY_SNOOP",
@@ -10420,6 +11521,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.HITM_OTHER_CORE",
@@ -10430,6 +11532,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -10440,6 +11543,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -10450,6 +11554,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -10460,6 +11565,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.SNOOP_MISS",
@@ -10470,6 +11576,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_E.SNOOP_NONE",
@@ -10480,6 +11587,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.ANY_SNOOP",
@@ -10490,6 +11598,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.HITM_OTHER_CORE",
@@ -10500,6 +11609,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -10510,6 +11620,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -10520,6 +11631,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -10530,6 +11642,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.SNOOP_MISS",
@@ -10540,6 +11653,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_F.SNOOP_NONE",
@@ -10550,6 +11664,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.ANY_SNOOP",
@@ -10560,6 +11675,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.HITM_OTHER_CORE",
@@ -10570,6 +11686,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -10580,6 +11697,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -10590,6 +11708,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -10600,6 +11719,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.SNOOP_MISS",
@@ -10610,6 +11730,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_M.SNOOP_NONE",
@@ -10620,6 +11741,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.ANY_SNOOP",
@@ -10630,6 +11752,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.HITM_OTHER_CORE",
@@ -10640,6 +11763,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -10650,6 +11774,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -10660,6 +11785,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -10670,6 +11796,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.SNOOP_MISS",
@@ -10680,6 +11807,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_HIT_S.SNOOP_NONE",
@@ -10690,6 +11818,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -10700,6 +11829,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -10710,6 +11840,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -10720,6 +11851,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.ANY_SNOOP",
@@ -10730,6 +11862,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -10740,6 +11873,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -10750,6 +11884,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -10760,6 +11895,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -10770,6 +11906,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.SNOOP_MISS",
@@ -10780,6 +11917,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.SUPPLIER_NONE.SNOOP_NONE",
@@ -10790,6 +11928,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.ANY_RESPONSE",
@@ -10800,6 +11939,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.ANY_SNOOP",
@@ -10810,6 +11950,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.HITM_OTHER_CORE",
@@ -10820,6 +11961,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -10830,6 +11972,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -10840,6 +11983,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.NO_SNOOP_NEEDED",
@@ -10850,6 +11994,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -10860,6 +12005,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.SNOOP_MISS",
@@ -10870,6 +12016,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT.SNOOP_NONE",
@@ -10880,6 +12027,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.ANY_SNOOP",
@@ -10890,6 +12038,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.HITM_OTHER_CORE",
@@ -10900,6 +12049,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -10910,6 +12060,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -10920,6 +12071,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -10930,6 +12082,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.SNOOP_MISS",
@@ -10940,6 +12093,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_E.SNOOP_NONE",
@@ -10950,6 +12104,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.ANY_SNOOP",
@@ -10960,6 +12115,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.HITM_OTHER_CORE",
@@ -10970,6 +12126,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -10980,6 +12137,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -10990,6 +12148,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -11000,6 +12159,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.SNOOP_MISS",
@@ -11010,6 +12170,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_F.SNOOP_NONE",
@@ -11020,6 +12181,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.ANY_SNOOP",
@@ -11030,6 +12192,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.HITM_OTHER_CORE",
@@ -11040,6 +12203,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -11050,6 +12214,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -11060,6 +12225,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -11070,6 +12236,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.SNOOP_MISS",
@@ -11080,6 +12247,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_M.SNOOP_NONE",
@@ -11090,6 +12258,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.ANY_SNOOP",
@@ -11100,6 +12269,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.HITM_OTHER_CORE",
@@ -11110,6 +12280,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -11120,6 +12291,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -11130,6 +12302,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -11140,6 +12313,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.SNOOP_MISS",
@@ -11150,6 +12324,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_HIT_S.SNOOP_NONE",
@@ -11160,6 +12335,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -11170,6 +12346,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -11180,6 +12357,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -11190,6 +12368,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
@@ -11200,6 +12379,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -11210,6 +12390,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -11220,6 +12401,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -11230,6 +12412,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -11240,6 +12423,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
@@ -11250,6 +12434,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
@@ -11260,6 +12445,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.ANY_RESPONSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.ANY_RESPONSE",
@@ -11270,6 +12456,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.ANY_SNOOP",
@@ -11280,6 +12467,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.HITM_OTHER_CORE",
@@ -11290,6 +12478,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_FWD",
@@ -11300,6 +12489,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.HIT_OTHER_CORE_NO_FWD",
@@ -11310,6 +12500,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.NO_SNOOP_NEEDED",
@@ -11320,6 +12511,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.SNOOP_HIT_WITH_FWD",
@@ -11330,6 +12522,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.SNOOP_MISS",
@@ -11340,6 +12533,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT.SNOOP_NONE",
@@ -11350,6 +12544,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.ANY_SNOOP",
@@ -11360,6 +12555,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.HITM_OTHER_CORE",
@@ -11370,6 +12566,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_FWD",
@@ -11380,6 +12577,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.HIT_OTHER_CORE_NO_FWD",
@@ -11390,6 +12588,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.NO_SNOOP_NEEDED",
@@ -11400,6 +12599,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.SNOOP_MISS",
@@ -11410,6 +12610,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_E.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_E.SNOOP_NONE",
@@ -11420,6 +12621,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.ANY_SNOOP",
@@ -11430,6 +12632,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.HITM_OTHER_CORE",
@@ -11440,6 +12643,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_FWD",
@@ -11450,6 +12654,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.HIT_OTHER_CORE_NO_FWD",
@@ -11460,6 +12665,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.NO_SNOOP_NEEDED",
@@ -11470,6 +12676,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.SNOOP_MISS",
@@ -11480,6 +12687,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_F.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_F.SNOOP_NONE",
@@ -11490,6 +12698,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.ANY_SNOOP",
@@ -11500,6 +12709,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.HITM_OTHER_CORE",
@@ -11510,6 +12720,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_FWD",
@@ -11520,6 +12731,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.HIT_OTHER_CORE_NO_FWD",
@@ -11530,6 +12742,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.NO_SNOOP_NEEDED",
@@ -11540,6 +12753,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.SNOOP_MISS",
@@ -11550,6 +12764,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_M.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_M.SNOOP_NONE",
@@ -11560,6 +12775,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.ANY_SNOOP",
@@ -11570,6 +12786,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.HITM_OTHER_CORE",
@@ -11580,6 +12797,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_FWD",
@@ -11590,6 +12808,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.HIT_OTHER_CORE_NO_FWD",
@@ -11600,6 +12819,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.NO_SNOOP_NEEDED",
@@ -11610,6 +12830,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.SNOOP_MISS",
@@ -11620,6 +12841,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_HIT_S.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_HIT_S.SNOOP_NONE",
@@ -11630,6 +12852,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
@@ -11640,6 +12863,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
@@ -11650,6 +12874,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
@@ -11660,6 +12885,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.ANY_SNOOP",
@@ -11670,6 +12896,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
@@ -11680,6 +12907,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
@@ -11690,6 +12918,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
@@ -11700,6 +12929,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
@@ -11710,6 +12940,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.SNOOP_MISS",
@@ -11720,6 +12951,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.SUPPLIER_NONE.SNOOP_NONE",
@@ -11730,6 +12962,7 @@
},
{
"BriefDescription": "Number of cache line split locks sent to uncore.",
+ "Counter": "0,1,2,3",
"EventCode": "0xF4",
"EventName": "SQ_MISC.SPLIT_LOCK",
"PublicDescription": "Counts the number of cache line split locks sent to the uncore.",
@@ -11738,6 +12971,7 @@
},
{
"BriefDescription": "Number of PREFETCHNTA instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.NTA",
"SampleAfterValue": "2000003",
@@ -11745,6 +12979,7 @@
},
{
"BriefDescription": "Number of PREFETCHW instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.PREFETCHW",
"SampleAfterValue": "2000003",
@@ -11752,6 +12987,7 @@
},
{
"BriefDescription": "Number of PREFETCHT0 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.T0",
"SampleAfterValue": "2000003",
@@ -11759,6 +12995,7 @@
},
{
"BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.T1_T2",
"SampleAfterValue": "2000003",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/counter.json b/tools/perf/pmu-events/arch/x86/cascadelakex/counter.json
new file mode 100644
index 000000000000..45e243bdfaad
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/counter.json
@@ -0,0 +1,16 @@
+[
+ {
+ "Size": "4",
+ "FixedSize": "3"
+ },
+ {
+ "Unit": "UBOX",
+ "Size": "2",
+ "FixedSize": "0"
+ },
+ {
+ "Unit": "IRP",
+ "Size": "2",
+ "FixedSize": "0"
+ }
+]
\ No newline at end of file
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/floating-point.json b/tools/perf/pmu-events/arch/x86/cascadelakex/floating-point.json
index bb4d5101f962..1c709983b65f 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/floating-point.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/floating-point.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",
"PublicDescription": "Counts once for most SIMD 128-bit packed computational double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
"PublicDescription": "Counts once for most SIMD 128-bit packed computational single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",
"PublicDescription": "Counts once for most SIMD 256-bit packed double computational precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",
"PublicDescription": "Counts once for most SIMD 256-bit packed single computational precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Counts once for most SIMD scalar computational floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR",
"PublicDescription": "Counts once for most SIMD scalar computational single precision and double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SIMD scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "Counts once for most SIMD scalar computational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
"PublicDescription": "Counts once for most SIMD scalar computational double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SIMD scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Counts once for most SIMD scalar computational single precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
"PublicDescription": "Counts once for most SIMD scalar computational single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SIMD scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -89,6 +100,7 @@
},
{
"BriefDescription": "Number of any Vector retired FP arithmetic instructions",
+ "Counter": "0,1,2,3",
"EventCode": "0xC7",
"EventName": "FP_ARITH_INST_RETIRED.VECTOR",
"SampleAfterValue": "2000003",
@@ -96,6 +108,7 @@
},
{
"BriefDescription": "Intel AVX-512 computational 512-bit packed BFloat16 instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xCF",
"EventName": "FP_ARITH_INST_RETIRED2.128BIT_PACKED_BF16",
"PublicDescription": "Counts once for each Intel AVX-512 computational 512-bit packed BFloat16 floating-point instruction retired. Applies to the ZMM based VDPBF16PS instruction. Each count represents 64 computation operations. This event is only supported on products formerly named Cooper Lake and is not supported on products formerly named Cascade Lake.",
@@ -104,6 +117,7 @@
},
{
"BriefDescription": "Intel AVX-512 computational 128-bit packed BFloat16 instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xCF",
"EventName": "FP_ARITH_INST_RETIRED2.256BIT_PACKED_BF16",
"PublicDescription": "Counts once for each Intel AVX-512 computational 128-bit packed BFloat16 floating-point instruction retired. Applies to the XMM based VDPBF16PS instruction. Each count represents 16 computation operations. This event is only supported on products formerly named Cooper Lake and is not supported on products formerly named Cascade Lake.",
@@ -112,6 +126,7 @@
},
{
"BriefDescription": "Intel AVX-512 computational 256-bit packed BFloat16 instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xCF",
"EventName": "FP_ARITH_INST_RETIRED2.512BIT_PACKED_BF16",
"PublicDescription": "Counts once for each Intel AVX-512 computational 256-bit packed BFloat16 floating-point instruction retired. Applies to the YMM based VDPBF16PS instruction. Each count represents 32 computation operations. This event is only supported on products formerly named Cooper Lake and is not supported on products formerly named Cascade Lake.",
@@ -120,6 +135,7 @@
},
{
"BriefDescription": "Cycles with any input/output SSE or FP assist",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xCA",
"EventName": "FP_ASSIST.ANY",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/frontend.json b/tools/perf/pmu-events/arch/x86/cascadelakex/frontend.json
index 095904c77001..0bebcec2cdea 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/frontend.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/frontend.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts the total number when the front end is resteered, mainly when the BPU cannot provide a correct prediction and this is corrected by other branch handling mechanisms at the front end.",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "BACLEARS.ANY",
"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch instruction in a fetch line. This occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction. [This event is alias to ILD_STALL.LCP]",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "DECODE.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. [This event is alias to ILD_STALL.LCP]",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "DSB2MITE_SWITCHES.COUNT",
"PublicDescription": "This event counts the number of the Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Stream Buffer (DSB) cache and u-arch forced misses.\nNote: Invoking MITE requires two or three cycles delay.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",
"PublicDescription": "Counts Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of the switch itself, for example, when Instruction Decode Queue (IDQ) pre-allocation is unavailable, or Instruction Decode Queue (IDQ) is full. SBD-to-MITE switch true penalty cycles happen after the merge mux (MM) receives Decode Stream Buffer (DSB) Sync-indication until receiving the first MITE uop. MM is placed before Instruction Decode Queue (IDQ) to merge uops being fed from the MITE and Decode Stream Buffer (DSB) paths. Decode Stream Buffer (DSB) inserts the Sync-indication whenever a Decode Stream Buffer (DSB)-to-MITE switch occurs.Penalty: A Decode Stream Buffer (DSB) hit followed by a Decode Stream Buffer (DSB) miss can cost up to six cycles in which no uops are delivered to the IDQ. Most often, such switches from the Decode Stream Buffer (DSB) to the legacy pipeline cost 02 cycles.",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Retired Instructions who experienced DSB miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",
"MSRIndex": "0x3F7",
@@ -40,10 +45,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.DSB_MISS",
"MSRIndex": "0x3F7",
@@ -51,10 +58,12 @@
"PEBS": "1",
"PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced iTLB true miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.ITLB_MISS",
"MSRIndex": "0x3F7",
@@ -62,30 +71,36 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L1 Cache true miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.L1I_MISS",
"MSRIndex": "0x3F7",
"MSRValue": "0x12",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L2 Cache true miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.L2_MISS",
"MSRIndex": "0x3F7",
"MSRValue": "0x13",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
+ "Counter": "0,1,2,3",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_1",
"MSRIndex": "0x3F7",
@@ -93,20 +108,24 @@
"PEBS": "2",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_128",
"MSRIndex": "0x3F7",
"MSRValue": "0x408006",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_16",
"MSRIndex": "0x3F7",
@@ -114,30 +133,36 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2",
"MSRIndex": "0x3F7",
"MSRValue": "0x400206",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_256",
"MSRIndex": "0x3F7",
"MSRValue": "0x410006",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",
"MSRIndex": "0x3F7",
@@ -145,30 +170,36 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 2 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_2",
"MSRIndex": "0x3F7",
"MSRValue": "0x200206",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 3 bubble-slots for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_3",
"MSRIndex": "0x3F7",
"MSRValue": "0x300206",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_32",
"MSRIndex": "0x3F7",
@@ -176,40 +207,48 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_4",
"MSRIndex": "0x3F7",
"MSRValue": "0x400406",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_512",
"MSRIndex": "0x3F7",
"MSRValue": "0x420006",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_64",
"MSRIndex": "0x3F7",
"MSRValue": "0x404006",
"PEBS": "1",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_8",
"MSRIndex": "0x3F7",
@@ -217,10 +256,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC6",
"EventName": "FRONTEND_RETIRED.STLB_MISS",
"MSRIndex": "0x3F7",
@@ -228,10 +269,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss.",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "ICACHE_16B.IFDATA_STALL",
"PublicDescription": "Cycles where a code line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at a 16 Byte granularity.",
@@ -240,6 +283,7 @@
},
{
"BriefDescription": "Instruction fetch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_HIT",
"SampleAfterValue": "200003",
@@ -247,6 +291,7 @@
},
{
"BriefDescription": "Instruction fetch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_MISS",
"SampleAfterValue": "200003",
@@ -254,6 +299,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_TAG.STALLS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_STALL",
"SampleAfterValue": "200003",
@@ -261,6 +307,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_64B.IFTAG_STALL]",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_TAG.STALLS",
"SampleAfterValue": "200003",
@@ -268,6 +315,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops [This event is alias to IDQ.DSB_CYCLES_OK]",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0x79",
"EventName": "IDQ.ALL_DSB_CYCLES_4_UOPS",
@@ -277,6 +325,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop [This event is alias to IDQ.DSB_CYCLES_ANY]",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.ALL_DSB_CYCLES_ANY_UOPS",
@@ -286,6 +335,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering 4 Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0x79",
"EventName": "IDQ.ALL_MITE_CYCLES_4_UOPS",
@@ -295,6 +345,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.ALL_MITE_CYCLES_ANY_UOPS",
@@ -304,6 +355,7 @@
},
{
"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from Decode Stream Buffer (DSB) path",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES",
@@ -313,6 +365,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop [This event is alias to IDQ.ALL_DSB_CYCLES_ANY_UOPS]",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_ANY",
@@ -322,6 +375,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering 4 Uops [This event is alias to IDQ.ALL_DSB_CYCLES_4_UOPS]",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_OK",
@@ -331,6 +385,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.DSB_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may 'bypass' the IDQ.",
@@ -339,6 +394,7 @@
},
{
"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) from MITE path",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES",
@@ -348,6 +404,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MITE_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may 'bypass' the IDQ. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",
@@ -356,6 +413,7 @@
},
{
"BriefDescription": "Cycles when uops are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequencer (MS) is busy",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MS_CYCLES",
@@ -365,6 +423,7 @@
},
{
"BriefDescription": "Cycles when uops initiated by Decode Stream Buffer (DSB) are being delivered to Instruction Decode Queue (IDQ) while Microcode Sequencer (MS) is busy",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MS_DSB_CYCLES",
@@ -374,6 +433,7 @@
},
{
"BriefDescription": "Uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while Microcode Sequencer (MS) is busy",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MS_MITE_UOPS",
"PublicDescription": "Counts the number of uops initiated by MITE and delivered to Instruction Decode Queue (IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may 'bypass' the IDQ.",
@@ -382,6 +442,7 @@
},
{
"BriefDescription": "Number of switches from DSB (Decode Stream Buffer) or MITE (legacy decode pipeline) to the Microcode Sequencer",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x79",
@@ -392,6 +453,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) while Microcode Sequencer (MS) is busy",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MS_UOPS",
"PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS). Any instruction over 4 uops will be delivered by the MS. Some instructions such as transcendentals may additionally generate uops from the MS.",
@@ -400,6 +462,7 @@
},
{
"BriefDescription": "Uops not delivered to Resource Allocation Table (RAT) per thread when backend of the machine is not stalled",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",
"PublicDescription": "Counts the number of uops not delivered to Resource Allocation Table (RAT) per thread adding 4 x when Resource Allocation Table (RAT) is not stalled and Instruction Decode Queue (IDQ) delivers x uops to Resource Allocation Table (RAT) (where x belongs to {0,1,2,3}). Counting does not cover cases when: a. IDQ-Resource Allocation Table (RAT) pipe serves the other thread. b. Resource Allocation Table (RAT) is stalled for the thread (including uop drops and clear BE conditions). c. Instruction Decode Queue (IDQ) delivers four uops.",
@@ -408,6 +471,7 @@
},
{
"BriefDescription": "Cycles per thread when 4 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",
@@ -417,6 +481,7 @@
},
{
"BriefDescription": "Counts cycles FE delivered 4 uops or Resource Allocation Table (RAT) was stalling FE.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",
@@ -426,6 +491,7 @@
},
{
"BriefDescription": "Cycles per thread when 3 or more uops are not delivered to Resource Allocation Table (RAT) when backend of the machine is not stalled",
+ "Counter": "0,1,2,3",
"CounterMask": "3",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_LE_1_UOP_DELIV.CORE",
@@ -435,6 +501,7 @@
},
{
"BriefDescription": "Cycles with less than 2 uops delivered by the front end.",
+ "Counter": "0,1,2,3",
"CounterMask": "2",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_LE_2_UOP_DELIV.CORE",
@@ -444,6 +511,7 @@
},
{
"BriefDescription": "Cycles with less than 3 uops delivered by the front end.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_LE_3_UOP_DELIV.CORE",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/memory.json b/tools/perf/pmu-events/arch/x86/cascadelakex/memory.json
index a00ad0aaf1ba..1aa800bd1a77 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/memory.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Cycles while L3 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "2",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L3_MISS",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Number of times an HLE execution aborted due to any reasons (multiple categories may count as one).",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.ABORTED",
"PEBS": "1",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Number of times an HLE execution aborted due to unfriendly events (such as interrupts).",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.ABORTED_EVENTS",
"SampleAfterValue": "2000003",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.ABORTED_MEM",
"SampleAfterValue": "2000003",
@@ -40,6 +45,7 @@
},
{
"BriefDescription": "Number of times an HLE execution aborted due to incompatible memory type",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.ABORTED_MEMTYPE",
"PublicDescription": "Number of times an HLE execution aborted due to incompatible memory type.",
@@ -48,6 +54,7 @@
},
{
"BriefDescription": "Number of times an HLE execution aborted due to hardware timer expiration.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.ABORTED_TIMER",
"SampleAfterValue": "2000003",
@@ -55,6 +62,7 @@
},
{
"BriefDescription": "Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.ABORTED_UNFRIENDLY",
"SampleAfterValue": "2000003",
@@ -62,6 +70,7 @@
},
{
"BriefDescription": "Number of times an HLE execution successfully committed",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.COMMIT",
"PublicDescription": "Number of times HLE commit succeeded.",
@@ -70,6 +79,7 @@
},
{
"BriefDescription": "Number of times an HLE execution started.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC8",
"EventName": "HLE_RETIRED.START",
"PublicDescription": "Number of times we entered an HLE region. Does not count nested transactions.",
@@ -78,6 +88,7 @@
},
{
"BriefDescription": "Counts the number of machine clears due to memory order conflicts.",
+ "Counter": "0,1,2,3",
"Errata": "SKL089",
"EventCode": "0xC3",
"EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
@@ -87,6 +98,7 @@
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
@@ -95,10 +107,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "1009",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
@@ -107,10 +121,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "20011",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
@@ -119,10 +135,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "503",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
@@ -131,10 +149,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
@@ -143,10 +163,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
@@ -155,10 +177,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "101",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
@@ -167,10 +191,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "2003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
@@ -179,10 +205,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "50021",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -192,6 +220,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -201,6 +230,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -210,6 +240,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -219,6 +250,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -228,6 +260,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -237,6 +270,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -246,6 +280,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -255,6 +290,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -264,6 +300,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -273,6 +310,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -282,6 +320,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -291,6 +330,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -300,6 +340,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -309,6 +350,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -318,6 +360,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -327,6 +370,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -336,6 +380,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -345,6 +390,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -354,6 +400,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -363,6 +410,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -372,6 +420,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -381,6 +430,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -390,6 +440,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -399,6 +450,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -408,6 +460,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -417,6 +470,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -426,6 +480,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -435,6 +490,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -444,6 +500,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -453,6 +510,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -462,6 +520,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -471,6 +530,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -480,6 +540,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -489,6 +550,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -498,6 +560,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -507,6 +570,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -516,6 +580,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -525,6 +590,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -534,6 +600,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -543,6 +610,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -552,6 +620,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -561,6 +630,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -570,6 +640,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -579,6 +650,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -588,6 +660,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -597,6 +670,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -606,6 +680,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -615,6 +690,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -624,6 +700,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -633,6 +710,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -642,6 +720,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -651,6 +730,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -660,6 +740,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -669,6 +750,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -678,6 +760,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -687,6 +770,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -696,6 +780,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -705,6 +790,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -714,6 +800,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -723,6 +810,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -732,6 +820,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -741,6 +830,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -750,6 +840,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -759,6 +850,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -768,6 +860,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -777,6 +870,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -786,6 +880,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -795,6 +890,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -804,6 +900,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -813,6 +910,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -822,6 +920,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -831,6 +930,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -840,6 +940,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -849,6 +950,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -858,6 +960,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.ANY_SNOOP OCR.ALL_READS.L3_MISS.ANY_SNOOP OCR.ALL_READS.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -867,6 +970,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -876,6 +980,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -885,6 +990,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -894,6 +1000,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -903,6 +1010,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.REMOTE_HITM OCR.ALL_READS.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -912,6 +1020,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -921,6 +1030,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.SNOOP_MISS OCR.ALL_READS.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -930,6 +1040,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS.SNOOP_NONE OCR.ALL_READS.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -939,6 +1050,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -948,6 +1060,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -957,6 +1070,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -966,6 +1080,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -975,6 +1090,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -984,6 +1100,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -993,6 +1110,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1002,6 +1120,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1011,6 +1130,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1020,6 +1140,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1029,6 +1150,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1038,6 +1160,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1047,6 +1170,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1056,6 +1180,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1065,6 +1190,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1074,6 +1200,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1083,6 +1210,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP OCR.ALL_RFO.L3_MISS.ANY_SNOOP OCR.ALL_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1092,6 +1220,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1101,6 +1230,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1110,6 +1240,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1119,6 +1250,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1128,6 +1260,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM OCR.ALL_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -1137,6 +1270,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1146,6 +1280,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS OCR.ALL_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1155,6 +1290,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE OCR.ALL_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1164,6 +1300,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1173,6 +1310,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1182,6 +1320,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1191,6 +1330,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1200,6 +1340,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1209,6 +1350,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1218,6 +1360,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1227,6 +1370,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1236,6 +1380,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1245,6 +1390,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1254,6 +1400,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1263,6 +1410,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1272,6 +1420,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1281,6 +1430,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1290,6 +1440,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1299,6 +1450,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1308,6 +1460,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1317,6 +1470,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1326,6 +1480,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1335,6 +1490,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1344,6 +1500,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1353,6 +1510,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -1362,6 +1520,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1371,6 +1530,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1380,6 +1540,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1389,6 +1550,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1398,6 +1560,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1407,6 +1570,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1416,6 +1580,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1425,6 +1590,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1434,6 +1600,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1443,6 +1610,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1452,6 +1620,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1461,6 +1630,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1470,6 +1640,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1479,6 +1650,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1488,6 +1660,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1497,6 +1670,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1506,6 +1680,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1515,6 +1690,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1524,6 +1700,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1533,6 +1710,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1542,6 +1720,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1551,6 +1730,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1560,6 +1740,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1569,6 +1750,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1578,6 +1760,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -1587,6 +1770,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1596,6 +1780,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1605,6 +1790,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1614,6 +1800,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1623,6 +1810,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1632,6 +1820,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1641,6 +1830,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1650,6 +1840,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1659,6 +1850,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1668,6 +1860,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1677,6 +1870,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1686,6 +1880,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1695,6 +1890,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1704,6 +1900,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1713,6 +1910,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1722,6 +1920,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1731,6 +1930,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1740,6 +1940,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1749,6 +1950,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1758,6 +1960,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1767,6 +1970,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1776,6 +1980,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1785,6 +1990,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1794,6 +2000,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1803,6 +2010,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -1812,6 +2020,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1821,6 +2030,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1830,6 +2040,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1839,6 +2050,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1848,6 +2060,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1857,6 +2070,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1866,6 +2080,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1875,6 +2090,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1884,6 +2100,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1893,6 +2110,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1902,6 +2120,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1911,6 +2130,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1920,6 +2140,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1929,6 +2150,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1938,6 +2160,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1947,6 +2170,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1956,6 +2180,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1965,6 +2190,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1974,6 +2200,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1983,6 +2210,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.ANY_SNOOP OCR.OTHER.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1992,6 +2220,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HITM_OTHER_CORE OCR.OTHER.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2001,6 +2230,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2010,6 +2240,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2019,6 +2250,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2028,6 +2260,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -2037,6 +2270,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2046,6 +2280,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2055,6 +2290,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2064,6 +2300,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2073,6 +2310,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2082,6 +2320,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2091,6 +2330,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2100,6 +2340,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2109,6 +2350,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2118,6 +2360,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2127,6 +2370,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2136,6 +2380,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2145,6 +2390,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2154,6 +2400,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2163,6 +2410,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2172,6 +2420,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2181,6 +2430,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2190,6 +2440,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2199,6 +2450,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2208,6 +2460,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2217,6 +2470,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2226,6 +2480,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2235,6 +2490,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2244,6 +2500,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2253,6 +2510,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -2262,6 +2520,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2271,6 +2530,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2280,6 +2540,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2289,6 +2550,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2298,6 +2560,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2307,6 +2570,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2316,6 +2580,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2325,6 +2590,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2334,6 +2600,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2343,6 +2610,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2352,6 +2620,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2361,6 +2630,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2370,6 +2640,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2379,6 +2650,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2388,6 +2660,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2397,6 +2670,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2406,6 +2680,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2415,6 +2690,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2424,6 +2700,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2433,6 +2710,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2442,6 +2720,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2451,6 +2730,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2460,6 +2740,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2469,6 +2750,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2478,6 +2760,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -2487,6 +2770,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2496,6 +2780,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2505,6 +2790,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2514,6 +2800,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2523,6 +2810,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2532,6 +2820,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2541,6 +2830,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2550,6 +2840,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2559,6 +2850,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2568,6 +2860,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2577,6 +2870,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2586,6 +2880,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2595,6 +2890,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2604,6 +2900,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2613,6 +2910,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2622,6 +2920,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2631,6 +2930,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2640,6 +2940,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2649,6 +2950,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2658,6 +2960,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2667,6 +2970,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2676,6 +2980,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2685,6 +2990,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2694,6 +3000,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2703,6 +3010,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -2712,6 +3020,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2721,6 +3030,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2730,6 +3040,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2739,6 +3050,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2748,6 +3060,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2757,6 +3070,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2766,6 +3080,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2775,6 +3090,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2784,6 +3100,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2793,6 +3110,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2802,6 +3120,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2811,6 +3130,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2820,6 +3140,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2829,6 +3150,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2838,6 +3160,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2847,6 +3170,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2856,6 +3180,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2865,6 +3190,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2874,6 +3200,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2883,6 +3210,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2892,6 +3220,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2901,6 +3230,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2910,6 +3240,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2919,6 +3250,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -2928,6 +3260,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -2937,6 +3270,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2946,6 +3280,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -2955,6 +3290,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2964,6 +3300,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -2973,6 +3310,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -2982,6 +3320,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -2991,6 +3330,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3000,6 +3340,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3009,6 +3350,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3018,6 +3360,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3027,6 +3370,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3036,6 +3380,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3045,6 +3390,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3054,6 +3400,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3063,6 +3410,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3072,6 +3420,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3081,6 +3430,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3090,6 +3440,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3099,6 +3450,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3108,6 +3460,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3117,6 +3470,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3126,6 +3480,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3135,6 +3490,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3144,6 +3500,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3153,6 +3510,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -3162,6 +3520,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3171,6 +3530,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3180,6 +3540,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3189,6 +3550,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3198,6 +3560,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3207,6 +3570,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3216,6 +3580,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3225,6 +3590,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3234,6 +3600,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3243,6 +3610,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3252,6 +3620,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3261,6 +3630,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3270,6 +3640,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -3279,6 +3650,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3288,6 +3660,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3297,6 +3670,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -3306,6 +3680,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -3315,6 +3690,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -3324,6 +3700,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -3333,6 +3710,7 @@
},
{
"BriefDescription": "Demand Data Read requests who miss L3 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
"PublicDescription": "Demand Data Read requests who miss L3 cache.",
@@ -3341,6 +3719,7 @@
},
{
"BriefDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the superQ.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD",
@@ -3349,6 +3728,7 @@
},
{
"BriefDescription": "Counts number of Offcore outstanding Demand Data Read requests that miss L3 cache in the superQ every cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",
"SampleAfterValue": "2000003",
@@ -3356,6 +3736,7 @@
},
{
"BriefDescription": "Cycles with at least 6 Demand Data Read requests that miss L3 cache in the superQ.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6",
@@ -3364,6 +3745,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.ANY_SNOOP",
@@ -3374,6 +3756,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HITM_OTHER_CORE",
@@ -3384,6 +3767,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -3394,6 +3778,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -3404,6 +3789,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
@@ -3414,6 +3800,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HITM",
@@ -3424,6 +3811,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
@@ -3434,6 +3822,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_MISS",
@@ -3444,6 +3833,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS.SNOOP_NONE",
@@ -3454,6 +3844,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -3464,6 +3855,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -3474,6 +3866,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -3484,6 +3877,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -3494,6 +3888,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -3504,6 +3899,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -3514,6 +3910,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -3524,6 +3921,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -3534,6 +3932,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -3544,6 +3943,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -3554,6 +3954,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -3564,6 +3965,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -3574,6 +3976,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -3584,6 +3987,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -3594,6 +3998,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -3604,6 +4009,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -3614,6 +4020,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.ANY_SNOOP",
@@ -3624,6 +4031,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HITM_OTHER_CORE",
@@ -3634,6 +4042,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -3644,6 +4053,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -3654,6 +4064,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
@@ -3664,6 +4075,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HITM",
@@ -3674,6 +4086,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
@@ -3684,6 +4097,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_MISS",
@@ -3694,6 +4108,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS.SNOOP_NONE",
@@ -3704,6 +4119,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -3714,6 +4130,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -3724,6 +4141,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -3734,6 +4152,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -3744,6 +4163,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -3754,6 +4174,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -3764,6 +4185,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -3774,6 +4196,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -3784,6 +4207,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -3794,6 +4218,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -3804,6 +4229,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -3814,6 +4240,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -3824,6 +4251,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -3834,6 +4262,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -3844,6 +4273,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -3854,6 +4284,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -3864,6 +4295,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.ANY_SNOOP",
@@ -3874,6 +4306,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HITM_OTHER_CORE",
@@ -3884,6 +4317,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -3894,6 +4328,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -3904,6 +4339,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.NO_SNOOP_NEEDED",
@@ -3914,6 +4350,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HITM",
@@ -3924,6 +4361,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.REMOTE_HIT_FORWARD",
@@ -3934,6 +4372,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_MISS",
@@ -3944,6 +4383,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS.SNOOP_NONE",
@@ -3954,6 +4394,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -3964,6 +4405,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -3974,6 +4416,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -3984,6 +4427,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -3994,6 +4438,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -4004,6 +4449,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -4014,6 +4460,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4024,6 +4471,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -4034,6 +4482,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4044,6 +4493,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -4054,6 +4504,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -4064,6 +4515,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -4074,6 +4526,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4084,6 +4537,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -4094,6 +4548,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -4104,6 +4559,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_PF_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -4114,6 +4570,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.ANY_SNOOP",
@@ -4124,6 +4581,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HITM_OTHER_CORE",
@@ -4134,6 +4592,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -4144,6 +4603,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -4154,6 +4614,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.NO_SNOOP_NEEDED",
@@ -4164,6 +4625,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HITM",
@@ -4174,6 +4636,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.REMOTE_HIT_FORWARD",
@@ -4184,6 +4647,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_MISS",
@@ -4194,6 +4658,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS.SNOOP_NONE",
@@ -4204,6 +4669,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -4214,6 +4680,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -4224,6 +4691,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -4234,6 +4702,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4244,6 +4713,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -4254,6 +4724,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -4264,6 +4735,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4274,6 +4746,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -4284,6 +4757,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4294,6 +4768,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -4304,6 +4779,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -4314,6 +4790,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -4324,6 +4801,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4334,6 +4812,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -4344,6 +4823,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -4354,6 +4834,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_READS.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -4364,6 +4845,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.ANY_SNOOP",
@@ -4374,6 +4856,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HITM_OTHER_CORE",
@@ -4384,6 +4867,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -4394,6 +4878,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -4404,6 +4889,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.NO_SNOOP_NEEDED",
@@ -4414,6 +4900,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HITM",
@@ -4424,6 +4911,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.REMOTE_HIT_FORWARD",
@@ -4434,6 +4922,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_MISS",
@@ -4444,6 +4933,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS.SNOOP_NONE",
@@ -4454,6 +4944,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -4464,6 +4955,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -4474,6 +4966,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -4484,6 +4977,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4494,6 +4988,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -4504,6 +4999,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -4514,6 +5010,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4524,6 +5021,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -4534,6 +5032,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4544,6 +5043,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -4554,6 +5054,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -4564,6 +5065,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -4574,6 +5076,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4584,6 +5087,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -4594,6 +5098,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -4604,6 +5109,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.ALL_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -4614,6 +5120,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.ANY_SNOOP",
@@ -4624,6 +5131,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HITM_OTHER_CORE",
@@ -4634,6 +5142,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -4644,6 +5153,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -4654,6 +5164,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.NO_SNOOP_NEEDED",
@@ -4664,6 +5175,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HITM",
@@ -4674,6 +5186,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.REMOTE_HIT_FORWARD",
@@ -4684,6 +5197,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_MISS",
@@ -4694,6 +5208,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS.SNOOP_NONE",
@@ -4704,6 +5219,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -4714,6 +5230,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -4724,6 +5241,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -4734,6 +5252,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4744,6 +5263,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -4754,6 +5274,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -4764,6 +5285,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4774,6 +5296,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -4784,6 +5307,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -4794,6 +5318,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -4804,6 +5329,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -4814,6 +5340,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -4824,6 +5351,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4834,6 +5362,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -4844,6 +5373,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -4854,6 +5384,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -4864,6 +5395,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.ANY_SNOOP",
@@ -4874,6 +5406,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HITM_OTHER_CORE",
@@ -4884,6 +5417,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -4894,6 +5428,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -4904,6 +5439,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
@@ -4914,6 +5450,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HITM",
@@ -4924,6 +5461,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
@@ -4934,6 +5472,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_MISS",
@@ -4944,6 +5483,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS.SNOOP_NONE",
@@ -4954,6 +5494,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -4964,6 +5505,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -4974,6 +5516,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -4984,6 +5527,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -4994,6 +5538,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -5004,6 +5549,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -5014,6 +5560,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5024,6 +5571,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -5034,6 +5582,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5044,6 +5593,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -5054,6 +5604,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -5064,6 +5615,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -5074,6 +5626,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5084,6 +5637,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -5094,6 +5648,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -5104,6 +5659,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -5114,6 +5670,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.ANY_SNOOP",
@@ -5124,6 +5681,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HITM_OTHER_CORE",
@@ -5134,6 +5692,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -5144,6 +5703,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -5154,6 +5714,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.NO_SNOOP_NEEDED",
@@ -5164,6 +5725,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HITM",
@@ -5174,6 +5736,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.REMOTE_HIT_FORWARD",
@@ -5184,6 +5747,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_MISS",
@@ -5194,6 +5758,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS.SNOOP_NONE",
@@ -5204,6 +5769,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -5214,6 +5780,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -5224,6 +5791,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -5234,6 +5802,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5244,6 +5813,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -5254,6 +5824,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -5264,6 +5835,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5274,6 +5846,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -5284,6 +5857,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5294,6 +5868,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -5304,6 +5879,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -5314,6 +5890,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -5324,6 +5901,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5334,6 +5912,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -5344,6 +5923,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -5354,6 +5934,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.DEMAND_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -5364,6 +5945,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.ANY_SNOOP",
@@ -5374,6 +5956,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HITM_OTHER_CORE",
@@ -5384,6 +5967,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -5394,6 +5978,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -5404,6 +5989,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.NO_SNOOP_NEEDED",
@@ -5414,6 +6000,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HITM",
@@ -5424,6 +6011,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.REMOTE_HIT_FORWARD",
@@ -5434,6 +6022,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_MISS",
@@ -5444,6 +6033,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS.SNOOP_NONE",
@@ -5454,6 +6044,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -5464,6 +6055,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -5474,6 +6066,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -5484,6 +6077,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5494,6 +6088,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -5504,6 +6099,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -5514,6 +6110,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5524,6 +6121,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -5534,6 +6132,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5544,6 +6143,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -5554,6 +6154,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -5564,6 +6165,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -5574,6 +6176,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5584,6 +6187,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -5594,6 +6198,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -5604,6 +6209,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.OTHER.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -5614,6 +6220,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.ANY_SNOOP",
@@ -5624,6 +6231,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HITM_OTHER_CORE",
@@ -5634,6 +6242,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -5644,6 +6253,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -5654,6 +6264,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.NO_SNOOP_NEEDED",
@@ -5664,6 +6275,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HITM",
@@ -5674,6 +6286,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.REMOTE_HIT_FORWARD",
@@ -5684,6 +6297,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_MISS",
@@ -5694,6 +6308,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS.SNOOP_NONE",
@@ -5704,6 +6319,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -5714,6 +6330,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -5724,6 +6341,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -5734,6 +6352,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5744,6 +6363,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -5754,6 +6374,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -5764,6 +6385,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5774,6 +6396,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -5784,6 +6407,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -5794,6 +6418,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -5804,6 +6429,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -5814,6 +6440,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -5824,6 +6451,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5834,6 +6462,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -5844,6 +6473,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -5854,6 +6484,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L1D_AND_SW.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -5864,6 +6495,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.ANY_SNOOP",
@@ -5874,6 +6506,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HITM_OTHER_CORE",
@@ -5884,6 +6517,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -5894,6 +6528,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -5904,6 +6539,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
@@ -5914,6 +6550,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HITM",
@@ -5924,6 +6561,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
@@ -5934,6 +6572,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_MISS",
@@ -5944,6 +6583,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS.SNOOP_NONE",
@@ -5954,6 +6594,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -5964,6 +6605,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -5974,6 +6616,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -5984,6 +6627,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -5994,6 +6638,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -6004,6 +6649,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -6014,6 +6660,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6024,6 +6671,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -6034,6 +6682,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6044,6 +6693,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -6054,6 +6704,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -6064,6 +6715,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -6074,6 +6726,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6084,6 +6737,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -6094,6 +6748,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -6104,6 +6759,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -6114,6 +6770,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.ANY_SNOOP",
@@ -6124,6 +6781,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HITM_OTHER_CORE",
@@ -6134,6 +6792,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -6144,6 +6803,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -6154,6 +6814,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.NO_SNOOP_NEEDED",
@@ -6164,6 +6825,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HITM",
@@ -6174,6 +6836,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.REMOTE_HIT_FORWARD",
@@ -6184,6 +6847,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_MISS",
@@ -6194,6 +6858,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS.SNOOP_NONE",
@@ -6204,6 +6869,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -6214,6 +6880,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -6224,6 +6891,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -6234,6 +6902,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6244,6 +6913,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -6254,6 +6924,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -6264,6 +6935,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6274,6 +6946,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -6284,6 +6957,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6294,6 +6968,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -6304,6 +6979,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -6314,6 +6990,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -6324,6 +7001,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6334,6 +7012,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -6344,6 +7023,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -6354,6 +7034,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L2_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -6364,6 +7045,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.ANY_SNOOP",
@@ -6374,6 +7056,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HITM_OTHER_CORE",
@@ -6384,6 +7067,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -6394,6 +7078,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -6404,6 +7089,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.NO_SNOOP_NEEDED",
@@ -6414,6 +7100,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HITM",
@@ -6424,6 +7111,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.REMOTE_HIT_FORWARD",
@@ -6434,6 +7122,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_MISS",
@@ -6444,6 +7133,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS.SNOOP_NONE",
@@ -6454,6 +7144,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -6464,6 +7155,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -6474,6 +7166,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -6484,6 +7177,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6494,6 +7188,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -6504,6 +7199,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -6514,6 +7210,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6524,6 +7221,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -6534,6 +7232,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6544,6 +7243,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -6554,6 +7254,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -6564,6 +7265,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -6574,6 +7276,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6584,6 +7287,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -6594,6 +7298,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -6604,6 +7309,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_DATA_RD.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -6614,6 +7320,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.ANY_SNOOP",
@@ -6624,6 +7331,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HITM_OTHER_CORE",
@@ -6634,6 +7342,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_FWD",
@@ -6644,6 +7353,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.HIT_OTHER_CORE_NO_FWD",
@@ -6654,6 +7364,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.NO_SNOOP_NEEDED",
@@ -6664,6 +7375,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HITM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HITM",
@@ -6674,6 +7386,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.REMOTE_HIT_FORWARD",
@@ -6684,6 +7397,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_MISS",
@@ -6694,6 +7408,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS.SNOOP_NONE",
@@ -6704,6 +7419,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.ANY_SNOOP",
@@ -6714,6 +7430,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HITM_OTHER_CORE",
@@ -6724,6 +7441,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_FWD",
@@ -6734,6 +7452,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6744,6 +7463,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.NO_SNOOP_NEEDED",
@@ -6754,6 +7474,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS",
@@ -6764,6 +7485,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6774,6 +7496,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_LOCAL_DRAM.SNOOP_NONE",
@@ -6784,6 +7507,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD",
@@ -6794,6 +7518,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.ANY_SNOOP",
@@ -6804,6 +7529,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HITM_OTHER_CORE",
@@ -6814,6 +7540,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_FWD",
@@ -6824,6 +7551,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.HIT_OTHER_CORE_NO_FWD",
@@ -6834,6 +7562,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.NO_SNOOP_NEEDED",
@@ -6844,6 +7573,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_MISS",
@@ -6854,6 +7584,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event OCR.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB7, 0xBB",
"EventName": "OFFCORE_RESPONSE.PF_L3_RFO.L3_MISS_REMOTE_HOP1_DRAM.SNOOP_NONE",
@@ -6864,6 +7595,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to any reasons (multiple categories may count as one).",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.ABORTED",
"PEBS": "1",
@@ -6873,6 +7605,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.ABORTED_EVENTS",
"PublicDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).",
@@ -6881,6 +7614,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.ABORTED_MEM",
"PublicDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",
@@ -6889,6 +7623,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.ABORTED_MEMTYPE",
"PublicDescription": "Number of times an RTM execution aborted due to incompatible memory type.",
@@ -6897,6 +7632,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to uncommon conditions.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.ABORTED_TIMER",
"SampleAfterValue": "2000003",
@@ -6904,6 +7640,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",
"PublicDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions.",
@@ -6912,6 +7649,7 @@
},
{
"BriefDescription": "Number of times an RTM execution successfully committed",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.COMMIT",
"PublicDescription": "Number of times RTM commit succeeded.",
@@ -6920,6 +7658,7 @@
},
{
"BriefDescription": "Number of times an RTM execution started.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC9",
"EventName": "RTM_RETIRED.START",
"PublicDescription": "Number of times we entered an RTM region. Does not count nested transactions.",
@@ -6928,6 +7667,7 @@
},
{
"BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC1",
"SampleAfterValue": "2000003",
@@ -6935,6 +7675,7 @@
},
{
"BriefDescription": "Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC2",
"PublicDescription": "Unfriendly TSX abort triggered by a vzeroupper instruction.",
@@ -6943,6 +7684,7 @@
},
{
"BriefDescription": "Counts the number of times an instruction execution caused the transactional nest count supported to be exceeded",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC3",
"PublicDescription": "Unfriendly TSX abort triggered by a nest count that is too deep.",
@@ -6951,6 +7693,7 @@
},
{
"BriefDescription": "Counts the number of times a XBEGIN instruction was executed inside an HLE transactional region.",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC4",
"PublicDescription": "RTM region detected inside HLE.",
@@ -6959,6 +7702,7 @@
},
{
"BriefDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region",
+ "Counter": "0,1,2,3",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC5",
"PublicDescription": "Counts the number of times an HLE XACQUIRE instruction was executed inside an RTM transactional region.",
@@ -6967,6 +7711,7 @@
},
{
"BriefDescription": "Number of times a transactional abort was signaled due to a data capacity limitation for transactional reads or writes.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY",
"SampleAfterValue": "2000003",
@@ -6974,6 +7719,7 @@
},
{
"BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CONFLICT",
"PublicDescription": "Number of times a TSX line had a cache conflict.",
@@ -6982,6 +7728,7 @@
},
{
"BriefDescription": "Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_MISMATCH",
"PublicDescription": "Number of times a TSX Abort was triggered due to release/commit but data and address mismatch.",
@@ -6990,6 +7737,7 @@
},
{
"BriefDescription": "Number of times an HLE transactional execution aborted due to NoAllocatedElisionBuffer being non-zero.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_NOT_EMPTY",
"PublicDescription": "Number of times a TSX Abort was triggered due to commit but Lock Buffer not empty.",
@@ -6998,6 +7746,7 @@
},
{
"BriefDescription": "Number of times an HLE transactional execution aborted due to an unsupported read alignment from the elision buffer.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT",
"PublicDescription": "Number of times a TSX Abort was triggered due to attempting an unsupported alignment from Lock Buffer.",
@@ -7006,6 +7755,7 @@
},
{
"BriefDescription": "Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_HLE_STORE_TO_ELIDED_LOCK",
"PublicDescription": "Number of times a TSX Abort was triggered due to a non-release/commit store to lock.",
@@ -7014,6 +7764,7 @@
},
{
"BriefDescription": "Number of times HLE lock could not be elided due to ElisionBufferAvailable being zero.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.HLE_ELISION_BUFFER_FULL",
"PublicDescription": "Number of times we could not allocate Lock Buffer.",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/other.json b/tools/perf/pmu-events/arch/x86/cascadelakex/other.json
index 3ab5e91a4c1c..7486794765e1 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/other.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/other.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
"PublicDescription": "Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
"PublicDescription": "Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
"PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server michroarchtecture). This includes high current AVX 512-bit instructions.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Core cycles the core was throttled due to a pending power level request.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.THROTTLE",
"PublicDescription": "Core cycles the out-of-order engine was throttled due to a pending power level request.",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IFWDFE",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_IFWDFE",
"SampleAfterValue": "2000003",
@@ -40,6 +45,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IFWDM",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_IFWDM",
"SampleAfterValue": "2000003",
@@ -47,6 +53,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IHITFSE",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_IHITFSE",
"SampleAfterValue": "2000003",
@@ -54,6 +61,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_IHITI",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_IHITI",
"SampleAfterValue": "2000003",
@@ -61,6 +69,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_SFWDFE",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_SFWDFE",
"SampleAfterValue": "2000003",
@@ -68,6 +77,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_SFWDM",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_SFWDM",
"SampleAfterValue": "2000003",
@@ -75,6 +85,7 @@
},
{
"BriefDescription": "CORE_SNOOP_RESPONSE.RSP_SHITFSE",
+ "Counter": "0,1,2,3",
"EventCode": "0xEF",
"EventName": "CORE_SNOOP_RESPONSE.RSP_SHITFSE",
"SampleAfterValue": "2000003",
@@ -82,6 +93,7 @@
},
{
"BriefDescription": "Number of hardware interrupts received by the processor.",
+ "Counter": "0,1,2,3",
"EventCode": "0xCB",
"EventName": "HW_INTERRUPTS.RECEIVED",
"PublicDescription": "Counts the number of hardware interruptions received by the processor.",
@@ -90,6 +102,7 @@
},
{
"BriefDescription": "Counts number of cache lines that are dropped and not written back to L3 as they are deemed to be less likely to be reused shortly",
+ "Counter": "0,1,2,3",
"EventCode": "0xFE",
"EventName": "IDI_MISC.WB_DOWNGRADE",
"PublicDescription": "Counts number of cache lines that are dropped and not written back to L3 as they are deemed to be less likely to be reused shortly.",
@@ -98,6 +111,7 @@
},
{
"BriefDescription": "Counts number of cache lines that are allocated and written back to L3 with the intention that they are more likely to be reused shortly",
+ "Counter": "0,1,2,3",
"EventCode": "0xFE",
"EventName": "IDI_MISC.WB_UPGRADE",
"PublicDescription": "Counts number of cache lines that are allocated and written back to L3 with the intention that they are more likely to be reused shortly.",
@@ -106,6 +120,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.ANY_RESPONSE have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -115,6 +130,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -124,6 +140,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -133,6 +150,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -142,6 +160,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -151,6 +170,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -160,6 +180,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -169,6 +190,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -178,6 +200,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -187,6 +210,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -196,6 +220,7 @@
},
{
"BriefDescription": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -205,6 +230,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.ANY_RESPONSE have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -214,6 +240,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -223,6 +250,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -232,6 +260,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -241,6 +270,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -250,6 +280,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -259,6 +290,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -268,6 +300,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -277,6 +310,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -286,6 +320,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -295,6 +330,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -304,6 +340,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.ANY_RESPONSE have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -313,6 +350,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -322,6 +360,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -331,6 +370,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -340,6 +380,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -349,6 +390,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -358,6 +400,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -367,6 +410,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -376,6 +420,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -385,6 +430,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -394,6 +440,7 @@
},
{
"BriefDescription": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_PF_RFO.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -403,6 +450,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.ANY_RESPONSE have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -412,6 +460,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -421,6 +470,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -430,6 +480,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -439,6 +490,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -448,6 +500,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -457,6 +510,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -466,6 +520,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -475,6 +530,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -484,6 +540,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -493,6 +550,7 @@
},
{
"BriefDescription": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_READS.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -502,6 +560,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.ANY_RESPONSE have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -511,6 +570,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -520,6 +580,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -529,6 +590,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -538,6 +600,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -547,6 +610,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -556,6 +620,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -565,6 +630,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -574,6 +640,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -583,6 +650,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -592,6 +660,7 @@
},
{
"BriefDescription": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ALL_RFO.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -601,6 +670,7 @@
},
{
"BriefDescription": "Counts all demand code reads have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -610,6 +680,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -619,6 +690,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -628,6 +700,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -637,6 +710,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -646,6 +720,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -655,6 +730,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -664,6 +740,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -673,6 +750,7 @@
},
{
"BriefDescription": "Counts all demand code reads OCR.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -682,6 +760,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -691,6 +770,7 @@
},
{
"BriefDescription": "Counts all demand code reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -700,6 +780,7 @@
},
{
"BriefDescription": "Counts demand data reads have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -709,6 +790,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -718,6 +800,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -727,6 +810,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -736,6 +820,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -745,6 +830,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -754,6 +840,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -763,6 +850,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -772,6 +860,7 @@
},
{
"BriefDescription": "Counts demand data reads OCR.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -781,6 +870,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -790,6 +880,7 @@
},
{
"BriefDescription": "Counts demand data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -799,6 +890,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -808,6 +900,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -817,6 +910,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -826,6 +920,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -835,6 +930,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -844,6 +940,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -853,6 +950,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -862,6 +960,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -871,6 +970,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs) OCR.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -880,6 +980,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -889,6 +990,7 @@
},
{
"BriefDescription": "Counts all demand data writes (RFOs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -898,6 +1000,7 @@
},
{
"BriefDescription": "Counts any other requests have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -907,6 +1010,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -916,6 +1020,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -925,6 +1030,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -934,6 +1040,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -943,6 +1050,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -952,6 +1060,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -961,6 +1070,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -970,6 +1080,7 @@
},
{
"BriefDescription": "Counts any other requests OCR.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -979,6 +1090,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -988,6 +1100,7 @@
},
{
"BriefDescription": "Counts any other requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -997,6 +1110,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1006,6 +1120,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1015,6 +1130,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1024,6 +1140,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1033,6 +1150,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1042,6 +1160,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1051,6 +1170,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1060,6 +1180,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1069,6 +1190,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests OCR.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1078,6 +1200,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1087,6 +1210,7 @@
},
{
"BriefDescription": "Counts L1 data cache hardware prefetch requests and software prefetch requests",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L1D_AND_SW.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1096,6 +1220,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1105,6 +1230,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1114,6 +1240,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1123,6 +1250,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1132,6 +1260,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1141,6 +1270,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1150,6 +1280,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1159,6 +1290,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1168,6 +1300,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads OCR.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1177,6 +1310,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1186,6 +1320,7 @@
},
{
"BriefDescription": "Counts prefetch (that bring data to L2) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1195,6 +1330,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1204,6 +1340,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1213,6 +1350,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1222,6 +1360,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1231,6 +1370,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1240,6 +1380,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1249,6 +1390,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1258,6 +1400,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1267,6 +1410,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs OCR.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1276,6 +1420,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1285,6 +1430,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to L2) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L2_RFO.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1294,6 +1440,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1303,6 +1450,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1312,6 +1460,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1321,6 +1470,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1330,6 +1480,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1339,6 +1490,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1348,6 +1500,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1357,6 +1510,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1366,6 +1520,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads OCR.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1375,6 +1530,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1384,6 +1540,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_DATA_RD.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1393,6 +1550,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs have any response type.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1402,6 +1560,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1411,6 +1570,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1420,6 +1580,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.PMM_HIT_LOCAL_PMM.SNOOP_NOT_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1429,6 +1590,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.SUPPLIER_NONE.ANY_SNOOP",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.ANY_SNOOP",
"MSRIndex": "0x1a6,0x1a7",
@@ -1438,6 +1600,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HITM_OTHER_CORE",
"MSRIndex": "0x1a6,0x1a7",
@@ -1447,6 +1610,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1456,6 +1620,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.HIT_OTHER_CORE_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -1465,6 +1630,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs OCR.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.NO_SNOOP_NEEDED",
"MSRIndex": "0x1a6,0x1a7",
@@ -1474,6 +1640,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -1483,6 +1650,7 @@
},
{
"BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PF_L3_RFO.SUPPLIER_NONE.SNOOP_NONE",
"MSRIndex": "0x1a6,0x1a7",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/pipeline.json b/tools/perf/pmu-events/arch/x86/cascadelakex/pipeline.json
index 66d686cc933e..3dd296ab4d78 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/pipeline.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x14",
"EventName": "ARITH.DIVIDER_ACTIVE",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "All (macro) branch instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.ALL_BRANCHES",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "All (macro) branch instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.ALL_BRANCHES_PEBS",
@@ -27,6 +30,7 @@
},
{
"BriefDescription": "Conditional branch instructions retired. [This event is alias to BR_INST_RETIRED.CONDITIONAL]",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.COND",
@@ -36,6 +40,7 @@
},
{
"BriefDescription": "Conditional branch instructions retired. [This event is alias to BR_INST_RETIRED.COND]",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.CONDITIONAL",
@@ -46,6 +51,7 @@
},
{
"BriefDescription": "Not taken branch instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_NTAKEN",
@@ -55,6 +61,7 @@
},
{
"BriefDescription": "Far branch instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.FAR_BRANCH",
@@ -65,6 +72,7 @@
},
{
"BriefDescription": "Direct and indirect near call instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.NEAR_CALL",
@@ -75,6 +83,7 @@
},
{
"BriefDescription": "Return instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.NEAR_RETURN",
@@ -85,6 +94,7 @@
},
{
"BriefDescription": "Taken branch instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.NEAR_TAKEN",
@@ -95,6 +105,7 @@
},
{
"BriefDescription": "Not taken branch instructions retired.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091",
"EventCode": "0xC4",
"EventName": "BR_INST_RETIRED.NOT_TAKEN",
@@ -104,6 +115,7 @@
},
{
"BriefDescription": "Speculative and retired mispredicted macro conditional branches",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "BR_MISP_EXEC.ALL_BRANCHES",
"PublicDescription": "This event counts both taken and not taken speculative and retired mispredicted branch instructions.",
@@ -112,6 +124,7 @@
},
{
"BriefDescription": "Speculative mispredicted indirect branches",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "BR_MISP_EXEC.INDIRECT",
"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).",
@@ -120,6 +133,7 @@
},
{
"BriefDescription": "All mispredicted macro branch instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC5",
"EventName": "BR_MISP_RETIRED.ALL_BRANCHES",
"PublicDescription": "Counts all the retired branch instructions that were mispredicted by the processor. A branch misprediction occurs when the processor incorrectly predicts the destination of the branch. When the misprediction is discovered at execution, all the instructions executed in the wrong (speculative) path must be discarded, and the processor must start fetching from the correct path.",
@@ -127,6 +141,7 @@
},
{
"BriefDescription": "Mispredicted macro branch instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC5",
"EventName": "BR_MISP_RETIRED.ALL_BRANCHES_PEBS",
"PEBS": "2",
@@ -136,6 +151,7 @@
},
{
"BriefDescription": "Mispredicted conditional branch instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC5",
"EventName": "BR_MISP_RETIRED.CONDITIONAL",
"PEBS": "1",
@@ -145,6 +161,7 @@
},
{
"BriefDescription": "Mispredicted direct and indirect near call instructions retired.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC5",
"EventName": "BR_MISP_RETIRED.NEAR_CALL",
"PEBS": "1",
@@ -154,6 +171,7 @@
},
{
"BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC5",
"EventName": "BR_MISP_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -162,6 +180,7 @@
},
{
"BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
+ "Counter": "0,1,2,3",
"EventCode": "0xC5",
"EventName": "BR_MISP_RETIRED.RET",
"PEBS": "1",
@@ -171,6 +190,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when this thread is unhalted and the other thread is halted.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE",
"SampleAfterValue": "25003",
@@ -178,6 +198,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when the thread is unhalted.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_THREAD_UNHALTED.REF_XCLK",
"SampleAfterValue": "25003",
@@ -186,6 +207,7 @@
{
"AnyThread": "1",
"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is unhalted.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY",
"SampleAfterValue": "25003",
@@ -193,6 +215,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when this thread is unhalted and the other thread is halted.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",
"SampleAfterValue": "25003",
@@ -200,6 +223,7 @@
},
{
"BriefDescription": "Reference cycles when the core is not in halt state.",
+ "Counter": "Fixed counter 2",
"EventName": "CPU_CLK_UNHALTED.REF_TSC",
"PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
"SampleAfterValue": "2000003",
@@ -207,6 +231,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when the thread is unhalted.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.REF_XCLK",
"SampleAfterValue": "25003",
@@ -215,6 +240,7 @@
{
"AnyThread": "1",
"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is unhalted.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.REF_XCLK_ANY",
"SampleAfterValue": "25003",
@@ -222,6 +248,7 @@
},
{
"BriefDescription": "Counts when there is a transition from ring 1, 2 or 3 to ring 0.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x3C",
@@ -231,6 +258,7 @@
},
{
"BriefDescription": "Core cycles when the thread is not in halt state",
+ "Counter": "Fixed counter 1",
"EventName": "CPU_CLK_UNHALTED.THREAD",
"PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events.",
"SampleAfterValue": "2000003",
@@ -239,12 +267,14 @@
{
"AnyThread": "1",
"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt state.",
+ "Counter": "Fixed counter 1",
"EventName": "CPU_CLK_UNHALTED.THREAD_ANY",
"SampleAfterValue": "2000003",
"UMask": "0x2"
},
{
"BriefDescription": "Thread cycles when thread is not in halt state",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.THREAD_P",
"PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",
@@ -253,12 +283,14 @@
{
"AnyThread": "1",
"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt state.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.THREAD_P_ANY",
"SampleAfterValue": "2000003"
},
{
"BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "8",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",
@@ -267,6 +299,7 @@
},
{
"BriefDescription": "Cycles while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",
@@ -275,6 +308,7 @@
},
{
"BriefDescription": "Cycles while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3",
"CounterMask": "16",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",
@@ -283,6 +317,7 @@
},
{
"BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "12",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",
@@ -291,6 +326,7 @@
},
{
"BriefDescription": "Execution stalls while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",
@@ -299,6 +335,7 @@
},
{
"BriefDescription": "Execution stalls while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3",
"CounterMask": "20",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.STALLS_MEM_ANY",
@@ -307,6 +344,7 @@
},
{
"BriefDescription": "Total execution stalls.",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",
@@ -315,6 +353,7 @@
},
{
"BriefDescription": "Cycles total of 1 uop is executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.1_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",
@@ -323,6 +362,7 @@
},
{
"BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.2_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",
@@ -331,6 +371,7 @@
},
{
"BriefDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.3_PORTS_UTIL",
"PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -339,6 +380,7 @@
},
{
"BriefDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.4_PORTS_UTIL",
"PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -347,6 +389,7 @@
},
{
"BriefDescription": "Cycles where the Store Buffer was full and no outstanding load.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.BOUND_ON_STORES",
"SampleAfterValue": "2000003",
@@ -354,6 +397,7 @@
},
{
"BriefDescription": "Cycles where no uops were executed, the Reservation Station was not empty, the Store Buffer was full and there was no outstanding load.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",
"PublicDescription": "Counts cycles during which no uops were executed on all ports and Reservation Station (RS) was not empty.",
@@ -362,6 +406,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction. [This event is alias to DECODE.LCP]",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "ILD_STALL.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. [This event is alias to DECODE.LCP]",
@@ -370,6 +415,7 @@
},
{
"BriefDescription": "Instruction decoders utilized in a cycle",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "INST_DECODED.DECODERS",
"PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
@@ -378,6 +424,7 @@
},
{
"BriefDescription": "Instructions retired from execution.",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.ANY",
"PublicDescription": "Counts the number of instructions retired from execution. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro-op of the instruction. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter, leaving the four (eight when Hyperthreading is disabled) programmable counters available for other events. INST_RETIRED.ANY_P is counted by a programmable counter and it is an architectural performance event. Counting: Faulting executions of GETSEC/VM entry/VM Exit/MWait will not count as retired instructions.",
"SampleAfterValue": "2000003",
@@ -385,6 +432,7 @@
},
{
"BriefDescription": "Number of instructions retired. General Counter - architectural event",
+ "Counter": "0,1,2,3",
"Errata": "SKL091, SKL044",
"EventCode": "0xC0",
"EventName": "INST_RETIRED.ANY_P",
@@ -393,6 +441,7 @@
},
{
"BriefDescription": "Number of all retired NOP instructions.",
+ "Counter": "0,1,2,3",
"Errata": "SKL091, SKL044",
"EventCode": "0xC0",
"EventName": "INST_RETIRED.NOP",
@@ -402,6 +451,7 @@
},
{
"BriefDescription": "Precise instruction retired event with HW to reduce effect of PEBS shadow in IP distribution",
+ "Counter": "1",
"Errata": "SKL091, SKL044",
"EventCode": "0xC0",
"EventName": "INST_RETIRED.PREC_DIST",
@@ -412,6 +462,7 @@
},
{
"BriefDescription": "Number of cycles using always true condition applied to PEBS instructions retired event.",
+ "Counter": "0,2,3",
"CounterMask": "10",
"Errata": "SKL091, SKL044",
"EventCode": "0xC0",
@@ -424,6 +475,7 @@
},
{
"BriefDescription": "Clears speculative count",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x0D",
@@ -434,6 +486,7 @@
},
{
"BriefDescription": "Cycles the issue-stage is waiting for front-end to fetch from resteered path following branch misprediction or machine clear events.",
+ "Counter": "0,1,2,3",
"EventCode": "0x0D",
"EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",
"SampleAfterValue": "2000003",
@@ -441,6 +494,7 @@
},
{
"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for this thread (e.g. misprediction or memory nuke)",
+ "Counter": "0,1,2,3",
"EventCode": "0x0D",
"EventName": "INT_MISC.RECOVERY_CYCLES",
"PublicDescription": "Core cycles the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",
@@ -450,6 +504,7 @@
{
"AnyThread": "1",
"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for any thread running on the physical core (e.g. misprediction or memory nuke).",
+ "Counter": "0,1,2,3",
"EventCode": "0x0D",
"EventName": "INT_MISC.RECOVERY_CYCLES_ANY",
"SampleAfterValue": "2000003",
@@ -457,6 +512,7 @@
},
{
"BriefDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.NO_SR",
"PublicDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
@@ -465,6 +521,7 @@
},
{
"BriefDescription": "Loads blocked due to overlapping with a preceding store that cannot be forwarded.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.STORE_FORWARD",
"PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",
@@ -473,6 +530,7 @@
},
{
"BriefDescription": "False dependencies in MOB due to partial compare on address.",
+ "Counter": "0,1,2,3",
"EventCode": "0x07",
"EventName": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS",
"PublicDescription": "Counts false dependencies in MOB when the partial comparison upon loose net check and dependency was resolved by the Enhanced Loose net mechanism. This may not result in high performance penalties. Loose net checks can fail when loads and stores are 4k aliased.",
@@ -481,6 +539,7 @@
},
{
"BriefDescription": "Demand load dispatches that hit L1D fill buffer (FB) allocated for software prefetch.",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "LOAD_HIT_PRE.SW_PF",
"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
@@ -489,6 +548,7 @@
},
{
"BriefDescription": "Cycles 4 Uops delivered by the LSD, but didn't come from the decoder. [This event is alias to LSD.CYCLES_OK]",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0xA8",
"EventName": "LSD.CYCLES_4_UOPS",
@@ -498,6 +558,7 @@
},
{
"BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xA8",
"EventName": "LSD.CYCLES_ACTIVE",
@@ -507,6 +568,7 @@
},
{
"BriefDescription": "Cycles 4 Uops delivered by the LSD, but didn't come from the decoder. [This event is alias to LSD.CYCLES_4_UOPS]",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0xA8",
"EventName": "LSD.CYCLES_OK",
@@ -516,6 +578,7 @@
},
{
"BriefDescription": "Number of Uops delivered by the LSD.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "LSD.UOPS",
"PublicDescription": "Number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
@@ -524,6 +587,7 @@
},
{
"BriefDescription": "Number of machine clears (nukes) of any type.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xC3",
@@ -533,6 +597,7 @@
},
{
"BriefDescription": "Self-modifying code (SMC) detected.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC3",
"EventName": "MACHINE_CLEARS.SMC",
"PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
@@ -541,6 +606,7 @@
},
{
"BriefDescription": "Number of times a microcode assist is invoked by HW other than FP-assist. Examples include AD (page Access Dirty) and AVX* related assists.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "OTHER_ASSISTS.ANY",
"SampleAfterValue": "100003",
@@ -548,6 +614,7 @@
},
{
"BriefDescription": "Cycles where the pipeline is stalled due to serializing operations.",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "PARTIAL_RAT_STALLS.SCOREBOARD",
"PublicDescription": "This event counts cycles during which the microcode scoreboard stalls happen.",
@@ -556,6 +623,7 @@
},
{
"BriefDescription": "Resource-related stall cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.ANY",
"PublicDescription": "Counts resource-related stall cycles.",
@@ -564,6 +632,7 @@
},
{
"BriefDescription": "Cycles stalled due to no store buffers available. (not including draining form sync).",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "RESOURCE_STALLS.SB",
"PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",
@@ -572,6 +641,7 @@
},
{
"BriefDescription": "Increments whenever there is an update to the LBR array.",
+ "Counter": "0,1,2,3",
"EventCode": "0xCC",
"EventName": "ROB_MISC_EVENTS.LBR_INSERTS",
"PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",
@@ -580,6 +650,7 @@
},
{
"BriefDescription": "Number of retired PAUSE instructions (that do not end up with a VMExit to the VMM; TSX aborted Instructions may be counted). This event is not supported on first SKL and KBL products.",
+ "Counter": "0,1,2,3",
"EventCode": "0xCC",
"EventName": "ROB_MISC_EVENTS.PAUSE_INST",
"SampleAfterValue": "2000003",
@@ -587,6 +658,7 @@
},
{
"BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "RS_EVENTS.EMPTY_CYCLES",
"PublicDescription": "Counts cycles during which the reservation station (RS) is empty for the thread.; Note: In ST-mode, not active thread should drive 0. This is usually caused by severely costly branch mispredictions, or allocator/FE issues.",
@@ -595,6 +667,7 @@
},
{
"BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty. Could be useful to precisely locate Frontend Latency Bound issues.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x5E",
@@ -606,6 +679,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_0",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 0.",
@@ -614,6 +688,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_1",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 1.",
@@ -622,6 +697,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_2",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 2.",
@@ -630,6 +706,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_3",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 3.",
@@ -638,6 +715,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_4",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 4.",
@@ -646,6 +724,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_5",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 5.",
@@ -654,6 +733,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_6",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 6.",
@@ -662,6 +742,7 @@
},
{
"BriefDescription": "Cycles per thread when uops are executed in port 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UOPS_DISPATCHED_PORT.PORT_7",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 7.",
@@ -670,6 +751,7 @@
},
{
"BriefDescription": "Number of uops executed on the core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE",
"PublicDescription": "Number of uops executed from any thread.",
@@ -678,6 +760,7 @@
},
{
"BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",
@@ -686,6 +769,7 @@
},
{
"BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3",
"CounterMask": "2",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",
@@ -694,6 +778,7 @@
},
{
"BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3",
"CounterMask": "3",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",
@@ -702,6 +787,7 @@
},
{
"BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",
@@ -710,6 +796,7 @@
},
{
"BriefDescription": "Cycles with no micro-ops executed from any thread on physical core.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_NONE",
@@ -719,6 +806,7 @@
},
{
"BriefDescription": "Cycles where at least 1 uop was executed per-thread",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC",
@@ -728,6 +816,7 @@
},
{
"BriefDescription": "Cycles where at least 2 uops were executed per-thread",
+ "Counter": "0,1,2,3",
"CounterMask": "2",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC",
@@ -737,6 +826,7 @@
},
{
"BriefDescription": "Cycles where at least 3 uops were executed per-thread",
+ "Counter": "0,1,2,3",
"CounterMask": "3",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC",
@@ -746,6 +836,7 @@
},
{
"BriefDescription": "Cycles where at least 4 uops were executed per-thread",
+ "Counter": "0,1,2,3",
"CounterMask": "4",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_4_UOPS_EXEC",
@@ -755,6 +846,7 @@
},
{
"BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.STALL_CYCLES",
@@ -765,6 +857,7 @@
},
{
"BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.THREAD",
"PublicDescription": "Number of uops to be executed per-thread each cycle.",
@@ -773,6 +866,7 @@
},
{
"BriefDescription": "Counts the number of x87 uops dispatched.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.X87",
"PublicDescription": "Counts the number of x87 uops executed.",
@@ -781,6 +875,7 @@
},
{
"BriefDescription": "Uops that Resource Allocation Table (RAT) issues to Reservation Station (RS)",
+ "Counter": "0,1,2,3",
"EventCode": "0x0E",
"EventName": "UOPS_ISSUED.ANY",
"PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",
@@ -789,6 +884,7 @@
},
{
"BriefDescription": "Number of slow LEA uops being allocated. A uop is generally considered SlowLea if it has 3 sources (e.g. 2 sources + immediate) regardless if as a result of LEA instruction or not.",
+ "Counter": "0,1,2,3",
"EventCode": "0x0E",
"EventName": "UOPS_ISSUED.SLOW_LEA",
"SampleAfterValue": "2000003",
@@ -796,6 +892,7 @@
},
{
"BriefDescription": "Cycles when Resource Allocation Table (RAT) does not issue Uops to Reservation Station (RS) for the thread",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x0E",
"EventName": "UOPS_ISSUED.STALL_CYCLES",
@@ -806,6 +903,7 @@
},
{
"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector registers.",
+ "Counter": "0,1,2,3",
"EventCode": "0x0E",
"EventName": "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH",
"PublicDescription": "Counts the number of Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order to preserve upper bits of vector registers. Starting with the Skylake microarchitecture, these Blend uops are needed since every Intel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destination register. For more information, refer to Mixing Intel AVX and Intel SSE Code section of the Optimization Guide.",
@@ -814,6 +912,7 @@
},
{
"BriefDescription": "Number of macro-fused uops retired. (non precise)",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.MACRO_FUSED",
"PublicDescription": "Counts the number of macro-fused uops retired. (non precise)",
@@ -822,6 +921,7 @@
},
{
"BriefDescription": "Retirement slots used.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UOPS_RETIRED.RETIRE_SLOTS",
"PublicDescription": "Counts the retirement slots used.",
@@ -830,6 +930,7 @@
},
{
"BriefDescription": "Cycles without actually retired uops.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xC2",
"EventName": "UOPS_RETIRED.STALL_CYCLES",
@@ -840,6 +941,7 @@
},
{
"BriefDescription": "Cycles with less than 10 actually retired uops.",
+ "Counter": "0,1,2,3",
"CounterMask": "16",
"EventCode": "0xC2",
"EventName": "UOPS_RETIRED.TOTAL_CYCLES",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json
index 2c880535cc82..dabda575bb97 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.ia_miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "LLC_MISSES.MMIO_READ",
"Filter": "config1=0x40040e33",
@@ -11,6 +12,7 @@
},
{
"BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "LLC_MISSES.MMIO_WRITE",
"Filter": "config1=0x40041e33",
@@ -21,6 +23,7 @@
},
{
"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "LLC_MISSES.UNCACHEABLE",
"Filter": "config1=0x40e33",
@@ -31,6 +34,7 @@
},
{
"BriefDescription": "Streaming stores (full cache line). Derived from unc_cha_tor_inserts.ia_miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "LLC_REFERENCES.STREAMING_FULL",
"Filter": "config1=0x41833",
@@ -42,6 +46,7 @@
},
{
"BriefDescription": "Streaming stores (partial cache line). Derived from unc_cha_tor_inserts.ia_miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "LLC_REFERENCES.STREAMING_PARTIAL",
"Filter": "config1=0x41a33",
@@ -53,6 +58,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -62,6 +68,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -71,6 +78,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -80,6 +88,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -89,6 +98,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -98,6 +108,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -107,6 +118,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -116,6 +128,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -125,6 +138,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -134,6 +148,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -143,6 +158,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -152,6 +168,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -161,6 +178,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -170,6 +188,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -179,6 +198,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -188,6 +208,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -197,6 +218,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -206,6 +228,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -215,6 +238,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -224,6 +248,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -233,6 +258,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -242,6 +268,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -251,6 +278,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -260,6 +288,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -269,6 +298,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -278,6 +308,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -287,6 +318,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -296,6 +328,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -305,6 +338,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -314,6 +348,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -323,6 +358,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -332,6 +368,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -341,6 +378,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -350,6 +388,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -359,6 +398,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -368,6 +408,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -377,6 +418,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -386,6 +428,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -395,6 +438,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -404,6 +448,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -413,6 +458,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -422,6 +468,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -431,6 +478,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -440,6 +488,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -449,6 +498,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -458,6 +508,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -467,6 +518,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -476,6 +528,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -485,6 +538,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass; Intermediate bypass Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE",
"PerPkg": "1",
@@ -494,6 +548,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass; Not Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN",
"PerPkg": "1",
@@ -503,6 +558,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass; Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN",
"PerPkg": "1",
@@ -512,6 +568,7 @@
},
{
"BriefDescription": "Uncore cache clock ticks",
+ "Counter": "0,1,2,3",
"EventName": "UNC_CHA_CLOCKTICKS",
"PerPkg": "1",
"PublicDescription": "Counts clockticks of the clock controlling the uncore caching and home agent (CHA).",
@@ -519,6 +576,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xC0",
"EventName": "UNC_CHA_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -526,6 +584,7 @@
},
{
"BriefDescription": "Core PMA Events; C1 State",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_CHA_CORE_PMA.C1_STATE",
"PerPkg": "1",
@@ -534,6 +593,7 @@
},
{
"BriefDescription": "Core PMA Events; C1 Transition",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_CHA_CORE_PMA.C1_TRANSITION",
"PerPkg": "1",
@@ -542,6 +602,7 @@
},
{
"BriefDescription": "Core PMA Events; C6 State",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_CHA_CORE_PMA.C6_STATE",
"PerPkg": "1",
@@ -550,6 +611,7 @@
},
{
"BriefDescription": "Core PMA Events; C6 Transition",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_CHA_CORE_PMA.C6_TRANSITION",
"PerPkg": "1",
@@ -558,6 +620,7 @@
},
{
"BriefDescription": "Core PMA Events; GV",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_CHA_CORE_PMA.GV",
"PerPkg": "1",
@@ -566,6 +629,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Any Cycle with Multiple Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_GTONE",
"PerPkg": "1",
@@ -575,6 +639,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Any Single Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_ONE",
"PerPkg": "1",
@@ -584,6 +649,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Any Snoop to Remote Node",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_REMOTE",
"PerPkg": "1",
@@ -593,6 +659,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Multiple Core Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_GTONE",
"PerPkg": "1",
@@ -602,6 +669,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Single Core Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_ONE",
"PerPkg": "1",
@@ -611,6 +679,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Core Request to Remote Node",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_REMOTE",
"PerPkg": "1",
@@ -620,6 +689,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Multiple Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE",
"PerPkg": "1",
@@ -629,6 +699,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Single Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_ONE",
"PerPkg": "1",
@@ -638,6 +709,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Eviction to Remote Node",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_REMOTE",
"PerPkg": "1",
@@ -647,6 +719,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Multiple External Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_GTONE",
"PerPkg": "1",
@@ -656,6 +729,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; Single External Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_ONE",
"PerPkg": "1",
@@ -665,6 +739,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued; External Snoop to Remote Node",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_REMOTE",
"PerPkg": "1",
@@ -674,6 +749,7 @@
},
{
"BriefDescription": "Counter 0 Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_CHA_COUNTER0_OCCUPANCY",
"PerPkg": "1",
@@ -682,6 +758,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP",
"PerPkg": "1",
@@ -691,6 +768,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_CHA_DIR_LOOKUP.SNP",
"PerPkg": "1",
@@ -700,6 +778,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_CHA_DIR_UPDATE.HA",
"PerPkg": "1",
@@ -709,6 +788,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_CHA_DIR_UPDATE.TOR",
"PerPkg": "1",
@@ -718,6 +798,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements; Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xAE",
"EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -727,6 +808,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements; Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xAE",
"EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -736,6 +818,7 @@
},
{
"BriefDescription": "FaST wire asserted; Horizontal",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_FAST_ASSERTED.HORZ",
"PerPkg": "1",
@@ -745,6 +828,7 @@
},
{
"BriefDescription": "FaST wire asserted; Vertical",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_FAST_ASSERTED.VERT",
"PerPkg": "1",
@@ -754,6 +838,7 @@
},
{
"BriefDescription": "Read request from a remote socket which hit in the HitMe Cache to a line In the E state",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.EX_RDS",
"PerPkg": "1",
@@ -763,6 +848,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache; Shared hit and op is RdInvOwn, RdInv, Inv*",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ",
"PerPkg": "1",
@@ -771,6 +857,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache; op is WbMtoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.WBMTOE",
"PerPkg": "1",
@@ -779,6 +866,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache; op is WbMtoI, WbPushMtoI, WbFlush, or WbMtoS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S",
"PerPkg": "1",
@@ -787,6 +875,7 @@
},
{
"BriefDescription": "Counts Number of times HitMe Cache is accessed; op is RdCode, RdData, RdDataMigratory, RdCur, RdInvOwn, RdInv, Inv*",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_CHA_HITME_LOOKUP.READ",
"PerPkg": "1",
@@ -795,6 +884,7 @@
},
{
"BriefDescription": "Counts Number of times HitMe Cache is accessed; op is WbMtoE, WbMtoI, WbPushMtoI, WbFlush, or WbMtoS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_CHA_HITME_LOOKUP.WRITE",
"PerPkg": "1",
@@ -803,6 +893,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache; No SF/LLC HitS/F and op is RdInvOwn",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN",
"PerPkg": "1",
@@ -811,6 +902,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache; op is RdCode, RdData, RdDataMigratory, RdCur, RdInv, Inv*",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.READ_OR_INV",
"PerPkg": "1",
@@ -819,6 +911,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache; SF/LLC HitS/F and op is RdInvOwn",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN",
"PerPkg": "1",
@@ -827,6 +920,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache; Deallocate HitME$ on Reads without RspFwdI*",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE",
"PerPkg": "1",
@@ -835,6 +929,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache; op is RspIFwd or RspIFwdWb for a local request",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC",
"PerPkg": "1",
@@ -844,6 +939,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache; Update HitMe Cache on RdInvOwn even if not RspFwdI*",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN",
"PerPkg": "1",
@@ -852,6 +948,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache; op is RspIFwd or RspIFwdWb for a remote request",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM",
"PerPkg": "1",
@@ -861,6 +958,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache; Update HitMe Cache to SHARed",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.SHARED",
"PerPkg": "1",
@@ -869,6 +967,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -878,6 +977,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -887,6 +987,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -896,6 +997,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -905,6 +1007,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -914,6 +1017,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -923,6 +1027,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -932,6 +1037,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -941,6 +1047,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -950,6 +1057,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -959,6 +1067,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -968,6 +1077,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -977,6 +1087,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use; Left",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -986,6 +1097,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use; Right",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -995,6 +1107,7 @@
},
{
"BriefDescription": "Normal priority reads issued to the memory controller from the CHA",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL",
"PerPkg": "1",
@@ -1004,6 +1117,7 @@
},
{
"BriefDescription": "HA to iMC Reads Issued; ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY",
"PerPkg": "1",
@@ -1013,6 +1127,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued; Full Line Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL",
"PerPkg": "1",
@@ -1022,6 +1137,7 @@
},
{
"BriefDescription": "Writes Issued to the iMC by the HA; Full Line MIG",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_MIG",
"PerPkg": "1",
@@ -1031,6 +1147,7 @@
},
{
"BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Full Line",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY",
"PerPkg": "1",
@@ -1040,6 +1157,7 @@
},
{
"BriefDescription": "Writes Issued to the iMC by the HA; Partial Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL",
"PerPkg": "1",
@@ -1049,6 +1167,7 @@
},
{
"BriefDescription": "Writes Issued to the iMC by the HA; Partial MIG",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG",
"PerPkg": "1",
@@ -1058,6 +1177,7 @@
},
{
"BriefDescription": "Writes Issued to the iMC by the HA; ISOCH Partial",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY",
"PerPkg": "1",
@@ -1067,6 +1187,7 @@
},
{
"BriefDescription": "Counts Number of times IODC entry allocation is attempted; Number of IODC allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_CHA_IODC_ALLOC.INVITOM",
"PerPkg": "1",
@@ -1075,6 +1196,7 @@
},
{
"BriefDescription": "Counts Number of times IODC entry allocation is attempted; Number of IODC allocations dropped due to IODC Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_CHA_IODC_ALLOC.IODCFULL",
"PerPkg": "1",
@@ -1083,6 +1205,7 @@
},
{
"BriefDescription": "Counts Number of times IODC entry allocation is attempted; Number of IDOC allocation dropped due to OSB gate",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_CHA_IODC_ALLOC.OSBGATED",
"PerPkg": "1",
@@ -1091,6 +1214,7 @@
},
{
"BriefDescription": "Counts number of IODC deallocations; IODC deallocated due to any reason",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_CHA_IODC_DEALLOC.ALL",
"PerPkg": "1",
@@ -1099,6 +1223,7 @@
},
{
"BriefDescription": "Counts number of IODC deallocations; IODC deallocated due to conflicting transaction",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_CHA_IODC_DEALLOC.SNPOUT",
"PerPkg": "1",
@@ -1107,6 +1232,7 @@
},
{
"BriefDescription": "Counts number of IODC deallocations; IODC deallocated due to WbMtoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_CHA_IODC_DEALLOC.WBMTOE",
"PerPkg": "1",
@@ -1115,6 +1241,7 @@
},
{
"BriefDescription": "Counts number of IODC deallocations; IODC deallocated due to WbMtoI",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_CHA_IODC_DEALLOC.WBMTOI",
"PerPkg": "1",
@@ -1123,6 +1250,7 @@
},
{
"BriefDescription": "Counts number of IODC deallocations; IODC deallocated due to WbPushMtoI",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_CHA_IODC_DEALLOC.WBPUSHMTOI",
"PerPkg": "1",
@@ -1132,6 +1260,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Any Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ANY",
"PerPkg": "1",
@@ -1141,6 +1270,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ",
"PerPkg": "1",
@@ -1150,6 +1280,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Local",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL",
"PerPkg": "1",
@@ -1159,6 +1290,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE",
"PerPkg": "1",
@@ -1168,6 +1300,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; External Snoop Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP",
"PerPkg": "1",
@@ -1177,6 +1310,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Write Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.WRITE",
"PerPkg": "1",
@@ -1186,6 +1320,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_E",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.E_STATE",
@@ -1195,6 +1330,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_F",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.F_STATE",
@@ -1204,6 +1340,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL",
@@ -1213,6 +1350,7 @@
},
{
"BriefDescription": "Lines Victimized; Local - All Lines",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL",
"PerPkg": "1",
@@ -1222,6 +1360,7 @@
},
{
"BriefDescription": "Lines Victimized; Local - Lines in E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E",
"PerPkg": "1",
@@ -1231,6 +1370,7 @@
},
{
"BriefDescription": "Lines Victimized; Local - Lines in F State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_F",
"PerPkg": "1",
@@ -1240,6 +1380,7 @@
},
{
"BriefDescription": "Lines Victimized; Local - Lines in M State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M",
"PerPkg": "1",
@@ -1249,6 +1390,7 @@
},
{
"BriefDescription": "Lines Victimized; Local - Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S",
"PerPkg": "1",
@@ -1258,6 +1400,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_M",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.M_STATE",
@@ -1267,6 +1410,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.REMOTE_ALL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE",
@@ -1276,6 +1420,7 @@
},
{
"BriefDescription": "Lines Victimized; Remote - All Lines",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL",
"PerPkg": "1",
@@ -1285,6 +1430,7 @@
},
{
"BriefDescription": "Lines Victimized; Remote - Lines in E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E",
"PerPkg": "1",
@@ -1294,6 +1440,7 @@
},
{
"BriefDescription": "Lines Victimized; Remote - Lines in F State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_F",
"PerPkg": "1",
@@ -1303,6 +1450,7 @@
},
{
"BriefDescription": "Lines Victimized; Remote - Lines in M State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M",
"PerPkg": "1",
@@ -1312,6 +1460,7 @@
},
{
"BriefDescription": "Lines Victimized; Remote - Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S",
"PerPkg": "1",
@@ -1321,6 +1470,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_S",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.S_STATE",
@@ -1330,6 +1480,7 @@
},
{
"BriefDescription": "Lines Victimized; Lines in E state",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_E",
"PerPkg": "1",
@@ -1339,6 +1490,7 @@
},
{
"BriefDescription": "Lines Victimized; Lines in F State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_F",
"PerPkg": "1",
@@ -1348,6 +1500,7 @@
},
{
"BriefDescription": "Lines Victimized; Lines in M state",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_M",
"PerPkg": "1",
@@ -1357,6 +1510,7 @@
},
{
"BriefDescription": "Lines Victimized; Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.TOTAL_S",
"PerPkg": "1",
@@ -1366,6 +1520,7 @@
},
{
"BriefDescription": "Cbo Misc; CV0 Prefetch Miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.CV0_PREF_MISS",
"PerPkg": "1",
@@ -1375,6 +1530,7 @@
},
{
"BriefDescription": "Cbo Misc; CV0 Prefetch Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.CV0_PREF_VIC",
"PerPkg": "1",
@@ -1384,6 +1540,7 @@
},
{
"BriefDescription": "Number of times that an RFO hit in S state.",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.RFO_HIT_S",
"PerPkg": "1",
@@ -1393,6 +1550,7 @@
},
{
"BriefDescription": "Cbo Misc; Silent Snoop Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.RSPI_WAS_FSE",
"PerPkg": "1",
@@ -1402,6 +1560,7 @@
},
{
"BriefDescription": "Cbo Misc; Write Combining Aliasing",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.WC_ALIASING",
"PerPkg": "1",
@@ -1411,6 +1570,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB",
"PerPkg": "1",
@@ -1419,6 +1579,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw NM Set conflict in IODC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.IODC",
"PerPkg": "1",
@@ -1428,6 +1589,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw NM Set conflict in SF/LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC",
"PerPkg": "1",
@@ -1437,6 +1599,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw NM Set conflict in SF/LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF",
"PerPkg": "1",
@@ -1446,6 +1609,7 @@
},
{
"BriefDescription": "Memory Mode related events; Counts the number of times CHA saw NM Set conflict in TOR",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR",
"PerPkg": "1",
@@ -1455,6 +1619,7 @@
},
{
"BriefDescription": "Memory mode related events; Counts the number of times CHA saw NM Set conflict in TOR and the transaction was rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR_REJECT",
"PerPkg": "1",
@@ -1464,6 +1629,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC0_SMI2",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.EDC0_SMI2",
"PerPkg": "1",
@@ -1473,6 +1639,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC1_SMI3",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.EDC1_SMI3",
"PerPkg": "1",
@@ -1482,6 +1649,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC2_SMI4",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.EDC2_SMI4",
"PerPkg": "1",
@@ -1491,6 +1659,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty; EDC3_SMI5",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.EDC3_SMI5",
"PerPkg": "1",
@@ -1500,6 +1669,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty; MC0_SMI0",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC0_SMI0",
"PerPkg": "1",
@@ -1509,6 +1679,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty; MC1_SMI1",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC1_SMI1",
"PerPkg": "1",
@@ -1518,6 +1689,7 @@
},
{
"BriefDescription": "Local requests for exclusive ownership of a cache line without receiving data",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL",
"PerPkg": "1",
@@ -1527,6 +1699,7 @@
},
{
"BriefDescription": "Local requests for exclusive ownership of a cache line without receiving data",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE",
"PerPkg": "1",
@@ -1536,6 +1709,7 @@
},
{
"BriefDescription": "Read requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS",
"PerPkg": "1",
@@ -1545,6 +1719,7 @@
},
{
"BriefDescription": "Read requests from a unit on this socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS_LOCAL",
"PerPkg": "1",
@@ -1554,6 +1729,7 @@
},
{
"BriefDescription": "Read requests from a remote socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS_REMOTE",
"PerPkg": "1",
@@ -1563,6 +1739,7 @@
},
{
"BriefDescription": "Write requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES",
"PerPkg": "1",
@@ -1572,6 +1749,7 @@
},
{
"BriefDescription": "Write Requests from a unit on this socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL",
"PerPkg": "1",
@@ -1581,6 +1759,7 @@
},
{
"BriefDescription": "Read and Write Requests; Writes Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE",
"PerPkg": "1",
@@ -1590,6 +1769,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -1599,6 +1779,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -1608,6 +1789,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -1617,6 +1799,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -1626,6 +1809,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -1635,6 +1819,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -1644,6 +1829,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -1653,6 +1839,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -1662,6 +1849,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -1670,6 +1858,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -1678,6 +1867,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; Acknowledgements to Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -1686,6 +1876,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -1694,6 +1885,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -1702,6 +1894,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -1710,6 +1903,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -1718,6 +1912,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -1726,6 +1921,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -1734,6 +1930,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_RING_SRC_THRTL",
"PerPkg": "1",
@@ -1741,6 +1938,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; IPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IPQ",
"PerPkg": "1",
@@ -1750,6 +1948,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IRQ",
"PerPkg": "1",
@@ -1759,6 +1958,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; IRQ Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ",
"PerPkg": "1",
@@ -1768,6 +1968,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.PRQ",
"PerPkg": "1",
@@ -1777,6 +1978,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ",
"PerPkg": "1",
@@ -1786,6 +1988,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; RRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.RRQ",
"PerPkg": "1",
@@ -1795,6 +1998,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations; WBQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.WBQ",
"PerPkg": "1",
@@ -1804,6 +2008,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -1812,6 +2017,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -1820,6 +2026,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -1828,6 +2035,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -1836,6 +2044,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -1844,6 +2053,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -1852,6 +2062,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -1860,6 +2071,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -1868,6 +2080,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -1876,6 +2089,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -1884,6 +2098,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA",
"PerPkg": "1",
@@ -1892,6 +2107,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; Merging these two together to make room for ANY_REJECT_*0",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -1900,6 +2116,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -1908,6 +2125,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -1916,6 +2134,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -1924,6 +2143,7 @@
},
{
"BriefDescription": "Ingress Probe Queue Rejects; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -1932,6 +2152,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -1940,6 +2161,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -1948,6 +2170,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -1956,6 +2179,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -1964,6 +2188,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -1972,6 +2197,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -1980,6 +2206,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -1988,6 +2215,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -1996,6 +2224,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2004,6 +2233,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2012,6 +2242,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA",
"PerPkg": "1",
@@ -2020,6 +2251,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Merging these two together to make room for ANY_REJECT_*0",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2028,6 +2260,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2036,6 +2269,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2044,6 +2278,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2052,6 +2287,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2060,6 +2296,7 @@
},
{
"BriefDescription": "ISMQ Rejects; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2069,6 +2306,7 @@
},
{
"BriefDescription": "ISMQ Rejects; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2078,6 +2316,7 @@
},
{
"BriefDescription": "ISMQ Rejects; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2087,6 +2326,7 @@
},
{
"BriefDescription": "ISMQ Rejects; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2096,6 +2336,7 @@
},
{
"BriefDescription": "ISMQ Rejects; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2105,6 +2346,7 @@
},
{
"BriefDescription": "ISMQ Rejects; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2114,6 +2356,7 @@
},
{
"BriefDescription": "ISMQ Rejects; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2123,6 +2366,7 @@
},
{
"BriefDescription": "ISMQ Rejects; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2132,6 +2376,7 @@
},
{
"BriefDescription": "ISMQ Retries; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -2141,6 +2386,7 @@
},
{
"BriefDescription": "ISMQ Retries; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -2150,6 +2396,7 @@
},
{
"BriefDescription": "ISMQ Retries; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -2159,6 +2406,7 @@
},
{
"BriefDescription": "ISMQ Retries; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -2168,6 +2416,7 @@
},
{
"BriefDescription": "ISMQ Retries; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -2177,6 +2426,7 @@
},
{
"BriefDescription": "ISMQ Retries; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -2186,6 +2436,7 @@
},
{
"BriefDescription": "ISMQ Retries; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -2195,6 +2446,7 @@
},
{
"BriefDescription": "ISMQ Retries; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -2204,6 +2456,7 @@
},
{
"BriefDescription": "ISMQ Rejects; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2213,6 +2466,7 @@
},
{
"BriefDescription": "ISMQ Rejects; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA",
"PerPkg": "1",
@@ -2222,6 +2476,7 @@
},
{
"BriefDescription": "ISMQ Retries; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0",
"PerPkg": "1",
@@ -2231,6 +2486,7 @@
},
{
"BriefDescription": "ISMQ Retries; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA",
"PerPkg": "1",
@@ -2276,6 +2532,7 @@
},
{
"BriefDescription": "Other Retries; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -2285,6 +2542,7 @@
},
{
"BriefDescription": "Other Retries; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -2294,6 +2552,7 @@
},
{
"BriefDescription": "Other Retries; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -2303,6 +2562,7 @@
},
{
"BriefDescription": "Other Retries; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -2312,6 +2572,7 @@
},
{
"BriefDescription": "Other Retries; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -2321,6 +2582,7 @@
},
{
"BriefDescription": "Other Retries; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -2330,6 +2592,7 @@
},
{
"BriefDescription": "Other Retries; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -2339,6 +2602,7 @@
},
{
"BriefDescription": "Other Retries; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -2348,6 +2612,7 @@
},
{
"BriefDescription": "Other Retries; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP",
"PerPkg": "1",
@@ -2357,6 +2622,7 @@
},
{
"BriefDescription": "Other Retries; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0",
"PerPkg": "1",
@@ -2366,6 +2632,7 @@
},
{
"BriefDescription": "Other Retries; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA",
"PerPkg": "1",
@@ -2375,6 +2642,7 @@
},
{
"BriefDescription": "Other Retries; Merging these two together to make room for ANY_REJECT_*0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2384,6 +2652,7 @@
},
{
"BriefDescription": "Other Retries; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM",
"PerPkg": "1",
@@ -2393,6 +2662,7 @@
},
{
"BriefDescription": "Other Retries; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH",
"PerPkg": "1",
@@ -2402,6 +2672,7 @@
},
{
"BriefDescription": "Other Retries; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM",
"PerPkg": "1",
@@ -2411,6 +2682,7 @@
},
{
"BriefDescription": "Other Retries; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM",
"PerPkg": "1",
@@ -2420,6 +2692,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2428,6 +2701,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2436,6 +2710,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2444,6 +2719,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2452,6 +2728,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2460,6 +2737,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2468,6 +2746,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2476,6 +2755,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2484,6 +2764,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2492,6 +2773,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2500,6 +2782,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA",
"PerPkg": "1",
@@ -2508,6 +2791,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2516,6 +2800,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2524,6 +2809,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2532,6 +2818,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2540,6 +2827,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2548,6 +2836,7 @@
},
{
"BriefDescription": "Request Queue Retries; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -2557,6 +2846,7 @@
},
{
"BriefDescription": "Request Queue Retries; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -2566,6 +2856,7 @@
},
{
"BriefDescription": "Request Queue Retries; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -2575,6 +2866,7 @@
},
{
"BriefDescription": "Request Queue Retries; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -2584,6 +2876,7 @@
},
{
"BriefDescription": "Request Queue Retries; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -2593,6 +2886,7 @@
},
{
"BriefDescription": "Request Queue Retries; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -2602,6 +2896,7 @@
},
{
"BriefDescription": "Request Queue Retries; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -2611,6 +2906,7 @@
},
{
"BriefDescription": "Request Queue Retries; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -2620,6 +2916,7 @@
},
{
"BriefDescription": "Request Queue Retries; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP",
"PerPkg": "1",
@@ -2629,6 +2926,7 @@
},
{
"BriefDescription": "Request Queue Retries; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0",
"PerPkg": "1",
@@ -2638,6 +2936,7 @@
},
{
"BriefDescription": "Request Queue Retries; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA",
"PerPkg": "1",
@@ -2647,6 +2946,7 @@
},
{
"BriefDescription": "Request Queue Retries; Merging these two together to make room for ANY_REJECT_*0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2656,6 +2956,7 @@
},
{
"BriefDescription": "Request Queue Retries; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM",
"PerPkg": "1",
@@ -2665,6 +2966,7 @@
},
{
"BriefDescription": "Request Queue Retries; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH",
"PerPkg": "1",
@@ -2674,6 +2976,7 @@
},
{
"BriefDescription": "Request Queue Retries; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM",
"PerPkg": "1",
@@ -2683,6 +2986,7 @@
},
{
"BriefDescription": "Request Queue Retries; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM",
"PerPkg": "1",
@@ -2692,6 +2996,7 @@
},
{
"BriefDescription": "RRQ Rejects; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2701,6 +3006,7 @@
},
{
"BriefDescription": "RRQ Rejects; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2710,6 +3016,7 @@
},
{
"BriefDescription": "RRQ Rejects; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2719,6 +3026,7 @@
},
{
"BriefDescription": "RRQ Rejects; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2728,6 +3036,7 @@
},
{
"BriefDescription": "RRQ Rejects; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2737,6 +3046,7 @@
},
{
"BriefDescription": "RRQ Rejects; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2746,6 +3056,7 @@
},
{
"BriefDescription": "RRQ Rejects; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2755,6 +3066,7 @@
},
{
"BriefDescription": "RRQ Rejects; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2764,6 +3076,7 @@
},
{
"BriefDescription": "RRQ Rejects; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2773,6 +3086,7 @@
},
{
"BriefDescription": "RRQ Rejects; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2782,6 +3096,7 @@
},
{
"BriefDescription": "RRQ Rejects; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA",
"PerPkg": "1",
@@ -2791,6 +3106,7 @@
},
{
"BriefDescription": "RRQ Rejects; Merging these two together to make room for ANY_REJECT_*0",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2800,6 +3116,7 @@
},
{
"BriefDescription": "RRQ Rejects; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2809,6 +3126,7 @@
},
{
"BriefDescription": "RRQ Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2818,6 +3136,7 @@
},
{
"BriefDescription": "RRQ Rejects; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2827,6 +3146,7 @@
},
{
"BriefDescription": "RRQ Rejects; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2836,6 +3156,7 @@
},
{
"BriefDescription": "WBQ Rejects; AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -2845,6 +3166,7 @@
},
{
"BriefDescription": "WBQ Rejects; AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -2854,6 +3176,7 @@
},
{
"BriefDescription": "WBQ Rejects; Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -2863,6 +3186,7 @@
},
{
"BriefDescription": "WBQ Rejects; BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -2872,6 +3196,7 @@
},
{
"BriefDescription": "WBQ Rejects; BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -2881,6 +3206,7 @@
},
{
"BriefDescription": "WBQ Rejects; BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -2890,6 +3216,7 @@
},
{
"BriefDescription": "WBQ Rejects; BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -2899,6 +3226,7 @@
},
{
"BriefDescription": "WBQ Rejects; Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -2908,6 +3236,7 @@
},
{
"BriefDescription": "WBQ Rejects; Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -2917,6 +3246,7 @@
},
{
"BriefDescription": "WBQ Rejects; ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -2926,6 +3256,7 @@
},
{
"BriefDescription": "WBQ Rejects; HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA",
"PerPkg": "1",
@@ -2935,6 +3266,7 @@
},
{
"BriefDescription": "WBQ Rejects; Merging these two together to make room for ANY_REJECT_*0",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -2944,6 +3276,7 @@
},
{
"BriefDescription": "WBQ Rejects; LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -2953,6 +3286,7 @@
},
{
"BriefDescription": "WBQ Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -2962,6 +3296,7 @@
},
{
"BriefDescription": "WBQ Rejects; SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -2971,6 +3306,7 @@
},
{
"BriefDescription": "WBQ Rejects; Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -2980,6 +3316,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_BNC",
"PerPkg": "1",
@@ -2989,6 +3326,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -2998,6 +3336,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_BNC",
"PerPkg": "1",
@@ -3007,6 +3346,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -3016,6 +3356,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_RxR_BYPASS.AD_BNC",
"PerPkg": "1",
@@ -3025,6 +3366,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -3034,6 +3376,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_RxR_BYPASS.AK_BNC",
"PerPkg": "1",
@@ -3043,6 +3386,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_RxR_BYPASS.BL_BNC",
"PerPkg": "1",
@@ -3052,6 +3396,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -3061,6 +3406,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_RxR_BYPASS.IV_BNC",
"PerPkg": "1",
@@ -3070,6 +3416,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AD_BNC",
"PerPkg": "1",
@@ -3079,6 +3426,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -3088,6 +3436,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AK_BNC",
"PerPkg": "1",
@@ -3097,6 +3446,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.BL_BNC",
"PerPkg": "1",
@@ -3106,6 +3456,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -3115,6 +3466,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; IFV - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -3124,6 +3476,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.IV_BNC",
"PerPkg": "1",
@@ -3133,6 +3486,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_RxR_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -3142,6 +3496,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -3151,6 +3506,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_RxR_INSERTS.AK_BNC",
"PerPkg": "1",
@@ -3160,6 +3516,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_RxR_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -3169,6 +3526,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -3178,6 +3536,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_RxR_INSERTS.IV_BNC",
"PerPkg": "1",
@@ -3187,6 +3546,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AD_BNC",
"PerPkg": "1",
@@ -3196,6 +3556,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -3205,6 +3566,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AK_BNC",
"PerPkg": "1",
@@ -3214,6 +3576,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.BL_BNC",
"PerPkg": "1",
@@ -3223,6 +3586,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -3232,6 +3596,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.IV_BNC",
"PerPkg": "1",
@@ -3241,6 +3606,7 @@
},
{
"BriefDescription": "Snoop filter capacity evictions for E-state entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3D",
"EventName": "UNC_CHA_SF_EVICTION.E_STATE",
"PerPkg": "1",
@@ -3250,6 +3616,7 @@
},
{
"BriefDescription": "Snoop filter capacity evictions for M-state entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3D",
"EventName": "UNC_CHA_SF_EVICTION.M_STATE",
"PerPkg": "1",
@@ -3259,6 +3626,7 @@
},
{
"BriefDescription": "Snoop filter capacity evictions for S-state entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3D",
"EventName": "UNC_CHA_SF_EVICTION.S_STATE",
"PerPkg": "1",
@@ -3268,6 +3636,7 @@
},
{
"BriefDescription": "Snoops Sent; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.ALL",
"PerPkg": "1",
@@ -3277,6 +3646,7 @@
},
{
"BriefDescription": "Snoops Sent; Broadcast snoop for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL",
"PerPkg": "1",
@@ -3286,6 +3656,7 @@
},
{
"BriefDescription": "Snoops Sent; Broadcast snoops for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE",
"PerPkg": "1",
@@ -3295,6 +3666,7 @@
},
{
"BriefDescription": "Snoops Sent; Directed snoops for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL",
"PerPkg": "1",
@@ -3304,6 +3676,7 @@
},
{
"BriefDescription": "Snoops Sent; Directed snoops for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE",
"PerPkg": "1",
@@ -3313,6 +3686,7 @@
},
{
"BriefDescription": "Snoops Sent; Broadcast or directed Snoops sent for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.LOCAL",
"PerPkg": "1",
@@ -3322,6 +3696,7 @@
},
{
"BriefDescription": "Snoops Sent; Broadcast or directed Snoops sent for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.REMOTE",
"PerPkg": "1",
@@ -3331,6 +3706,7 @@
},
{
"BriefDescription": "RspCnflct* Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCTS",
"PerPkg": "1",
@@ -3340,6 +3716,7 @@
},
{
"BriefDescription": "Snoop Responses Received; RspFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPFWD",
"PerPkg": "1",
@@ -3349,6 +3726,7 @@
},
{
"BriefDescription": "RspI Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPI",
"PerPkg": "1",
@@ -3358,6 +3736,7 @@
},
{
"BriefDescription": "RspIFwd Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD",
"PerPkg": "1",
@@ -3367,6 +3746,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPS",
"PerPkg": "1",
@@ -3376,6 +3756,7 @@
},
{
"BriefDescription": "RspSFwd Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD",
"PerPkg": "1",
@@ -3385,6 +3766,7 @@
},
{
"BriefDescription": "Rsp*Fwd*WB Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSP_FWD_WB",
"PerPkg": "1",
@@ -3394,6 +3776,7 @@
},
{
"BriefDescription": "Rsp*WB Snoop Responses Received",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSP_WBWB",
"PerPkg": "1",
@@ -3403,6 +3786,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; RspCnflct",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT",
"PerPkg": "1",
@@ -3412,6 +3796,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; RspFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD",
"PerPkg": "1",
@@ -3421,6 +3806,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; RspI",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI",
"PerPkg": "1",
@@ -3430,6 +3816,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; RspIFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD",
"PerPkg": "1",
@@ -3439,6 +3826,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; RspS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS",
"PerPkg": "1",
@@ -3448,6 +3836,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; RspSFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD",
"PerPkg": "1",
@@ -3457,6 +3846,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; Rsp*FWD*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB",
"PerPkg": "1",
@@ -3466,6 +3856,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local; Rsp*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB",
"PerPkg": "1",
@@ -3475,6 +3866,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -3484,6 +3876,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -3493,6 +3886,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -3502,6 +3896,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -3511,6 +3906,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -3520,6 +3916,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -3529,6 +3926,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -3538,6 +3936,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -3547,6 +3946,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -3556,6 +3956,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -3565,6 +3966,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -3574,6 +3976,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -3583,6 +3986,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -3592,6 +3996,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -3601,6 +4006,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -3610,6 +4016,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -3619,6 +4026,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -3628,6 +4036,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -3637,6 +4046,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -3646,6 +4056,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -3655,6 +4066,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -3664,6 +4076,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -3673,6 +4086,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -3682,6 +4096,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -3691,6 +4106,7 @@
},
{
"BriefDescription": "TOR Inserts; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ALL",
"PerPkg": "1",
@@ -3700,6 +4116,7 @@
},
{
"BriefDescription": "TOR Inserts; Hits from Local",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ALL_HIT",
"PerPkg": "1",
@@ -3709,6 +4126,7 @@
},
{
"BriefDescription": "TOR Inserts; All from Local iA and IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ALL_IO_IA",
"PerPkg": "1",
@@ -3718,6 +4136,7 @@
},
{
"BriefDescription": "TOR Inserts; Misses from Local",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ALL_MISS",
"PerPkg": "1",
@@ -3727,6 +4146,7 @@
},
{
"BriefDescription": "TOR Inserts; SF/LLC Evictions",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.EVICT",
"PerPkg": "1",
@@ -3736,6 +4156,7 @@
},
{
"BriefDescription": "TOR Inserts; Hit (Not a Miss)",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.HIT",
"PerPkg": "1",
@@ -3745,6 +4166,7 @@
},
{
"BriefDescription": "TOR Inserts; All from Local iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA",
"PerPkg": "1",
@@ -3754,6 +4176,7 @@
},
{
"BriefDescription": "TOR Inserts; Hits from Local iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT",
"PerPkg": "1",
@@ -3763,6 +4186,7 @@
},
{
"BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD",
"Filter": "config1=0x40233",
@@ -3773,6 +4197,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD",
"Filter": "config1=0x40433",
@@ -3783,6 +4208,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD",
"Filter": "config1=0x4b233",
@@ -3792,6 +4218,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD",
"Filter": "config1=0x4b433",
@@ -3801,6 +4228,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO",
"Filter": "config1=0x4b033",
@@ -3811,6 +4239,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO",
"Filter": "config1=0x40033",
@@ -3821,6 +4250,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",
"PerPkg": "1",
@@ -3830,6 +4260,7 @@
},
{
"BriefDescription": "TOR Inserts : CRds issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD",
"Filter": "config1=0x40233",
@@ -3840,6 +4271,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD",
"Filter": "config1=0x40433",
@@ -3850,6 +4282,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD",
"Filter": "config1=0x4b233",
@@ -3859,6 +4292,7 @@
},
{
"BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD",
"Filter": "config1=0x4b433",
@@ -3868,6 +4302,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO",
"Filter": "config1=0x4b033",
@@ -3878,6 +4313,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO",
"Filter": "config1=0x40033",
@@ -3888,6 +4324,7 @@
},
{
"BriefDescription": "TOR Inserts; All from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO",
"PerPkg": "1",
@@ -3897,6 +4334,7 @@
},
{
"BriefDescription": "TOR Inserts; Hits from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT",
"PerPkg": "1",
@@ -3906,6 +4344,7 @@
},
{
"BriefDescription": "TOR Inserts; Misses from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS",
"PerPkg": "1",
@@ -3915,6 +4354,7 @@
},
{
"BriefDescription": "TOR Inserts; ItoM misses from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM",
"Filter": "config1=0x49033",
@@ -3925,6 +4365,7 @@
},
{
"BriefDescription": "TOR Inserts; RdCur misses from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RDCUR",
"Filter": "config1=0x43C33",
@@ -3935,6 +4376,7 @@
},
{
"BriefDescription": "TOR Inserts; RFO misses from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO",
"Filter": "config1=0x40033",
@@ -3945,6 +4387,7 @@
},
{
"BriefDescription": "TOR Inserts; IPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IPQ",
"PerPkg": "1",
@@ -3954,6 +4397,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IPQ_HIT",
@@ -3963,6 +4407,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IPQ_MISS",
@@ -3972,6 +4417,7 @@
},
{
"BriefDescription": "TOR Inserts; IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IRQ",
"PerPkg": "1",
@@ -3981,6 +4427,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL",
@@ -3990,6 +4437,7 @@
},
{
"BriefDescription": "TOR Inserts; Miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MISS",
"PerPkg": "1",
@@ -3999,6 +4447,7 @@
},
{
"BriefDescription": "TOR Inserts; PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PRQ",
"PerPkg": "1",
@@ -4008,6 +4457,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.REM_ALL",
@@ -4017,6 +4467,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.RRQ_HIT",
@@ -4026,6 +4477,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS",
@@ -4035,6 +4487,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.WBQ_HIT",
@@ -4044,6 +4497,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.WBQ_MISS",
@@ -4370,6 +4824,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC",
"PerPkg": "1",
@@ -4379,6 +4834,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -4388,6 +4844,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC",
"PerPkg": "1",
@@ -4397,6 +4854,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC",
"PerPkg": "1",
@@ -4406,6 +4864,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -4415,6 +4874,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_BNC",
"PerPkg": "1",
@@ -4424,6 +4884,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -4433,6 +4894,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK_BNC",
"PerPkg": "1",
@@ -4442,6 +4904,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_BNC",
"PerPkg": "1",
@@ -4451,6 +4914,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -4460,6 +4924,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV_BNC",
"PerPkg": "1",
@@ -4469,6 +4934,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC",
"PerPkg": "1",
@@ -4478,6 +4944,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -4487,6 +4954,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC",
"PerPkg": "1",
@@ -4496,6 +4964,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC",
"PerPkg": "1",
@@ -4505,6 +4974,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -4514,6 +4984,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC",
"PerPkg": "1",
@@ -4523,6 +4994,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC",
"PerPkg": "1",
@@ -4532,6 +5004,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -4541,6 +5014,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC",
"PerPkg": "1",
@@ -4550,6 +5024,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC",
"PerPkg": "1",
@@ -4559,6 +5034,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -4568,6 +5044,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC",
"PerPkg": "1",
@@ -4577,6 +5054,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -4586,6 +5064,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -4595,6 +5074,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK_BNC",
"PerPkg": "1",
@@ -4604,6 +5084,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -4613,6 +5094,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -4622,6 +5104,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV_BNC",
"PerPkg": "1",
@@ -4631,6 +5114,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AD_BNC",
"PerPkg": "1",
@@ -4640,6 +5124,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -4649,6 +5134,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AK_BNC",
"PerPkg": "1",
@@ -4658,6 +5144,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_HORZ_NACK.BL_BNC",
"PerPkg": "1",
@@ -4667,6 +5154,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -4676,6 +5164,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_HORZ_NACK.IV_BNC",
"PerPkg": "1",
@@ -4685,6 +5174,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC",
"PerPkg": "1",
@@ -4694,6 +5184,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -4703,6 +5194,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC",
"PerPkg": "1",
@@ -4712,6 +5204,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC",
"PerPkg": "1",
@@ -4721,6 +5214,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -4730,6 +5224,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC",
"PerPkg": "1",
@@ -4739,6 +5234,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_BNC",
"PerPkg": "1",
@@ -4748,6 +5244,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.AK_BNC",
"PerPkg": "1",
@@ -4757,6 +5254,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_BNC",
"PerPkg": "1",
@@ -4766,6 +5264,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.IV_BNC",
"PerPkg": "1",
@@ -4775,6 +5274,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -4784,6 +5284,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -4793,6 +5294,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG0",
"PerPkg": "1",
@@ -4802,6 +5304,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.AK_AG1",
"PerPkg": "1",
@@ -4811,6 +5314,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -4820,6 +5324,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -4829,6 +5334,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -4838,6 +5344,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -4847,6 +5354,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -4856,6 +5364,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -4865,6 +5374,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -4874,6 +5384,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -4883,6 +5394,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.IV",
"PerPkg": "1",
@@ -4892,6 +5404,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0",
"PerPkg": "1",
@@ -4901,6 +5414,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1",
"PerPkg": "1",
@@ -4910,6 +5424,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0",
"PerPkg": "1",
@@ -4919,6 +5434,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1",
"PerPkg": "1",
@@ -4928,6 +5444,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0",
"PerPkg": "1",
@@ -4937,6 +5454,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1",
"PerPkg": "1",
@@ -4946,6 +5464,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -4955,6 +5474,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0",
"PerPkg": "1",
@@ -4964,6 +5484,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1",
"PerPkg": "1",
@@ -4973,6 +5494,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0",
"PerPkg": "1",
@@ -4982,6 +5504,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1",
"PerPkg": "1",
@@ -4991,6 +5514,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0",
"PerPkg": "1",
@@ -5000,6 +5524,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1",
"PerPkg": "1",
@@ -5009,6 +5534,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE.IV",
"PerPkg": "1",
@@ -5018,6 +5544,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG0",
"PerPkg": "1",
@@ -5027,6 +5554,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.AD_AG1",
"PerPkg": "1",
@@ -5036,6 +5564,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG0",
"PerPkg": "1",
@@ -5045,6 +5574,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.AK_AG1",
"PerPkg": "1",
@@ -5054,6 +5584,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG0",
"PerPkg": "1",
@@ -5063,6 +5594,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.BL_AG1",
"PerPkg": "1",
@@ -5072,6 +5604,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_INSERTS.IV",
"PerPkg": "1",
@@ -5081,6 +5614,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG0",
"PerPkg": "1",
@@ -5090,6 +5624,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.AD_AG1",
"PerPkg": "1",
@@ -5099,6 +5634,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG0",
"PerPkg": "1",
@@ -5108,6 +5644,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.AK_AG1",
"PerPkg": "1",
@@ -5117,6 +5654,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG0",
"PerPkg": "1",
@@ -5126,6 +5664,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.BL_AG1",
"PerPkg": "1",
@@ -5135,6 +5674,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK.IV",
"PerPkg": "1",
@@ -5144,6 +5684,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0",
"PerPkg": "1",
@@ -5153,6 +5694,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1",
"PerPkg": "1",
@@ -5162,6 +5704,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0",
"PerPkg": "1",
@@ -5171,6 +5714,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1",
"PerPkg": "1",
@@ -5180,6 +5724,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0",
"PerPkg": "1",
@@ -5189,6 +5734,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1",
"PerPkg": "1",
@@ -5198,6 +5744,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY.IV",
"PerPkg": "1",
@@ -5207,6 +5754,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG0",
"PerPkg": "1",
@@ -5216,6 +5764,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.AD_AG1",
"PerPkg": "1",
@@ -5225,6 +5774,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG0",
"PerPkg": "1",
@@ -5234,6 +5784,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.AK_AG1",
"PerPkg": "1",
@@ -5243,6 +5794,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG0",
"PerPkg": "1",
@@ -5252,6 +5804,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.BL_AG1",
"PerPkg": "1",
@@ -5261,6 +5814,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED.IV",
"PerPkg": "1",
@@ -5270,6 +5824,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; AD REQ Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_REQ",
"PerPkg": "1",
@@ -5279,6 +5834,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; AD RSP VN0 Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.AD_RSP",
"PerPkg": "1",
@@ -5288,6 +5844,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; BL NCB Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCB",
"PerPkg": "1",
@@ -5297,6 +5854,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; BL NCS Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_NCS",
"PerPkg": "1",
@@ -5306,6 +5864,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; BL RSP Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_RSP",
"PerPkg": "1",
@@ -5315,6 +5874,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; BL DRS Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.BL_WB",
"PerPkg": "1",
@@ -5324,6 +5884,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; VN0 Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VN0",
"PerPkg": "1",
@@ -5333,6 +5894,7 @@
},
{
"BriefDescription": "UPI Ingress Credit Allocations; VNA Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_CHA_UPI_CREDITS_ACQUIRED.VNA",
"PerPkg": "1",
@@ -5414,6 +5976,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -5423,6 +5986,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -5432,6 +5996,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -5441,6 +6006,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -5450,6 +6016,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -5459,6 +6026,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -5468,6 +6036,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -5477,6 +6046,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -5486,6 +6056,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -5495,6 +6066,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -5504,6 +6076,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -5513,6 +6086,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -5522,6 +6096,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use; Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -5531,6 +6106,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use; Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -5540,6 +6116,7 @@
},
{
"BriefDescription": "WbPushMtoI; Pushed to LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_CHA_WB_PUSH_MTOI.LLC",
"PerPkg": "1",
@@ -5549,6 +6126,7 @@
},
{
"BriefDescription": "WbPushMtoI; Pushed to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_CHA_WB_PUSH_MTOI.MEM",
"PerPkg": "1",
@@ -5558,6 +6136,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC0_SMI2",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2",
"PerPkg": "1",
@@ -5567,6 +6146,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC1_SMI3",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3",
"PerPkg": "1",
@@ -5576,6 +6156,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC2_SMI4",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4",
"PerPkg": "1",
@@ -5585,6 +6166,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty; EDC3_SMI5",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5",
"PerPkg": "1",
@@ -5594,6 +6176,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC0_SMI0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0",
"PerPkg": "1",
@@ -5603,6 +6186,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty; MC1_SMI1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1",
"PerPkg": "1",
@@ -5612,6 +6196,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Any RspIFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE",
"PerPkg": "1",
@@ -5621,6 +6206,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM",
"PerPkg": "1",
@@ -5630,6 +6216,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Any RspSFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE",
"PerPkg": "1",
@@ -5639,6 +6226,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Any RspSFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM",
"PerPkg": "1",
@@ -5648,6 +6236,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Any RspHitFSE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE",
"PerPkg": "1",
@@ -5657,6 +6246,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Core RspIFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE",
"PerPkg": "1",
@@ -5666,6 +6256,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Core RspIFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM",
"PerPkg": "1",
@@ -5675,6 +6266,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Core RspSFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE",
"PerPkg": "1",
@@ -5684,6 +6276,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Core RspSFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM",
"PerPkg": "1",
@@ -5693,6 +6286,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Core RspHitFSE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE",
"PerPkg": "1",
@@ -5702,6 +6296,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE",
"PerPkg": "1",
@@ -5711,6 +6306,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Evict RspIFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM",
"PerPkg": "1",
@@ -5720,6 +6316,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE",
"PerPkg": "1",
@@ -5729,6 +6326,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Evict RspSFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM",
"PerPkg": "1",
@@ -5738,6 +6336,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; Evict RspHitFSE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE",
"PerPkg": "1",
@@ -5747,6 +6346,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; External RspIFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE",
"PerPkg": "1",
@@ -5756,6 +6356,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; External RspIFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM",
"PerPkg": "1",
@@ -5765,6 +6366,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; External RspSFwdFE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE",
"PerPkg": "1",
@@ -5774,6 +6376,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; External RspSFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM",
"PerPkg": "1",
@@ -5783,6 +6386,7 @@
},
{
"BriefDescription": "Core Cross Snoop Responses; External RspHitFSE",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE",
"PerPkg": "1",
@@ -5792,6 +6396,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CLOCKTICKS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventName": "UNC_C_CLOCKTICKS",
"PerPkg": "1",
@@ -5799,6 +6404,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_FAST_ASSERTED.HORZ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA5",
"EventName": "UNC_C_FAST_ASSERTED",
@@ -5808,6 +6414,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.ANY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_C_LLC_LOOKUP.ANY",
@@ -5817,6 +6424,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.DATA_READ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_C_LLC_LOOKUP.DATA_READ",
@@ -5826,6 +6434,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_C_LLC_LOOKUP.LOCAL",
@@ -5835,6 +6444,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_C_LLC_LOOKUP.REMOTE",
@@ -5844,6 +6454,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_C_LLC_LOOKUP.REMOTE_SNOOP",
@@ -5853,6 +6464,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.WRITE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_C_LLC_LOOKUP.WRITE",
@@ -5862,6 +6474,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_E",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_C_LLC_VICTIMS.E_STATE",
@@ -5871,6 +6484,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_F",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_C_LLC_VICTIMS.F_STATE",
@@ -5880,6 +6494,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.LOCAL_ALL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_C_LLC_VICTIMS.LOCAL",
@@ -5889,6 +6504,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_M",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_C_LLC_VICTIMS.M_STATE",
@@ -5898,6 +6514,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.REMOTE_ALL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_C_LLC_VICTIMS.REMOTE",
@@ -5907,6 +6524,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_S",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x37",
"EventName": "UNC_C_LLC_VICTIMS.S_STATE",
@@ -5916,6 +6534,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SRC_THRTL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA4",
"EventName": "UNC_C_RING_SRC_THRTL",
@@ -5924,6 +6543,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.EVICT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.EVICT",
@@ -5933,6 +6553,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.HIT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.HIT",
@@ -5942,6 +6563,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IPQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.IPQ",
@@ -5951,6 +6573,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.IPQ_HIT",
@@ -5960,6 +6583,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.IPQ_MISS",
@@ -5969,6 +6593,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.IRQ",
@@ -5978,6 +6603,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_HIT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.IRQ_HIT",
@@ -5987,6 +6613,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.IRQ_MISS",
@@ -5996,6 +6623,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.LOC_ALL",
@@ -6005,6 +6633,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.LOC_IA",
@@ -6014,6 +6643,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IO",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.LOC_IO",
@@ -6023,6 +6653,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.MISS",
@@ -6032,6 +6663,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.PRQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.PRQ",
@@ -6041,6 +6673,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IO_HIT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.PRQ_HIT",
@@ -6050,6 +6683,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IO_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.PRQ_MISS",
@@ -6059,6 +6693,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.REM_ALL",
@@ -6068,6 +6703,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.RRQ_HIT",
@@ -6077,6 +6713,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.RRQ_MISS",
@@ -6086,6 +6723,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.WBQ_HIT",
@@ -6095,6 +6733,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_C_TOR_INSERTS.WBQ_MISS",
@@ -6239,6 +6878,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x80",
"EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR0",
@@ -6248,6 +6888,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x80",
"EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR1",
@@ -6257,6 +6898,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x80",
"EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR2",
@@ -6266,6 +6908,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x80",
"EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR3",
@@ -6275,6 +6918,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x80",
"EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR4",
@@ -6284,6 +6928,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_ACQUIRED.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x80",
"EventName": "UNC_H_AG0_AD_CRD_ACQUIRED.TGR5",
@@ -6293,6 +6938,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x82",
"EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR0",
@@ -6302,6 +6948,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x82",
"EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR1",
@@ -6311,6 +6958,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x82",
"EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR2",
@@ -6320,6 +6968,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x82",
"EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR3",
@@ -6329,6 +6978,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x82",
"EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR4",
@@ -6338,6 +6988,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_AD_CRD_OCCUPANCY.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x82",
"EventName": "UNC_H_AG0_AD_CRD_OCCUPANCY.TGR5",
@@ -6347,6 +6998,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x88",
"EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR0",
@@ -6356,6 +7008,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x88",
"EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR1",
@@ -6365,6 +7018,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x88",
"EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR2",
@@ -6374,6 +7028,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x88",
"EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR3",
@@ -6383,6 +7038,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x88",
"EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR4",
@@ -6392,6 +7048,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_ACQUIRED.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x88",
"EventName": "UNC_H_AG0_BL_CRD_ACQUIRED.TGR5",
@@ -6401,6 +7058,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8A",
"EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR0",
@@ -6410,6 +7068,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8A",
"EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR1",
@@ -6419,6 +7078,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8A",
"EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR2",
@@ -6428,6 +7088,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8A",
"EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR3",
@@ -6437,6 +7098,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8A",
"EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR4",
@@ -6446,6 +7108,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG0_BL_CRD_OCCUPANCY.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8A",
"EventName": "UNC_H_AG0_BL_CRD_OCCUPANCY.TGR5",
@@ -6455,6 +7118,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR0",
@@ -6464,6 +7128,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR1",
@@ -6473,6 +7138,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR2",
@@ -6482,6 +7148,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR3",
@@ -6491,6 +7158,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR4",
@@ -6500,6 +7168,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_ACQUIRED.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_H_AG1_AD_CRD_ACQUIRED.TGR5",
@@ -6509,6 +7178,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x86",
"EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR0",
@@ -6518,6 +7188,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x86",
"EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR1",
@@ -6527,6 +7198,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x86",
"EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR2",
@@ -6536,6 +7208,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x86",
"EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR3",
@@ -6545,6 +7218,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x86",
"EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR4",
@@ -6554,6 +7228,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_AD_CRD_OCCUPANCY.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x86",
"EventName": "UNC_H_AG1_AD_CRD_OCCUPANCY.TGR5",
@@ -6563,6 +7238,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8E",
"EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR0",
@@ -6572,6 +7248,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8E",
"EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR1",
@@ -6581,6 +7258,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8E",
"EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR2",
@@ -6590,6 +7268,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8E",
"EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR3",
@@ -6599,6 +7278,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8E",
"EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR4",
@@ -6608,6 +7288,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CRD_OCCUPANCY.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8E",
"EventName": "UNC_H_AG1_BL_CRD_OCCUPANCY.TGR5",
@@ -6617,6 +7298,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8C",
"EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR0",
@@ -6626,6 +7308,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8C",
"EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR1",
@@ -6635,6 +7318,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8C",
"EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR2",
@@ -6644,6 +7328,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8C",
"EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR3",
@@ -6653,6 +7338,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8C",
"EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR4",
@@ -6662,6 +7348,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_AG1_BL_CREDITS_ACQUIRED.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x8C",
"EventName": "UNC_H_AG1_BL_CREDITS_ACQUIRED.TGR5",
@@ -6671,6 +7358,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x57",
"EventName": "UNC_H_BYPASS_CHA_IMC.INTERMEDIATE",
@@ -6680,6 +7368,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x57",
"EventName": "UNC_H_BYPASS_CHA_IMC.NOT_TAKEN",
@@ -6689,6 +7378,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_BYPASS_CHA_IMC.TAKEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x57",
"EventName": "UNC_H_BYPASS_CHA_IMC.TAKEN",
@@ -6698,6 +7388,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CMS_CLOCKTICKS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_H_CLOCK",
@@ -6706,6 +7397,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_PMA.C1_STATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x17",
"EventName": "UNC_H_CORE_PMA.C1_STATE",
@@ -6715,6 +7407,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_PMA.C1_TRANSITION",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x17",
"EventName": "UNC_H_CORE_PMA.C1_TRANSITION",
@@ -6724,6 +7417,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_PMA.C6_STATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x17",
"EventName": "UNC_H_CORE_PMA.C6_STATE",
@@ -6733,6 +7427,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_PMA.C6_TRANSITION",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x17",
"EventName": "UNC_H_CORE_PMA.C6_TRANSITION",
@@ -6742,6 +7437,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_PMA.GV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x17",
"EventName": "UNC_H_CORE_PMA.GV",
@@ -6751,6 +7447,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.ANY_GTONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.ANY_GTONE",
@@ -6760,6 +7457,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.ANY_ONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.ANY_ONE",
@@ -6769,6 +7467,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.ANY_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.ANY_REMOTE",
@@ -6778,6 +7477,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.CORE_GTONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.CORE_GTONE",
@@ -6787,6 +7487,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.CORE_ONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.CORE_ONE",
@@ -6796,6 +7497,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.CORE_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.CORE_REMOTE",
@@ -6805,6 +7507,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EVICT_GTONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.EVICT_GTONE",
@@ -6814,6 +7517,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EVICT_ONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.EVICT_ONE",
@@ -6823,6 +7527,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EVICT_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.EVICT_REMOTE",
@@ -6832,6 +7537,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EXT_GTONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.EXT_GTONE",
@@ -6841,6 +7547,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EXT_ONE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.EXT_ONE",
@@ -6850,6 +7557,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EXT_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x33",
"EventName": "UNC_H_CORE_SNP.EXT_REMOTE",
@@ -6859,6 +7567,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_COUNTER0_OCCUPANCY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x1F",
"EventName": "UNC_H_COUNTER0_OCCUPANCY",
@@ -6867,6 +7576,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_DIR_LOOKUP.NO_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x53",
"EventName": "UNC_H_DIR_LOOKUP.NO_SNP",
@@ -6876,6 +7586,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_DIR_LOOKUP.SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x53",
"EventName": "UNC_H_DIR_LOOKUP.SNP",
@@ -6885,6 +7596,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_DIR_UPDATE.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x54",
"EventName": "UNC_H_DIR_UPDATE.HA",
@@ -6894,6 +7606,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_DIR_UPDATE.TOR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x54",
"EventName": "UNC_H_DIR_UPDATE.TOR",
@@ -6903,6 +7616,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAE",
"EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_DN",
@@ -6912,6 +7626,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAE",
"EventName": "UNC_H_EGRESS_ORDERING.IV_SNOOPGO_UP",
@@ -6921,6 +7636,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_HIT.EX_RDS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5F",
"EventName": "UNC_H_HITME_HIT.EX_RDS",
@@ -6930,6 +7646,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_HIT.SHARED_OWNREQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5F",
"EventName": "UNC_H_HITME_HIT.SHARED_OWNREQ",
@@ -6939,6 +7656,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_HIT.WBMTOE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5F",
"EventName": "UNC_H_HITME_HIT.WBMTOE",
@@ -6948,6 +7666,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_HIT.WBMTOI_OR_S",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5F",
"EventName": "UNC_H_HITME_HIT.WBMTOI_OR_S",
@@ -6957,6 +7676,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_LOOKUP.READ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5E",
"EventName": "UNC_H_HITME_LOOKUP.READ",
@@ -6966,6 +7686,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_LOOKUP.WRITE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5E",
"EventName": "UNC_H_HITME_LOOKUP.WRITE",
@@ -6975,6 +7696,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x60",
"EventName": "UNC_H_HITME_MISS.NOTSHARED_RDINVOWN",
@@ -6984,6 +7706,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_MISS.READ_OR_INV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x60",
"EventName": "UNC_H_HITME_MISS.READ_OR_INV",
@@ -6993,6 +7716,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_MISS.SHARED_RDINVOWN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x60",
"EventName": "UNC_H_HITME_MISS.SHARED_RDINVOWN",
@@ -7002,6 +7726,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_UPDATE.DEALLOCATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x61",
"EventName": "UNC_H_HITME_UPDATE.DEALLOCATE",
@@ -7011,6 +7736,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x61",
"EventName": "UNC_H_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC",
@@ -7020,6 +7746,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_UPDATE.RDINVOWN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x61",
"EventName": "UNC_H_HITME_UPDATE.RDINVOWN",
@@ -7029,6 +7756,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_UPDATE.RSPFWDI_REM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x61",
"EventName": "UNC_H_HITME_UPDATE.RSPFWDI_REM",
@@ -7038,6 +7766,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HITME_UPDATE.SHARED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x61",
"EventName": "UNC_H_HITME_UPDATE.SHARED",
@@ -7047,6 +7776,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA7",
"EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_EVEN",
@@ -7056,6 +7786,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA7",
"EventName": "UNC_H_HORZ_RING_AD_IN_USE.LEFT_ODD",
@@ -7065,6 +7796,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA7",
"EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
@@ -7074,6 +7806,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA7",
"EventName": "UNC_H_HORZ_RING_AD_IN_USE.RIGHT_ODD",
@@ -7083,6 +7816,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA9",
"EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_EVEN",
@@ -7092,6 +7826,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA9",
"EventName": "UNC_H_HORZ_RING_AK_IN_USE.LEFT_ODD",
@@ -7101,6 +7836,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA9",
"EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
@@ -7110,6 +7846,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA9",
"EventName": "UNC_H_HORZ_RING_AK_IN_USE.RIGHT_ODD",
@@ -7119,6 +7856,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAB",
"EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_EVEN",
@@ -7128,6 +7866,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAB",
"EventName": "UNC_H_HORZ_RING_BL_IN_USE.LEFT_ODD",
@@ -7137,6 +7876,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAB",
"EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
@@ -7146,6 +7886,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAB",
"EventName": "UNC_H_HORZ_RING_BL_IN_USE.RIGHT_ODD",
@@ -7155,6 +7896,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_IV_IN_USE.LEFT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAD",
"EventName": "UNC_H_HORZ_RING_IV_IN_USE.LEFT",
@@ -7164,6 +7906,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAD",
"EventName": "UNC_H_HORZ_RING_IV_IN_USE.RIGHT",
@@ -7173,6 +7916,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_READS_COUNT.NORMAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x59",
"EventName": "UNC_H_IMC_READS_COUNT.NORMAL",
@@ -7182,6 +7926,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_READS_COUNT.PRIORITY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x59",
"EventName": "UNC_H_IMC_READS_COUNT.PRIORITY",
@@ -7191,6 +7936,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_WRITES_COUNT.FULL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5B",
"EventName": "UNC_H_IMC_WRITES_COUNT.FULL",
@@ -7200,6 +7946,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_WRITES_COUNT.FULL_MIG",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5B",
"EventName": "UNC_H_IMC_WRITES_COUNT.FULL_MIG",
@@ -7209,6 +7956,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5B",
"EventName": "UNC_H_IMC_WRITES_COUNT.FULL_PRIORITY",
@@ -7218,6 +7966,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_WRITES_COUNT.PARTIAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5B",
"EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL",
@@ -7227,6 +7976,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_WRITES_COUNT.PARTIAL_MIG",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5B",
"EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_MIG",
@@ -7236,6 +7986,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5B",
"EventName": "UNC_H_IMC_WRITES_COUNT.PARTIAL_PRIORITY",
@@ -7245,6 +7996,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_ALLOC.INVITOM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x62",
"EventName": "UNC_H_IODC_ALLOC.INVITOM",
@@ -7254,6 +8006,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_ALLOC.IODCFULL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x62",
"EventName": "UNC_H_IODC_ALLOC.IODCFULL",
@@ -7263,6 +8016,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_ALLOC.OSBGATED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x62",
"EventName": "UNC_H_IODC_ALLOC.OSBGATED",
@@ -7272,6 +8026,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_DEALLOC.ALL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x63",
"EventName": "UNC_H_IODC_DEALLOC.ALL",
@@ -7281,6 +8036,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_DEALLOC.SNPOUT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x63",
"EventName": "UNC_H_IODC_DEALLOC.SNPOUT",
@@ -7290,6 +8046,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_DEALLOC.WBMTOE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x63",
"EventName": "UNC_H_IODC_DEALLOC.WBMTOE",
@@ -7299,6 +8056,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_DEALLOC.WBMTOI",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x63",
"EventName": "UNC_H_IODC_DEALLOC.WBMTOI",
@@ -7308,6 +8066,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_IODC_DEALLOC.WBPUSHMTOI",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x63",
"EventName": "UNC_H_IODC_DEALLOC.WBPUSHMTOI",
@@ -7317,6 +8076,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_MISC.CV0_PREF_MISS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x39",
"EventName": "UNC_H_MISC.CV0_PREF_MISS",
@@ -7326,6 +8086,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_MISC.CV0_PREF_VIC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x39",
"EventName": "UNC_H_MISC.CV0_PREF_VIC",
@@ -7335,6 +8096,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_MISC.RFO_HIT_S",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x39",
"EventName": "UNC_H_MISC.RFO_HIT_S",
@@ -7344,6 +8106,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_MISC.RSPI_WAS_FSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x39",
"EventName": "UNC_H_MISC.RSPI_WAS_FSE",
@@ -7353,6 +8116,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_MISC.WC_ALIASING",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x39",
"EventName": "UNC_H_MISC.WC_ALIASING",
@@ -7362,6 +8126,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_OSB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x55",
"EventName": "UNC_H_OSB",
@@ -7370,6 +8135,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_READ_NO_CREDITS.EDC0_SMI2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x58",
"EventName": "UNC_H_READ_NO_CREDITS.EDC0_SMI2",
@@ -7379,6 +8145,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_READ_NO_CREDITS.EDC1_SMI3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x58",
"EventName": "UNC_H_READ_NO_CREDITS.EDC1_SMI3",
@@ -7388,6 +8155,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_READ_NO_CREDITS.EDC2_SMI4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x58",
"EventName": "UNC_H_READ_NO_CREDITS.EDC2_SMI4",
@@ -7397,6 +8165,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_READ_NO_CREDITS.EDC3_SMI5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x58",
"EventName": "UNC_H_READ_NO_CREDITS.EDC3_SMI5",
@@ -7406,6 +8175,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_READ_NO_CREDITS.MC0_SMI0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x58",
"EventName": "UNC_H_READ_NO_CREDITS.MC0_SMI0",
@@ -7415,6 +8185,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_READ_NO_CREDITS.MC1_SMI1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x58",
"EventName": "UNC_H_READ_NO_CREDITS.MC1_SMI1",
@@ -7424,6 +8195,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_REQUESTS.INVITOE_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.INVITOE_LOCAL",
@@ -7433,6 +8205,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_REQUESTS.INVITOE_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.INVITOE_REMOTE",
@@ -7442,6 +8215,7 @@
},
{
"BriefDescription": "read requests from home agent",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.READS",
@@ -7451,6 +8225,7 @@
},
{
"BriefDescription": "read requests from local home agent",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.READS_LOCAL",
@@ -7460,6 +8235,7 @@
},
{
"BriefDescription": "read requests from remote home agent",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.READS_REMOTE",
@@ -7469,6 +8245,7 @@
},
{
"BriefDescription": "write requests from home agent",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.WRITES",
@@ -7478,6 +8255,7 @@
},
{
"BriefDescription": "write requests from local home agent",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.WRITES_LOCAL",
@@ -7487,6 +8265,7 @@
},
{
"BriefDescription": "write requests from remote home agent",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x50",
"EventName": "UNC_H_REQUESTS.WRITES_REMOTE",
@@ -7496,6 +8275,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_HORZ.AD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA1",
"EventName": "UNC_H_RING_BOUNCES_HORZ.AD",
@@ -7505,6 +8285,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_HORZ.AK",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA1",
"EventName": "UNC_H_RING_BOUNCES_HORZ.AK",
@@ -7514,6 +8295,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_HORZ.BL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA1",
"EventName": "UNC_H_RING_BOUNCES_HORZ.BL",
@@ -7523,6 +8305,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_HORZ.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA1",
"EventName": "UNC_H_RING_BOUNCES_HORZ.IV",
@@ -7532,6 +8315,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_VERT.AD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA0",
"EventName": "UNC_H_RING_BOUNCES_VERT.AD",
@@ -7541,6 +8325,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_VERT.AK",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA0",
"EventName": "UNC_H_RING_BOUNCES_VERT.AK",
@@ -7550,6 +8335,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_VERT.BL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA0",
"EventName": "UNC_H_RING_BOUNCES_VERT.BL",
@@ -7559,6 +8345,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_BOUNCES_VERT.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA0",
"EventName": "UNC_H_RING_BOUNCES_VERT.IV",
@@ -7568,6 +8355,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_HORZ.AD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA3",
"EventName": "UNC_H_RING_SINK_STARVED_HORZ.AD",
@@ -7577,6 +8365,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_HORZ.AK",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA3",
"EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK",
@@ -7586,6 +8375,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA3",
"EventName": "UNC_H_RING_SINK_STARVED_HORZ.AK_AG1",
@@ -7595,6 +8385,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_HORZ.BL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA3",
"EventName": "UNC_H_RING_SINK_STARVED_HORZ.BL",
@@ -7604,6 +8395,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_HORZ.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA3",
"EventName": "UNC_H_RING_SINK_STARVED_HORZ.IV",
@@ -7613,6 +8405,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_VERT.AD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA2",
"EventName": "UNC_H_RING_SINK_STARVED_VERT.AD",
@@ -7622,6 +8415,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_VERT.AK",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA2",
"EventName": "UNC_H_RING_SINK_STARVED_VERT.AK",
@@ -7631,6 +8425,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_VERT.BL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA2",
"EventName": "UNC_H_RING_SINK_STARVED_VERT.BL",
@@ -7640,6 +8435,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RING_SINK_STARVED_VERT.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA2",
"EventName": "UNC_H_RING_SINK_STARVED_VERT.IV",
@@ -7649,6 +8445,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.IPQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.IPQ",
@@ -7658,6 +8455,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.IRQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.IRQ",
@@ -7667,6 +8465,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.IRQ_REJ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.IRQ_REJ",
@@ -7676,6 +8475,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.PRQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.PRQ",
@@ -7685,6 +8485,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.PRQ_REJ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.PRQ_REJ",
@@ -7694,6 +8495,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.RRQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.RRQ",
@@ -7703,6 +8505,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.WBQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x13",
"EventName": "UNC_H_RxC_INSERTS.WBQ",
@@ -7712,6 +8515,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x22",
"EventName": "UNC_H_RxC_IPQ0_REJECT.AD_REQ_VN0",
@@ -7721,6 +8525,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x22",
"EventName": "UNC_H_RxC_IPQ0_REJECT.AD_RSP_VN0",
@@ -7730,6 +8535,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x22",
"EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCB_VN0",
@@ -7739,6 +8545,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x22",
"EventName": "UNC_H_RxC_IPQ0_REJECT.BL_NCS_VN0",
@@ -7748,6 +8555,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x22",
"EventName": "UNC_H_RxC_IPQ0_REJECT.BL_RSP_VN0",
@@ -7757,6 +8565,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x22",
"EventName": "UNC_H_RxC_IPQ0_REJECT.BL_WB_VN0",
@@ -7766,6 +8575,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.ALLOW_SNP",
@@ -7775,6 +8585,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.ANY_IPQ0",
@@ -7784,6 +8595,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.HA",
@@ -7793,6 +8605,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_OR_SF_WAY",
@@ -7802,6 +8615,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.LLC_VICTIM",
@@ -7811,6 +8625,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.PA_MATCH",
@@ -7820,6 +8635,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.SF_VICTIM",
@@ -7829,6 +8645,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IPQ1_REJECT.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x23",
"EventName": "UNC_H_RxC_IPQ1_REJECT.VICTIM",
@@ -7838,6 +8655,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x18",
"EventName": "UNC_H_RxC_IRQ0_REJECT.AD_REQ_VN0",
@@ -7847,6 +8665,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x18",
"EventName": "UNC_H_RxC_IRQ0_REJECT.AD_RSP_VN0",
@@ -7856,6 +8675,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x18",
"EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCB_VN0",
@@ -7865,6 +8685,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x18",
"EventName": "UNC_H_RxC_IRQ0_REJECT.BL_NCS_VN0",
@@ -7874,6 +8695,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x18",
"EventName": "UNC_H_RxC_IRQ0_REJECT.BL_RSP_VN0",
@@ -7883,6 +8705,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x18",
"EventName": "UNC_H_RxC_IRQ0_REJECT.BL_WB_VN0",
@@ -7892,6 +8715,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.ALLOW_SNP",
@@ -7901,6 +8725,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.ANY_REJECT_IRQ0",
@@ -7910,6 +8735,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.HA",
@@ -7919,6 +8745,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_OR_SF_WAY",
@@ -7928,6 +8755,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.LLC_VICTIM",
@@ -7937,6 +8765,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.PA_MATCH",
@@ -7946,6 +8775,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.SF_VICTIM",
@@ -7955,6 +8785,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x19",
"EventName": "UNC_H_RxC_IRQ1_REJECT.VICTIM",
@@ -7964,6 +8795,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x24",
"EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_REQ_VN0",
@@ -7973,6 +8805,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x24",
"EventName": "UNC_H_RxC_ISMQ0_REJECT.AD_RSP_VN0",
@@ -7982,6 +8815,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x24",
"EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCB_VN0",
@@ -7991,6 +8825,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x24",
"EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_NCS_VN0",
@@ -8000,6 +8835,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x24",
"EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_RSP_VN0",
@@ -8009,6 +8845,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x24",
"EventName": "UNC_H_RxC_ISMQ0_REJECT.BL_WB_VN0",
@@ -8018,6 +8855,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2C",
"EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_REQ_VN0",
@@ -8027,6 +8865,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2C",
"EventName": "UNC_H_RxC_ISMQ0_RETRY.AD_RSP_VN0",
@@ -8036,6 +8875,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2C",
"EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCB_VN0",
@@ -8045,6 +8885,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2C",
"EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_NCS_VN0",
@@ -8054,6 +8895,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2C",
"EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_RSP_VN0",
@@ -8063,6 +8905,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2C",
"EventName": "UNC_H_RxC_ISMQ0_RETRY.BL_WB_VN0",
@@ -8072,6 +8915,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ1_REJECT.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x25",
"EventName": "UNC_H_RxC_ISMQ1_REJECT.ANY_ISMQ0",
@@ -8081,6 +8925,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ1_REJECT.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x25",
"EventName": "UNC_H_RxC_ISMQ1_REJECT.HA",
@@ -8090,6 +8935,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ1_RETRY.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2D",
"EventName": "UNC_H_RxC_ISMQ1_RETRY.ANY",
@@ -8099,6 +8945,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_ISMQ1_RETRY.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2D",
"EventName": "UNC_H_RxC_ISMQ1_RETRY.HA",
@@ -8144,6 +8991,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2E",
"EventName": "UNC_H_RxC_OTHER0_RETRY.AD_REQ_VN0",
@@ -8153,6 +9001,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2E",
"EventName": "UNC_H_RxC_OTHER0_RETRY.AD_RSP_VN0",
@@ -8162,6 +9011,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2E",
"EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCB_VN0",
@@ -8171,6 +9021,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2E",
"EventName": "UNC_H_RxC_OTHER0_RETRY.BL_NCS_VN0",
@@ -8180,6 +9031,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2E",
"EventName": "UNC_H_RxC_OTHER0_RETRY.BL_RSP_VN0",
@@ -8189,6 +9041,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2E",
"EventName": "UNC_H_RxC_OTHER0_RETRY.BL_WB_VN0",
@@ -8198,6 +9051,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.ALLOW_SNP",
@@ -8207,6 +9061,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.ANY",
@@ -8216,6 +9071,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.HA",
@@ -8225,6 +9081,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_OR_SF_WAY",
@@ -8234,6 +9091,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.LLC_VICTIM",
@@ -8243,6 +9101,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.PA_MATCH",
@@ -8252,6 +9111,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.SF_VICTIM",
@@ -8261,6 +9121,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_OTHER1_RETRY.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2F",
"EventName": "UNC_H_RxC_OTHER1_RETRY.VICTIM",
@@ -8270,6 +9131,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "UNC_H_RxC_PRQ0_REJECT.AD_REQ_VN0",
@@ -8279,6 +9141,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "UNC_H_RxC_PRQ0_REJECT.AD_RSP_VN0",
@@ -8288,6 +9151,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCB_VN0",
@@ -8297,6 +9161,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "UNC_H_RxC_PRQ0_REJECT.BL_NCS_VN0",
@@ -8306,6 +9171,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "UNC_H_RxC_PRQ0_REJECT.BL_RSP_VN0",
@@ -8315,6 +9181,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x20",
"EventName": "UNC_H_RxC_PRQ0_REJECT.BL_WB_VN0",
@@ -8324,6 +9191,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.ALLOW_SNP",
@@ -8333,6 +9201,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.ANY_PRQ0",
@@ -8342,6 +9211,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.HA",
@@ -8351,6 +9221,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_OR_SF_WAY",
@@ -8360,6 +9231,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.LLC_VICTIM",
@@ -8369,6 +9241,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.PA_MATCH",
@@ -8378,6 +9251,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.SF_VICTIM",
@@ -8387,6 +9261,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_PRQ1_REJECT.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x21",
"EventName": "UNC_H_RxC_PRQ1_REJECT.VICTIM",
@@ -8396,6 +9271,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2A",
"EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_REQ_VN0",
@@ -8405,6 +9281,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2A",
"EventName": "UNC_H_RxC_REQ_Q0_RETRY.AD_RSP_VN0",
@@ -8414,6 +9291,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2A",
"EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCB_VN0",
@@ -8423,6 +9301,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2A",
"EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_NCS_VN0",
@@ -8432,6 +9311,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2A",
"EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_RSP_VN0",
@@ -8441,6 +9321,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2A",
"EventName": "UNC_H_RxC_REQ_Q0_RETRY.BL_WB_VN0",
@@ -8450,6 +9331,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.ALLOW_SNP",
@@ -8459,6 +9341,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.ANY",
@@ -8468,6 +9351,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.HA",
@@ -8477,6 +9361,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY",
@@ -8486,6 +9371,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.LLC_VICTIM",
@@ -8495,6 +9381,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.PA_MATCH",
@@ -8504,6 +9391,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.SF_VICTIM",
@@ -8513,6 +9401,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2B",
"EventName": "UNC_H_RxC_REQ_Q1_RETRY.VICTIM",
@@ -8522,6 +9411,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x26",
"EventName": "UNC_H_RxC_RRQ0_REJECT.AD_REQ_VN0",
@@ -8531,6 +9421,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x26",
"EventName": "UNC_H_RxC_RRQ0_REJECT.AD_RSP_VN0",
@@ -8540,6 +9431,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x26",
"EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCB_VN0",
@@ -8549,6 +9441,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x26",
"EventName": "UNC_H_RxC_RRQ0_REJECT.BL_NCS_VN0",
@@ -8558,6 +9451,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x26",
"EventName": "UNC_H_RxC_RRQ0_REJECT.BL_RSP_VN0",
@@ -8567,6 +9461,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x26",
"EventName": "UNC_H_RxC_RRQ0_REJECT.BL_WB_VN0",
@@ -8576,6 +9471,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.ALLOW_SNP",
@@ -8585,6 +9481,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.ANY_RRQ0",
@@ -8594,6 +9491,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.HA",
@@ -8603,6 +9501,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_OR_SF_WAY",
@@ -8612,6 +9511,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.LLC_VICTIM",
@@ -8621,6 +9521,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.PA_MATCH",
@@ -8630,6 +9531,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.SF_VICTIM",
@@ -8639,6 +9541,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_RRQ1_REJECT.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x27",
"EventName": "UNC_H_RxC_RRQ1_REJECT.VICTIM",
@@ -8648,6 +9551,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x28",
"EventName": "UNC_H_RxC_WBQ0_REJECT.AD_REQ_VN0",
@@ -8657,6 +9561,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x28",
"EventName": "UNC_H_RxC_WBQ0_REJECT.AD_RSP_VN0",
@@ -8666,6 +9571,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x28",
"EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCB_VN0",
@@ -8675,6 +9581,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x28",
"EventName": "UNC_H_RxC_WBQ0_REJECT.BL_NCS_VN0",
@@ -8684,6 +9591,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x28",
"EventName": "UNC_H_RxC_WBQ0_REJECT.BL_RSP_VN0",
@@ -8693,6 +9601,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x28",
"EventName": "UNC_H_RxC_WBQ0_REJECT.BL_WB_VN0",
@@ -8702,6 +9611,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.ALLOW_SNP",
@@ -8711,6 +9621,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.ANY0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.ANY_WBQ0",
@@ -8720,6 +9631,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.HA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.HA",
@@ -8729,6 +9641,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_OR_SF_WAY",
@@ -8738,6 +9651,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.LLC_VICTIM",
@@ -8747,6 +9661,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.PA_MATCH",
@@ -8756,6 +9671,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.SF_VICTIM",
@@ -8765,6 +9681,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxC_WBQ1_REJECT.VICTIM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x29",
"EventName": "UNC_H_RxC_WBQ1_REJECT.VICTIM",
@@ -8774,6 +9691,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BUSY_STARVED.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB4",
"EventName": "UNC_H_RxR_BUSY_STARVED.AD_BNC",
@@ -8783,6 +9701,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BUSY_STARVED.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB4",
"EventName": "UNC_H_RxR_BUSY_STARVED.AD_CRD",
@@ -8792,6 +9711,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BUSY_STARVED.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB4",
"EventName": "UNC_H_RxR_BUSY_STARVED.BL_BNC",
@@ -8801,6 +9721,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BUSY_STARVED.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB4",
"EventName": "UNC_H_RxR_BUSY_STARVED.BL_CRD",
@@ -8810,6 +9731,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BYPASS.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB2",
"EventName": "UNC_H_RxR_BYPASS.AD_BNC",
@@ -8819,6 +9741,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BYPASS.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB2",
"EventName": "UNC_H_RxR_BYPASS.AD_CRD",
@@ -8828,6 +9751,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BYPASS.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB2",
"EventName": "UNC_H_RxR_BYPASS.AK_BNC",
@@ -8837,6 +9761,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BYPASS.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB2",
"EventName": "UNC_H_RxR_BYPASS.BL_BNC",
@@ -8846,6 +9771,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BYPASS.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB2",
"EventName": "UNC_H_RxR_BYPASS.BL_CRD",
@@ -8855,6 +9781,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_BYPASS.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB2",
"EventName": "UNC_H_RxR_BYPASS.IV_BNC",
@@ -8864,6 +9791,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.AD_BNC",
@@ -8873,6 +9801,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.AD_CRD",
@@ -8882,6 +9811,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.AK_BNC",
@@ -8891,6 +9821,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.BL_BNC",
@@ -8900,6 +9831,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.BL_CRD",
@@ -8909,6 +9841,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.IFV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.IFV",
@@ -8918,6 +9851,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_CRD_STARVED.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB3",
"EventName": "UNC_H_RxR_CRD_STARVED.IV_BNC",
@@ -8927,6 +9861,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_INSERTS.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB1",
"EventName": "UNC_H_RxR_INSERTS.AD_BNC",
@@ -8936,6 +9871,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_INSERTS.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB1",
"EventName": "UNC_H_RxR_INSERTS.AD_CRD",
@@ -8945,6 +9881,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_INSERTS.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB1",
"EventName": "UNC_H_RxR_INSERTS.AK_BNC",
@@ -8954,6 +9891,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_INSERTS.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB1",
"EventName": "UNC_H_RxR_INSERTS.BL_BNC",
@@ -8963,6 +9901,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_INSERTS.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB1",
"EventName": "UNC_H_RxR_INSERTS.BL_CRD",
@@ -8972,6 +9911,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_INSERTS.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB1",
"EventName": "UNC_H_RxR_INSERTS.IV_BNC",
@@ -8981,6 +9921,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_OCCUPANCY.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB0",
"EventName": "UNC_H_RxR_OCCUPANCY.AD_BNC",
@@ -8990,6 +9931,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_OCCUPANCY.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB0",
"EventName": "UNC_H_RxR_OCCUPANCY.AD_CRD",
@@ -8999,6 +9941,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_OCCUPANCY.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB0",
"EventName": "UNC_H_RxR_OCCUPANCY.AK_BNC",
@@ -9008,6 +9951,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_OCCUPANCY.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB0",
"EventName": "UNC_H_RxR_OCCUPANCY.BL_BNC",
@@ -9017,6 +9961,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_OCCUPANCY.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB0",
"EventName": "UNC_H_RxR_OCCUPANCY.BL_CRD",
@@ -9026,6 +9971,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_RxR_OCCUPANCY.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xB0",
"EventName": "UNC_H_RxR_OCCUPANCY.IV_BNC",
@@ -9035,6 +9981,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SF_EVICTION.E_STATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x3D",
"EventName": "UNC_H_SF_EVICTION.E_STATE",
@@ -9044,6 +9991,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SF_EVICTION.M_STATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x3D",
"EventName": "UNC_H_SF_EVICTION.M_STATE",
@@ -9053,6 +10001,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SF_EVICTION.S_STATE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x3D",
"EventName": "UNC_H_SF_EVICTION.S_STATE",
@@ -9062,6 +10011,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.ALL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.",
@@ -9071,6 +10021,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.BCST_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.BCST_LOC",
@@ -9080,6 +10031,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.BCST_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.BCST_REM",
@@ -9089,6 +10041,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.DIRECT_LOC",
@@ -9098,6 +10051,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.DIRECT_REM",
@@ -9107,6 +10061,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.LOCAL",
@@ -9116,6 +10071,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOPS_SENT.REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x51",
"EventName": "UNC_H_SNOOPS_SENT.REMOTE",
@@ -9125,6 +10081,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPCNFLCTS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT",
@@ -9134,6 +10091,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPFWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSPFWD",
@@ -9143,6 +10101,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPI",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSPI",
@@ -9152,6 +10111,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPIFWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSPIFWD",
@@ -9161,6 +10121,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSPS",
@@ -9170,6 +10131,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPSFWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSPSFWD",
@@ -9179,6 +10141,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSP_FWD_WB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB",
@@ -9188,6 +10151,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSP_WBWB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5C",
"EventName": "UNC_H_SNOOP_RESP.RSP_WB",
@@ -9197,6 +10161,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPCNFLCT",
@@ -9206,6 +10171,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPFWD",
@@ -9215,6 +10181,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSPI",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPI",
@@ -9224,6 +10191,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPIFWD",
@@ -9233,6 +10201,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSPS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPS",
@@ -9242,6 +10211,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSPSFWD",
@@ -9251,6 +10221,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSP_FWD_WB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_FWD_WB",
@@ -9260,6 +10231,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP_LOCAL.RSP_WB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5D",
"EventName": "UNC_H_SNP_RSP_RCV_LOCAL.RSP_WB",
@@ -9269,6 +10241,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD0",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
@@ -9278,6 +10251,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD0",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
@@ -9287,6 +10261,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD0",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
@@ -9296,6 +10271,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD0",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
@@ -9305,6 +10281,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD0",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
@@ -9314,6 +10291,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD0",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
@@ -9323,6 +10301,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD2",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
@@ -9332,6 +10311,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD2",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
@@ -9341,6 +10321,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD2",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
@@ -9350,6 +10331,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD2",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
@@ -9359,6 +10341,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD2",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
@@ -9368,6 +10351,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD2",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
@@ -9377,6 +10361,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD4",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
@@ -9386,6 +10371,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD4",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
@@ -9395,6 +10381,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD4",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
@@ -9404,6 +10391,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD4",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
@@ -9413,6 +10401,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD4",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
@@ -9422,6 +10411,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD4",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
@@ -9431,6 +10421,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD6",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
@@ -9440,6 +10431,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD6",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
@@ -9449,6 +10441,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD6",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
@@ -9458,6 +10451,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD6",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
@@ -9467,6 +10461,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD6",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
@@ -9476,6 +10471,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xD6",
"EventName": "UNC_H_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
@@ -9485,6 +10481,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_ADS_USED.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9D",
"EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_BNC",
@@ -9494,6 +10491,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9D",
"EventName": "UNC_H_TxR_HORZ_ADS_USED.AD_CRD",
@@ -9503,6 +10501,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_ADS_USED.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9D",
"EventName": "UNC_H_TxR_HORZ_ADS_USED.AK_BNC",
@@ -9512,6 +10511,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_ADS_USED.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9D",
"EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_BNC",
@@ -9521,6 +10521,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9D",
"EventName": "UNC_H_TxR_HORZ_ADS_USED.BL_CRD",
@@ -9530,6 +10531,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_BYPASS.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9F",
"EventName": "UNC_H_TxR_HORZ_BYPASS.AD_BNC",
@@ -9539,6 +10541,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_BYPASS.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9F",
"EventName": "UNC_H_TxR_HORZ_BYPASS.AD_CRD",
@@ -9548,6 +10551,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_BYPASS.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9F",
"EventName": "UNC_H_TxR_HORZ_BYPASS.AK_BNC",
@@ -9557,6 +10561,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_BYPASS.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9F",
"EventName": "UNC_H_TxR_HORZ_BYPASS.BL_BNC",
@@ -9566,6 +10571,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_BYPASS.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9F",
"EventName": "UNC_H_TxR_HORZ_BYPASS.BL_CRD",
@@ -9575,6 +10581,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_BYPASS.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9F",
"EventName": "UNC_H_TxR_HORZ_BYPASS.IV_BNC",
@@ -9584,6 +10591,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x96",
"EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_BNC",
@@ -9593,6 +10601,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x96",
"EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AD_CRD",
@@ -9602,6 +10611,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_FULL.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x96",
"EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.AK_BNC",
@@ -9611,6 +10621,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x96",
"EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_BNC",
@@ -9620,6 +10631,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x96",
"EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.BL_CRD",
@@ -9629,6 +10641,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_FULL.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x96",
"EventName": "UNC_H_TxR_HORZ_CYCLES_FULL.IV_BNC",
@@ -9638,6 +10651,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_NE.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x97",
"EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_BNC",
@@ -9647,6 +10661,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x97",
"EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AD_CRD",
@@ -9656,6 +10671,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_NE.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x97",
"EventName": "UNC_H_TxR_HORZ_CYCLES_NE.AK_BNC",
@@ -9665,6 +10681,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_NE.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x97",
"EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_BNC",
@@ -9674,6 +10691,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x97",
"EventName": "UNC_H_TxR_HORZ_CYCLES_NE.BL_CRD",
@@ -9683,6 +10701,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_CYCLES_NE.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x97",
"EventName": "UNC_H_TxR_HORZ_CYCLES_NE.IV_BNC",
@@ -9692,6 +10711,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_INSERTS.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x95",
"EventName": "UNC_H_TxR_HORZ_INSERTS.AD_BNC",
@@ -9701,6 +10721,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_INSERTS.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x95",
"EventName": "UNC_H_TxR_HORZ_INSERTS.AD_CRD",
@@ -9710,6 +10731,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_INSERTS.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x95",
"EventName": "UNC_H_TxR_HORZ_INSERTS.AK_BNC",
@@ -9719,6 +10741,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_INSERTS.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x95",
"EventName": "UNC_H_TxR_HORZ_INSERTS.BL_BNC",
@@ -9728,6 +10751,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_INSERTS.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x95",
"EventName": "UNC_H_TxR_HORZ_INSERTS.BL_CRD",
@@ -9737,6 +10761,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_INSERTS.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x95",
"EventName": "UNC_H_TxR_HORZ_INSERTS.IV_BNC",
@@ -9746,6 +10771,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_NACK.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x99",
"EventName": "UNC_H_TxR_HORZ_NACK.AD_BNC",
@@ -9755,6 +10781,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_NACK.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x99",
"EventName": "UNC_H_TxR_HORZ_NACK.AD_CRD",
@@ -9764,6 +10791,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_NACK.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x99",
"EventName": "UNC_H_TxR_HORZ_NACK.AK_BNC",
@@ -9773,6 +10801,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_NACK.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x99",
"EventName": "UNC_H_TxR_HORZ_NACK.BL_BNC",
@@ -9782,6 +10811,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_NACK.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x99",
"EventName": "UNC_H_TxR_HORZ_NACK.BL_CRD",
@@ -9791,6 +10821,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_NACK.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x99",
"EventName": "UNC_H_TxR_HORZ_NACK.IV_BNC",
@@ -9800,6 +10831,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_OCCUPANCY.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x94",
"EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_BNC",
@@ -9809,6 +10841,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x94",
"EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AD_CRD",
@@ -9818,6 +10851,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_OCCUPANCY.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x94",
"EventName": "UNC_H_TxR_HORZ_OCCUPANCY.AK_BNC",
@@ -9827,6 +10861,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_OCCUPANCY.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x94",
"EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_BNC",
@@ -9836,6 +10871,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x94",
"EventName": "UNC_H_TxR_HORZ_OCCUPANCY.BL_CRD",
@@ -9845,6 +10881,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_OCCUPANCY.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x94",
"EventName": "UNC_H_TxR_HORZ_OCCUPANCY.IV_BNC",
@@ -9854,6 +10891,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_STARVED.AD_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9B",
"EventName": "UNC_H_TxR_HORZ_STARVED.AD_BNC",
@@ -9863,6 +10901,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_STARVED.AK_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9B",
"EventName": "UNC_H_TxR_HORZ_STARVED.AK_BNC",
@@ -9872,6 +10911,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_STARVED.BL_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9B",
"EventName": "UNC_H_TxR_HORZ_STARVED.BL_BNC",
@@ -9881,6 +10921,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_HORZ_STARVED.IV_BNC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9B",
"EventName": "UNC_H_TxR_HORZ_STARVED.IV_BNC",
@@ -9890,6 +10931,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_ADS_USED.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9C",
"EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG0",
@@ -9899,6 +10941,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_ADS_USED.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9C",
"EventName": "UNC_H_TxR_VERT_ADS_USED.AD_AG1",
@@ -9908,6 +10951,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_ADS_USED.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9C",
"EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG0",
@@ -9917,6 +10961,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_ADS_USED.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9C",
"EventName": "UNC_H_TxR_VERT_ADS_USED.AK_AG1",
@@ -9926,6 +10971,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_ADS_USED.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9C",
"EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG0",
@@ -9935,6 +10981,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_ADS_USED.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9C",
"EventName": "UNC_H_TxR_VERT_ADS_USED.BL_AG1",
@@ -9944,6 +10991,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG0",
@@ -9953,6 +11001,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.AD_AG1",
@@ -9962,6 +11011,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG0",
@@ -9971,6 +11021,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.AK_AG1",
@@ -9980,6 +11031,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG0",
@@ -9989,6 +11041,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.BL_AG1",
@@ -9998,6 +11051,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_BYPASS.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9E",
"EventName": "UNC_H_TxR_VERT_BYPASS.IV_AG1",
@@ -10007,6 +11061,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG0",
@@ -10016,6 +11071,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AD_AG1",
@@ -10025,6 +11081,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG0",
@@ -10034,6 +11091,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.AK_AG1",
@@ -10043,6 +11101,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG0",
@@ -10052,6 +11111,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.BL_AG1",
@@ -10061,6 +11121,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_FULL.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x92",
"EventName": "UNC_H_TxR_VERT_CYCLES_FULL.IV_AG0",
@@ -10070,6 +11131,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG0",
@@ -10079,6 +11141,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.AD_AG1",
@@ -10088,6 +11151,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG0",
@@ -10097,6 +11161,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.AK_AG1",
@@ -10106,6 +11171,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG0",
@@ -10115,6 +11181,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.BL_AG1",
@@ -10124,6 +11191,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_CYCLES_NE.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x93",
"EventName": "UNC_H_TxR_VERT_CYCLES_NE.IV_AG0",
@@ -10133,6 +11201,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG0",
@@ -10142,6 +11211,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.AD_AG1",
@@ -10151,6 +11221,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG0",
@@ -10160,6 +11231,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.AK_AG1",
@@ -10169,6 +11241,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG0",
@@ -10178,6 +11251,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.BL_AG1",
@@ -10187,6 +11261,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_INSERTS.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x91",
"EventName": "UNC_H_TxR_VERT_INSERTS.IV_AG0",
@@ -10196,6 +11271,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.AD_AG0",
@@ -10205,6 +11281,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.AD_AG1",
@@ -10214,6 +11291,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.AK_AG0",
@@ -10223,6 +11301,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.AK_AG1",
@@ -10232,6 +11311,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.BL_AG0",
@@ -10241,6 +11321,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.BL_AG1",
@@ -10250,6 +11331,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_NACK.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x98",
"EventName": "UNC_H_TxR_VERT_NACK.IV",
@@ -10259,6 +11341,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG0",
@@ -10268,6 +11351,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.AD_AG1",
@@ -10277,6 +11361,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG0",
@@ -10286,6 +11371,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.AK_AG1",
@@ -10295,6 +11381,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG0",
@@ -10304,6 +11391,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.BL_AG1",
@@ -10313,6 +11401,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_OCCUPANCY.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x90",
"EventName": "UNC_H_TxR_VERT_OCCUPANCY.IV_AG0",
@@ -10322,6 +11411,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.AD_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.AD_AG0",
@@ -10331,6 +11421,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.AD_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.AD_AG1",
@@ -10340,6 +11431,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.AK_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.AK_AG0",
@@ -10349,6 +11441,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.AK_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.AK_AG1",
@@ -10358,6 +11451,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.BL_AG0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.BL_AG0",
@@ -10367,6 +11461,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.BL_AG1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.BL_AG1",
@@ -10376,6 +11471,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TxR_VERT_STARVED.IV",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x9A",
"EventName": "UNC_H_TxR_VERT_STARVED.IV",
@@ -10385,6 +11481,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA6",
"EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_EVEN",
@@ -10394,6 +11491,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA6",
"EventName": "UNC_H_VERT_RING_AD_IN_USE.DN_ODD",
@@ -10403,6 +11501,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA6",
"EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_EVEN",
@@ -10412,6 +11511,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA6",
"EventName": "UNC_H_VERT_RING_AD_IN_USE.UP_ODD",
@@ -10421,6 +11521,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA8",
"EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_EVEN",
@@ -10430,6 +11531,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA8",
"EventName": "UNC_H_VERT_RING_AK_IN_USE.DN_ODD",
@@ -10439,6 +11541,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA8",
"EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_EVEN",
@@ -10448,6 +11551,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xA8",
"EventName": "UNC_H_VERT_RING_AK_IN_USE.UP_ODD",
@@ -10457,6 +11561,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAA",
"EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_EVEN",
@@ -10466,6 +11571,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAA",
"EventName": "UNC_H_VERT_RING_BL_IN_USE.DN_ODD",
@@ -10475,6 +11581,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAA",
"EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_EVEN",
@@ -10484,6 +11591,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAA",
"EventName": "UNC_H_VERT_RING_BL_IN_USE.UP_ODD",
@@ -10493,6 +11601,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_IV_IN_USE.DN",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAC",
"EventName": "UNC_H_VERT_RING_IV_IN_USE.DN",
@@ -10502,6 +11611,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_VERT_RING_IV_IN_USE.UP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xAC",
"EventName": "UNC_H_VERT_RING_IV_IN_USE.UP",
@@ -10511,6 +11621,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WB_PUSH_MTOI.LLC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x56",
"EventName": "UNC_H_WB_PUSH_MTOI.LLC",
@@ -10520,6 +11631,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WB_PUSH_MTOI.MEM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x56",
"EventName": "UNC_H_WB_PUSH_MTOI.MEM",
@@ -10529,6 +11641,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WRITE_NO_CREDITS.EDC0_SMI2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5A",
"EventName": "UNC_H_WRITE_NO_CREDITS.EDC0_SMI2",
@@ -10538,6 +11651,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WRITE_NO_CREDITS.EDC1_SMI3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5A",
"EventName": "UNC_H_WRITE_NO_CREDITS.EDC1_SMI3",
@@ -10547,6 +11661,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WRITE_NO_CREDITS.EDC2_SMI4",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5A",
"EventName": "UNC_H_WRITE_NO_CREDITS.EDC2_SMI4",
@@ -10556,6 +11671,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WRITE_NO_CREDITS.EDC3_SMI5",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5A",
"EventName": "UNC_H_WRITE_NO_CREDITS.EDC3_SMI5",
@@ -10565,6 +11681,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WRITE_NO_CREDITS.MC0_SMI0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5A",
"EventName": "UNC_H_WRITE_NO_CREDITS.MC0_SMI0",
@@ -10574,6 +11691,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_WRITE_NO_CREDITS.MC1_SMI1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5A",
"EventName": "UNC_H_WRITE_NO_CREDITS.MC1_SMI1",
@@ -10583,6 +11701,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.ANY_RSPI_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDFE",
@@ -10592,6 +11711,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.ANY_RSPI_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.ANY_RSPI_FWDM",
@@ -10601,6 +11721,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.ANY_RSPS_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDFE",
@@ -10610,6 +11731,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.ANY_RSPS_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.ANY_RSPS_FWDM",
@@ -10619,6 +11741,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.ANY_RSP_HITFSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.ANY_RSP_HITFSE",
@@ -10628,6 +11751,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.CORE_RSPI_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDFE",
@@ -10637,6 +11761,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.CORE_RSPI_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.CORE_RSPI_FWDM",
@@ -10646,6 +11771,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.CORE_RSPS_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDFE",
@@ -10655,6 +11781,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.CORE_RSPS_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.CORE_RSPS_FWDM",
@@ -10664,6 +11791,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.CORE_RSP_HITFSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.CORE_RSP_HITFSE",
@@ -10673,6 +11801,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDFE",
@@ -10682,6 +11811,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EVICT_RSPI_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EVICT_RSPI_FWDM",
@@ -10691,6 +11821,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDFE",
@@ -10700,6 +11831,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EVICT_RSPS_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EVICT_RSPS_FWDM",
@@ -10709,6 +11841,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EVICT_RSP_HITFSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EVICT_RSP_HITFSE",
@@ -10718,6 +11851,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EXT_RSPI_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDFE",
@@ -10727,6 +11861,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EXT_RSPI_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EXT_RSPI_FWDM",
@@ -10736,6 +11871,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EXT_RSPS_FWDFE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDFE",
@@ -10745,6 +11881,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EXT_RSPS_FWDM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EXT_RSPS_FWDM",
@@ -10754,6 +11891,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_XSNP_RESP.EXT_RSP_HITFSE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x32",
"EventName": "UNC_H_XSNP_RESP.EXT_RSP_HITFSE",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnect.json
index 1a342dff1503..bc90b561b876 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnect.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-interconnect.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Total Write Cache Occupancy; Any Source",
+ "Counter": "0,1",
"EventCode": "0xF",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY",
"PerPkg": "1",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "Total Write Cache Occupancy; Snoops",
+ "Counter": "0,1",
"EventCode": "0xF",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q",
"PerPkg": "1",
@@ -19,6 +21,7 @@
},
{
"BriefDescription": "Total IRP occupancy of inbound read and write requests.",
+ "Counter": "0,1",
"EventCode": "0xF",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM",
"PerPkg": "1",
@@ -28,6 +31,7 @@
},
{
"BriefDescription": "IRP Clocks",
+ "Counter": "0,1",
"EventCode": "0x1",
"EventName": "UNC_I_CLOCKTICKS",
"PerPkg": "1",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Coherent Ops; CLFlush",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.CLFLUSH",
"PerPkg": "1",
@@ -44,6 +49,7 @@
},
{
"BriefDescription": "Coherent Ops; CRd",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.CRD",
"PerPkg": "1",
@@ -53,6 +59,7 @@
},
{
"BriefDescription": "Coherent Ops; DRd",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.DRD",
"PerPkg": "1",
@@ -62,6 +69,7 @@
},
{
"BriefDescription": "Coherent Ops; PCIDCAHin5t",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.PCIDCAHINT",
"PerPkg": "1",
@@ -71,6 +79,7 @@
},
{
"BriefDescription": "Coherent Ops; PCIRdCur",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.PCIRDCUR",
"PerPkg": "1",
@@ -80,6 +89,7 @@
},
{
"BriefDescription": "PCIITOM request issued by the IRP unit to the mesh with the intention of writing a full cacheline.",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.PCITOM",
"PerPkg": "1",
@@ -89,6 +99,7 @@
},
{
"BriefDescription": "RFO request issued by the IRP unit to the mesh with the intention of writing a partial cacheline.",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.RFO",
"PerPkg": "1",
@@ -98,6 +109,7 @@
},
{
"BriefDescription": "Coherent Ops; WbMtoI",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.WBMTOI",
"PerPkg": "1",
@@ -107,6 +119,7 @@
},
{
"BriefDescription": "FAF RF full",
+ "Counter": "0,1",
"EventCode": "0x17",
"EventName": "UNC_I_FAF_FULL",
"PerPkg": "1",
@@ -114,6 +127,7 @@
},
{
"BriefDescription": "Inbound read requests received by the IRP and inserted into the FAF queue.",
+ "Counter": "0,1",
"EventCode": "0x18",
"EventName": "UNC_I_FAF_INSERTS",
"PerPkg": "1",
@@ -122,6 +136,7 @@
},
{
"BriefDescription": "Occupancy of the IRP FAF queue.",
+ "Counter": "0,1",
"EventCode": "0x19",
"EventName": "UNC_I_FAF_OCCUPANCY",
"PerPkg": "1",
@@ -130,6 +145,7 @@
},
{
"BriefDescription": "FAF allocation -- sent to ADQ",
+ "Counter": "0,1",
"EventCode": "0x16",
"EventName": "UNC_I_FAF_TRANSACTIONS",
"PerPkg": "1",
@@ -137,6 +153,7 @@
},
{
"BriefDescription": "All Inserts Inbound (p2p + faf + cset)",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS",
"PerPkg": "1",
@@ -145,6 +162,7 @@
},
{
"BriefDescription": "All Inserts Outbound (BL, AK, Snoops)",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS",
"PerPkg": "1",
@@ -153,6 +171,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
"PerPkg": "1",
@@ -161,6 +180,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.2ND_RD_INSERT",
"PerPkg": "1",
@@ -169,6 +189,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.2ND_WR_INSERT",
"PerPkg": "1",
@@ -177,6 +198,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.FAST_REJ",
"PerPkg": "1",
@@ -185,6 +207,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Fastpath Requests",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.FAST_REQ",
"PerPkg": "1",
@@ -193,6 +216,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.FAST_XFER",
"PerPkg": "1",
@@ -201,6 +225,7 @@
},
{
"BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.PF_ACK_HINT",
"PerPkg": "1",
@@ -209,6 +234,7 @@
},
{
"BriefDescription": "Misc Events - Set 0",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_MISC0.UNKNOWN",
"PerPkg": "1",
@@ -217,6 +243,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Lost Forward",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.LOST_FWD",
"PerPkg": "1",
@@ -226,6 +253,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Received Invalid",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.SEC_RCVD_INVLD",
"PerPkg": "1",
@@ -235,6 +263,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Received Valid",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.SEC_RCVD_VLD",
"PerPkg": "1",
@@ -244,6 +273,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Slow Transfer of E Line",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.SLOW_E",
"PerPkg": "1",
@@ -253,6 +283,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Slow Transfer of I Line",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.SLOW_I",
"PerPkg": "1",
@@ -262,6 +293,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Slow Transfer of M Line",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.SLOW_M",
"PerPkg": "1",
@@ -271,6 +303,7 @@
},
{
"BriefDescription": "Misc Events - Set 1; Slow Transfer of S Line",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_MISC1.SLOW_S",
"PerPkg": "1",
@@ -280,6 +313,7 @@
},
{
"BriefDescription": "P2P Requests",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_I_P2P_INSERTS",
"PerPkg": "1",
@@ -288,6 +322,7 @@
},
{
"BriefDescription": "P2P Occupancy",
+ "Counter": "0,1",
"EventCode": "0x15",
"EventName": "UNC_I_P2P_OCCUPANCY",
"PerPkg": "1",
@@ -296,6 +331,7 @@
},
{
"BriefDescription": "P2P Transactions; P2P completions",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.CMPL",
"PerPkg": "1",
@@ -304,6 +340,7 @@
},
{
"BriefDescription": "P2P Transactions; match if local only",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.LOC",
"PerPkg": "1",
@@ -312,6 +349,7 @@
},
{
"BriefDescription": "P2P Transactions; match if local and target matches",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH",
"PerPkg": "1",
@@ -320,6 +358,7 @@
},
{
"BriefDescription": "P2P Transactions; P2P Message",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.MSG",
"PerPkg": "1",
@@ -328,6 +367,7 @@
},
{
"BriefDescription": "P2P Transactions; P2P reads",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.RD",
"PerPkg": "1",
@@ -336,6 +376,7 @@
},
{
"BriefDescription": "P2P Transactions; Match if remote only",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.REM",
"PerPkg": "1",
@@ -344,6 +385,7 @@
},
{
"BriefDescription": "P2P Transactions; match if remote and target matches",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH",
"PerPkg": "1",
@@ -352,6 +394,7 @@
},
{
"BriefDescription": "P2P Transactions; P2P Writes",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.WR",
"PerPkg": "1",
@@ -360,6 +403,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit M, E, S or I line in the IIO",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT",
"PerPkg": "1",
@@ -369,6 +413,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit E or S line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES",
"PerPkg": "1",
@@ -378,6 +423,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit I line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I",
"PerPkg": "1",
@@ -387,6 +433,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit M line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M",
"PerPkg": "1",
@@ -396,6 +443,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that miss the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_MISS",
"PerPkg": "1",
@@ -405,6 +453,7 @@
},
{
"BriefDescription": "Snoop Responses; Hit E or S",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_ES",
"PerPkg": "1",
@@ -413,6 +462,7 @@
},
{
"BriefDescription": "Snoop Responses; Hit I",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_I",
"PerPkg": "1",
@@ -421,6 +471,7 @@
},
{
"BriefDescription": "Snoop Responses; Hit M",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_M",
"PerPkg": "1",
@@ -429,6 +480,7 @@
},
{
"BriefDescription": "Snoop Responses; Miss",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.MISS",
"PerPkg": "1",
@@ -437,6 +489,7 @@
},
{
"BriefDescription": "Snoop Responses; SnpCode",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPCODE",
"PerPkg": "1",
@@ -445,6 +498,7 @@
},
{
"BriefDescription": "Snoop Responses; SnpData",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPDATA",
"PerPkg": "1",
@@ -453,6 +507,7 @@
},
{
"BriefDescription": "Snoop Responses; SnpInv",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPINV",
"PerPkg": "1",
@@ -461,6 +516,7 @@
},
{
"BriefDescription": "Inbound Transaction Count; Atomic",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.ATOMIC",
"PerPkg": "1",
@@ -470,6 +526,7 @@
},
{
"BriefDescription": "Inbound Transaction Count; Other",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.OTHER",
"PerPkg": "1",
@@ -479,6 +536,7 @@
},
{
"BriefDescription": "Inbound Transaction Count; Read Prefetches",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.RD_PREF",
"PerPkg": "1",
@@ -488,6 +546,7 @@
},
{
"BriefDescription": "Inbound Transaction Count; Reads",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.READS",
"PerPkg": "1",
@@ -497,6 +556,7 @@
},
{
"BriefDescription": "Inbound Transaction Count; Writes",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.WRITES",
"PerPkg": "1",
@@ -506,6 +566,7 @@
},
{
"BriefDescription": "Inbound write (fast path) requests received by the IRP.",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.WR_PREF",
"PerPkg": "1",
@@ -515,6 +576,7 @@
},
{
"BriefDescription": "AK Egress Allocations",
+ "Counter": "0,1",
"EventCode": "0xB",
"EventName": "UNC_I_TxC_AK_INSERTS",
"PerPkg": "1",
@@ -522,6 +584,7 @@
},
{
"BriefDescription": "BL DRS Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x5",
"EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL",
"PerPkg": "1",
@@ -529,6 +592,7 @@
},
{
"BriefDescription": "BL DRS Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x2",
"EventName": "UNC_I_TxC_BL_DRS_INSERTS",
"PerPkg": "1",
@@ -536,6 +600,7 @@
},
{
"BriefDescription": "BL DRS Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x8",
"EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY",
"PerPkg": "1",
@@ -543,6 +608,7 @@
},
{
"BriefDescription": "BL NCB Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x6",
"EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL",
"PerPkg": "1",
@@ -550,6 +616,7 @@
},
{
"BriefDescription": "BL NCB Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x3",
"EventName": "UNC_I_TxC_BL_NCB_INSERTS",
"PerPkg": "1",
@@ -557,6 +624,7 @@
},
{
"BriefDescription": "BL NCB Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x9",
"EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY",
"PerPkg": "1",
@@ -564,6 +632,7 @@
},
{
"BriefDescription": "BL NCS Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x7",
"EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL",
"PerPkg": "1",
@@ -571,6 +640,7 @@
},
{
"BriefDescription": "BL NCS Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x4",
"EventName": "UNC_I_TxC_BL_NCS_INSERTS",
"PerPkg": "1",
@@ -578,6 +648,7 @@
},
{
"BriefDescription": "BL NCS Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0xA",
"EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY",
"PerPkg": "1",
@@ -585,6 +656,7 @@
},
{
"BriefDescription": "No AD Egress Credit Stalls",
+ "Counter": "0,1",
"EventCode": "0x1A",
"EventName": "UNC_I_TxR2_AD_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -593,6 +665,7 @@
},
{
"BriefDescription": "No BL Egress Credit Stalls",
+ "Counter": "0,1",
"EventCode": "0x1B",
"EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -601,6 +674,7 @@
},
{
"BriefDescription": "Outbound Read Requests",
+ "Counter": "0,1",
"EventCode": "0xD",
"EventName": "UNC_I_TxS_DATA_INSERTS_NCB",
"PerPkg": "1",
@@ -609,6 +683,7 @@
},
{
"BriefDescription": "Outbound Read Requests",
+ "Counter": "0,1",
"EventCode": "0xE",
"EventName": "UNC_I_TxS_DATA_INSERTS_NCS",
"PerPkg": "1",
@@ -617,6 +692,7 @@
},
{
"BriefDescription": "Outbound Request Queue Occupancy",
+ "Counter": "0,1",
"EventCode": "0xC",
"EventName": "UNC_I_TxS_REQUEST_OCCUPANCY",
"PerPkg": "1",
@@ -625,6 +701,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -634,6 +711,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -643,6 +721,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -652,6 +731,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -661,6 +741,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -670,6 +751,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -679,6 +761,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -688,6 +771,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -697,6 +781,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -706,6 +791,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -715,6 +801,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -724,6 +811,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -733,6 +821,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -742,6 +831,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -751,6 +841,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -760,6 +851,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -769,6 +861,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -778,6 +871,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -787,6 +881,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -796,6 +891,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -805,6 +901,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -814,6 +911,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -823,6 +921,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -832,6 +931,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -841,6 +941,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -850,6 +951,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -859,6 +961,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -868,6 +971,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -877,6 +981,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -886,6 +991,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -895,6 +1001,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -904,6 +1011,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -913,6 +1021,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -922,6 +1031,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -931,6 +1041,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -940,6 +1051,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -949,6 +1061,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -958,6 +1071,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -967,6 +1081,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -976,6 +1091,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -985,6 +1101,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -994,6 +1111,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -1003,6 +1121,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -1012,6 +1131,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -1021,6 +1141,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -1030,6 +1151,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -1039,6 +1161,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -1048,6 +1171,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CREDITS_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -1057,6 +1181,7 @@
},
{
"BriefDescription": "Traffic in which the M2M to iMC Bypass was not taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M2M_BYPASS_M2M_Egress.NOT_TAKEN",
"PerPkg": "1",
@@ -1066,6 +1191,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass; Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M2M_BYPASS_M2M_Egress.TAKEN",
"PerPkg": "1",
@@ -1074,6 +1200,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass; Not Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN",
"PerPkg": "1",
@@ -1082,6 +1209,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass; Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN",
"PerPkg": "1",
@@ -1090,12 +1218,14 @@
},
{
"BriefDescription": "Cycles - at UCLK",
+ "Counter": "0,1,2,3",
"EventName": "UNC_M2M_CLOCKTICKS",
"PerPkg": "1",
"Unit": "M2M"
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xC0",
"EventName": "UNC_M2M_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -1103,6 +1233,7 @@
},
{
"BriefDescription": "Cycles when direct to core mode (which bypasses the CHA) was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -1111,6 +1242,7 @@
},
{
"BriefDescription": "Messages sent direct to core (bypassing the CHA)",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M2M_DIRECT2CORE_TAKEN",
"PerPkg": "1",
@@ -1119,6 +1251,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE",
"PerPkg": "1",
@@ -1127,6 +1260,7 @@
},
{
"BriefDescription": "Number of reads in which direct to Intel(R) UPI transactions were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS",
"PerPkg": "1",
@@ -1135,6 +1269,7 @@
},
{
"BriefDescription": "Cycles when direct to Intel(R) UPI was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -1143,6 +1278,7 @@
},
{
"BriefDescription": "Messages sent direct to the Intel(R) UPI",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_M2M_DIRECT2UPI_TAKEN",
"PerPkg": "1",
@@ -1151,6 +1287,7 @@
},
{
"BriefDescription": "Number of reads that a message sent direct2 Intel(R) UPI was overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE",
"PerPkg": "1",
@@ -1159,6 +1296,7 @@
},
{
"BriefDescription": "Directory Hit; On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A",
"PerPkg": "1",
@@ -1167,6 +1305,7 @@
},
{
"BriefDescription": "Directory Hit; On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I",
"PerPkg": "1",
@@ -1175,6 +1314,7 @@
},
{
"BriefDescription": "Directory Hit; On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P",
"PerPkg": "1",
@@ -1183,6 +1323,7 @@
},
{
"BriefDescription": "Directory Hit; On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S",
"PerPkg": "1",
@@ -1191,6 +1332,7 @@
},
{
"BriefDescription": "Directory Hit; On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A",
"PerPkg": "1",
@@ -1199,6 +1341,7 @@
},
{
"BriefDescription": "Directory Hit; On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I",
"PerPkg": "1",
@@ -1207,6 +1350,7 @@
},
{
"BriefDescription": "Directory Hit; On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P",
"PerPkg": "1",
@@ -1215,6 +1359,7 @@
},
{
"BriefDescription": "Directory Hit; On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S",
"PerPkg": "1",
@@ -1223,6 +1368,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY",
"PerPkg": "1",
@@ -1232,6 +1378,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A",
"PerPkg": "1",
@@ -1241,6 +1388,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I",
"PerPkg": "1",
@@ -1250,6 +1398,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S",
"PerPkg": "1",
@@ -1259,6 +1408,7 @@
},
{
"BriefDescription": "Directory Miss; On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A",
"PerPkg": "1",
@@ -1267,6 +1417,7 @@
},
{
"BriefDescription": "Directory Miss; On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I",
"PerPkg": "1",
@@ -1275,6 +1426,7 @@
},
{
"BriefDescription": "Directory Miss; On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P",
"PerPkg": "1",
@@ -1283,6 +1435,7 @@
},
{
"BriefDescription": "Directory Miss; On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S",
"PerPkg": "1",
@@ -1291,6 +1444,7 @@
},
{
"BriefDescription": "Directory Miss; On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A",
"PerPkg": "1",
@@ -1299,6 +1453,7 @@
},
{
"BriefDescription": "Directory Miss; On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I",
"PerPkg": "1",
@@ -1307,6 +1462,7 @@
},
{
"BriefDescription": "Directory Miss; On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P",
"PerPkg": "1",
@@ -1315,6 +1471,7 @@
},
{
"BriefDescription": "Directory Miss; On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S",
"PerPkg": "1",
@@ -1323,6 +1480,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from A to I",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A2I",
"PerPkg": "1",
@@ -1332,6 +1490,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from A to S",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.A2S",
"PerPkg": "1",
@@ -1341,6 +1500,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY",
"PerPkg": "1",
@@ -1350,6 +1510,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from I to A",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I2A",
"PerPkg": "1",
@@ -1359,6 +1520,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from I to S",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.I2S",
"PerPkg": "1",
@@ -1368,6 +1530,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from S to A",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S2A",
"PerPkg": "1",
@@ -1377,6 +1540,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory update from S to I",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.S2I",
"PerPkg": "1",
@@ -1386,6 +1550,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements; Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xAE",
"EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -1395,6 +1560,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements; Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xAE",
"EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -1404,6 +1570,7 @@
},
{
"BriefDescription": "FaST wire asserted; Horizontal",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_FAST_ASSERTED.HORZ",
"PerPkg": "1",
@@ -1413,6 +1580,7 @@
},
{
"BriefDescription": "FaST wire asserted; Vertical",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_FAST_ASSERTED.VERT",
"PerPkg": "1",
@@ -1422,6 +1590,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1431,6 +1600,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1440,6 +1610,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1449,6 +1620,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1458,6 +1630,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1467,6 +1640,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1476,6 +1650,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1485,6 +1660,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA9",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1494,6 +1670,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1503,6 +1680,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1512,6 +1690,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1521,6 +1700,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1530,6 +1710,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use; Left",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -1539,6 +1720,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use; Right",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -1548,6 +1730,7 @@
},
{
"BriefDescription": "Reads to iMC issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.ALL",
"PerPkg": "1",
@@ -1557,6 +1740,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC; All, regardless of priority.",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.FROM_TRANSGRESS",
"PerPkg": "1",
@@ -1565,6 +1749,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC; Critical Priority",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.ISOCH",
"PerPkg": "1",
@@ -1573,6 +1758,7 @@
},
{
"BriefDescription": "Reads to iMC issued at Normal Priority (Non-Isochronous)",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.NORMAL",
"PerPkg": "1",
@@ -1582,6 +1768,7 @@
},
{
"BriefDescription": "Read requests to Intel(R) Optane(TM) DC persistent memory issued to the iMC from M2M",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.TO_PMM",
"PerPkg": "1",
@@ -1591,6 +1778,7 @@
},
{
"BriefDescription": "Writes to iMC issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.ALL",
"PerPkg": "1",
@@ -1600,6 +1788,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC; All, regardless of priority.",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.FROM_TRANSGRESS",
"PerPkg": "1",
@@ -1608,6 +1797,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC; Full Line Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.FULL",
"PerPkg": "1",
@@ -1616,6 +1806,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC; ISOCH Full Line",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH",
"PerPkg": "1",
@@ -1624,6 +1815,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC; All, regardless of priority.",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.NI",
"PerPkg": "1",
@@ -1632,6 +1824,7 @@
},
{
"BriefDescription": "Partial Non-Isochronous writes to the iMC",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.PARTIAL",
"PerPkg": "1",
@@ -1641,6 +1834,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC; ISOCH Partial",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH",
"PerPkg": "1",
@@ -1649,6 +1843,7 @@
},
{
"BriefDescription": "Write requests to Intel(R) Optane(TM) DC persistent memory issued to the iMC from M2M",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.TO_PMM",
"PerPkg": "1",
@@ -1658,6 +1853,7 @@
},
{
"BriefDescription": "Number Packet Header Matches; MC Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M2M_PKT_MATCH.MC",
"PerPkg": "1",
@@ -1666,6 +1862,7 @@
},
{
"BriefDescription": "Number Packet Header Matches; Mesh Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M2M_PKT_MATCH.MESH",
"PerPkg": "1",
@@ -1674,6 +1871,7 @@
},
{
"BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4F",
"EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN0",
"PerPkg": "1",
@@ -1682,6 +1880,7 @@
},
{
"BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4F",
"EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN1",
"PerPkg": "1",
@@ -1690,6 +1889,7 @@
},
{
"BriefDescription": "M2M->iMC RPQ Cycles w/Credits - Regular; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4F",
"EventName": "UNC_M2M_PMM_RPQ_CYCLES_REG_CREDITS.CHN2",
"PerPkg": "1",
@@ -1698,6 +1898,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN0",
"PerPkg": "1",
@@ -1706,6 +1907,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN1",
"PerPkg": "1",
@@ -1714,6 +1916,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M2M_PMM_WPQ_CYCLES_REG_CREDITS.CHN2",
"PerPkg": "1",
@@ -1722,6 +1925,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M2M_PREFCAM_CYCLES_FULL",
"PerPkg": "1",
@@ -1729,6 +1933,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M2M_PREFCAM_CYCLES_NE",
"PerPkg": "1",
@@ -1736,6 +1941,7 @@
},
{
"BriefDescription": "Prefetch requests that got turn into a demand request",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_PREFCAM_DEMAND_PROMOTIONS",
"PerPkg": "1",
@@ -1744,6 +1950,7 @@
},
{
"BriefDescription": "Inserts into the Memory Controller Prefetch Queue",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M2M_PREFCAM_INSERTS",
"PerPkg": "1",
@@ -1752,6 +1959,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY",
"PerPkg": "1",
@@ -1759,6 +1967,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -1768,6 +1977,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -1777,6 +1987,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -1786,6 +1997,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -1795,6 +2007,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -1804,6 +2017,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -1813,6 +2027,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -1822,6 +2037,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -1831,6 +2047,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -1839,6 +2056,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -1847,6 +2065,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; Acknowledgements to Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -1855,6 +2074,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -1863,6 +2083,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -1871,6 +2092,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -1879,6 +2101,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -1887,6 +2110,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -1895,6 +2119,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -1903,6 +2128,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_RING_SRC_THRTL",
"PerPkg": "1",
@@ -1910,6 +2136,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN0",
@@ -1919,6 +2146,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN1",
@@ -1928,6 +2156,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_CYCLES_NO_SPEC_CREDITS.CHN2",
@@ -1937,6 +2166,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN0",
"PerPkg": "1",
@@ -1945,6 +2175,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN1",
"PerPkg": "1",
@@ -1953,6 +2184,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2M_RPQ_CYCLES_REG_CREDITS.CHN2",
"PerPkg": "1",
@@ -1961,6 +2193,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN0",
"PerPkg": "1",
@@ -1969,6 +2202,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN1",
"PerPkg": "1",
@@ -1977,6 +2211,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_CYCLES_SPEC_CREDITS.CHN2",
"PerPkg": "1",
@@ -1985,6 +2220,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M2M_RxC_AD_CYCLES_FULL",
"PerPkg": "1",
@@ -1992,6 +2228,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_M2M_RxC_AD_CYCLES_NE",
"PerPkg": "1",
@@ -1999,6 +2236,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x1",
"EventName": "UNC_M2M_RxC_AD_INSERTS",
"PerPkg": "1",
@@ -2007,6 +2245,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_M2M_RxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -2014,6 +2253,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x8",
"EventName": "UNC_M2M_RxC_BL_CYCLES_FULL",
"PerPkg": "1",
@@ -2021,6 +2261,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x7",
"EventName": "UNC_M2M_RxC_BL_CYCLES_NE",
"PerPkg": "1",
@@ -2028,6 +2269,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_M2M_RxC_BL_INSERTS",
"PerPkg": "1",
@@ -2035,6 +2277,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x6",
"EventName": "UNC_M2M_RxC_BL_OCCUPANCY",
"PerPkg": "1",
@@ -2042,6 +2285,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_BNC",
"PerPkg": "1",
@@ -2051,6 +2295,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -2060,6 +2305,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_BNC",
"PerPkg": "1",
@@ -2069,6 +2315,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -2078,6 +2325,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_RxR_BYPASS.AD_BNC",
"PerPkg": "1",
@@ -2087,6 +2335,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -2096,6 +2345,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_RxR_BYPASS.AK_BNC",
"PerPkg": "1",
@@ -2105,6 +2355,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_RxR_BYPASS.BL_BNC",
"PerPkg": "1",
@@ -2114,6 +2365,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -2123,6 +2375,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_RxR_BYPASS.IV_BNC",
"PerPkg": "1",
@@ -2132,6 +2385,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AD_BNC",
"PerPkg": "1",
@@ -2141,6 +2395,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -2150,6 +2405,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AK_BNC",
"PerPkg": "1",
@@ -2159,6 +2415,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.BL_BNC",
"PerPkg": "1",
@@ -2168,6 +2425,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -2177,6 +2435,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; IFV - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -2186,6 +2445,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.IV_BNC",
"PerPkg": "1",
@@ -2195,6 +2455,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_RxR_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -2204,6 +2465,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -2213,6 +2475,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_RxR_INSERTS.AK_BNC",
"PerPkg": "1",
@@ -2222,6 +2485,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_RxR_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -2231,6 +2495,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -2240,6 +2505,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_RxR_INSERTS.IV_BNC",
"PerPkg": "1",
@@ -2249,6 +2515,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AD_BNC",
"PerPkg": "1",
@@ -2258,6 +2525,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -2267,6 +2535,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AK_BNC",
"PerPkg": "1",
@@ -2276,6 +2545,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.BL_BNC",
"PerPkg": "1",
@@ -2285,6 +2555,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -2294,6 +2565,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.IV_BNC",
"PerPkg": "1",
@@ -2303,6 +2575,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -2312,6 +2585,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -2321,6 +2595,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -2330,6 +2605,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -2339,6 +2615,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -2348,6 +2625,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -2357,6 +2635,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -2366,6 +2645,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -2375,6 +2655,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -2384,6 +2665,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -2393,6 +2675,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -2402,6 +2685,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -2411,6 +2695,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -2420,6 +2705,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -2429,6 +2715,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -2438,6 +2725,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -2447,6 +2735,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -2456,6 +2745,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -2465,6 +2755,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -2474,6 +2765,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -2483,6 +2775,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -2492,6 +2785,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -2501,6 +2795,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -2510,6 +2805,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -2519,6 +2815,7 @@
},
{
"BriefDescription": "Clean line read hits(Regular and RFO) to Near Memory(DRAM cache) in Memory Mode and regular reads to DRAM in 1LM",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN",
"PerPkg": "1",
@@ -2528,6 +2825,7 @@
},
{
"BriefDescription": "Dirty line read hits(Regular and RFO) to Near Memory(DRAM cache) in Memory Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY",
"PerPkg": "1",
@@ -2537,6 +2835,7 @@
},
{
"BriefDescription": "Clean line underfill read hits to Near Memory(DRAM cache) in Memory Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN",
"PerPkg": "1",
@@ -2546,6 +2845,7 @@
},
{
"BriefDescription": "Dirty line underfill read hits to Near Memory(DRAM cache) in Memory Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY",
"PerPkg": "1",
@@ -2555,6 +2855,7 @@
},
{
"BriefDescription": "Number AD Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2M_TGR_AD_CREDITS",
"PerPkg": "1",
@@ -2562,6 +2863,7 @@
},
{
"BriefDescription": "Number BL Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2M_TGR_BL_CREDITS",
"PerPkg": "1",
@@ -2569,6 +2871,7 @@
},
{
"BriefDescription": "Tracker Cycles Full; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH0",
"PerPkg": "1",
@@ -2577,6 +2880,7 @@
},
{
"BriefDescription": "Tracker Cycles Full; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH1",
"PerPkg": "1",
@@ -2585,6 +2889,7 @@
},
{
"BriefDescription": "Tracker Cycles Full; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2M_TRACKER_CYCLES_FULL.CH2",
"PerPkg": "1",
@@ -2593,6 +2898,7 @@
},
{
"BriefDescription": "Tracker Cycles Not Empty; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH0",
"PerPkg": "1",
@@ -2601,6 +2907,7 @@
},
{
"BriefDescription": "Tracker Cycles Not Empty; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH1",
"PerPkg": "1",
@@ -2609,6 +2916,7 @@
},
{
"BriefDescription": "Tracker Cycles Not Empty; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2M_TRACKER_CYCLES_NE.CH2",
"PerPkg": "1",
@@ -2617,6 +2925,7 @@
},
{
"BriefDescription": "Tracker Inserts; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -2625,6 +2934,7 @@
},
{
"BriefDescription": "Tracker Inserts; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -2633,6 +2943,7 @@
},
{
"BriefDescription": "Tracker Inserts; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH2",
"PerPkg": "1",
@@ -2641,6 +2952,7 @@
},
{
"BriefDescription": "Tracker Occupancy; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -2649,6 +2961,7 @@
},
{
"BriefDescription": "Tracker Occupancy; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -2657,6 +2970,7 @@
},
{
"BriefDescription": "Tracker Occupancy; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -2665,6 +2979,7 @@
},
{
"BriefDescription": "Data Pending Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2M_TRACKER_PENDING_OCCUPANCY",
"PerPkg": "1",
@@ -2672,6 +2987,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Credit Acquired",
+ "Counter": "0,1,2,3",
"EventCode": "0xD",
"EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED",
"PerPkg": "1",
@@ -2679,6 +2995,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Credits Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE",
"EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY",
"PerPkg": "1",
@@ -2686,6 +3003,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xC",
"EventName": "UNC_M2M_TxC_AD_CYCLES_FULL",
"PerPkg": "1",
@@ -2693,6 +3011,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xB",
"EventName": "UNC_M2M_TxC_AD_CYCLES_NE",
"PerPkg": "1",
@@ -2700,6 +3019,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x9",
"EventName": "UNC_M2M_TxC_AD_INSERTS",
"PerPkg": "1",
@@ -2707,6 +3027,7 @@
},
{
"BriefDescription": "Cycles with No AD Egress (to CMS) Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0xF",
"EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES",
"PerPkg": "1",
@@ -2714,6 +3035,7 @@
},
{
"BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED",
"PerPkg": "1",
@@ -2721,6 +3043,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xA",
"EventName": "UNC_M2M_TxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -2728,6 +3051,7 @@
},
{
"BriefDescription": "Outbound Ring Transactions on AK; CRD Transactions to Cbo",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_M2M_TxC_AK.CRD_CBO",
"PerPkg": "1",
@@ -2736,6 +3060,7 @@
},
{
"BriefDescription": "Outbound Ring Transactions on AK; NDR Transactions",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_M2M_TxC_AK.NDR",
"PerPkg": "1",
@@ -2744,6 +3069,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1D",
"EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0",
"PerPkg": "1",
@@ -2752,6 +3078,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Credit Acquired; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1D",
"EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1",
"PerPkg": "1",
@@ -2760,6 +3087,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1E",
"EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS0",
"PerPkg": "1",
@@ -2768,6 +3096,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Credits Occupancy; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1E",
"EventName": "UNC_M2M_TxC_AK_CREDIT_OCCUPANCY.CMS1",
"PerPkg": "1",
@@ -2776,6 +3105,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL",
"PerPkg": "1",
@@ -2784,6 +3114,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0",
"PerPkg": "1",
@@ -2792,6 +3123,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1",
"PerPkg": "1",
@@ -2800,6 +3132,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Read Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0",
"PerPkg": "1",
@@ -2808,6 +3141,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Read Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1",
"PerPkg": "1",
@@ -2816,6 +3150,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Write Compare Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0",
"PerPkg": "1",
@@ -2824,6 +3159,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Write Compare Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1",
"PerPkg": "1",
@@ -2832,6 +3168,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Write Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0",
"PerPkg": "1",
@@ -2840,6 +3177,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full; Write Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1",
"PerPkg": "1",
@@ -2848,6 +3186,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL",
"PerPkg": "1",
@@ -2856,6 +3195,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0",
"PerPkg": "1",
@@ -2864,6 +3204,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1",
"PerPkg": "1",
@@ -2872,6 +3213,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty; Read Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD",
"PerPkg": "1",
@@ -2880,6 +3222,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty; Write Compare Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP",
"PerPkg": "1",
@@ -2888,6 +3231,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty; Write Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD",
"PerPkg": "1",
@@ -2896,6 +3240,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.ALL",
"PerPkg": "1",
@@ -2904,6 +3249,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0",
"PerPkg": "1",
@@ -2912,6 +3258,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1",
"PerPkg": "1",
@@ -2920,6 +3267,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; Prefetch Read Cam Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT",
"PerPkg": "1",
@@ -2928,6 +3276,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; Read Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD",
"PerPkg": "1",
@@ -2936,6 +3285,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; Write Compare Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP",
"PerPkg": "1",
@@ -2944,6 +3294,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations; Write Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD",
"PerPkg": "1",
@@ -2952,6 +3303,7 @@
},
{
"BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0",
"PerPkg": "1",
@@ -2960,6 +3312,7 @@
},
{
"BriefDescription": "Cycles with No AK Egress (to CMS) Credits; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1",
"PerPkg": "1",
@@ -2968,6 +3321,7 @@
},
{
"BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Credits; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0",
"PerPkg": "1",
@@ -2976,6 +3330,7 @@
},
{
"BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Credits; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1",
"PerPkg": "1",
@@ -2984,6 +3339,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -2992,6 +3348,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0",
"PerPkg": "1",
@@ -3000,6 +3357,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1",
"PerPkg": "1",
@@ -3008,6 +3366,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy; Read Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD",
"PerPkg": "1",
@@ -3016,6 +3375,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy; Write Compare Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP",
"PerPkg": "1",
@@ -3024,6 +3384,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy; Write Credit Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD",
"PerPkg": "1",
@@ -3032,6 +3393,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Sideband",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_M2M_TxC_AK_SIDEBAND.RD",
"PerPkg": "1",
@@ -3040,6 +3402,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Sideband",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_M2M_TxC_AK_SIDEBAND.WR",
"PerPkg": "1",
@@ -3048,6 +3411,7 @@
},
{
"BriefDescription": "Outbound DRS Ring Transactions to Cache; Data to Cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_TxC_BL.DRS_CACHE",
"PerPkg": "1",
@@ -3056,6 +3420,7 @@
},
{
"BriefDescription": "Outbound DRS Ring Transactions to Cache; Data to Core",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_TxC_BL.DRS_CORE",
"PerPkg": "1",
@@ -3064,6 +3429,7 @@
},
{
"BriefDescription": "Outbound DRS Ring Transactions to Cache; Data to QPI",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_TxC_BL.DRS_UPI",
"PerPkg": "1",
@@ -3072,6 +3438,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0",
"PerPkg": "1",
@@ -3080,6 +3447,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Credit Acquired; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1",
"PerPkg": "1",
@@ -3088,6 +3456,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS0",
"PerPkg": "1",
@@ -3096,6 +3465,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Credits Occupancy; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M2M_TxC_BL_CREDIT_OCCUPANCY.CMS1",
"PerPkg": "1",
@@ -3104,6 +3474,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Full; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL",
"PerPkg": "1",
@@ -3112,6 +3483,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0",
"PerPkg": "1",
@@ -3120,6 +3492,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Full; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1",
"PerPkg": "1",
@@ -3128,6 +3501,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Not Empty; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL",
"PerPkg": "1",
@@ -3136,6 +3510,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0",
"PerPkg": "1",
@@ -3144,6 +3519,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Not Empty; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1",
"PerPkg": "1",
@@ -3152,6 +3528,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Allocations; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2M_TxC_BL_INSERTS.ALL",
"PerPkg": "1",
@@ -3160,6 +3537,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0",
"PerPkg": "1",
@@ -3168,6 +3546,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Allocations; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1",
"PerPkg": "1",
@@ -3176,6 +3555,7 @@
},
{
"BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1B",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0",
"PerPkg": "1",
@@ -3184,6 +3564,7 @@
},
{
"BriefDescription": "Cycles with No BL Egress (to CMS) Credits; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1B",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1",
"PerPkg": "1",
@@ -3192,6 +3573,7 @@
},
{
"BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Credits; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1C",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0",
"PerPkg": "1",
@@ -3200,6 +3582,7 @@
},
{
"BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Credits; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1C",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1",
"PerPkg": "1",
@@ -3208,6 +3591,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Occupancy; All",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2M_TxC_BL_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -3216,6 +3600,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS0",
"PerPkg": "1",
@@ -3224,6 +3609,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Occupancy; Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2M_TxC_BL_OCCUPANCY.CMS1",
"PerPkg": "1",
@@ -3232,6 +3618,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_BNC",
"PerPkg": "1",
@@ -3241,6 +3628,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -3250,6 +3638,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AK_BNC",
"PerPkg": "1",
@@ -3259,6 +3648,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_BNC",
"PerPkg": "1",
@@ -3268,6 +3658,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -3277,6 +3668,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_BNC",
"PerPkg": "1",
@@ -3286,6 +3678,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -3295,6 +3688,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK_BNC",
"PerPkg": "1",
@@ -3304,6 +3698,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_BNC",
"PerPkg": "1",
@@ -3313,6 +3708,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -3322,6 +3718,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9F",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV_BNC",
"PerPkg": "1",
@@ -3331,6 +3728,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_BNC",
"PerPkg": "1",
@@ -3340,6 +3738,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -3349,6 +3748,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK_BNC",
"PerPkg": "1",
@@ -3358,6 +3758,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_BNC",
"PerPkg": "1",
@@ -3367,6 +3768,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -3376,6 +3778,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV_BNC",
"PerPkg": "1",
@@ -3385,6 +3788,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_BNC",
"PerPkg": "1",
@@ -3394,6 +3798,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -3403,6 +3808,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK_BNC",
"PerPkg": "1",
@@ -3412,6 +3818,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_BNC",
"PerPkg": "1",
@@ -3421,6 +3828,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -3430,6 +3838,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV_BNC",
"PerPkg": "1",
@@ -3439,6 +3848,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -3448,6 +3858,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -3457,6 +3868,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK_BNC",
"PerPkg": "1",
@@ -3466,6 +3878,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -3475,6 +3888,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -3484,6 +3898,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV_BNC",
"PerPkg": "1",
@@ -3493,6 +3908,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AD_BNC",
"PerPkg": "1",
@@ -3502,6 +3918,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -3511,6 +3928,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AK_BNC",
"PerPkg": "1",
@@ -3520,6 +3938,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_HORZ_NACK.BL_BNC",
"PerPkg": "1",
@@ -3529,6 +3948,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -3538,6 +3958,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_HORZ_NACK.IV_BNC",
"PerPkg": "1",
@@ -3547,6 +3968,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_BNC",
"PerPkg": "1",
@@ -3556,6 +3978,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -3565,6 +3988,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK_BNC",
"PerPkg": "1",
@@ -3574,6 +3998,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_BNC",
"PerPkg": "1",
@@ -3583,6 +4008,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -3592,6 +4018,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV_BNC",
"PerPkg": "1",
@@ -3601,6 +4028,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_BNC",
"PerPkg": "1",
@@ -3610,6 +4038,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; AK - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.AK_BNC",
"PerPkg": "1",
@@ -3619,6 +4048,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_BNC",
"PerPkg": "1",
@@ -3628,6 +4058,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; IV - Bounce",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.IV_BNC",
"PerPkg": "1",
@@ -3637,6 +4068,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -3646,6 +4078,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -3655,6 +4088,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG0",
"PerPkg": "1",
@@ -3664,6 +4098,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.AK_AG1",
"PerPkg": "1",
@@ -3673,6 +4108,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -3682,6 +4118,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -3691,6 +4128,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -3700,6 +4138,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -3709,6 +4148,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -3718,6 +4158,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -3727,6 +4168,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -3736,6 +4178,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -3745,6 +4188,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.IV",
"PerPkg": "1",
@@ -3754,6 +4198,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG0",
"PerPkg": "1",
@@ -3763,6 +4208,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AD_AG1",
"PerPkg": "1",
@@ -3772,6 +4218,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG0",
"PerPkg": "1",
@@ -3781,6 +4228,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.AK_AG1",
"PerPkg": "1",
@@ -3790,6 +4238,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG0",
"PerPkg": "1",
@@ -3799,6 +4248,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.BL_AG1",
"PerPkg": "1",
@@ -3808,6 +4258,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -3817,6 +4268,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG0",
"PerPkg": "1",
@@ -3826,6 +4278,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AD_AG1",
"PerPkg": "1",
@@ -3835,6 +4288,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG0",
"PerPkg": "1",
@@ -3844,6 +4298,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.AK_AG1",
"PerPkg": "1",
@@ -3853,6 +4308,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG0",
"PerPkg": "1",
@@ -3862,6 +4318,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.BL_AG1",
"PerPkg": "1",
@@ -3871,6 +4328,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE.IV",
"PerPkg": "1",
@@ -3880,6 +4338,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG0",
"PerPkg": "1",
@@ -3889,6 +4348,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.AD_AG1",
"PerPkg": "1",
@@ -3898,6 +4358,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG0",
"PerPkg": "1",
@@ -3907,6 +4368,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.AK_AG1",
"PerPkg": "1",
@@ -3916,6 +4378,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG0",
"PerPkg": "1",
@@ -3925,6 +4388,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.BL_AG1",
"PerPkg": "1",
@@ -3934,6 +4398,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_INSERTS.IV",
"PerPkg": "1",
@@ -3943,6 +4408,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG0",
"PerPkg": "1",
@@ -3952,6 +4418,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.AD_AG1",
"PerPkg": "1",
@@ -3961,6 +4428,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG0",
"PerPkg": "1",
@@ -3970,6 +4438,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.AK_AG1",
"PerPkg": "1",
@@ -3979,6 +4448,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG0",
"PerPkg": "1",
@@ -3988,6 +4458,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.BL_AG1",
"PerPkg": "1",
@@ -3997,6 +4468,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK.IV",
"PerPkg": "1",
@@ -4006,6 +4478,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG0",
"PerPkg": "1",
@@ -4015,6 +4488,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AD_AG1",
"PerPkg": "1",
@@ -4024,6 +4498,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG0",
"PerPkg": "1",
@@ -4033,6 +4508,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.AK_AG1",
"PerPkg": "1",
@@ -4042,6 +4518,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG0",
"PerPkg": "1",
@@ -4051,6 +4528,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.BL_AG1",
"PerPkg": "1",
@@ -4060,6 +4538,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY.IV",
"PerPkg": "1",
@@ -4069,6 +4548,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG0",
"PerPkg": "1",
@@ -4078,6 +4558,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.AD_AG1",
"PerPkg": "1",
@@ -4087,6 +4568,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG0",
"PerPkg": "1",
@@ -4096,6 +4578,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.AK_AG1",
"PerPkg": "1",
@@ -4105,6 +4588,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG0",
"PerPkg": "1",
@@ -4114,6 +4598,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.BL_AG1",
"PerPkg": "1",
@@ -4123,6 +4608,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED.IV",
"PerPkg": "1",
@@ -4132,6 +4618,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -4141,6 +4628,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -4150,6 +4638,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -4159,6 +4648,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -4168,6 +4658,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -4177,6 +4668,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -4186,6 +4678,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -4195,6 +4688,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xA8",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -4204,6 +4698,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -4213,6 +4708,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -4222,6 +4718,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -4231,6 +4728,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -4240,6 +4738,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use; Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -4249,6 +4748,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use; Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -4258,6 +4758,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN0",
@@ -4267,6 +4768,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN1",
@@ -4276,6 +4778,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_CYCLES_NO_REG_CREDITS.CHN2",
@@ -4285,6 +4788,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN0",
"PerPkg": "1",
@@ -4293,6 +4797,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN1",
"PerPkg": "1",
@@ -4301,6 +4806,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_CYCLES_REG_CREDITS.CHN2",
"PerPkg": "1",
@@ -4309,6 +4815,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4E",
"EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN0",
"PerPkg": "1",
@@ -4317,6 +4824,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4E",
"EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN1",
"PerPkg": "1",
@@ -4325,6 +4833,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4E",
"EventName": "UNC_M2M_WPQ_CYCLES_SPEC_CREDITS.CHN2",
"PerPkg": "1",
@@ -4333,6 +4842,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH0",
"PerPkg": "1",
@@ -4341,6 +4851,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH1",
"PerPkg": "1",
@@ -4349,6 +4860,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_FULL.CH2",
"PerPkg": "1",
@@ -4357,6 +4869,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH0",
"PerPkg": "1",
@@ -4365,6 +4878,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH1",
"PerPkg": "1",
@@ -4373,6 +4887,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WRITE_TRACKER_CYCLES_NE.CH2",
"PerPkg": "1",
@@ -4381,6 +4896,7 @@
},
{
"BriefDescription": "Write Tracker Inserts; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -4389,6 +4905,7 @@
},
{
"BriefDescription": "Write Tracker Inserts; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -4397,6 +4914,7 @@
},
{
"BriefDescription": "Write Tracker Inserts; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M2M_WRITE_TRACKER_INSERTS.CH2",
"PerPkg": "1",
@@ -4405,6 +4923,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy; Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -4413,6 +4932,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy; Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -4421,6 +4941,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy; Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M2M_WRITE_TRACKER_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -4429,6 +4950,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -4438,6 +4960,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -4447,6 +4970,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -4456,6 +4980,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -4465,6 +4990,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -4474,6 +5000,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -4483,6 +5010,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -4492,6 +5020,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -4501,6 +5030,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -4510,6 +5040,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -4519,6 +5050,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -4528,6 +5060,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -4537,6 +5070,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -4546,6 +5080,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -4555,6 +5090,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -4564,6 +5100,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -4573,6 +5110,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -4582,6 +5120,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -4591,6 +5130,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -4600,6 +5140,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -4609,6 +5150,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -4618,6 +5160,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -4627,6 +5170,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -4636,6 +5180,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -4645,6 +5190,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -4654,6 +5200,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -4663,6 +5210,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -4672,6 +5220,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -4681,6 +5230,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -4690,6 +5240,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -4699,6 +5250,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR0",
"PerPkg": "1",
@@ -4708,6 +5260,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR1",
"PerPkg": "1",
@@ -4717,6 +5270,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR2",
"PerPkg": "1",
@@ -4726,6 +5280,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR3",
"PerPkg": "1",
@@ -4735,6 +5290,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR4",
"PerPkg": "1",
@@ -4744,6 +5300,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY.TGR5",
"PerPkg": "1",
@@ -4807,6 +5364,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR0",
"PerPkg": "1",
@@ -4816,6 +5374,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR1",
"PerPkg": "1",
@@ -4825,6 +5384,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR2",
"PerPkg": "1",
@@ -4834,6 +5394,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR3",
"PerPkg": "1",
@@ -4843,6 +5404,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR4",
"PerPkg": "1",
@@ -4852,6 +5414,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CREDITS_ACQUIRED.TGR5",
"PerPkg": "1",
@@ -4861,6 +5424,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty; Requests",
+ "Counter": "0,1,2",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ",
"PerPkg": "1",
@@ -4870,6 +5434,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty; Snoops",
+ "Counter": "0,1,2",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP",
"PerPkg": "1",
@@ -4879,6 +5444,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty; VNA Messages",
+ "Counter": "0,1,2",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -4888,6 +5454,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty; Writebacks",
+ "Counter": "0,1,2",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB",
"PerPkg": "1",
@@ -4897,6 +5464,7 @@
},
{
"BriefDescription": "Number of uclks in domain",
+ "Counter": "0,1,2",
"EventCode": "0x1",
"EventName": "UNC_M3UPI_CLOCKTICKS",
"PerPkg": "1",
@@ -4905,6 +5473,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2",
"EventCode": "0xC0",
"EventName": "UNC_M3UPI_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -4912,6 +5481,7 @@
},
{
"BriefDescription": "D2C Sent",
+ "Counter": "0,1,2",
"EventCode": "0x2B",
"EventName": "UNC_M3UPI_D2C_SENT",
"PerPkg": "1",
@@ -4920,6 +5490,7 @@
},
{
"BriefDescription": "D2U Sent",
+ "Counter": "0,1,2",
"EventCode": "0x2A",
"EventName": "UNC_M3UPI_D2U_SENT",
"PerPkg": "1",
@@ -4928,6 +5499,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements; Down",
+ "Counter": "0,1,2",
"EventCode": "0xAE",
"EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -4937,6 +5509,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements; Up",
+ "Counter": "0,1,2",
"EventCode": "0xAE",
"EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -4946,6 +5519,7 @@
},
{
"BriefDescription": "FaST wire asserted; Horizontal",
+ "Counter": "0,1,2",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_FAST_ASSERTED.HORZ",
"PerPkg": "1",
@@ -4955,6 +5529,7 @@
},
{
"BriefDescription": "FaST wire asserted; Vertical",
+ "Counter": "0,1,2",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_FAST_ASSERTED.VERT",
"PerPkg": "1",
@@ -4964,6 +5539,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Left and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -4973,6 +5549,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Left and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -4982,6 +5559,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Right and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -4991,6 +5569,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use; Right and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5000,6 +5579,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Left and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA9",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -5009,6 +5589,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Left and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA9",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -5018,6 +5599,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Right and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA9",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -5027,6 +5609,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use; Right and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA9",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5036,6 +5619,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Left and Even",
+ "Counter": "0,1,2",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -5045,6 +5629,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Left and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -5054,6 +5639,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Right and Even",
+ "Counter": "0,1,2",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -5063,6 +5649,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use; Right and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5072,6 +5659,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use; Left",
+ "Counter": "0,1,2",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -5081,6 +5669,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use; Right",
+ "Counter": "0,1,2",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -5090,6 +5679,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; IIO0 and IIO1 share the same ring destination. (1 VN0 credit only)",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO0_IIO1_NCB",
"PerPkg": "1",
@@ -5099,6 +5689,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; IIO2",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB",
"PerPkg": "1",
@@ -5108,6 +5699,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; IIO3",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB",
"PerPkg": "1",
@@ -5117,6 +5709,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; IIO4",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB",
"PerPkg": "1",
@@ -5126,6 +5719,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; IIO5",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB",
"PerPkg": "1",
@@ -5135,6 +5729,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; All IIO targets for NCS are in single mask. ORs them together",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS",
"PerPkg": "1",
@@ -5144,6 +5739,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty; Selected M2p BL NCS credits",
+ "Counter": "0,1,2",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL",
"PerPkg": "1",
@@ -5153,6 +5749,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received; AD - Slot 0",
+ "Counter": "0,1,2",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0",
"PerPkg": "1",
@@ -5162,6 +5759,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received; AD - Slot 1",
+ "Counter": "0,1,2",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1",
"PerPkg": "1",
@@ -5171,6 +5769,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received; AD - Slot 2",
+ "Counter": "0,1,2",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2",
"PerPkg": "1",
@@ -5180,6 +5779,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received; AK - Slot 0",
+ "Counter": "0,1,2",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0",
"PerPkg": "1",
@@ -5189,6 +5789,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received; AK - Slot 2",
+ "Counter": "0,1,2",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2",
"PerPkg": "1",
@@ -5198,6 +5799,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received; BL - Slot 0",
+ "Counter": "0,1,2",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0",
"PerPkg": "1",
@@ -5207,6 +5809,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; AD",
+ "Counter": "0,1,2",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -5216,6 +5819,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; AK",
+ "Counter": "0,1,2",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -5225,6 +5829,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; BL",
+ "Counter": "0,1,2",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -5234,6 +5839,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring.; IV",
+ "Counter": "0,1,2",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -5243,6 +5849,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; AD",
+ "Counter": "0,1,2",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -5252,6 +5859,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Acknowledgements to core",
+ "Counter": "0,1,2",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -5261,6 +5869,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Data Responses to core",
+ "Counter": "0,1,2",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -5270,6 +5879,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.; Snoops of processor's cache.",
+ "Counter": "0,1,2",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -5279,6 +5889,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; AD",
+ "Counter": "0,1,2",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -5287,6 +5898,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; AK",
+ "Counter": "0,1,2",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -5295,6 +5907,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; Acknowledgements to Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -5303,6 +5916,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; BL",
+ "Counter": "0,1,2",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -5311,6 +5925,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring; IV",
+ "Counter": "0,1,2",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -5319,6 +5934,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; AD",
+ "Counter": "0,1,2",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -5327,6 +5943,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Acknowledgements to core",
+ "Counter": "0,1,2",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -5335,6 +5952,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Data Responses to core",
+ "Counter": "0,1,2",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -5343,6 +5961,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring; Snoops of processor's cache.",
+ "Counter": "0,1,2",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -5351,6 +5970,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_RING_SRC_THRTL",
"PerPkg": "1",
@@ -5358,6 +5978,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ",
"PerPkg": "1",
@@ -5367,6 +5988,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP",
"PerPkg": "1",
@@ -5376,6 +5998,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP",
"PerPkg": "1",
@@ -5385,6 +6008,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB",
"PerPkg": "1",
@@ -5394,6 +6018,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS",
"PerPkg": "1",
@@ -5403,6 +6028,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP",
"PerPkg": "1",
@@ -5412,6 +6038,7 @@
},
{
"BriefDescription": "Lost Arb for VN0; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB",
"PerPkg": "1",
@@ -5421,6 +6048,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ",
"PerPkg": "1",
@@ -5430,6 +6058,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP",
"PerPkg": "1",
@@ -5439,6 +6068,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP",
"PerPkg": "1",
@@ -5448,6 +6078,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB",
"PerPkg": "1",
@@ -5457,6 +6088,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS",
"PerPkg": "1",
@@ -5466,6 +6098,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP",
"PerPkg": "1",
@@ -5475,6 +6108,7 @@
},
{
"BriefDescription": "Lost Arb for VN1; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB",
"PerPkg": "1",
@@ -5484,6 +6118,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; AD, BL Parallel Win",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN",
"PerPkg": "1",
@@ -5493,6 +6128,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; No Progress on Pending AD VN0",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0",
"PerPkg": "1",
@@ -5502,6 +6138,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; No Progress on Pending AD VN1",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1",
"PerPkg": "1",
@@ -5511,6 +6148,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; No Progress on Pending BL VN0",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0",
"PerPkg": "1",
@@ -5520,6 +6158,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; No Progress on Pending BL VN1",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1",
"PerPkg": "1",
@@ -5529,6 +6168,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; Parallel Bias to VN0",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN0",
"PerPkg": "1",
@@ -5538,6 +6178,7 @@
},
{
"BriefDescription": "Arb Miscellaneous; Parallel Bias to VN1",
+ "Counter": "0,1,2",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.PAR_BIAS_VN1",
"PerPkg": "1",
@@ -5547,6 +6188,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_REQ",
"PerPkg": "1",
@@ -5556,6 +6198,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_RSP",
"PerPkg": "1",
@@ -5565,6 +6208,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.AD_SNP",
"PerPkg": "1",
@@ -5574,6 +6218,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCB",
"PerPkg": "1",
@@ -5583,6 +6228,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_NCS",
"PerPkg": "1",
@@ -5592,6 +6238,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_RSP",
"PerPkg": "1",
@@ -5601,6 +6248,7 @@
},
{
"BriefDescription": "Can't Arb for VN0; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN0.BL_WB",
"PerPkg": "1",
@@ -5610,6 +6258,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_REQ",
"PerPkg": "1",
@@ -5619,6 +6268,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_RSP",
"PerPkg": "1",
@@ -5628,6 +6278,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.AD_SNP",
"PerPkg": "1",
@@ -5637,6 +6288,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCB",
"PerPkg": "1",
@@ -5646,6 +6298,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_NCS",
"PerPkg": "1",
@@ -5655,6 +6308,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_RSP",
"PerPkg": "1",
@@ -5664,6 +6318,7 @@
},
{
"BriefDescription": "Can't Arb for VN1; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOAD_REQ_VN1.BL_WB",
"PerPkg": "1",
@@ -5673,6 +6328,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_REQ",
"PerPkg": "1",
@@ -5682,6 +6338,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_RSP",
"PerPkg": "1",
@@ -5691,6 +6348,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.AD_SNP",
"PerPkg": "1",
@@ -5700,6 +6358,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCB",
"PerPkg": "1",
@@ -5709,6 +6368,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_NCS",
"PerPkg": "1",
@@ -5718,6 +6378,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_RSP",
"PerPkg": "1",
@@ -5727,6 +6388,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN0.BL_WB",
"PerPkg": "1",
@@ -5736,6 +6398,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_REQ",
"PerPkg": "1",
@@ -5745,6 +6408,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_RSP",
"PerPkg": "1",
@@ -5754,6 +6418,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.AD_SNP",
"PerPkg": "1",
@@ -5763,6 +6428,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCB",
"PerPkg": "1",
@@ -5772,6 +6438,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_NCS",
"PerPkg": "1",
@@ -5781,6 +6448,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_RSP",
"PerPkg": "1",
@@ -5790,6 +6458,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRED_VN1.BL_WB",
"PerPkg": "1",
@@ -5799,6 +6468,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on BL Arb",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB",
"PerPkg": "1",
@@ -5808,6 +6478,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses; AD to Slot 0 on Idle",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE",
"PerPkg": "1",
@@ -5817,6 +6488,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 1",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT",
"PerPkg": "1",
@@ -5826,6 +6498,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses; AD + BL to Slot 2",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT",
"PerPkg": "1",
@@ -5835,6 +6508,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_REQ",
"PerPkg": "1",
@@ -5844,6 +6518,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_RSP",
"PerPkg": "1",
@@ -5853,6 +6528,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.AD_SNP",
"PerPkg": "1",
@@ -5862,6 +6538,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCB",
"PerPkg": "1",
@@ -5871,6 +6548,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_NCS",
"PerPkg": "1",
@@ -5880,6 +6558,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_RSP",
"PerPkg": "1",
@@ -5889,6 +6568,7 @@
},
{
"BriefDescription": "VN0 message lost contest for flit; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN0.BL_WB",
"PerPkg": "1",
@@ -5898,6 +6578,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_REQ",
"PerPkg": "1",
@@ -5907,6 +6588,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_RSP",
"PerPkg": "1",
@@ -5916,6 +6598,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.AD_SNP",
"PerPkg": "1",
@@ -5925,6 +6608,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCB",
"PerPkg": "1",
@@ -5934,6 +6618,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_NCS",
"PerPkg": "1",
@@ -5943,6 +6628,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_RSP",
"PerPkg": "1",
@@ -5952,6 +6638,7 @@
},
{
"BriefDescription": "VN1 message lost contest for flit; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_COLLISION_VN1.BL_WB",
"PerPkg": "1",
@@ -5961,6 +6648,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events; Any In BGF FIFO",
+ "Counter": "0,1,2",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO",
"PerPkg": "1",
@@ -5970,6 +6658,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events; Any in BGF Path",
+ "Counter": "0,1,2",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH",
"PerPkg": "1",
@@ -5979,6 +6668,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events; No D2K For Arb",
+ "Counter": "0,1,2",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.NO_D2K_FOR_ARB",
"PerPkg": "1",
@@ -5988,6 +6678,7 @@
},
{
"BriefDescription": "Credit Occupancy; D2K Credits",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD",
"PerPkg": "1",
@@ -5997,6 +6688,7 @@
},
{
"BriefDescription": "Credit Occupancy; Packets in BGF FIFO",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO",
"PerPkg": "1",
@@ -6006,6 +6698,7 @@
},
{
"BriefDescription": "Credit Occupancy; Packets in BGF Path",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH",
"PerPkg": "1",
@@ -6015,6 +6708,7 @@
},
{
"BriefDescription": "Credit Occupancy",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO",
"PerPkg": "1",
@@ -6024,6 +6718,7 @@
},
{
"BriefDescription": "Credit Occupancy",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL",
"PerPkg": "1",
@@ -6033,6 +6728,7 @@
},
{
"BriefDescription": "Credit Occupancy; Transmit Credits",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD",
"PerPkg": "1",
@@ -6042,6 +6738,7 @@
},
{
"BriefDescription": "Credit Occupancy; VNA In Use",
+ "Counter": "0,1,2",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE",
"PerPkg": "1",
@@ -6051,6 +6748,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ",
"PerPkg": "1",
@@ -6060,6 +6758,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP",
"PerPkg": "1",
@@ -6069,6 +6768,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP",
"PerPkg": "1",
@@ -6078,6 +6778,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB",
"PerPkg": "1",
@@ -6087,6 +6788,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS",
"PerPkg": "1",
@@ -6096,6 +6798,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP",
"PerPkg": "1",
@@ -6105,6 +6808,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB",
"PerPkg": "1",
@@ -6114,6 +6818,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ",
"PerPkg": "1",
@@ -6123,6 +6828,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP",
"PerPkg": "1",
@@ -6132,6 +6838,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP",
"PerPkg": "1",
@@ -6141,6 +6848,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB",
"PerPkg": "1",
@@ -6150,6 +6858,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS",
"PerPkg": "1",
@@ -6159,6 +6868,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP",
"PerPkg": "1",
@@ -6168,6 +6878,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB",
"PerPkg": "1",
@@ -6177,6 +6888,7 @@
},
{
"BriefDescription": "Data Flit Not Sent; All",
+ "Counter": "0,1,2",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.ALL",
"PerPkg": "1",
@@ -6186,6 +6898,7 @@
},
{
"BriefDescription": "Data Flit Not Sent; No BGF Credits",
+ "Counter": "0,1,2",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_BGF",
"PerPkg": "1",
@@ -6195,6 +6908,7 @@
},
{
"BriefDescription": "Data Flit Not Sent; No TxQ Credits",
+ "Counter": "0,1,2",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_DATA_NOT_SENT.NO_TXQ",
"PerPkg": "1",
@@ -6204,6 +6918,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence; Wait on Pump 0",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT",
"PerPkg": "1",
@@ -6213,6 +6928,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT",
"PerPkg": "1",
@@ -6222,6 +6938,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY",
"PerPkg": "1",
@@ -6231,6 +6948,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL",
"PerPkg": "1",
@@ -6240,6 +6958,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0",
"PerPkg": "1",
@@ -6249,6 +6968,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO",
"PerPkg": "1",
@@ -6258,6 +6978,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence; Wait on Pump 1",
+ "Counter": "0,1,2",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT",
"PerPkg": "1",
@@ -6267,6 +6988,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC",
+ "Counter": "0,1,2",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_FLITS_MISC",
"PerPkg": "1",
@@ -6274,6 +6996,7 @@
},
{
"BriefDescription": "Sent Header Flit; One Message",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG",
"PerPkg": "1",
@@ -6283,6 +7006,7 @@
},
{
"BriefDescription": "Sent Header Flit; One Message in non-VNA",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.1_MSG_VNX",
"PerPkg": "1",
@@ -6292,6 +7016,7 @@
},
{
"BriefDescription": "Sent Header Flit; Two Messages",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.2_MSGS",
"PerPkg": "1",
@@ -6301,6 +7026,7 @@
},
{
"BriefDescription": "Sent Header Flit; Three Messages",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.3_MSGS",
"PerPkg": "1",
@@ -6310,6 +7036,7 @@
},
{
"BriefDescription": "Sent Header Flit",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_1",
"PerPkg": "1",
@@ -6318,6 +7045,7 @@
},
{
"BriefDescription": "Sent Header Flit",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_2",
"PerPkg": "1",
@@ -6326,6 +7054,7 @@
},
{
"BriefDescription": "Sent Header Flit",
+ "Counter": "0,1,2",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SENT.SLOTS_3",
"PerPkg": "1",
@@ -6334,6 +7063,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; All",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL",
"PerPkg": "1",
@@ -6342,6 +7072,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; Needs Data Flit",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA",
"PerPkg": "1",
@@ -6351,6 +7082,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; Wait on Pump 0",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT",
"PerPkg": "1",
@@ -6360,6 +7092,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; Don't Need Pump 1",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ",
"PerPkg": "1",
@@ -6369,6 +7102,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; Don't Need Pump 1 - Bubble",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE",
"PerPkg": "1",
@@ -6378,6 +7112,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; Don't Need Pump 1 - Not Avail",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL",
"PerPkg": "1",
@@ -6387,6 +7122,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit; Wait on Pump 1",
+ "Counter": "0,1,2",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT",
"PerPkg": "1",
@@ -6396,6 +7132,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Accumulate",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM",
"PerPkg": "1",
@@ -6405,6 +7142,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Accumulate Ready",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ",
"PerPkg": "1",
@@ -6414,6 +7152,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Accumulate Wasted",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED",
"PerPkg": "1",
@@ -6423,6 +7162,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Run-Ahead - Blocked",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED",
"PerPkg": "1",
@@ -6432,6 +7172,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Run-Ahead - Message",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG",
"PerPkg": "1",
@@ -6441,6 +7182,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Parallel Ok",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR",
"PerPkg": "1",
@@ -6450,6 +7192,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Parallel Flit Finished",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_FLIT",
"PerPkg": "1",
@@ -6459,6 +7202,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1; Parallel Message",
+ "Counter": "0,1,2",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.PAR_MSG",
"PerPkg": "1",
@@ -6468,6 +7212,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2; Rate-matching Stall",
+ "Counter": "0,1,2",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL",
"PerPkg": "1",
@@ -6477,6 +7222,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2; Rate-matching Stall - No Message",
+ "Counter": "0,1,2",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG",
"PerPkg": "1",
@@ -6486,6 +7232,7 @@
},
{
"BriefDescription": "Header Not Sent; All",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ALL",
"PerPkg": "1",
@@ -6495,6 +7242,7 @@
},
{
"BriefDescription": "Header Not Sent; No BGF Credits",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_CRD",
"PerPkg": "1",
@@ -6504,6 +7252,7 @@
},
{
"BriefDescription": "Header Not Sent; No BGF Credits + No Extra Message Slotted",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_BGF_NO_MSG",
"PerPkg": "1",
@@ -6513,6 +7262,7 @@
},
{
"BriefDescription": "Header Not Sent; No TxQ Credits",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_CRD",
"PerPkg": "1",
@@ -6522,6 +7272,7 @@
},
{
"BriefDescription": "Header Not Sent; No TxQ Credits + No Extra Message Slotted",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.NO_TXQ_NO_MSG",
"PerPkg": "1",
@@ -6531,6 +7282,7 @@
},
{
"BriefDescription": "Header Not Sent; Sent - One Slot Taken",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.ONE_TAKEN",
"PerPkg": "1",
@@ -6540,6 +7292,7 @@
},
{
"BriefDescription": "Header Not Sent; Sent - Three Slots Taken",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.THREE_TAKEN",
"PerPkg": "1",
@@ -6549,6 +7302,7 @@
},
{
"BriefDescription": "Header Not Sent; Sent - Two Slots Taken",
+ "Counter": "0,1,2",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_FLIT_NOT_SENT.TWO_TAKEN",
"PerPkg": "1",
@@ -6558,6 +7312,7 @@
},
{
"BriefDescription": "Message Held; Can't Slot AD",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD",
"PerPkg": "1",
@@ -6567,6 +7322,7 @@
},
{
"BriefDescription": "Message Held; Can't Slot BL",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL",
"PerPkg": "1",
@@ -6576,6 +7332,7 @@
},
{
"BriefDescription": "Message Held; Parallel AD Lost",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_AD_LOST",
"PerPkg": "1",
@@ -6585,6 +7342,7 @@
},
{
"BriefDescription": "Message Held; Parallel Attempt",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT",
"PerPkg": "1",
@@ -6594,6 +7352,7 @@
},
{
"BriefDescription": "Message Held; Parallel BL Lost",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_BL_LOST",
"PerPkg": "1",
@@ -6603,6 +7362,7 @@
},
{
"BriefDescription": "Message Held; Parallel Success",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS",
"PerPkg": "1",
@@ -6612,6 +7372,7 @@
},
{
"BriefDescription": "Message Held; VN0",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.VN0",
"PerPkg": "1",
@@ -6621,6 +7382,7 @@
},
{
"BriefDescription": "Message Held; VN1",
+ "Counter": "0,1,2",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_HELD.VN1",
"PerPkg": "1",
@@ -6630,6 +7392,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ",
"PerPkg": "1",
@@ -6639,6 +7402,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP",
"PerPkg": "1",
@@ -6648,6 +7412,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP",
"PerPkg": "1",
@@ -6657,6 +7422,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB",
"PerPkg": "1",
@@ -6666,6 +7432,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS",
"PerPkg": "1",
@@ -6675,6 +7442,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP",
"PerPkg": "1",
@@ -6684,6 +7452,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB",
"PerPkg": "1",
@@ -6693,6 +7462,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ",
"PerPkg": "1",
@@ -6702,6 +7472,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP",
"PerPkg": "1",
@@ -6711,6 +7482,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP",
"PerPkg": "1",
@@ -6720,6 +7492,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB",
"PerPkg": "1",
@@ -6729,6 +7502,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS",
"PerPkg": "1",
@@ -6738,6 +7512,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP",
"PerPkg": "1",
@@ -6747,6 +7522,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB",
"PerPkg": "1",
@@ -6756,6 +7532,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ",
"PerPkg": "1",
@@ -6765,6 +7542,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP",
"PerPkg": "1",
@@ -6774,6 +7552,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP",
"PerPkg": "1",
@@ -6783,6 +7562,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB",
"PerPkg": "1",
@@ -6792,6 +7572,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS",
"PerPkg": "1",
@@ -6801,6 +7582,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP",
"PerPkg": "1",
@@ -6810,6 +7592,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB",
"PerPkg": "1",
@@ -6819,6 +7602,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ",
"PerPkg": "1",
@@ -6828,6 +7612,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP",
"PerPkg": "1",
@@ -6837,6 +7622,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP",
"PerPkg": "1",
@@ -6846,6 +7632,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB",
"PerPkg": "1",
@@ -6855,6 +7642,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS",
"PerPkg": "1",
@@ -6864,6 +7652,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP",
"PerPkg": "1",
@@ -6873,6 +7662,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB",
"PerPkg": "1",
@@ -6882,6 +7672,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ",
"PerPkg": "1",
@@ -6891,6 +7682,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP",
"PerPkg": "1",
@@ -6900,6 +7692,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP",
"PerPkg": "1",
@@ -6909,6 +7702,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB",
"PerPkg": "1",
@@ -6918,6 +7712,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS",
"PerPkg": "1",
@@ -6927,6 +7722,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP",
"PerPkg": "1",
@@ -6936,6 +7732,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB",
"PerPkg": "1",
@@ -6945,6 +7742,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ",
"PerPkg": "1",
@@ -6954,6 +7752,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP",
"PerPkg": "1",
@@ -6963,6 +7762,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP",
"PerPkg": "1",
@@ -6972,6 +7772,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB",
"PerPkg": "1",
@@ -6981,6 +7782,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS",
"PerPkg": "1",
@@ -6990,6 +7792,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP",
"PerPkg": "1",
@@ -6999,6 +7802,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB",
"PerPkg": "1",
@@ -7008,6 +7812,7 @@
},
{
"BriefDescription": "SMI3 Prefetch Messages; Lost Arbitration",
+ "Counter": "0,1,2",
"EventCode": "0x62",
"EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARB_LOST",
"PerPkg": "1",
@@ -7016,6 +7821,7 @@
},
{
"BriefDescription": "SMI3 Prefetch Messages; Arrived",
+ "Counter": "0,1,2",
"EventCode": "0x62",
"EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.ARRIVED",
"PerPkg": "1",
@@ -7024,6 +7830,7 @@
},
{
"BriefDescription": "SMI3 Prefetch Messages; Dropped - Old",
+ "Counter": "0,1,2",
"EventCode": "0x62",
"EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_OLD",
"PerPkg": "1",
@@ -7032,6 +7839,7 @@
},
{
"BriefDescription": "SMI3 Prefetch Messages; Dropped - Wrap",
+ "Counter": "0,1,2",
"EventCode": "0x62",
"EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.DROP_WRAP",
"PerPkg": "1",
@@ -7041,6 +7849,7 @@
},
{
"BriefDescription": "SMI3 Prefetch Messages; Slotted",
+ "Counter": "0,1,2",
"EventCode": "0x62",
"EventName": "UNC_M3UPI_RxC_SMI3_PFTCH.SLOTTED",
"PerPkg": "1",
@@ -7049,6 +7858,7 @@
},
{
"BriefDescription": "Remote VNA Credits; Any In Use",
+ "Counter": "0,1,2",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE",
"PerPkg": "1",
@@ -7058,6 +7868,7 @@
},
{
"BriefDescription": "Remote VNA Credits; Corrected",
+ "Counter": "0,1,2",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED",
"PerPkg": "1",
@@ -7067,6 +7878,7 @@
},
{
"BriefDescription": "Remote VNA Credits; Level < 1",
+ "Counter": "0,1,2",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1",
"PerPkg": "1",
@@ -7076,6 +7888,7 @@
},
{
"BriefDescription": "Remote VNA Credits; Level < 4",
+ "Counter": "0,1,2",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4",
"PerPkg": "1",
@@ -7085,6 +7898,7 @@
},
{
"BriefDescription": "Remote VNA Credits; Level < 5",
+ "Counter": "0,1,2",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5",
"PerPkg": "1",
@@ -7094,6 +7908,7 @@
},
{
"BriefDescription": "Remote VNA Credits; Used",
+ "Counter": "0,1,2",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.USED",
"PerPkg": "1",
@@ -7103,6 +7918,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_BNC",
"PerPkg": "1",
@@ -7112,6 +7928,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -7121,6 +7938,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_BNC",
"PerPkg": "1",
@@ -7130,6 +7948,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -7139,6 +7958,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AD_BNC",
"PerPkg": "1",
@@ -7148,6 +7968,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -7157,6 +7978,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AK_BNC",
"PerPkg": "1",
@@ -7166,6 +7988,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_RxR_BYPASS.BL_BNC",
"PerPkg": "1",
@@ -7175,6 +7998,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -7184,6 +8008,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_RxR_BYPASS.IV_BNC",
"PerPkg": "1",
@@ -7193,6 +8018,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_BNC",
"PerPkg": "1",
@@ -7202,6 +8028,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -7211,6 +8038,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK_BNC",
"PerPkg": "1",
@@ -7220,6 +8048,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_BNC",
"PerPkg": "1",
@@ -7229,6 +8058,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -7238,6 +8068,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; IFV - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -7247,6 +8078,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV_BNC",
"PerPkg": "1",
@@ -7256,6 +8088,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -7265,6 +8098,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -7274,6 +8108,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AK_BNC",
"PerPkg": "1",
@@ -7283,6 +8118,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_RxR_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -7292,6 +8128,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -7301,6 +8138,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_RxR_INSERTS.IV_BNC",
"PerPkg": "1",
@@ -7310,6 +8148,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_BNC",
"PerPkg": "1",
@@ -7319,6 +8158,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -7328,6 +8168,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK_BNC",
"PerPkg": "1",
@@ -7337,6 +8178,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_BNC",
"PerPkg": "1",
@@ -7346,6 +8188,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -7355,6 +8198,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV_BNC",
"PerPkg": "1",
@@ -7364,6 +8208,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -7373,6 +8218,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -7382,6 +8228,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -7391,6 +8238,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -7400,6 +8248,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -7409,6 +8258,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -7418,6 +8268,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -7427,6 +8278,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -7436,6 +8288,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -7445,6 +8298,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -7454,6 +8308,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -7463,6 +8318,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -7472,6 +8328,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -7481,6 +8338,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -7490,6 +8348,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -7499,6 +8358,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -7508,6 +8368,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -7517,6 +8378,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -7526,6 +8388,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 0",
+ "Counter": "0,1,2",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -7535,6 +8398,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 1",
+ "Counter": "0,1,2",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -7544,6 +8408,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 2",
+ "Counter": "0,1,2",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -7553,6 +8418,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 3",
+ "Counter": "0,1,2",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -7562,6 +8428,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 4",
+ "Counter": "0,1,2",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -7571,6 +8438,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits; For Transgress 5",
+ "Counter": "0,1,2",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -7580,6 +8448,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ",
"PerPkg": "1",
@@ -7589,6 +8458,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP",
"PerPkg": "1",
@@ -7598,6 +8468,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP",
"PerPkg": "1",
@@ -7607,6 +8478,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB",
"PerPkg": "1",
@@ -7616,6 +8488,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ",
"PerPkg": "1",
@@ -7625,6 +8498,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP",
"PerPkg": "1",
@@ -7634,6 +8508,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP",
"PerPkg": "1",
@@ -7643,6 +8518,7 @@
},
{
"BriefDescription": "Failed ARB for AD; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB",
"PerPkg": "1",
@@ -7652,6 +8528,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0",
"PerPkg": "1",
@@ -7661,6 +8538,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1",
"PerPkg": "1",
@@ -7670,6 +8548,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2",
"PerPkg": "1",
@@ -7679,6 +8558,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP",
"PerPkg": "1",
@@ -7688,6 +8568,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ",
"PerPkg": "1",
@@ -7697,6 +8578,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP",
"PerPkg": "1",
@@ -7706,6 +8588,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP",
"PerPkg": "1",
@@ -7715,6 +8598,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB",
"PerPkg": "1",
@@ -7724,6 +8608,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ",
"PerPkg": "1",
@@ -7733,6 +8618,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP",
"PerPkg": "1",
@@ -7742,6 +8628,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP",
"PerPkg": "1",
@@ -7751,6 +8638,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB",
"PerPkg": "1",
@@ -7760,6 +8648,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ",
"PerPkg": "1",
@@ -7769,6 +8658,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP",
"PerPkg": "1",
@@ -7778,6 +8668,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP",
"PerPkg": "1",
@@ -7787,6 +8678,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB",
"PerPkg": "1",
@@ -7796,6 +8688,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ",
"PerPkg": "1",
@@ -7805,6 +8698,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP",
"PerPkg": "1",
@@ -7814,6 +8708,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP",
"PerPkg": "1",
@@ -7951,6 +8846,7 @@
},
{
"BriefDescription": "Snoop Arbitration; FlowQ Won",
+ "Counter": "0,1,2",
"EventCode": "0x3D",
"EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_NONSNP",
"PerPkg": "1",
@@ -7960,6 +8856,7 @@
},
{
"BriefDescription": "Snoop Arbitration; FlowQ SnpF Won",
+ "Counter": "0,1,2",
"EventCode": "0x3D",
"EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN0_SNPFP_VN2SNP",
"PerPkg": "1",
@@ -7969,6 +8866,7 @@
},
{
"BriefDescription": "Snoop Arbitration; FlowQ Won",
+ "Counter": "0,1,2",
"EventCode": "0x3D",
"EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_NONSNP",
"PerPkg": "1",
@@ -7978,6 +8876,7 @@
},
{
"BriefDescription": "Snoop Arbitration; FlowQ SnpF Won",
+ "Counter": "0,1,2",
"EventCode": "0x3D",
"EventName": "UNC_M3UPI_TxC_AD_SNPF_GRP2_VN1.VN1_SNPFP_VN0SNP",
"PerPkg": "1",
@@ -7987,6 +8886,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - Credit Available; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x34",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_REQ",
"PerPkg": "1",
@@ -7996,6 +8896,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - Credit Available; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x34",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_SNP",
"PerPkg": "1",
@@ -8005,6 +8906,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - Credit Available; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x34",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN0_WB",
"PerPkg": "1",
@@ -8014,6 +8916,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - Credit Available; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x34",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_REQ",
"PerPkg": "1",
@@ -8023,6 +8926,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - Credit Available; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x34",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_SNP",
"PerPkg": "1",
@@ -8032,6 +8936,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - Credit Available; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x34",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_CRD_AVAIL.VN1_WB",
"PerPkg": "1",
@@ -8041,6 +8946,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - New Message; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x33",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_REQ",
"PerPkg": "1",
@@ -8050,6 +8956,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - New Message; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x33",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_SNP",
"PerPkg": "1",
@@ -8059,6 +8966,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - New Message; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x33",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN0_WB",
"PerPkg": "1",
@@ -8068,6 +8976,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - New Message; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x33",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_REQ",
"PerPkg": "1",
@@ -8077,6 +8986,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - New Message; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x33",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_SNP",
"PerPkg": "1",
@@ -8086,6 +8996,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - New Message; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x33",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NEW_MSG.VN1_WB",
"PerPkg": "1",
@@ -8095,6 +9006,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_REQ",
"PerPkg": "1",
@@ -8104,6 +9016,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_RSP",
"PerPkg": "1",
@@ -8113,6 +9026,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_SNP",
"PerPkg": "1",
@@ -8122,6 +9036,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN0_WB",
"PerPkg": "1",
@@ -8131,6 +9046,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_REQ",
"PerPkg": "1",
@@ -8140,6 +9056,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_RSP",
"PerPkg": "1",
@@ -8149,6 +9066,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_SNP",
"PerPkg": "1",
@@ -8158,6 +9076,7 @@
},
{
"BriefDescription": "Speculative ARB for AD - No Credit; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x32",
"EventName": "UNC_M3UPI_TxC_AD_SPEC_ARB_NO_OTHER_PEND.VN1_WB",
"PerPkg": "1",
@@ -8167,6 +9086,7 @@
},
{
"BriefDescription": "AK Flow Q Inserts",
+ "Counter": "0,1,2",
"EventCode": "0x2F",
"EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS",
"PerPkg": "1",
@@ -8181,6 +9101,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN0 NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB",
"PerPkg": "1",
@@ -8190,6 +9111,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN0 NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS",
"PerPkg": "1",
@@ -8199,6 +9121,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP",
"PerPkg": "1",
@@ -8208,6 +9131,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB",
"PerPkg": "1",
@@ -8217,6 +9141,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN1 NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB",
"PerPkg": "1",
@@ -8226,6 +9151,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN1 NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS",
"PerPkg": "1",
@@ -8235,6 +9161,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP",
"PerPkg": "1",
@@ -8244,6 +9171,7 @@
},
{
"BriefDescription": "Failed ARB for BL; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB",
"PerPkg": "1",
@@ -8253,6 +9181,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ",
"PerPkg": "1",
@@ -8262,6 +9191,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP",
"PerPkg": "1",
@@ -8271,6 +9201,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP",
"PerPkg": "1",
@@ -8280,6 +9211,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB",
"PerPkg": "1",
@@ -8289,6 +9221,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ",
"PerPkg": "1",
@@ -8298,6 +9231,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP",
"PerPkg": "1",
@@ -8307,6 +9241,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP",
"PerPkg": "1",
@@ -8316,6 +9251,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB",
"PerPkg": "1",
@@ -8325,6 +9261,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB",
"PerPkg": "1",
@@ -8334,6 +9271,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS",
"PerPkg": "1",
@@ -8343,6 +9281,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN0 NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP",
"PerPkg": "1",
@@ -8352,6 +9291,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN0 NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB",
"PerPkg": "1",
@@ -8361,6 +9301,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB",
"PerPkg": "1",
@@ -8370,6 +9311,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS",
"PerPkg": "1",
@@ -8379,6 +9321,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN1_NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP",
"PerPkg": "1",
@@ -8388,6 +9331,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts; VN1_NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB",
"PerPkg": "1",
@@ -8461,6 +9405,7 @@
},
{
"BriefDescription": "Speculative ARB for BL - New Message; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x38",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCB",
"PerPkg": "1",
@@ -8470,6 +9415,7 @@
},
{
"BriefDescription": "Speculative ARB for BL - New Message; VN0 NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x38",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_NCS",
"PerPkg": "1",
@@ -8479,6 +9425,7 @@
},
{
"BriefDescription": "Speculative ARB for BL - New Message; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x38",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN0_WB",
"PerPkg": "1",
@@ -8488,6 +9435,7 @@
},
{
"BriefDescription": "Speculative ARB for BL - New Message; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x38",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCB",
"PerPkg": "1",
@@ -8497,6 +9445,7 @@
},
{
"BriefDescription": "Speculative ARB for BL - New Message; VN1 NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x38",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_NCS",
"PerPkg": "1",
@@ -8506,6 +9455,7 @@
},
{
"BriefDescription": "Speculative ARB for BL - New Message; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x38",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NEW_MSG.VN1_WB",
"PerPkg": "1",
@@ -8515,6 +9465,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN0 NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCB",
"PerPkg": "1",
@@ -8524,6 +9475,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN0 NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_NCS",
"PerPkg": "1",
@@ -8533,6 +9485,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_RSP",
"PerPkg": "1",
@@ -8542,6 +9495,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN0 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN0_WB",
"PerPkg": "1",
@@ -8551,6 +9505,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN1 NCS Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCB",
"PerPkg": "1",
@@ -8560,6 +9515,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN1 NCB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_NCS",
"PerPkg": "1",
@@ -8569,6 +9525,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_RSP",
"PerPkg": "1",
@@ -8578,6 +9535,7 @@
},
{
"BriefDescription": "Speculative ARB for AD Failed - No Credit; VN1 WB Messages",
+ "Counter": "0,1,2",
"EventCode": "0x37",
"EventName": "UNC_M3UPI_TxC_BL_SPEC_ARB_NO_OTHER_PEND.VN1_WB",
"PerPkg": "1",
@@ -8587,6 +9545,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_BNC",
"PerPkg": "1",
@@ -8596,6 +9555,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -8605,6 +9565,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AK_BNC",
"PerPkg": "1",
@@ -8614,6 +9575,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_BNC",
"PerPkg": "1",
@@ -8623,6 +9585,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -8632,6 +9595,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9F",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_BNC",
"PerPkg": "1",
@@ -8641,6 +9605,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x9F",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -8650,6 +9615,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9F",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK_BNC",
"PerPkg": "1",
@@ -8659,6 +9625,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9F",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_BNC",
"PerPkg": "1",
@@ -8668,6 +9635,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x9F",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -8677,6 +9645,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9F",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV_BNC",
"PerPkg": "1",
@@ -8686,6 +9655,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_BNC",
"PerPkg": "1",
@@ -8695,6 +9665,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -8704,6 +9675,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK_BNC",
"PerPkg": "1",
@@ -8713,6 +9685,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_BNC",
"PerPkg": "1",
@@ -8722,6 +9695,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -8731,6 +9705,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV_BNC",
"PerPkg": "1",
@@ -8740,6 +9715,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_BNC",
"PerPkg": "1",
@@ -8749,6 +9725,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -8758,6 +9735,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK_BNC",
"PerPkg": "1",
@@ -8767,6 +9745,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_BNC",
"PerPkg": "1",
@@ -8776,6 +9755,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -8785,6 +9765,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV_BNC",
"PerPkg": "1",
@@ -8794,6 +9775,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_BNC",
"PerPkg": "1",
@@ -8803,6 +9785,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -8812,6 +9795,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK_BNC",
"PerPkg": "1",
@@ -8821,6 +9805,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_BNC",
"PerPkg": "1",
@@ -8830,6 +9815,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -8839,6 +9825,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV_BNC",
"PerPkg": "1",
@@ -8848,6 +9835,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_BNC",
"PerPkg": "1",
@@ -8857,6 +9845,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -8866,6 +9855,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK_BNC",
"PerPkg": "1",
@@ -8875,6 +9865,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_BNC",
"PerPkg": "1",
@@ -8884,6 +9875,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -8893,6 +9885,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV_BNC",
"PerPkg": "1",
@@ -8902,6 +9895,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_BNC",
"PerPkg": "1",
@@ -8911,6 +9905,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AD - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -8920,6 +9915,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK_BNC",
"PerPkg": "1",
@@ -8929,6 +9925,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_BNC",
"PerPkg": "1",
@@ -8938,6 +9935,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; BL - Credit",
+ "Counter": "0,1,2",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -8947,6 +9945,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV_BNC",
"PerPkg": "1",
@@ -8956,6 +9955,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; AD - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_BNC",
"PerPkg": "1",
@@ -8965,6 +9965,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; AK - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK_BNC",
"PerPkg": "1",
@@ -8974,6 +9975,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; BL - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_BNC",
"PerPkg": "1",
@@ -8983,6 +9985,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation; IV - Bounce",
+ "Counter": "0,1,2",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV_BNC",
"PerPkg": "1",
@@ -8992,6 +9995,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -9001,6 +10005,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -9010,6 +10015,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG0",
"PerPkg": "1",
@@ -9019,6 +10025,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AK_AG1",
"PerPkg": "1",
@@ -9028,6 +10035,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -9037,6 +10045,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -9046,6 +10055,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -9055,6 +10065,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -9064,6 +10075,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -9073,6 +10085,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -9082,6 +10095,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -9091,6 +10105,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -9100,6 +10115,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used; IV",
+ "Counter": "0,1,2",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV",
"PerPkg": "1",
@@ -9109,6 +10125,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG0",
"PerPkg": "1",
@@ -9118,6 +10135,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AD_AG1",
"PerPkg": "1",
@@ -9127,6 +10145,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG0",
"PerPkg": "1",
@@ -9136,6 +10155,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.AK_AG1",
"PerPkg": "1",
@@ -9145,6 +10165,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG0",
"PerPkg": "1",
@@ -9154,6 +10175,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.BL_AG1",
"PerPkg": "1",
@@ -9163,6 +10185,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full; IV",
+ "Counter": "0,1,2",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -9172,6 +10195,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG0",
"PerPkg": "1",
@@ -9181,6 +10205,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AD_AG1",
"PerPkg": "1",
@@ -9190,6 +10215,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG0",
"PerPkg": "1",
@@ -9199,6 +10225,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.AK_AG1",
"PerPkg": "1",
@@ -9208,6 +10235,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG0",
"PerPkg": "1",
@@ -9217,6 +10245,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.BL_AG1",
"PerPkg": "1",
@@ -9226,6 +10255,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty; IV",
+ "Counter": "0,1,2",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE.IV",
"PerPkg": "1",
@@ -9235,6 +10265,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG0",
"PerPkg": "1",
@@ -9244,6 +10275,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AD_AG1",
"PerPkg": "1",
@@ -9253,6 +10285,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG0",
"PerPkg": "1",
@@ -9262,6 +10295,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.AK_AG1",
"PerPkg": "1",
@@ -9271,6 +10305,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG0",
"PerPkg": "1",
@@ -9280,6 +10315,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.BL_AG1",
"PerPkg": "1",
@@ -9289,6 +10325,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations; IV",
+ "Counter": "0,1,2",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS.IV",
"PerPkg": "1",
@@ -9298,6 +10335,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG0",
"PerPkg": "1",
@@ -9307,6 +10345,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.AD_AG1",
"PerPkg": "1",
@@ -9316,6 +10355,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG0",
"PerPkg": "1",
@@ -9325,6 +10365,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.AK_AG1",
"PerPkg": "1",
@@ -9334,6 +10375,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG0",
"PerPkg": "1",
@@ -9343,6 +10385,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.BL_AG1",
"PerPkg": "1",
@@ -9352,6 +10395,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs; IV",
+ "Counter": "0,1,2",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK.IV",
"PerPkg": "1",
@@ -9361,6 +10405,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG0",
"PerPkg": "1",
@@ -9370,6 +10415,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AD_AG1",
"PerPkg": "1",
@@ -9379,6 +10425,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG0",
"PerPkg": "1",
@@ -9388,6 +10435,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.AK_AG1",
"PerPkg": "1",
@@ -9397,6 +10445,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG0",
"PerPkg": "1",
@@ -9406,6 +10455,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.BL_AG1",
"PerPkg": "1",
@@ -9415,6 +10465,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy; IV",
+ "Counter": "0,1,2",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY.IV",
"PerPkg": "1",
@@ -9424,6 +10475,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AD - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG0",
"PerPkg": "1",
@@ -9433,6 +10485,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AD - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.AD_AG1",
"PerPkg": "1",
@@ -9442,6 +10495,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AK - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG0",
"PerPkg": "1",
@@ -9451,6 +10505,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; AK - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.AK_AG1",
"PerPkg": "1",
@@ -9460,6 +10515,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; BL - Agent 0",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG0",
"PerPkg": "1",
@@ -9469,6 +10525,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; BL - Agent 1",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.BL_AG1",
"PerPkg": "1",
@@ -9478,6 +10535,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation; IV",
+ "Counter": "0,1,2",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED.IV",
"PerPkg": "1",
@@ -9487,6 +10545,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ",
"PerPkg": "1",
@@ -9496,6 +10555,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP",
"PerPkg": "1",
@@ -9505,6 +10565,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP",
"PerPkg": "1",
@@ -9514,6 +10575,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ",
"PerPkg": "1",
@@ -9523,6 +10585,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP",
"PerPkg": "1",
@@ -9532,6 +10595,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP",
"PerPkg": "1",
@@ -9541,6 +10605,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty; VNA",
+ "Counter": "0,1,2",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -9550,6 +10615,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VN0 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB",
"PerPkg": "1",
@@ -9559,6 +10625,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VN0 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP",
"PerPkg": "1",
@@ -9568,6 +10635,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VN0 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB",
"PerPkg": "1",
@@ -9577,6 +10645,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VN1 RSP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB",
"PerPkg": "1",
@@ -9586,6 +10655,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VN1 REQ Messages",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP",
"PerPkg": "1",
@@ -9595,6 +10665,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VN1 SNP Messages",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB",
"PerPkg": "1",
@@ -9604,6 +10675,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty; VNA",
+ "Counter": "0,1,2",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -9613,6 +10685,7 @@
},
{
"BriefDescription": "Prefetches generated by the flow control queue of the M3UPI unit.",
+ "Counter": "0,1,2",
"EventCode": "0x29",
"EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN",
"PerPkg": "1",
@@ -9621,6 +10694,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Down and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9630,6 +10704,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Down and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9639,6 +10714,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Up and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9648,6 +10724,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use; Up and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9657,6 +10734,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Down and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA8",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9666,6 +10744,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Down and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA8",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9675,6 +10754,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Up and Even",
+ "Counter": "0,1,2",
"EventCode": "0xA8",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9684,6 +10764,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use; Up and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xA8",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9693,6 +10774,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Down and Even",
+ "Counter": "0,1,2",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9702,6 +10784,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Down and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9711,6 +10794,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Up and Even",
+ "Counter": "0,1,2",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9720,6 +10804,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use; Up and Odd",
+ "Counter": "0,1,2",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9729,6 +10814,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use; Down",
+ "Counter": "0,1,2",
"EventCode": "0xAC",
"EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -9738,6 +10824,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use; Up",
+ "Counter": "0,1,2",
"EventCode": "0xAC",
"EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -9747,6 +10834,7 @@
},
{
"BriefDescription": "VN0 Credit Used; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB",
"PerPkg": "1",
@@ -9756,6 +10844,7 @@
},
{
"BriefDescription": "VN0 Credit Used; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS",
"PerPkg": "1",
@@ -9765,6 +10854,7 @@
},
{
"BriefDescription": "VN0 Credit Used; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ",
"PerPkg": "1",
@@ -9774,6 +10864,7 @@
},
{
"BriefDescription": "VN0 Credit Used; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP",
"PerPkg": "1",
@@ -9783,6 +10874,7 @@
},
{
"BriefDescription": "VN0 Credit Used; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP",
"PerPkg": "1",
@@ -9792,6 +10884,7 @@
},
{
"BriefDescription": "VN0 Credit Used; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB",
"PerPkg": "1",
@@ -9801,6 +10894,7 @@
},
{
"BriefDescription": "VN0 No Credits; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB",
"PerPkg": "1",
@@ -9810,6 +10904,7 @@
},
{
"BriefDescription": "VN0 No Credits; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS",
"PerPkg": "1",
@@ -9819,6 +10914,7 @@
},
{
"BriefDescription": "VN0 No Credits; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ",
"PerPkg": "1",
@@ -9828,6 +10924,7 @@
},
{
"BriefDescription": "VN0 No Credits; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP",
"PerPkg": "1",
@@ -9837,6 +10934,7 @@
},
{
"BriefDescription": "VN0 No Credits; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP",
"PerPkg": "1",
@@ -9846,6 +10944,7 @@
},
{
"BriefDescription": "VN0 No Credits; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB",
"PerPkg": "1",
@@ -9855,6 +10954,7 @@
},
{
"BriefDescription": "VN1 Credit Used; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB",
"PerPkg": "1",
@@ -9864,6 +10964,7 @@
},
{
"BriefDescription": "VN1 Credit Used; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS",
"PerPkg": "1",
@@ -9873,6 +10974,7 @@
},
{
"BriefDescription": "VN1 Credit Used; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ",
"PerPkg": "1",
@@ -9882,6 +10984,7 @@
},
{
"BriefDescription": "VN1 Credit Used; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP",
"PerPkg": "1",
@@ -9891,6 +10994,7 @@
},
{
"BriefDescription": "VN1 Credit Used; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP",
"PerPkg": "1",
@@ -9900,6 +11004,7 @@
},
{
"BriefDescription": "VN1 Credit Used; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB",
"PerPkg": "1",
@@ -9909,6 +11014,7 @@
},
{
"BriefDescription": "VN1 No Credits; WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB",
"PerPkg": "1",
@@ -9918,6 +11024,7 @@
},
{
"BriefDescription": "VN1 No Credits; NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS",
"PerPkg": "1",
@@ -9927,6 +11034,7 @@
},
{
"BriefDescription": "VN1 No Credits; REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ",
"PerPkg": "1",
@@ -9936,6 +11044,7 @@
},
{
"BriefDescription": "VN1 No Credits; RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP",
"PerPkg": "1",
@@ -9945,6 +11054,7 @@
},
{
"BriefDescription": "VN1 No Credits; SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP",
"PerPkg": "1",
@@ -9954,6 +11064,7 @@
},
{
"BriefDescription": "VN1 No Credits; RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB",
"PerPkg": "1",
@@ -9963,6 +11074,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M2M_TxC_BL.DRS_UPI",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x40",
"EventName": "UNC_NoUnit_TxC_BL.DRS_UPI",
@@ -9972,6 +11084,7 @@
},
{
"BriefDescription": "Clocks of the Intel(R) Ultra Path Interconnect (UPI)",
+ "Counter": "0,1,2,3",
"EventCode": "0x1",
"EventName": "UNC_UPI_CLOCKTICKS",
"PerPkg": "1",
@@ -9980,6 +11093,7 @@
},
{
"BriefDescription": "Data Response packets that go direct to core",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C",
"PerPkg": "1",
@@ -9989,6 +11103,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_DIRECT_ATTEMPTS.D2U",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K",
@@ -9998,6 +11113,7 @@
},
{
"BriefDescription": "Data Response packets that go direct to Intel(R) UPI",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2U",
"PerPkg": "1",
@@ -10007,6 +11123,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
"PerPkg": "1",
@@ -10015,6 +11132,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
"PerPkg": "1",
@@ -10023,6 +11141,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
"PerPkg": "1",
@@ -10031,6 +11150,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
"PerPkg": "1",
@@ -10039,6 +11159,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
"PerPkg": "1",
@@ -10047,6 +11168,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
"PerPkg": "1",
@@ -10055,6 +11177,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
"PerPkg": "1",
@@ -10063,6 +11186,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
"PerPkg": "1",
@@ -10071,6 +11195,7 @@
},
{
"BriefDescription": "Cycles Intel(R) UPI is in L1 power mode (shutdown)",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_UPI_L1_POWER_CYCLES",
"PerPkg": "1",
@@ -10079,6 +11204,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
"PerPkg": "1",
@@ -10087,6 +11213,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
"PerPkg": "1",
@@ -10095,6 +11222,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
"PerPkg": "1",
@@ -10103,6 +11231,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
"PerPkg": "1",
@@ -10111,6 +11240,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
"PerPkg": "1",
@@ -10119,6 +11249,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
"PerPkg": "1",
@@ -10126,6 +11257,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
"PerPkg": "1",
@@ -10134,6 +11266,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
"PerPkg": "1",
@@ -10142,6 +11275,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
"PerPkg": "1",
@@ -10150,6 +11284,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
"PerPkg": "1",
@@ -10158,6 +11293,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
"PerPkg": "1",
@@ -10166,6 +11302,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
"PerPkg": "1",
@@ -10174,6 +11311,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
"PerPkg": "1",
@@ -10182,6 +11320,7 @@
},
{
"BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_UPI_PHY_INIT_CYCLES",
"PerPkg": "1",
@@ -10189,6 +11328,7 @@
},
{
"BriefDescription": "L1 Req Nack",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_UPI_POWER_L1_NACK",
"PerPkg": "1",
@@ -10197,6 +11337,7 @@
},
{
"BriefDescription": "L1 Req (same as L1 Ack).",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_UPI_POWER_L1_REQ",
"PerPkg": "1",
@@ -10205,6 +11346,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
"PerPkg": "1",
@@ -10213,6 +11355,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
"PerPkg": "1",
@@ -10221,6 +11364,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
"PerPkg": "1",
@@ -10229,6 +11373,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
"PerPkg": "1",
@@ -10237,6 +11382,7 @@
},
{
"BriefDescription": "Cycles the Rx of the Intel(R) UPI is in L0p power mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_UPI_RxL0P_POWER_CYCLES",
"PerPkg": "1",
@@ -10245,6 +11391,7 @@
},
{
"BriefDescription": "Cycles in L0. Receive side.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_UPI_RxL0_POWER_CYCLES",
"PerPkg": "1",
@@ -10253,6 +11400,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB",
"PerPkg": "1",
@@ -10262,6 +11410,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC",
"PerPkg": "1",
@@ -10271,6 +11420,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS",
"PerPkg": "1",
@@ -10280,6 +11430,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC",
"PerPkg": "1",
@@ -10289,6 +11440,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ",
"PerPkg": "1",
@@ -10298,6 +11450,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Request Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC",
"PerPkg": "1",
@@ -10307,6 +11460,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Response - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT",
"PerPkg": "1",
@@ -10315,6 +11469,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Response - Invalid",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI",
"PerPkg": "1",
@@ -10323,6 +11478,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Response - Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA",
"PerPkg": "1",
@@ -10332,6 +11488,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Response - Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC",
"PerPkg": "1",
@@ -10341,6 +11498,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Response - No Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA",
"PerPkg": "1",
@@ -10350,6 +11508,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Response - No Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC",
"PerPkg": "1",
@@ -10359,6 +11518,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP",
"PerPkg": "1",
@@ -10368,6 +11528,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Snoop Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC",
"PerPkg": "1",
@@ -10377,6 +11538,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Writeback",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB",
"PerPkg": "1",
@@ -10386,6 +11548,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port; Writeback",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC",
"PerPkg": "1",
@@ -10395,6 +11558,7 @@
},
{
"BriefDescription": "FLITs received which bypassed the Slot0 Receive Buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT0",
"PerPkg": "1",
@@ -10404,6 +11568,7 @@
},
{
"BriefDescription": "FLITs received which bypassed the Slot0 Receive Buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT1",
"PerPkg": "1",
@@ -10413,6 +11578,7 @@
},
{
"BriefDescription": "FLITs received which bypassed the Slot0 Receive Buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
"PerPkg": "1",
@@ -10422,6 +11588,7 @@
},
{
"BriefDescription": "VN0 Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0",
"PerPkg": "1",
@@ -10430,6 +11597,7 @@
},
{
"BriefDescription": "VN1 Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x3A",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1",
"PerPkg": "1",
@@ -10438,6 +11606,7 @@
},
{
"BriefDescription": "VNA Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA",
"PerPkg": "1",
@@ -10446,6 +11615,7 @@
},
{
"BriefDescription": "Valid data FLITs received from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.ALL_DATA",
"PerPkg": "1",
@@ -10455,6 +11625,7 @@
},
{
"BriefDescription": "Null FLITs received from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.ALL_NULL",
"PerPkg": "1",
@@ -10464,6 +11635,7 @@
},
{
"BriefDescription": "Valid Flits Received; Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.DATA",
"PerPkg": "1",
@@ -10473,6 +11645,7 @@
},
{
"BriefDescription": "Valid Flits Received; Idle",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.IDLE",
"PerPkg": "1",
@@ -10482,6 +11655,7 @@
},
{
"BriefDescription": "Valid Flits Received; LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.LLCRD",
"PerPkg": "1",
@@ -10491,6 +11665,7 @@
},
{
"BriefDescription": "Valid Flits Received; LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.LLCTRL",
"PerPkg": "1",
@@ -10500,6 +11675,7 @@
},
{
"BriefDescription": "Protocol header and credit FLITs received from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.NON_DATA",
"PerPkg": "1",
@@ -10509,6 +11685,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_FLITS.ALL_NULL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.NULL",
@@ -10518,6 +11695,7 @@
},
{
"BriefDescription": "Valid Flits Received; Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.PROTHDR",
"PerPkg": "1",
@@ -10527,6 +11705,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_FLITS.PROTHDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.PROT_HDR",
@@ -10536,6 +11715,7 @@
},
{
"BriefDescription": "Valid Flits Received; Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.SLOT0",
"PerPkg": "1",
@@ -10545,6 +11725,7 @@
},
{
"BriefDescription": "Valid Flits Received; Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.SLOT1",
"PerPkg": "1",
@@ -10554,6 +11735,7 @@
},
{
"BriefDescription": "Valid Flits Received; Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_UPI_RxL_FLITS.SLOT2",
"PerPkg": "1",
@@ -10563,6 +11745,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_BASIC_HDR_MATCH.NCB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_HDR_MATCH.NCB",
@@ -10572,6 +11755,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_BASIC_HDR_MATCH.NCS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_HDR_MATCH.NCS",
@@ -10581,6 +11765,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_BASIC_HDR_MATCH.REQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_HDR_MATCH.REQ",
@@ -10590,6 +11775,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_HDR_MATCH.RSP",
@@ -10599,6 +11785,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_BASIC_HDR_MATCH.SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_HDR_MATCH.SNP",
@@ -10608,6 +11795,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_RxL_BASIC_HDR_MATCH.WB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x5",
"EventName": "UNC_UPI_RxL_HDR_MATCH.WB",
@@ -10617,6 +11805,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations; Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT0",
"PerPkg": "1",
@@ -10626,6 +11815,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations; Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT1",
"PerPkg": "1",
@@ -10635,6 +11825,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations; Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
"PerPkg": "1",
@@ -10644,6 +11835,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets; Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0",
"PerPkg": "1",
@@ -10653,6 +11845,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets; Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1",
"PerPkg": "1",
@@ -10662,6 +11855,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets; Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
"PerPkg": "1",
@@ -10671,6 +11865,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
"PerPkg": "1",
@@ -10679,6 +11874,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
"PerPkg": "1",
@@ -10687,6 +11883,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
"PerPkg": "1",
@@ -10695,6 +11892,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
"PerPkg": "1",
@@ -10703,6 +11901,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
"PerPkg": "1",
@@ -10711,6 +11910,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
"PerPkg": "1",
@@ -10719,6 +11919,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
"PerPkg": "1",
@@ -10727,6 +11928,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
"PerPkg": "1",
@@ -10735,6 +11937,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
"PerPkg": "1",
@@ -10743,6 +11946,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
"PerPkg": "1",
@@ -10751,6 +11955,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
"PerPkg": "1",
@@ -10759,6 +11964,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
"PerPkg": "1",
@@ -10767,6 +11973,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
"PerPkg": "1",
@@ -10775,6 +11982,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
"PerPkg": "1",
@@ -10783,6 +11991,7 @@
},
{
"BriefDescription": "Cycles in which the Tx of the Intel(R) Ultra Path Interconnect (UPI) is in L0p power mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES",
"PerPkg": "1",
@@ -10791,6 +12000,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
"PerPkg": "1",
@@ -10798,6 +12008,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
"PerPkg": "1",
@@ -10805,6 +12016,7 @@
},
{
"BriefDescription": "Cycles in L0. Transmit side.",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_UPI_TxL0_POWER_CYCLES",
"PerPkg": "1",
@@ -10813,6 +12025,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB",
"PerPkg": "1",
@@ -10822,6 +12035,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC",
"PerPkg": "1",
@@ -10831,6 +12045,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS",
"PerPkg": "1",
@@ -10840,6 +12055,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC",
"PerPkg": "1",
@@ -10849,6 +12065,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ",
"PerPkg": "1",
@@ -10858,6 +12075,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Request Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC",
"PerPkg": "1",
@@ -10867,6 +12085,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Response - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT",
"PerPkg": "1",
@@ -10875,6 +12094,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Response - Invalid",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI",
"PerPkg": "1",
@@ -10883,6 +12103,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Response - Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA",
"PerPkg": "1",
@@ -10892,6 +12113,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Response - Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC",
"PerPkg": "1",
@@ -10901,6 +12123,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Response - No Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA",
"PerPkg": "1",
@@ -10910,6 +12133,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Response - No Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC",
"PerPkg": "1",
@@ -10919,6 +12143,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP",
"PerPkg": "1",
@@ -10928,6 +12153,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Snoop Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC",
"PerPkg": "1",
@@ -10937,6 +12163,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Writeback",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB",
"PerPkg": "1",
@@ -10946,6 +12173,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port; Writeback",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC",
"PerPkg": "1",
@@ -10955,6 +12183,7 @@
},
{
"BriefDescription": "FLITs that bypassed the TxL Buffer",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_UPI_TxL_BYPASSED",
"PerPkg": "1",
@@ -10963,6 +12192,7 @@
},
{
"BriefDescription": "Valid data FLITs transmitted via any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.ALL_DATA",
"PerPkg": "1",
@@ -10972,6 +12202,7 @@
},
{
"BriefDescription": "Null FLITs transmitted from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.ALL_NULL",
"PerPkg": "1",
@@ -10981,6 +12212,7 @@
},
{
"BriefDescription": "Valid Flits Sent; Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.DATA",
"PerPkg": "1",
@@ -10990,6 +12222,7 @@
},
{
"BriefDescription": "Idle FLITs transmitted",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.IDLE",
"PerPkg": "1",
@@ -10999,6 +12232,7 @@
},
{
"BriefDescription": "Valid Flits Sent; LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.LLCRD",
"PerPkg": "1",
@@ -11008,6 +12242,7 @@
},
{
"BriefDescription": "Valid Flits Sent; LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.LLCTRL",
"PerPkg": "1",
@@ -11017,6 +12252,7 @@
},
{
"BriefDescription": "Protocol header and credit FLITs transmitted across any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.NON_DATA",
"PerPkg": "1",
@@ -11026,6 +12262,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_FLITS.ALL_NULL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.NULL",
@@ -11035,6 +12272,7 @@
},
{
"BriefDescription": "Valid Flits Sent; Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.PROTHDR",
"PerPkg": "1",
@@ -11044,6 +12282,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_FLITS.PROTHDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.PROT_HDR",
@@ -11053,6 +12292,7 @@
},
{
"BriefDescription": "Valid Flits Sent; Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.SLOT0",
"PerPkg": "1",
@@ -11062,6 +12302,7 @@
},
{
"BriefDescription": "Valid Flits Sent; Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.SLOT1",
"PerPkg": "1",
@@ -11071,6 +12312,7 @@
},
{
"BriefDescription": "Valid Flits Sent; Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_UPI_TxL_FLITS.SLOT2",
"PerPkg": "1",
@@ -11080,6 +12322,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.DATA_HDR",
@@ -11088,6 +12331,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.DUAL_SLOT_HDR",
@@ -11096,6 +12340,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.LOC",
@@ -11104,6 +12349,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.NCB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.NCB",
@@ -11113,6 +12359,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.NCS",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.NCS",
@@ -11122,6 +12369,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.NON_DATA_HDR",
@@ -11130,6 +12378,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.REM",
@@ -11138,6 +12387,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.REQ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.REQ",
@@ -11147,6 +12397,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_DATA",
@@ -11156,6 +12407,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.RSP_NODATA",
@@ -11165,6 +12417,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.SGL_SLOT_HDR",
@@ -11173,6 +12426,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.SNP",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.SNP",
@@ -11182,6 +12436,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_UPI_TxL_BASIC_HDR_MATCH.WB",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x4",
"EventName": "UNC_UPI_TxL_HDR_MATCH.WB",
@@ -11191,6 +12446,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_UPI_TxL_INSERTS",
"PerPkg": "1",
@@ -11199,6 +12455,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_UPI_TxL_OCCUPANCY",
"PerPkg": "1",
@@ -11207,6 +12464,7 @@
},
{
"BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
"PerPkg": "1",
@@ -11214,6 +12472,7 @@
},
{
"BriefDescription": "VNA Credits Pending Return - Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY",
"PerPkg": "1",
@@ -11222,6 +12481,7 @@
},
{
"BriefDescription": "Clockticks in the UBOX using a dedicated 48-bit Fixed Counter",
+ "Counter": "FIXED",
"EventCode": "0xff",
"EventName": "UNC_U_CLOCKTICKS",
"PerPkg": "1",
@@ -11229,6 +12489,7 @@
},
{
"BriefDescription": "Message Received",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD",
"PerPkg": "1",
@@ -11238,6 +12499,7 @@
},
{
"BriefDescription": "Message Received",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.INT_PRIO",
"PerPkg": "1",
@@ -11247,6 +12509,7 @@
},
{
"BriefDescription": "Message Received; IPI",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.IPI_RCVD",
"PerPkg": "1",
@@ -11256,6 +12519,7 @@
},
{
"BriefDescription": "Message Received; MSI",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.MSI_RCVD",
"PerPkg": "1",
@@ -11265,6 +12529,7 @@
},
{
"BriefDescription": "Message Received; VLW",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.VLW_RCVD",
"PerPkg": "1",
@@ -11274,6 +12539,7 @@
},
{
"BriefDescription": "IDI Lock/SplitLock Cycles",
+ "Counter": "0,1",
"EventCode": "0x44",
"EventName": "UNC_U_LOCK_CYCLES",
"PerPkg": "1",
@@ -11282,6 +12548,7 @@
},
{
"BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK",
+ "Counter": "0,1",
"EventCode": "0x45",
"EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK",
"PerPkg": "1",
@@ -11291,6 +12558,7 @@
},
{
"BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY",
+ "Counter": "0,1",
"EventCode": "0x4C",
"EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY",
"PerPkg": "1",
@@ -11299,6 +12567,7 @@
},
{
"BriefDescription": "UNC_U_RACU_DRNG.RDRAND",
+ "Counter": "0,1",
"EventCode": "0x4C",
"EventName": "UNC_U_RACU_DRNG.RDRAND",
"PerPkg": "1",
@@ -11307,6 +12576,7 @@
},
{
"BriefDescription": "UNC_U_RACU_DRNG.RDSEED",
+ "Counter": "0,1",
"EventCode": "0x4C",
"EventName": "UNC_U_RACU_DRNG.RDSEED",
"PerPkg": "1",
@@ -11315,6 +12585,7 @@
},
{
"BriefDescription": "RACU Request",
+ "Counter": "0,1",
"EventCode": "0x46",
"EventName": "UNC_U_RACU_REQUESTS",
"PerPkg": "1",
@@ -11323,6 +12594,7 @@
},
{
"BriefDescription": "UPI interconnect send bandwidth for payload. Derived from unc_upi_txl_flits.all_data",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UPI_DATA_BANDWIDTH_TX",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json
index 743c91f3d2f0..9aac4c582137 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-io.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.mem_read.part0",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "LLC_MISSES.PCIE_READ",
"FCMask": "0x07",
@@ -16,6 +17,7 @@
},
{
"BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.mem_write.part0",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "LLC_MISSES.PCIE_WRITE",
"FCMask": "0x07",
@@ -31,6 +33,7 @@
},
{
"BriefDescription": "Clockticks of the IIO Traffic Controller",
+ "Counter": "0,1,2,3",
"EventCode": "0x1",
"EventName": "UNC_IIO_CLOCKTICKS",
"PerPkg": "1",
@@ -39,6 +42,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",
"FCMask": "0x4",
@@ -49,6 +53,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",
"FCMask": "0x4",
@@ -59,6 +64,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",
"FCMask": "0x4",
@@ -69,6 +75,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2",
"FCMask": "0x4",
@@ -79,6 +86,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3",
"FCMask": "0x4",
@@ -89,6 +97,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts; Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT0",
"FCMask": "0x7",
@@ -99,6 +108,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts; Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT1",
"FCMask": "0x7",
@@ -109,6 +119,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts; Port 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT2",
"FCMask": "0x7",
@@ -119,6 +130,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts; Port 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.PORT3",
"FCMask": "0x7",
@@ -129,6 +141,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 0-3",
+ "Counter": "2,3",
"EventCode": "0xD5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
"FCMask": "0x04",
@@ -138,6 +151,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 0",
+ "Counter": "2,3",
"EventCode": "0xD5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0",
"FCMask": "0x04",
@@ -147,6 +161,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 1",
+ "Counter": "2,3",
"EventCode": "0xD5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1",
"FCMask": "0x04",
@@ -156,6 +171,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 2",
+ "Counter": "2,3",
"EventCode": "0xD5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2",
"FCMask": "0x04",
@@ -165,6 +181,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 3",
+ "Counter": "2,3",
"EventCode": "0xD5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3",
"FCMask": "0x04",
@@ -174,6 +191,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0",
"FCMask": "0x07",
@@ -185,6 +203,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1",
"FCMask": "0x07",
@@ -196,6 +215,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2",
"FCMask": "0x07",
@@ -207,6 +227,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3",
"FCMask": "0x07",
@@ -218,6 +239,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0",
"FCMask": "0x07",
@@ -229,6 +251,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1",
"FCMask": "0x07",
@@ -240,6 +263,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0",
"FCMask": "0x07",
@@ -251,6 +275,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1",
"FCMask": "0x07",
@@ -262,6 +287,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2",
"FCMask": "0x07",
@@ -273,6 +299,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3",
"FCMask": "0x07",
@@ -284,6 +311,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0",
"FCMask": "0x07",
@@ -295,6 +323,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1",
"FCMask": "0x07",
@@ -306,6 +335,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0",
"FCMask": "0x07",
@@ -317,6 +347,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1",
"FCMask": "0x07",
@@ -328,6 +359,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2",
"FCMask": "0x07",
@@ -339,6 +371,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3",
"FCMask": "0x07",
@@ -350,6 +383,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0",
"FCMask": "0x07",
@@ -361,6 +395,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1",
"FCMask": "0x07",
@@ -372,6 +407,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0",
"FCMask": "0x07",
@@ -383,6 +419,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1",
"FCMask": "0x07",
@@ -394,6 +431,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2",
"FCMask": "0x07",
@@ -405,6 +443,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3",
"FCMask": "0x07",
@@ -416,6 +455,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0",
"FCMask": "0x07",
@@ -427,6 +467,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1",
"FCMask": "0x07",
@@ -438,6 +479,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -449,6 +491,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part1",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -460,6 +503,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part2",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -471,6 +515,7 @@
},
{
"BriefDescription": "Read request for 4 bytes made by the CPU to IIO Part3",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -482,6 +527,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0",
"FCMask": "0x07",
@@ -493,6 +539,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core reading from Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1",
"FCMask": "0x07",
@@ -504,6 +551,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part0 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -515,6 +563,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part1 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -526,6 +575,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part2 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -537,6 +587,7 @@
},
{
"BriefDescription": "Write request of 4 bytes made to IIO Part3 by the CPU",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -548,6 +599,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0",
"FCMask": "0x07",
@@ -559,6 +611,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1",
"FCMask": "0x07",
@@ -570,6 +623,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -581,6 +635,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part1",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -592,6 +647,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part2",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -603,6 +659,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part3",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -614,6 +671,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0",
"FCMask": "0x07",
@@ -625,6 +683,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1",
"FCMask": "0x07",
@@ -636,6 +695,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -647,6 +707,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part1 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -658,6 +719,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part2 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -669,6 +731,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made to IIO Part3 by a different IIO unit",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -680,6 +743,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0",
"FCMask": "0x07",
@@ -691,6 +755,7 @@
},
{
"BriefDescription": "Data requested by the CPU; Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1",
"FCMask": "0x07",
@@ -702,6 +767,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0",
"FCMask": "0x07",
@@ -713,6 +779,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1",
"FCMask": "0x07",
@@ -724,6 +791,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2",
"FCMask": "0x07",
@@ -735,6 +803,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3",
"FCMask": "0x07",
@@ -746,6 +815,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0",
"FCMask": "0x07",
@@ -757,6 +827,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1",
"FCMask": "0x07",
@@ -768,6 +839,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0",
"FCMask": "0x07",
@@ -779,6 +851,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1",
"FCMask": "0x07",
@@ -790,6 +863,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2",
"FCMask": "0x07",
@@ -801,6 +875,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3",
"FCMask": "0x07",
@@ -812,6 +887,7 @@
},
{
"BriefDescription": "PCI Express bandwidth reading at IIO, part 0",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -823,6 +899,7 @@
},
{
"BriefDescription": "PCI Express bandwidth reading at IIO, part 1",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -834,6 +911,7 @@
},
{
"BriefDescription": "PCI Express bandwidth reading at IIO, part 2",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -845,6 +923,7 @@
},
{
"BriefDescription": "PCI Express bandwidth reading at IIO, part 3",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -856,6 +935,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0",
"FCMask": "0x07",
@@ -867,6 +947,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1",
"FCMask": "0x07",
@@ -878,6 +959,7 @@
},
{
"BriefDescription": "PCI Express bandwidth writing at IIO, part 0",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -889,6 +971,7 @@
},
{
"BriefDescription": "PCI Express bandwidth writing at IIO, part 1",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -900,6 +983,7 @@
},
{
"BriefDescription": "PCI Express bandwidth writing at IIO, part 2",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -911,6 +995,7 @@
},
{
"BriefDescription": "PCI Express bandwidth writing at IIO, part 3",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -922,6 +1007,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0",
"FCMask": "0x07",
@@ -933,6 +1019,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1",
"FCMask": "0x07",
@@ -944,6 +1031,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0",
"FCMask": "0x07",
@@ -955,6 +1043,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1",
"FCMask": "0x07",
@@ -966,6 +1055,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2",
"FCMask": "0x07",
@@ -977,6 +1067,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3",
"FCMask": "0x07",
@@ -988,6 +1079,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0",
"FCMask": "0x07",
@@ -999,6 +1091,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1",
"FCMask": "0x07",
@@ -1010,6 +1103,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -1021,6 +1115,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part1 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -1032,6 +1127,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part2 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -1043,6 +1139,7 @@
},
{
"BriefDescription": "Peer to peer read request for 4 bytes made by IIO Part3 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -1054,6 +1151,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0",
"FCMask": "0x07",
@@ -1065,6 +1163,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1",
"FCMask": "0x07",
@@ -1076,6 +1175,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -1087,6 +1187,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -1098,6 +1199,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -1109,6 +1211,7 @@
},
{
"BriefDescription": "Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -1120,6 +1223,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0",
"FCMask": "0x07",
@@ -1131,6 +1235,7 @@
},
{
"BriefDescription": "Data requested of the CPU; Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1",
"FCMask": "0x07",
@@ -1142,6 +1247,7 @@
},
{
"BriefDescription": "Num Link Correctable Errors",
+ "Counter": "0,1,2,3",
"EventCode": "0xF",
"EventName": "UNC_IIO_LINK_NUM_CORR_ERR",
"PerPkg": "1",
@@ -1149,6 +1255,7 @@
},
{
"BriefDescription": "Num Link Retries",
+ "Counter": "0,1,2,3",
"EventCode": "0xE",
"EventName": "UNC_IIO_LINK_NUM_RETRIES",
"PerPkg": "1",
@@ -1156,6 +1263,7 @@
},
{
"BriefDescription": "Number packets that passed the Mask/Match Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_IIO_MASK_MATCH",
"PerPkg": "1",
@@ -1163,6 +1271,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0",
"PerPkg": "1",
@@ -1172,6 +1281,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus and PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1",
"PerPkg": "1",
@@ -1181,6 +1291,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus; Non-PCIE bus and !(PCIE bus)",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1190,6 +1301,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus; PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS1",
"PerPkg": "1",
@@ -1199,6 +1311,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus; !(Non-PCIE bus) and PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1",
"PerPkg": "1",
@@ -1208,6 +1321,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1217,6 +1331,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0",
"PerPkg": "1",
@@ -1226,6 +1341,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1",
"PerPkg": "1",
@@ -1235,6 +1351,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus; Non-PCIE bus and !(PCIE bus)",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1244,6 +1361,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus; PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS1",
"PerPkg": "1",
@@ -1253,6 +1371,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) and PCIE bus",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1",
"PerPkg": "1",
@@ -1262,6 +1381,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus; !(Non-PCIE bus) and !(PCIE bus)",
+ "Counter": "0,1,2,3",
"EventCode": "0x3",
"EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -1271,12 +1391,14 @@
},
{
"BriefDescription": "Counting disabled",
+ "Counter": "0,1,2,3",
"EventName": "UNC_IIO_NOTHING",
"PerPkg": "1",
"Unit": "IIO"
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART0",
@@ -1288,6 +1410,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART1",
@@ -1299,6 +1422,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART2",
@@ -1310,6 +1434,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.PART3",
@@ -1321,6 +1446,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD0",
@@ -1332,6 +1458,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.VTD1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMIC.VTD1",
@@ -1343,6 +1470,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART0",
@@ -1354,6 +1482,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART1",
@@ -1365,6 +1494,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART2",
@@ -1376,6 +1506,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.ATOMICCMP.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.ATOMICCMP.PART3",
@@ -1387,6 +1518,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0",
@@ -1398,6 +1530,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1",
@@ -1409,6 +1542,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2",
@@ -1420,6 +1554,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3",
@@ -1431,6 +1566,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD0",
@@ -1442,6 +1578,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.VTD1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.VTD1",
@@ -1453,6 +1590,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0",
@@ -1464,6 +1602,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1",
@@ -1475,6 +1614,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2",
@@ -1486,6 +1626,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3",
@@ -1497,6 +1638,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD0",
@@ -1508,6 +1650,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.VTD1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.VTD1",
@@ -1519,6 +1662,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART0",
@@ -1530,6 +1674,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART1",
@@ -1541,6 +1686,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART2",
@@ -1552,6 +1698,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.PART3",
@@ -1563,6 +1710,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD0",
@@ -1574,6 +1722,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MSG.VTD1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.MSG.VTD1",
@@ -1585,6 +1734,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART0",
@@ -1596,6 +1746,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART1",
@@ -1607,6 +1758,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART2",
@@ -1618,6 +1770,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.PART3",
@@ -1629,6 +1782,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD0",
@@ -1640,6 +1794,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.VTD1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_READ.VTD1",
@@ -1651,6 +1806,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART0",
@@ -1662,6 +1818,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART1",
@@ -1673,6 +1830,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART2",
@@ -1684,6 +1842,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.PART3",
@@ -1695,6 +1854,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD0",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD0",
@@ -1706,6 +1866,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.VTD1",
+ "Counter": "0,1",
"Deprecated": "1",
"EventCode": "0x83",
"EventName": "UNC_IIO_PAYLOAD_BYTES_IN.PEER_WRITE.VTD1",
@@ -1717,6 +1878,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART0",
@@ -1728,6 +1890,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART1",
@@ -1739,6 +1902,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART2",
@@ -1750,6 +1914,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.PART3",
@@ -1761,6 +1926,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD0",
@@ -1772,6 +1938,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_READ.VTD1",
@@ -1783,6 +1950,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART0",
@@ -1794,6 +1962,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART1",
@@ -1805,6 +1974,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART2",
@@ -1816,6 +1986,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.PART3",
@@ -1827,6 +1998,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD0",
@@ -1838,6 +2010,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.CFG_WRITE.VTD1",
@@ -1849,6 +2022,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART0",
@@ -1860,6 +2034,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART1",
@@ -1871,6 +2046,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART2",
@@ -1882,6 +2058,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.PART3",
@@ -1893,6 +2070,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD0",
@@ -1904,6 +2082,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_READ.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_READ.VTD1",
@@ -1915,6 +2094,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART0",
@@ -1926,6 +2106,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART1",
@@ -1937,6 +2118,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART2",
@@ -1948,6 +2130,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.PART3",
@@ -1959,6 +2142,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD0",
@@ -1970,6 +2154,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.IO_WRITE.VTD1",
@@ -1981,6 +2166,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART0",
@@ -1992,6 +2178,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART1",
@@ -2003,6 +2190,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART2",
@@ -2014,6 +2202,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.PART3",
@@ -2025,6 +2214,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD0",
@@ -2036,6 +2226,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_READ.VTD1",
@@ -2047,6 +2238,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART0",
@@ -2058,6 +2250,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART1",
@@ -2069,6 +2262,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART2",
@@ -2080,6 +2274,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.PART3",
@@ -2091,6 +2286,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD0",
@@ -2102,6 +2298,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.MEM_WRITE.VTD1",
@@ -2113,6 +2310,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART0",
@@ -2124,6 +2322,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART1",
@@ -2135,6 +2334,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART2",
@@ -2146,6 +2346,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.PART3",
@@ -2157,6 +2358,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD0",
@@ -2168,6 +2370,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_READ.VTD1",
@@ -2179,6 +2382,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART0",
@@ -2190,6 +2394,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART1",
@@ -2201,6 +2406,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART2",
@@ -2212,6 +2418,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.PART3",
@@ -2223,6 +2430,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD0",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD0",
@@ -2234,6 +2442,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.VTD1",
+ "Counter": "2,3",
"Deprecated": "1",
"EventCode": "0xC0",
"EventName": "UNC_IIO_PAYLOAD_BYTES_OUT.PEER_WRITE.VTD1",
@@ -2245,6 +2454,7 @@
},
{
"BriefDescription": "Symbol Times on Link",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_IIO_SYMBOL_TIMES",
"PerPkg": "1",
@@ -2253,6 +2463,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMIC.PART0",
@@ -2264,6 +2475,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMIC.PART1",
@@ -2275,6 +2487,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMIC.PART2",
@@ -2286,6 +2499,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMIC.PART3",
@@ -2297,6 +2511,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD0",
@@ -2308,6 +2523,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMIC.VTD1",
@@ -2319,6 +2535,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART0",
@@ -2330,6 +2547,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART1",
@@ -2341,6 +2559,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART2",
@@ -2352,6 +2571,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.ATOMICCMP.PART3",
@@ -2363,6 +2583,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_READ.PART0",
@@ -2374,6 +2595,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_READ.PART1",
@@ -2385,6 +2607,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_READ.PART2",
@@ -2396,6 +2619,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_READ.PART3",
@@ -2407,6 +2631,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD0",
@@ -2418,6 +2643,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_READ.VTD1",
@@ -2429,6 +2655,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART0",
@@ -2440,6 +2667,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART1",
@@ -2451,6 +2679,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART2",
@@ -2462,6 +2691,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_WRITE.PART3",
@@ -2473,6 +2703,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD0",
@@ -2484,6 +2715,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MEM_WRITE.VTD1",
@@ -2495,6 +2727,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MSG.PART0",
@@ -2506,6 +2739,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MSG.PART1",
@@ -2517,6 +2751,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MSG.PART2",
@@ -2528,6 +2763,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MSG.PART3",
@@ -2539,6 +2775,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MSG.VTD0",
@@ -2550,6 +2787,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.MSG.VTD1",
@@ -2561,6 +2799,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_READ.PART0",
@@ -2572,6 +2811,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_READ.PART1",
@@ -2583,6 +2823,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_READ.PART2",
@@ -2594,6 +2835,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_READ.PART3",
@@ -2605,6 +2847,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD0",
@@ -2616,6 +2859,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_READ.VTD1",
@@ -2627,6 +2871,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART0",
@@ -2638,6 +2883,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART1",
@@ -2649,6 +2895,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART2",
@@ -2660,6 +2907,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_WRITE.PART3",
@@ -2671,6 +2919,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD0",
@@ -2682,6 +2931,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_IN.PEER_WRITE.VTD1",
@@ -2693,6 +2943,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART0",
@@ -2704,6 +2955,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART1",
@@ -2715,6 +2967,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART2",
@@ -2726,6 +2979,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_READ.PART3",
@@ -2737,6 +2991,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD0",
@@ -2748,6 +3003,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_READ.VTD1",
@@ -2759,6 +3015,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART0",
@@ -2770,6 +3027,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART1",
@@ -2781,6 +3039,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART2",
@@ -2792,6 +3051,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.PART3",
@@ -2803,6 +3063,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.CFG_WRITE.VTD0",
@@ -2814,6 +3075,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_READ.PART0",
@@ -2825,6 +3087,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_READ.PART1",
@@ -2836,6 +3099,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_READ.PART2",
@@ -2847,6 +3111,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_READ.PART3",
@@ -2858,6 +3123,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD0",
@@ -2869,6 +3135,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_READ.VTD1",
@@ -2880,6 +3147,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART0",
@@ -2891,6 +3159,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART1",
@@ -2902,6 +3171,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART2",
@@ -2913,6 +3183,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_WRITE.PART3",
@@ -2924,6 +3195,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD0",
@@ -2935,6 +3207,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.IO_WRITE.VTD1",
@@ -2946,6 +3219,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART0",
@@ -2957,6 +3231,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART1",
@@ -2968,6 +3243,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART2",
@@ -2979,6 +3255,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_READ.PART3",
@@ -2990,6 +3267,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD0",
@@ -3001,6 +3279,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_READ.VTD1",
@@ -3012,6 +3291,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART0",
@@ -3023,6 +3303,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART1",
@@ -3034,6 +3315,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART2",
@@ -3045,6 +3327,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.PART3",
@@ -3056,6 +3339,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD0",
@@ -3067,6 +3351,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.MEM_WRITE.VTD1",
@@ -3078,6 +3363,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART0",
@@ -3089,6 +3375,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART1",
@@ -3100,6 +3387,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART2",
@@ -3111,6 +3399,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_READ.PART3",
@@ -3122,6 +3411,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD0",
@@ -3133,6 +3423,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_READ.VTD1",
@@ -3144,6 +3435,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART0",
@@ -3155,6 +3447,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART1",
@@ -3166,6 +3459,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART2",
@@ -3177,6 +3471,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.PART3",
@@ -3188,6 +3483,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD0",
@@ -3199,6 +3495,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_OUT.PEER_WRITE.VTD1",
@@ -3210,6 +3507,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0",
"FCMask": "0x07",
@@ -3221,6 +3519,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1",
"FCMask": "0x07",
@@ -3232,6 +3531,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2",
"FCMask": "0x07",
@@ -3243,6 +3543,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3",
"FCMask": "0x07",
@@ -3254,6 +3555,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD0",
"FCMask": "0x07",
@@ -3265,6 +3567,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.VTD1",
"FCMask": "0x07",
@@ -3276,6 +3579,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0",
"FCMask": "0x07",
@@ -3287,6 +3591,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1",
"FCMask": "0x07",
@@ -3298,6 +3603,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2",
"FCMask": "0x07",
@@ -3309,6 +3615,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3",
"FCMask": "0x07",
@@ -3320,6 +3627,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD0",
"FCMask": "0x07",
@@ -3331,6 +3639,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.VTD1",
"FCMask": "0x07",
@@ -3342,6 +3651,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0",
"FCMask": "0x07",
@@ -3353,6 +3663,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1",
"FCMask": "0x07",
@@ -3364,6 +3675,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2",
"FCMask": "0x07",
@@ -3375,6 +3687,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3",
"FCMask": "0x07",
@@ -3386,6 +3699,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD0",
"FCMask": "0x07",
@@ -3397,6 +3711,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.VTD1",
"FCMask": "0x07",
@@ -3408,6 +3723,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0",
"FCMask": "0x07",
@@ -3419,6 +3735,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1",
"FCMask": "0x07",
@@ -3430,6 +3747,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2",
"FCMask": "0x07",
@@ -3441,6 +3759,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3",
"FCMask": "0x07",
@@ -3452,6 +3771,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD0",
"FCMask": "0x07",
@@ -3463,6 +3783,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.VTD1",
"FCMask": "0x07",
@@ -3474,6 +3795,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part0",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -3485,6 +3807,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part1",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -3496,6 +3819,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part2",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -3507,6 +3831,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by the CPU to IIO Part3",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -3518,6 +3843,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD0",
"FCMask": "0x07",
@@ -3529,6 +3855,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.VTD1",
"FCMask": "0x07",
@@ -3540,6 +3867,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -3551,6 +3879,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -3562,6 +3891,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -3573,6 +3903,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -3584,6 +3915,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD0",
"FCMask": "0x07",
@@ -3595,6 +3927,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.VTD1",
"FCMask": "0x07",
@@ -3606,6 +3939,7 @@
},
{
"BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part0",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -3617,6 +3951,7 @@
},
{
"BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part1",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -3628,6 +3963,7 @@
},
{
"BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part2",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -3639,6 +3975,7 @@
},
{
"BriefDescription": "Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part3",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -3650,6 +3987,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD0",
"FCMask": "0x07",
@@ -3661,6 +3999,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.VTD1",
"FCMask": "0x07",
@@ -3672,6 +4011,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part0 by a different IIO unit",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -3683,6 +4023,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part1 by a different IIO unit",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -3694,6 +4035,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part2 by a different IIO unit",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -3705,6 +4047,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made to IIO Part3 by a different IIO unit",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -3716,6 +4059,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD0",
"FCMask": "0x07",
@@ -3727,6 +4071,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU; Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.VTD1",
"FCMask": "0x07",
@@ -3738,6 +4083,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0",
"FCMask": "0x07",
@@ -3749,6 +4095,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1",
"FCMask": "0x07",
@@ -3760,6 +4107,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2",
"FCMask": "0x07",
@@ -3771,6 +4119,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3",
"FCMask": "0x07",
@@ -3782,6 +4131,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD0",
"FCMask": "0x07",
@@ -3793,6 +4143,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.VTD1",
"FCMask": "0x07",
@@ -3804,6 +4155,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART0",
"FCMask": "0x07",
@@ -3815,6 +4167,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART1",
"FCMask": "0x07",
@@ -3826,6 +4179,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART2",
"FCMask": "0x07",
@@ -3837,6 +4191,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Completion of atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMICCMP.PART3",
"FCMask": "0x07",
@@ -3848,6 +4203,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part0 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -3859,6 +4215,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part1 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -3870,6 +4227,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part2 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -3881,6 +4239,7 @@
},
{
"BriefDescription": "Read request for up to a 64 byte transaction is made by IIO Part3 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -3892,6 +4251,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD0",
"FCMask": "0x07",
@@ -3903,6 +4263,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.VTD1",
"FCMask": "0x07",
@@ -3914,6 +4275,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part0 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -3925,6 +4287,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part1 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -3936,6 +4299,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part2 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -3947,6 +4311,7 @@
},
{
"BriefDescription": "Write request of up to a 64 byte transaction is made by IIO Part3 to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -3958,6 +4323,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD0",
"FCMask": "0x07",
@@ -3969,6 +4335,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.VTD1",
"FCMask": "0x07",
@@ -3980,6 +4347,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0",
"FCMask": "0x07",
@@ -3991,6 +4359,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1",
"FCMask": "0x07",
@@ -4002,6 +4371,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2",
"FCMask": "0x07",
@@ -4013,6 +4383,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3",
"FCMask": "0x07",
@@ -4024,6 +4395,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD0",
"FCMask": "0x07",
@@ -4035,6 +4407,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.VTD1",
"FCMask": "0x07",
@@ -4046,6 +4419,7 @@
},
{
"BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part0 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -4057,6 +4431,7 @@
},
{
"BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part1 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -4068,6 +4443,7 @@
},
{
"BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part2 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -4079,6 +4455,7 @@
},
{
"BriefDescription": "Peer to peer read request of up to a 64 byte transaction is made by IIO Part3 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -4090,6 +4467,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD0",
"FCMask": "0x07",
@@ -4101,6 +4479,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.VTD1",
"FCMask": "0x07",
@@ -4112,6 +4491,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part0 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -4123,6 +4503,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part1 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -4134,6 +4515,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part2 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -4145,6 +4527,7 @@
},
{
"BriefDescription": "Peer to peer write request of up to a 64 byte transaction is made by IIO Part3 to an IIO target",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -4156,6 +4539,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD0",
"FCMask": "0x07",
@@ -4167,6 +4551,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU; Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.VTD1",
"FCMask": "0x07",
@@ -4178,6 +4563,7 @@
},
{
"BriefDescription": "VTd Access; context cache miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.CTXT_MISS",
"PerPkg": "1",
@@ -4186,6 +4572,7 @@
},
{
"BriefDescription": "VTd Access; L1 miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.L1_MISS",
"PerPkg": "1",
@@ -4194,6 +4581,7 @@
},
{
"BriefDescription": "VTd Access; L2 miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.L2_MISS",
"PerPkg": "1",
@@ -4202,6 +4590,7 @@
},
{
"BriefDescription": "VTd Access; L3 miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.L3_MISS",
"PerPkg": "1",
@@ -4210,6 +4599,7 @@
},
{
"BriefDescription": "VTd Access; Vtd hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.L4_PAGE_HIT",
"PerPkg": "1",
@@ -4218,6 +4608,7 @@
},
{
"BriefDescription": "VTd Access; TLB miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.TLB1_MISS",
"PerPkg": "1",
@@ -4226,6 +4617,7 @@
},
{
"BriefDescription": "VTd Access; TLB is full",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.TLB_FULL",
"PerPkg": "1",
@@ -4234,6 +4626,7 @@
},
{
"BriefDescription": "VTd Access; TLB miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_VTD_ACCESS.TLB_MISS",
"PerPkg": "1",
@@ -4242,6 +4635,7 @@
},
{
"BriefDescription": "VTd Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_VTD_OCCUPANCY",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json
index d82d2cca6f0a..d1ffcf1ffac0 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "LLC_MISSES.MEM_READ",
"PerPkg": "1",
@@ -11,6 +12,7 @@
},
{
"BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "LLC_MISSES.MEM_WRITE",
"PerPkg": "1",
@@ -21,6 +23,7 @@
},
{
"BriefDescription": "DRAM Activate Count; Activate due to Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x1",
"EventName": "UNC_M_ACT_COUNT.BYP",
"PerPkg": "1",
@@ -30,6 +33,7 @@
},
{
"BriefDescription": "DRAM Activate Count; Activate due to Read",
+ "Counter": "0,1,2,3",
"EventCode": "0x1",
"EventName": "UNC_M_ACT_COUNT.RD",
"PerPkg": "1",
@@ -39,6 +43,7 @@
},
{
"BriefDescription": "DRAM Page Activate commands sent due to a write request",
+ "Counter": "0,1,2,3",
"EventCode": "0x1",
"EventName": "UNC_M_ACT_COUNT.WR",
"PerPkg": "1",
@@ -48,6 +53,7 @@
},
{
"BriefDescription": "ACT command issued by 2 cycle bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M_BYP_CMDS.ACT",
"PerPkg": "1",
@@ -56,6 +62,7 @@
},
{
"BriefDescription": "CAS command issued by 2 cycle bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M_BYP_CMDS.CAS",
"PerPkg": "1",
@@ -64,6 +71,7 @@
},
{
"BriefDescription": "PRE command issued by 2 cycle bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M_BYP_CMDS.PRE",
"PerPkg": "1",
@@ -72,6 +80,7 @@
},
{
"BriefDescription": "All DRAM CAS Commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.ALL",
"PerPkg": "1",
@@ -81,6 +90,7 @@
},
{
"BriefDescription": "All DRAM Read CAS Commands issued (including underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.RD",
"PerPkg": "1",
@@ -90,6 +100,7 @@
},
{
"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; Read CAS issued in Read ISOCH Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.RD_ISOCH",
"PerPkg": "1",
@@ -98,6 +109,7 @@
},
{
"BriefDescription": "All DRAM Read CAS Commands issued (does not include underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.RD_REG",
"PerPkg": "1",
@@ -107,6 +119,7 @@
},
{
"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; Read CAS issued in RMM",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.RD_RMM",
"PerPkg": "1",
@@ -115,6 +128,7 @@
},
{
"BriefDescription": "DRAM Underfill Read CAS Commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
"PerPkg": "1",
@@ -124,6 +138,7 @@
},
{
"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; Read CAS issued in WMM",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.RD_WMM",
"PerPkg": "1",
@@ -132,6 +147,7 @@
},
{
"BriefDescription": "All DRAM Write CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.WR",
"PerPkg": "1",
@@ -141,6 +157,7 @@
},
{
"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; Read CAS issued in Write ISOCH Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.WR_ISOCH",
"PerPkg": "1",
@@ -149,6 +166,7 @@
},
{
"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.WR_RMM",
"PerPkg": "1",
@@ -158,6 +176,7 @@
},
{
"BriefDescription": "DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Write Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_M_CAS_COUNT.WR_WMM",
"PerPkg": "1",
@@ -167,6 +186,7 @@
},
{
"BriefDescription": "Memory controller clock ticks",
+ "Counter": "0,1,2,3",
"EventName": "UNC_M_CLOCKTICKS",
"PerPkg": "1",
"PublicDescription": "Counts clockticks of the fixed frequency clock of the memory controller using one of the programmable counters.",
@@ -174,6 +194,7 @@
},
{
"BriefDescription": "Clockticks in the Memory Controller using a dedicated 48-bit Fixed Counter",
+ "Counter": "FIXED",
"EventCode": "0xff",
"EventName": "UNC_M_CLOCKTICKS_F",
"PerPkg": "1",
@@ -181,6 +202,7 @@
},
{
"BriefDescription": "DRAM Precharge All Commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x6",
"EventName": "UNC_M_DRAM_PRE_ALL",
"PerPkg": "1",
@@ -189,6 +211,7 @@
},
{
"BriefDescription": "ECC Correctable Errors",
+ "Counter": "0,1,2,3",
"EventCode": "0x9",
"EventName": "UNC_M_ECC_CORRECTABLE_ERRORS",
"PerPkg": "1",
@@ -197,6 +220,7 @@
},
{
"BriefDescription": "UNC_M_MAJMODE2.DRAM_CYC",
+ "Counter": "0,1,2,3",
"EventCode": "0xED",
"EventName": "UNC_M_MAJMODE2.DRAM_CYC",
"PerPkg": "1",
@@ -205,6 +229,7 @@
},
{
"BriefDescription": "UNC_M_MAJMODE2.DRAM_ENTER",
+ "Counter": "0,1,2,3",
"EventCode": "0xED",
"EventName": "UNC_M_MAJMODE2.DRAM_ENTER",
"PerPkg": "1",
@@ -213,6 +238,7 @@
},
{
"BriefDescription": "Major Mode 2 : Cycles in PMM major mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xED",
"EventName": "UNC_M_MAJMODE2.PMM_CYC",
"PerPkg": "1",
@@ -221,6 +247,7 @@
},
{
"BriefDescription": "Major Mode 2 : Entered PMM major mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xED",
"EventName": "UNC_M_MAJMODE2.PMM_ENTER",
"PerPkg": "1",
@@ -229,6 +256,7 @@
},
{
"BriefDescription": "Cycles in a Major Mode; Isoch Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x7",
"EventName": "UNC_M_MAJOR_MODES.ISOCH",
"PerPkg": "1",
@@ -238,6 +266,7 @@
},
{
"BriefDescription": "Cycles in a Major Mode; Partial Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x7",
"EventName": "UNC_M_MAJOR_MODES.PARTIAL",
"PerPkg": "1",
@@ -247,6 +276,7 @@
},
{
"BriefDescription": "Cycles in a Major Mode; Read Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x7",
"EventName": "UNC_M_MAJOR_MODES.READ",
"PerPkg": "1",
@@ -256,6 +286,7 @@
},
{
"BriefDescription": "Cycles in a Major Mode; Write Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x7",
"EventName": "UNC_M_MAJOR_MODES.WRITE",
"PerPkg": "1",
@@ -265,6 +296,7 @@
},
{
"BriefDescription": "Intel Optane DC persistent memory bandwidth read (MB/sec). Derived from unc_m_pmm_rpq_inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M_PMM_BANDWIDTH.READ",
"PerPkg": "1",
@@ -273,6 +305,7 @@
},
{
"BriefDescription": "Intel Optane DC persistent memory bandwidth total (MB/sec). Derived from unc_m_pmm_rpq_inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M_PMM_BANDWIDTH.TOTAL",
"MetricExpr": "UNC_M_PMM_RPQ_INSERTS + UNC_M_PMM_WPQ_INSERTS",
@@ -283,6 +316,7 @@
},
{
"BriefDescription": "Intel Optane DC persistent memory bandwidth write (MB/sec). Derived from unc_m_pmm_wpq_inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xE7",
"EventName": "UNC_M_PMM_BANDWIDTH.WRITE",
"PerPkg": "1",
@@ -291,6 +325,7 @@
},
{
"BriefDescription": "All commands for Intel(R) Optane(TM) DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.ALL",
"PerPkg": "1",
@@ -299,6 +334,7 @@
},
{
"BriefDescription": "Misc Commands (error, flow ACKs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.MISC",
"PerPkg": "1",
@@ -307,6 +343,7 @@
},
{
"BriefDescription": "Misc GNTs",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.MISC_GNT",
"PerPkg": "1",
@@ -315,6 +352,7 @@
},
{
"BriefDescription": "Regular reads(RPQ) commands for Intel(R) Optane(TM) DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.RD",
"PerPkg": "1",
@@ -324,6 +362,7 @@
},
{
"BriefDescription": "RPQ GNTs",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.RPQ_GNTS",
"PerPkg": "1",
@@ -332,6 +371,7 @@
},
{
"BriefDescription": "Underfill read commands for Intel(R) Optane(TM) DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.UFILL_RD",
"PerPkg": "1",
@@ -341,6 +381,7 @@
},
{
"BriefDescription": "Underfill GNTs",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.WPQ_GNTS",
"PerPkg": "1",
@@ -349,6 +390,7 @@
},
{
"BriefDescription": "Write commands for Intel(R) Optane(TM) DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.WR",
"PerPkg": "1",
@@ -358,6 +400,7 @@
},
{
"BriefDescription": "Expected No data packet (ERID matched NDP encoding)",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.NODATA_EXP",
"PerPkg": "1",
@@ -366,6 +409,7 @@
},
{
"BriefDescription": "Unexpected No data packet (ERID matched a Read, but data was a NDP)",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.NODATA_UNEXP",
"PerPkg": "1",
@@ -374,6 +418,7 @@
},
{
"BriefDescription": "Opportunistic Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.OPP_RD",
"PerPkg": "1",
@@ -382,6 +427,7 @@
},
{
"BriefDescription": "PMM ECC Errors",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.PMM_ECC_ERROR",
"PerPkg": "1",
@@ -390,6 +436,7 @@
},
{
"BriefDescription": "PMM ERID detectable parity error",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.PMM_ERID_ERROR",
"PerPkg": "1",
@@ -398,6 +445,7 @@
},
{
"BriefDescription": "Read Requests - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.REQS_SLOT0",
"PerPkg": "1",
@@ -406,6 +454,7 @@
},
{
"BriefDescription": "Read Requests - Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.REQS_SLOT1",
"PerPkg": "1",
@@ -414,6 +463,7 @@
},
{
"BriefDescription": "PMM Major Mode; Cycles PMM is in Partial Write Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xEC",
"EventName": "UNC_M_PMM_MAJMODE1.PARTIAL_WR_CYC",
"PerPkg": "1",
@@ -422,6 +472,7 @@
},
{
"BriefDescription": "PMM Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xEC",
"EventName": "UNC_M_PMM_MAJMODE1.PARTIAL_WR_ENTER",
"PerPkg": "1",
@@ -430,6 +481,7 @@
},
{
"BriefDescription": "PMM Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xEC",
"EventName": "UNC_M_PMM_MAJMODE1.PARTIAL_WR_EXIT",
"PerPkg": "1",
@@ -438,6 +490,7 @@
},
{
"BriefDescription": "PMM Major Mode; Cycles PMM is in Read Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xEC",
"EventName": "UNC_M_PMM_MAJMODE1.RD_CYC",
"PerPkg": "1",
@@ -446,6 +499,7 @@
},
{
"BriefDescription": "PMM Major Mode; Cycles PMM is in Write Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xEC",
"EventName": "UNC_M_PMM_MAJMODE1.WR_CYC",
"PerPkg": "1",
@@ -454,6 +508,7 @@
},
{
"BriefDescription": "Intel Optane DC persistent memory read latency (ns). Derived from unc_m_pmm_rpq_occupancy.all",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_READ_LATENCY",
"MetricExpr": "UNC_M_PMM_RPQ_OCCUPANCY.ALL / UNC_M_PMM_RPQ_INSERTS / UNC_M_CLOCKTICKS",
@@ -465,6 +520,7 @@
},
{
"BriefDescription": "PMM Read Queue Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M_PMM_RPQ_CYCLES_FULL",
"PerPkg": "1",
@@ -472,6 +528,7 @@
},
{
"BriefDescription": "PMM Read Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M_PMM_RPQ_CYCLES_NE",
"PerPkg": "1",
@@ -479,6 +536,7 @@
},
{
"BriefDescription": "Write requests allocated in the PMM Write Pending Queue for Intel Optane DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M_PMM_RPQ_INSERTS",
"PerPkg": "1",
@@ -486,6 +544,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy of all read requests for Intel Optane DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -494,6 +553,7 @@
},
{
"BriefDescription": "PMM Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT",
"PerPkg": "1",
@@ -502,6 +562,7 @@
},
{
"BriefDescription": "PMM Write Queue Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_M_PMM_WPQ_CYCLES_FULL",
"PerPkg": "1",
@@ -509,6 +570,7 @@
},
{
"BriefDescription": "PMM Write Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M_PMM_WPQ_CYCLES_NE",
"PerPkg": "1",
@@ -516,6 +578,7 @@
},
{
"BriefDescription": "Write requests allocated in the PMM Write Pending Queue for Intel Optane DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xE7",
"EventName": "UNC_M_PMM_WPQ_INSERTS",
"PerPkg": "1",
@@ -523,6 +586,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy of all write requests for Intel(R) Optane(TM) DC persistent memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -531,6 +595,7 @@
},
{
"BriefDescription": "PMM Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.CAS",
"PerPkg": "1",
@@ -539,6 +604,7 @@
},
{
"BriefDescription": "PMM Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.PWR",
"PerPkg": "1",
@@ -547,6 +613,7 @@
},
{
"BriefDescription": "UNC_M_PMM_WPQ_PCOMMIT",
+ "Counter": "0,1,2,3",
"EventCode": "0xE8",
"EventName": "UNC_M_PMM_WPQ_PCOMMIT",
"PerPkg": "1",
@@ -554,6 +621,7 @@
},
{
"BriefDescription": "UNC_M_PMM_WPQ_PCOMMIT_CYC",
+ "Counter": "0,1,2,3",
"EventCode": "0xE9",
"EventName": "UNC_M_PMM_WPQ_PCOMMIT_CYC",
"PerPkg": "1",
@@ -561,6 +629,7 @@
},
{
"BriefDescription": "Channel DLLOFF Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M_POWER_CHANNEL_DLLOFF",
"PerPkg": "1",
@@ -569,6 +638,7 @@
},
{
"BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode+C37",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M_POWER_CHANNEL_PPD",
"MetricExpr": "(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100",
@@ -579,6 +649,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK0",
"PerPkg": "1",
@@ -588,6 +659,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK1",
"PerPkg": "1",
@@ -597,6 +669,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK2",
"PerPkg": "1",
@@ -606,6 +679,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK3",
"PerPkg": "1",
@@ -615,6 +689,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK4",
"PerPkg": "1",
@@ -624,6 +699,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK5",
"PerPkg": "1",
@@ -633,6 +709,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK6",
"PerPkg": "1",
@@ -642,6 +719,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_POWER_CKE_CYCLES.RANK7",
"PerPkg": "1",
@@ -651,6 +729,7 @@
},
{
"BriefDescription": "Critical Throttle Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES",
"PerPkg": "1",
@@ -659,6 +738,7 @@
},
{
"BriefDescription": "UNC_M_POWER_PCU_THROTTLING",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M_POWER_PCU_THROTTLING",
"PerPkg": "1",
@@ -666,6 +746,7 @@
},
{
"BriefDescription": "Cycles Memory is in self refresh power mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M_POWER_SELF_REFRESH",
"MetricExpr": "(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100",
@@ -676,6 +757,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK0",
"PerPkg": "1",
@@ -685,6 +767,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK1",
"PerPkg": "1",
@@ -694,6 +777,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK2",
"PerPkg": "1",
@@ -703,6 +787,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK3",
"PerPkg": "1",
@@ -712,6 +797,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK4",
"PerPkg": "1",
@@ -721,6 +807,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK5",
"PerPkg": "1",
@@ -730,6 +817,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK6",
"PerPkg": "1",
@@ -739,6 +827,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0; DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.RANK7",
"PerPkg": "1",
@@ -748,6 +837,7 @@
},
{
"BriefDescription": "Read Preemption Count; Read over Read Preemption",
+ "Counter": "0,1,2,3",
"EventCode": "0x8",
"EventName": "UNC_M_PREEMPTION.RD_PREEMPT_RD",
"PerPkg": "1",
@@ -757,6 +847,7 @@
},
{
"BriefDescription": "Read Preemption Count; Read over Write Preemption",
+ "Counter": "0,1,2,3",
"EventCode": "0x8",
"EventName": "UNC_M_PREEMPTION.RD_PREEMPT_WR",
"PerPkg": "1",
@@ -766,6 +857,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.; Precharge due to bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_M_PRE_COUNT.BYP",
"PerPkg": "1",
@@ -775,6 +867,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.; Precharge due to timer expiration",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_M_PRE_COUNT.PAGE_CLOSE",
"PerPkg": "1",
@@ -784,6 +877,7 @@
},
{
"BriefDescription": "Pre-charges due to page misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_M_PRE_COUNT.PAGE_MISS",
"PerPkg": "1",
@@ -793,6 +887,7 @@
},
{
"BriefDescription": "Pre-charge for reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_M_PRE_COUNT.RD",
"PerPkg": "1",
@@ -802,6 +897,7 @@
},
{
"BriefDescription": "Pre-charge for writes",
+ "Counter": "0,1,2,3",
"EventCode": "0x2",
"EventName": "UNC_M_PRE_COUNT.WR",
"PerPkg": "1",
@@ -811,6 +907,7 @@
},
{
"BriefDescription": "Read CAS issued with HIGH priority",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_RD_CAS_PRIO.HIGH",
"PerPkg": "1",
@@ -819,6 +916,7 @@
},
{
"BriefDescription": "Read CAS issued with LOW priority",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_RD_CAS_PRIO.LOW",
"PerPkg": "1",
@@ -827,6 +925,7 @@
},
{
"BriefDescription": "Read CAS issued with MEDIUM priority",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_RD_CAS_PRIO.MED",
"PerPkg": "1",
@@ -835,6 +934,7 @@
},
{
"BriefDescription": "Read CAS issued with PANIC NON ISOCH priority (starved)",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_RD_CAS_PRIO.PANIC",
"PerPkg": "1",
@@ -843,6 +943,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.ALLBANKS",
"PerPkg": "1",
@@ -851,6 +952,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK0",
"PerPkg": "1",
@@ -858,6 +960,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK1",
"PerPkg": "1",
@@ -866,6 +969,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK10",
"PerPkg": "1",
@@ -874,6 +978,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK11",
"PerPkg": "1",
@@ -882,6 +987,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK12",
"PerPkg": "1",
@@ -890,6 +996,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK13",
"PerPkg": "1",
@@ -898,6 +1005,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK14",
"PerPkg": "1",
@@ -906,6 +1014,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK15",
"PerPkg": "1",
@@ -914,6 +1023,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK2",
"PerPkg": "1",
@@ -922,6 +1032,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK3",
"PerPkg": "1",
@@ -930,6 +1041,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK4",
"PerPkg": "1",
@@ -938,6 +1050,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK5",
"PerPkg": "1",
@@ -946,6 +1059,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK6",
"PerPkg": "1",
@@ -954,6 +1068,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK7",
"PerPkg": "1",
@@ -962,6 +1077,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK8",
"PerPkg": "1",
@@ -970,6 +1086,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANK9",
"PerPkg": "1",
@@ -978,6 +1095,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANKG0",
"PerPkg": "1",
@@ -986,6 +1104,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANKG1",
"PerPkg": "1",
@@ -994,6 +1113,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANKG2",
"PerPkg": "1",
@@ -1002,6 +1122,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M_RD_CAS_RANK0.BANKG3",
"PerPkg": "1",
@@ -1010,6 +1131,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.ALLBANKS",
"PerPkg": "1",
@@ -1018,6 +1140,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK0",
"PerPkg": "1",
@@ -1025,6 +1148,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK1",
"PerPkg": "1",
@@ -1033,6 +1157,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK10",
"PerPkg": "1",
@@ -1041,6 +1166,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK11",
"PerPkg": "1",
@@ -1049,6 +1175,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK12",
"PerPkg": "1",
@@ -1057,6 +1184,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK13",
"PerPkg": "1",
@@ -1065,6 +1193,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK14",
"PerPkg": "1",
@@ -1073,6 +1202,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK15",
"PerPkg": "1",
@@ -1081,6 +1211,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK2",
"PerPkg": "1",
@@ -1089,6 +1220,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK3",
"PerPkg": "1",
@@ -1097,6 +1229,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK4",
"PerPkg": "1",
@@ -1105,6 +1238,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK5",
"PerPkg": "1",
@@ -1113,6 +1247,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK6",
"PerPkg": "1",
@@ -1121,6 +1256,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK7",
"PerPkg": "1",
@@ -1129,6 +1265,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK8",
"PerPkg": "1",
@@ -1137,6 +1274,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANK9",
"PerPkg": "1",
@@ -1145,6 +1283,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANKG0",
"PerPkg": "1",
@@ -1153,6 +1292,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANKG1",
"PerPkg": "1",
@@ -1161,6 +1301,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANKG2",
"PerPkg": "1",
@@ -1169,6 +1310,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 1; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M_RD_CAS_RANK1.BANKG3",
"PerPkg": "1",
@@ -1177,6 +1319,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.ALLBANKS",
"PerPkg": "1",
@@ -1185,6 +1328,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK0",
"PerPkg": "1",
@@ -1192,6 +1336,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK1",
"PerPkg": "1",
@@ -1200,6 +1345,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK10",
"PerPkg": "1",
@@ -1208,6 +1354,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK11",
"PerPkg": "1",
@@ -1216,6 +1363,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK12",
"PerPkg": "1",
@@ -1224,6 +1372,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK13",
"PerPkg": "1",
@@ -1232,6 +1381,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK14",
"PerPkg": "1",
@@ -1240,6 +1390,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK15",
"PerPkg": "1",
@@ -1248,6 +1399,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK2",
"PerPkg": "1",
@@ -1256,6 +1408,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK3",
"PerPkg": "1",
@@ -1264,6 +1417,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK4",
"PerPkg": "1",
@@ -1272,6 +1426,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK5",
"PerPkg": "1",
@@ -1280,6 +1435,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK6",
"PerPkg": "1",
@@ -1288,6 +1444,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK7",
"PerPkg": "1",
@@ -1296,6 +1453,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK8",
"PerPkg": "1",
@@ -1304,6 +1462,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANK9",
"PerPkg": "1",
@@ -1312,6 +1471,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANKG0",
"PerPkg": "1",
@@ -1320,6 +1480,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANKG1",
"PerPkg": "1",
@@ -1328,6 +1489,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANKG2",
"PerPkg": "1",
@@ -1336,6 +1498,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 2; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M_RD_CAS_RANK2.BANKG3",
"PerPkg": "1",
@@ -1344,6 +1507,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.ALLBANKS",
"PerPkg": "1",
@@ -1352,6 +1516,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK0",
"PerPkg": "1",
@@ -1359,6 +1524,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK1",
"PerPkg": "1",
@@ -1367,6 +1533,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK10",
"PerPkg": "1",
@@ -1375,6 +1542,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK11",
"PerPkg": "1",
@@ -1383,6 +1551,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK12",
"PerPkg": "1",
@@ -1391,6 +1560,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK13",
"PerPkg": "1",
@@ -1399,6 +1569,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK14",
"PerPkg": "1",
@@ -1407,6 +1578,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK15",
"PerPkg": "1",
@@ -1415,6 +1587,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK2",
"PerPkg": "1",
@@ -1423,6 +1596,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK3",
"PerPkg": "1",
@@ -1431,6 +1605,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK4",
"PerPkg": "1",
@@ -1439,6 +1614,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK5",
"PerPkg": "1",
@@ -1447,6 +1623,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK6",
"PerPkg": "1",
@@ -1455,6 +1632,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK7",
"PerPkg": "1",
@@ -1463,6 +1641,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK8",
"PerPkg": "1",
@@ -1471,6 +1650,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANK9",
"PerPkg": "1",
@@ -1479,6 +1659,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANKG0",
"PerPkg": "1",
@@ -1487,6 +1668,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANKG1",
"PerPkg": "1",
@@ -1495,6 +1677,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANKG2",
"PerPkg": "1",
@@ -1503,6 +1686,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 3; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M_RD_CAS_RANK3.BANKG3",
"PerPkg": "1",
@@ -1511,6 +1695,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.ALLBANKS",
"PerPkg": "1",
@@ -1519,6 +1704,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK0",
"PerPkg": "1",
@@ -1526,6 +1712,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK1",
"PerPkg": "1",
@@ -1534,6 +1721,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK10",
"PerPkg": "1",
@@ -1542,6 +1730,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK11",
"PerPkg": "1",
@@ -1550,6 +1739,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK12",
"PerPkg": "1",
@@ -1558,6 +1748,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK13",
"PerPkg": "1",
@@ -1566,6 +1757,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK14",
"PerPkg": "1",
@@ -1574,6 +1766,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK15",
"PerPkg": "1",
@@ -1582,6 +1775,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK2",
"PerPkg": "1",
@@ -1590,6 +1784,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK3",
"PerPkg": "1",
@@ -1598,6 +1793,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK4",
"PerPkg": "1",
@@ -1606,6 +1802,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK5",
"PerPkg": "1",
@@ -1614,6 +1811,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK6",
"PerPkg": "1",
@@ -1622,6 +1820,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK7",
"PerPkg": "1",
@@ -1630,6 +1829,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK8",
"PerPkg": "1",
@@ -1638,6 +1838,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANK9",
"PerPkg": "1",
@@ -1646,6 +1847,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANKG0",
"PerPkg": "1",
@@ -1654,6 +1856,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANKG1",
"PerPkg": "1",
@@ -1662,6 +1865,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANKG2",
"PerPkg": "1",
@@ -1670,6 +1874,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 4; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M_RD_CAS_RANK4.BANKG3",
"PerPkg": "1",
@@ -1678,6 +1883,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.ALLBANKS",
"PerPkg": "1",
@@ -1686,6 +1892,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK0",
"PerPkg": "1",
@@ -1693,6 +1900,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK1",
"PerPkg": "1",
@@ -1701,6 +1909,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK10",
"PerPkg": "1",
@@ -1709,6 +1918,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK11",
"PerPkg": "1",
@@ -1717,6 +1927,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK12",
"PerPkg": "1",
@@ -1725,6 +1936,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK13",
"PerPkg": "1",
@@ -1733,6 +1945,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK14",
"PerPkg": "1",
@@ -1741,6 +1954,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK15",
"PerPkg": "1",
@@ -1749,6 +1963,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK2",
"PerPkg": "1",
@@ -1757,6 +1972,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK3",
"PerPkg": "1",
@@ -1765,6 +1981,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK4",
"PerPkg": "1",
@@ -1773,6 +1990,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK5",
"PerPkg": "1",
@@ -1781,6 +1999,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK6",
"PerPkg": "1",
@@ -1789,6 +2008,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK7",
"PerPkg": "1",
@@ -1797,6 +2017,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK8",
"PerPkg": "1",
@@ -1805,6 +2026,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANK9",
"PerPkg": "1",
@@ -1813,6 +2035,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANKG0",
"PerPkg": "1",
@@ -1821,6 +2044,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANKG1",
"PerPkg": "1",
@@ -1829,6 +2053,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANKG2",
"PerPkg": "1",
@@ -1837,6 +2062,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 5; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M_RD_CAS_RANK5.BANKG3",
"PerPkg": "1",
@@ -1845,6 +2071,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.ALLBANKS",
"PerPkg": "1",
@@ -1853,6 +2080,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK0",
"PerPkg": "1",
@@ -1860,6 +2088,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK1",
"PerPkg": "1",
@@ -1868,6 +2097,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK10",
"PerPkg": "1",
@@ -1876,6 +2106,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK11",
"PerPkg": "1",
@@ -1884,6 +2115,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK12",
"PerPkg": "1",
@@ -1892,6 +2124,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK13",
"PerPkg": "1",
@@ -1900,6 +2133,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK14",
"PerPkg": "1",
@@ -1908,6 +2142,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK15",
"PerPkg": "1",
@@ -1916,6 +2151,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK2",
"PerPkg": "1",
@@ -1924,6 +2160,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK3",
"PerPkg": "1",
@@ -1932,6 +2169,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK4",
"PerPkg": "1",
@@ -1940,6 +2178,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK5",
"PerPkg": "1",
@@ -1948,6 +2187,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK6",
"PerPkg": "1",
@@ -1956,6 +2196,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK7",
"PerPkg": "1",
@@ -1964,6 +2205,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK8",
"PerPkg": "1",
@@ -1972,6 +2214,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANK9",
"PerPkg": "1",
@@ -1980,6 +2223,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANKG0",
"PerPkg": "1",
@@ -1988,6 +2232,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANKG1",
"PerPkg": "1",
@@ -1996,6 +2241,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANKG2",
"PerPkg": "1",
@@ -2004,6 +2250,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 6; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M_RD_CAS_RANK6.BANKG3",
"PerPkg": "1",
@@ -2012,6 +2259,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.ALLBANKS",
"PerPkg": "1",
@@ -2020,6 +2268,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK0",
"PerPkg": "1",
@@ -2027,6 +2276,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK1",
"PerPkg": "1",
@@ -2035,6 +2285,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK10",
"PerPkg": "1",
@@ -2043,6 +2294,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK11",
"PerPkg": "1",
@@ -2051,6 +2303,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK12",
"PerPkg": "1",
@@ -2059,6 +2312,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK13",
"PerPkg": "1",
@@ -2067,6 +2321,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK14",
"PerPkg": "1",
@@ -2075,6 +2330,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK15",
"PerPkg": "1",
@@ -2083,6 +2339,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK2",
"PerPkg": "1",
@@ -2091,6 +2348,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK3",
"PerPkg": "1",
@@ -2099,6 +2357,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK4",
"PerPkg": "1",
@@ -2107,6 +2366,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK5",
"PerPkg": "1",
@@ -2115,6 +2375,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK6",
"PerPkg": "1",
@@ -2123,6 +2384,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK7",
"PerPkg": "1",
@@ -2131,6 +2393,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK8",
"PerPkg": "1",
@@ -2139,6 +2402,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANK9",
"PerPkg": "1",
@@ -2147,6 +2411,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANKG0",
"PerPkg": "1",
@@ -2155,6 +2420,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANKG1",
"PerPkg": "1",
@@ -2163,6 +2429,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANKG2",
"PerPkg": "1",
@@ -2171,6 +2438,7 @@
},
{
"BriefDescription": "RD_CAS Access to Rank 7; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M_RD_CAS_RANK7.BANKG3",
"PerPkg": "1",
@@ -2179,6 +2447,7 @@
},
{
"BriefDescription": "Read Pending Queue Full Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M_RPQ_CYCLES_FULL",
"PerPkg": "1",
@@ -2187,6 +2456,7 @@
},
{
"BriefDescription": "Read Pending Queue Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M_RPQ_CYCLES_NE",
"PerPkg": "1",
@@ -2195,6 +2465,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS",
"PerPkg": "1",
@@ -2203,6 +2474,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M_RPQ_OCCUPANCY",
"PerPkg": "1",
@@ -2211,6 +2483,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; Write Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.FM_RD_CMPS",
"PerPkg": "1",
@@ -2219,6 +2492,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; Write Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.FM_WR_CMPS",
"PerPkg": "1",
@@ -2227,6 +2501,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; FM read completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.NM_RD_CMPS",
"PerPkg": "1",
@@ -2235,6 +2510,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; FM write completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.NM_WR_CMPS",
"PerPkg": "1",
@@ -2243,6 +2519,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; Read Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.RD_ACCEPTS",
"PerPkg": "1",
@@ -2251,6 +2528,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; Read Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.RD_REJECTS",
"PerPkg": "1",
@@ -2259,6 +2537,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; NM read completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.WR_ACCEPTS",
"PerPkg": "1",
@@ -2267,6 +2546,7 @@
},
{
"BriefDescription": "Scoreboard Accesses; NM write completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.WR_REJECTS",
"PerPkg": "1",
@@ -2275,6 +2555,7 @@
},
{
"BriefDescription": "Alloc",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.ALLOC",
"PerPkg": "1",
@@ -2283,6 +2564,7 @@
},
{
"BriefDescription": "Dealloc",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.DEALLOC",
"PerPkg": "1",
@@ -2291,6 +2573,7 @@
},
{
"BriefDescription": "Far Mem Read Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.FMRD_STARVED",
"PerPkg": "1",
@@ -2299,6 +2582,7 @@
},
{
"BriefDescription": "Far Mem Write Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.FMWR_STARVED",
"PerPkg": "1",
@@ -2307,6 +2591,7 @@
},
{
"BriefDescription": "Near Mem Read Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.NMRD_STARVED",
"PerPkg": "1",
@@ -2315,6 +2600,7 @@
},
{
"BriefDescription": "Near Mem Write Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.NMWR_STARVED",
"PerPkg": "1",
@@ -2323,6 +2609,7 @@
},
{
"BriefDescription": "Reject",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.REJ",
"PerPkg": "1",
@@ -2331,6 +2618,7 @@
},
{
"BriefDescription": "Valid",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.VLD",
"PerPkg": "1",
@@ -2339,6 +2627,7 @@
},
{
"BriefDescription": "Scoreboard Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M_SB_CYCLES_FULL",
"PerPkg": "1",
@@ -2346,6 +2635,7 @@
},
{
"BriefDescription": "Scoreboard Cycles Not-Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M_SB_CYCLES_NE",
"PerPkg": "1",
@@ -2353,6 +2643,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Block region reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.BLOCK_RDS",
"PerPkg": "1",
@@ -2361,6 +2652,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Block region writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.BLOCK_WRS",
"PerPkg": "1",
@@ -2369,6 +2661,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Dealloc all commands (for error flows)",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.DEALLOC",
"PerPkg": "1",
@@ -2377,6 +2670,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Patrol inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.PATROL",
"PerPkg": "1",
@@ -2385,6 +2679,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Persistent Mem reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.PMM_RDS",
"PerPkg": "1",
@@ -2393,6 +2688,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Persistent Mem writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.PMM_WRS",
"PerPkg": "1",
@@ -2401,6 +2697,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.RDS",
"PerPkg": "1",
@@ -2409,6 +2706,7 @@
},
{
"BriefDescription": "Scoreboard Inserts; Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.WRS",
"PerPkg": "1",
@@ -2417,6 +2715,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Block region reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.BLOCK_RDS",
"PerPkg": "1",
@@ -2425,6 +2724,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Block region writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.BLOCK_WRS",
"PerPkg": "1",
@@ -2433,6 +2733,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Patrol",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.PATROL",
"PerPkg": "1",
@@ -2441,6 +2742,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Persistent Mem reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.PMM_RDS",
"PerPkg": "1",
@@ -2449,6 +2751,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Persistent Mem writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.PMM_WRS",
"PerPkg": "1",
@@ -2457,6 +2760,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.RDS",
"PerPkg": "1",
@@ -2465,6 +2769,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy; Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.WRS",
"PerPkg": "1",
@@ -2473,6 +2778,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected; FM requests rejected due to full address conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.FM_ADDR_CNFLT",
"PerPkg": "1",
@@ -2481,6 +2787,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected; NM requests rejected due to set conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.NM_SET_CNFLT",
"PerPkg": "1",
@@ -2489,6 +2796,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected; Patrol requests rejected due to set conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.PATROL_SET_CNFLT",
"PerPkg": "1",
@@ -2497,6 +2805,7 @@
},
{
"BriefDescription": "Far Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMRD_CLR",
"PerPkg": "1",
@@ -2505,6 +2814,7 @@
},
{
"BriefDescription": "Far Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMRD_SET",
"PerPkg": "1",
@@ -2513,6 +2823,7 @@
},
{
"BriefDescription": "Far Mem Write - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMWR_CLR",
"PerPkg": "1",
@@ -2521,6 +2832,7 @@
},
{
"BriefDescription": "Far Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMWR_SET",
"PerPkg": "1",
@@ -2529,6 +2841,7 @@
},
{
"BriefDescription": "Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.NMRD_CLR",
"PerPkg": "1",
@@ -2537,6 +2850,7 @@
},
{
"BriefDescription": "Near Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.NMRD_SET",
"PerPkg": "1",
@@ -2545,6 +2859,7 @@
},
{
"BriefDescription": "Near Mem Write - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.NMWR_CLR",
"PerPkg": "1",
@@ -2553,6 +2868,7 @@
},
{
"BriefDescription": "Near Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.NMWR_SET",
"PerPkg": "1",
@@ -2561,6 +2877,7 @@
},
{
"BriefDescription": "Far Mem Read",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.FMRD",
"PerPkg": "1",
@@ -2569,6 +2886,7 @@
},
{
"BriefDescription": "Far Mem Write",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.FMWR",
"PerPkg": "1",
@@ -2577,6 +2895,7 @@
},
{
"BriefDescription": "Near Mem Read",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.NMRD",
"PerPkg": "1",
@@ -2585,6 +2904,7 @@
},
{
"BriefDescription": "Near Mem Write",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.NMWR",
"PerPkg": "1",
@@ -2593,6 +2913,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.DDR4_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.DDR4_CMP",
"PerPkg": "1",
@@ -2601,6 +2922,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.NEW",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.NEW",
"PerPkg": "1",
@@ -2609,6 +2931,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.OCC",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.OCC",
"PerPkg": "1",
@@ -2617,6 +2940,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM0_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.PMM0_CMP",
"PerPkg": "1",
@@ -2625,6 +2949,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM1_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.PMM1_CMP",
"PerPkg": "1",
@@ -2633,6 +2958,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM2_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.PMM2_CMP",
"PerPkg": "1",
@@ -2641,6 +2967,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.RD_HIT",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.RD_HIT",
"PerPkg": "1",
@@ -2649,6 +2976,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.RD_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.RD_MISS",
"PerPkg": "1",
@@ -2657,6 +2985,7 @@
},
{
"BriefDescription": "All hits to Near Memory(DRAM cache) in Memory Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.HIT",
"PerPkg": "1",
@@ -2666,6 +2995,7 @@
},
{
"BriefDescription": "All Clean line misses to Near Memory(DRAM cache) in Memory Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.MISS_CLEAN",
"PerPkg": "1",
@@ -2675,6 +3005,7 @@
},
{
"BriefDescription": "All dirty line misses to Near Memory(DRAM cache) in Memory Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.MISS_DIRTY",
"PerPkg": "1",
@@ -2684,6 +3015,7 @@
},
{
"BriefDescription": "Transition from WMM to RMM because of low threshold; Transition from WMM to RMM because of starve counter",
+ "Counter": "0,1,2,3",
"EventCode": "0xC0",
"EventName": "UNC_M_WMM_TO_RMM.LOW_THRESH",
"PerPkg": "1",
@@ -2692,6 +3024,7 @@
},
{
"BriefDescription": "Transition from WMM to RMM because of low threshold",
+ "Counter": "0,1,2,3",
"EventCode": "0xC0",
"EventName": "UNC_M_WMM_TO_RMM.STARVE",
"PerPkg": "1",
@@ -2700,6 +3033,7 @@
},
{
"BriefDescription": "Transition from WMM to RMM because of low threshold",
+ "Counter": "0,1,2,3",
"EventCode": "0xC0",
"EventName": "UNC_M_WMM_TO_RMM.VMSE_RETRY",
"PerPkg": "1",
@@ -2708,6 +3042,7 @@
},
{
"BriefDescription": "Write Pending Queue Full Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M_WPQ_CYCLES_FULL",
"PerPkg": "1",
@@ -2716,6 +3051,7 @@
},
{
"BriefDescription": "Write Pending Queue Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M_WPQ_CYCLES_NE",
"PerPkg": "1",
@@ -2724,6 +3060,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS",
"PerPkg": "1",
@@ -2732,6 +3069,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M_WPQ_OCCUPANCY",
"PerPkg": "1",
@@ -2740,6 +3078,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M_WPQ_READ_HIT",
"PerPkg": "1",
@@ -2748,6 +3087,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M_WPQ_WRITE_HIT",
"PerPkg": "1",
@@ -2756,6 +3096,7 @@
},
{
"BriefDescription": "Not getting the requested Major Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_M_WRONG_MM",
"PerPkg": "1",
@@ -2763,6 +3104,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.ALLBANKS",
"PerPkg": "1",
@@ -2771,6 +3113,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK0",
"PerPkg": "1",
@@ -2778,6 +3121,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK1",
"PerPkg": "1",
@@ -2786,6 +3130,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK10",
"PerPkg": "1",
@@ -2794,6 +3139,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK11",
"PerPkg": "1",
@@ -2802,6 +3148,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK12",
"PerPkg": "1",
@@ -2810,6 +3157,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK13",
"PerPkg": "1",
@@ -2818,6 +3166,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK14",
"PerPkg": "1",
@@ -2826,6 +3175,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK15",
"PerPkg": "1",
@@ -2834,6 +3184,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK2",
"PerPkg": "1",
@@ -2842,6 +3193,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK3",
"PerPkg": "1",
@@ -2850,6 +3202,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK4",
"PerPkg": "1",
@@ -2858,6 +3211,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK5",
"PerPkg": "1",
@@ -2866,6 +3220,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK6",
"PerPkg": "1",
@@ -2874,6 +3229,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK7",
"PerPkg": "1",
@@ -2882,6 +3238,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK8",
"PerPkg": "1",
@@ -2890,6 +3247,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANK9",
"PerPkg": "1",
@@ -2898,6 +3256,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANKG0",
"PerPkg": "1",
@@ -2906,6 +3265,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANKG1",
"PerPkg": "1",
@@ -2914,6 +3274,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANKG2",
"PerPkg": "1",
@@ -2922,6 +3283,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M_WR_CAS_RANK0.BANKG3",
"PerPkg": "1",
@@ -2930,6 +3292,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.ALLBANKS",
"PerPkg": "1",
@@ -2938,6 +3301,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK0",
"PerPkg": "1",
@@ -2945,6 +3309,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK1",
"PerPkg": "1",
@@ -2953,6 +3318,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK10",
"PerPkg": "1",
@@ -2961,6 +3327,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK11",
"PerPkg": "1",
@@ -2969,6 +3336,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK12",
"PerPkg": "1",
@@ -2977,6 +3345,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK13",
"PerPkg": "1",
@@ -2985,6 +3354,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK14",
"PerPkg": "1",
@@ -2993,6 +3363,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK15",
"PerPkg": "1",
@@ -3001,6 +3372,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK2",
"PerPkg": "1",
@@ -3009,6 +3381,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK3",
"PerPkg": "1",
@@ -3017,6 +3390,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK4",
"PerPkg": "1",
@@ -3025,6 +3399,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK5",
"PerPkg": "1",
@@ -3033,6 +3408,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK6",
"PerPkg": "1",
@@ -3041,6 +3417,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK7",
"PerPkg": "1",
@@ -3049,6 +3426,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK8",
"PerPkg": "1",
@@ -3057,6 +3435,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANK9",
"PerPkg": "1",
@@ -3065,6 +3444,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANKG0",
"PerPkg": "1",
@@ -3073,6 +3453,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANKG1",
"PerPkg": "1",
@@ -3081,6 +3462,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANKG2",
"PerPkg": "1",
@@ -3089,6 +3471,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 1; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M_WR_CAS_RANK1.BANKG3",
"PerPkg": "1",
@@ -3097,6 +3480,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.ALLBANKS",
"PerPkg": "1",
@@ -3105,6 +3489,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK0",
"PerPkg": "1",
@@ -3112,6 +3497,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK1",
"PerPkg": "1",
@@ -3120,6 +3506,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK10",
"PerPkg": "1",
@@ -3128,6 +3515,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK11",
"PerPkg": "1",
@@ -3136,6 +3524,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK12",
"PerPkg": "1",
@@ -3144,6 +3533,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK13",
"PerPkg": "1",
@@ -3152,6 +3542,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK14",
"PerPkg": "1",
@@ -3160,6 +3551,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK15",
"PerPkg": "1",
@@ -3168,6 +3560,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK2",
"PerPkg": "1",
@@ -3176,6 +3569,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK3",
"PerPkg": "1",
@@ -3184,6 +3578,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK4",
"PerPkg": "1",
@@ -3192,6 +3587,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK5",
"PerPkg": "1",
@@ -3200,6 +3596,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK6",
"PerPkg": "1",
@@ -3208,6 +3605,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK7",
"PerPkg": "1",
@@ -3216,6 +3614,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK8",
"PerPkg": "1",
@@ -3224,6 +3623,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANK9",
"PerPkg": "1",
@@ -3232,6 +3632,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANKG0",
"PerPkg": "1",
@@ -3240,6 +3641,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANKG1",
"PerPkg": "1",
@@ -3248,6 +3650,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANKG2",
"PerPkg": "1",
@@ -3256,6 +3659,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 2; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M_WR_CAS_RANK2.BANKG3",
"PerPkg": "1",
@@ -3264,6 +3668,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.ALLBANKS",
"PerPkg": "1",
@@ -3272,6 +3677,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK0",
"PerPkg": "1",
@@ -3279,6 +3685,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK1",
"PerPkg": "1",
@@ -3287,6 +3694,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK10",
"PerPkg": "1",
@@ -3295,6 +3703,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK11",
"PerPkg": "1",
@@ -3303,6 +3712,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK12",
"PerPkg": "1",
@@ -3311,6 +3721,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK13",
"PerPkg": "1",
@@ -3319,6 +3730,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK14",
"PerPkg": "1",
@@ -3327,6 +3739,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK15",
"PerPkg": "1",
@@ -3335,6 +3748,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK2",
"PerPkg": "1",
@@ -3343,6 +3757,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK3",
"PerPkg": "1",
@@ -3351,6 +3766,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK4",
"PerPkg": "1",
@@ -3359,6 +3775,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK5",
"PerPkg": "1",
@@ -3367,6 +3784,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK6",
"PerPkg": "1",
@@ -3375,6 +3793,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK7",
"PerPkg": "1",
@@ -3383,6 +3802,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK8",
"PerPkg": "1",
@@ -3391,6 +3811,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANK9",
"PerPkg": "1",
@@ -3399,6 +3820,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANKG0",
"PerPkg": "1",
@@ -3407,6 +3829,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANKG1",
"PerPkg": "1",
@@ -3415,6 +3838,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANKG2",
"PerPkg": "1",
@@ -3423,6 +3847,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 3; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M_WR_CAS_RANK3.BANKG3",
"PerPkg": "1",
@@ -3431,6 +3856,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.ALLBANKS",
"PerPkg": "1",
@@ -3439,6 +3865,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK0",
"PerPkg": "1",
@@ -3446,6 +3873,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK1",
"PerPkg": "1",
@@ -3454,6 +3882,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK10",
"PerPkg": "1",
@@ -3462,6 +3891,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK11",
"PerPkg": "1",
@@ -3470,6 +3900,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK12",
"PerPkg": "1",
@@ -3478,6 +3909,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK13",
"PerPkg": "1",
@@ -3486,6 +3918,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK14",
"PerPkg": "1",
@@ -3494,6 +3927,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK15",
"PerPkg": "1",
@@ -3502,6 +3936,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK2",
"PerPkg": "1",
@@ -3510,6 +3945,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK3",
"PerPkg": "1",
@@ -3518,6 +3954,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK4",
"PerPkg": "1",
@@ -3526,6 +3963,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK5",
"PerPkg": "1",
@@ -3534,6 +3972,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK6",
"PerPkg": "1",
@@ -3542,6 +3981,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK7",
"PerPkg": "1",
@@ -3550,6 +3990,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK8",
"PerPkg": "1",
@@ -3558,6 +3999,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANK9",
"PerPkg": "1",
@@ -3566,6 +4008,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANKG0",
"PerPkg": "1",
@@ -3574,6 +4017,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANKG1",
"PerPkg": "1",
@@ -3582,6 +4026,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANKG2",
"PerPkg": "1",
@@ -3590,6 +4035,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 4; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBC",
"EventName": "UNC_M_WR_CAS_RANK4.BANKG3",
"PerPkg": "1",
@@ -3598,6 +4044,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.ALLBANKS",
"PerPkg": "1",
@@ -3606,6 +4053,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK0",
"PerPkg": "1",
@@ -3613,6 +4061,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK1",
"PerPkg": "1",
@@ -3621,6 +4070,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK10",
"PerPkg": "1",
@@ -3629,6 +4079,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK11",
"PerPkg": "1",
@@ -3637,6 +4088,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK12",
"PerPkg": "1",
@@ -3645,6 +4097,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK13",
"PerPkg": "1",
@@ -3653,6 +4106,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK14",
"PerPkg": "1",
@@ -3661,6 +4115,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK15",
"PerPkg": "1",
@@ -3669,6 +4124,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK2",
"PerPkg": "1",
@@ -3677,6 +4133,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK3",
"PerPkg": "1",
@@ -3685,6 +4142,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK4",
"PerPkg": "1",
@@ -3693,6 +4151,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK5",
"PerPkg": "1",
@@ -3701,6 +4160,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK6",
"PerPkg": "1",
@@ -3709,6 +4169,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK7",
"PerPkg": "1",
@@ -3717,6 +4178,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK8",
"PerPkg": "1",
@@ -3725,6 +4187,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANK9",
"PerPkg": "1",
@@ -3733,6 +4196,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANKG0",
"PerPkg": "1",
@@ -3741,6 +4205,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANKG1",
"PerPkg": "1",
@@ -3749,6 +4214,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANKG2",
"PerPkg": "1",
@@ -3757,6 +4223,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 5; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "UNC_M_WR_CAS_RANK5.BANKG3",
"PerPkg": "1",
@@ -3765,6 +4232,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.ALLBANKS",
"PerPkg": "1",
@@ -3773,6 +4241,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK0",
"PerPkg": "1",
@@ -3780,6 +4249,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK1",
"PerPkg": "1",
@@ -3788,6 +4258,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK10",
"PerPkg": "1",
@@ -3796,6 +4267,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK11",
"PerPkg": "1",
@@ -3804,6 +4276,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK12",
"PerPkg": "1",
@@ -3812,6 +4285,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK13",
"PerPkg": "1",
@@ -3820,6 +4294,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK14",
"PerPkg": "1",
@@ -3828,6 +4303,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK15",
"PerPkg": "1",
@@ -3836,6 +4312,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK2",
"PerPkg": "1",
@@ -3844,6 +4321,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK3",
"PerPkg": "1",
@@ -3852,6 +4330,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK4",
"PerPkg": "1",
@@ -3860,6 +4339,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK5",
"PerPkg": "1",
@@ -3868,6 +4348,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK6",
"PerPkg": "1",
@@ -3876,6 +4357,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK7",
"PerPkg": "1",
@@ -3884,6 +4366,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK8",
"PerPkg": "1",
@@ -3892,6 +4375,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANK9",
"PerPkg": "1",
@@ -3900,6 +4384,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANKG0",
"PerPkg": "1",
@@ -3908,6 +4393,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANKG1",
"PerPkg": "1",
@@ -3916,6 +4402,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANKG2",
"PerPkg": "1",
@@ -3924,6 +4411,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 6; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBE",
"EventName": "UNC_M_WR_CAS_RANK6.BANKG3",
"PerPkg": "1",
@@ -3932,6 +4420,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; All Banks",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.ALLBANKS",
"PerPkg": "1",
@@ -3940,6 +4429,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK0",
"PerPkg": "1",
@@ -3947,6 +4437,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK1",
"PerPkg": "1",
@@ -3955,6 +4446,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK10",
"PerPkg": "1",
@@ -3963,6 +4455,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 11",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK11",
"PerPkg": "1",
@@ -3971,6 +4464,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 12",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK12",
"PerPkg": "1",
@@ -3979,6 +4473,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 13",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK13",
"PerPkg": "1",
@@ -3987,6 +4482,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 14",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK14",
"PerPkg": "1",
@@ -3995,6 +4491,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 15",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK15",
"PerPkg": "1",
@@ -4003,6 +4500,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK2",
"PerPkg": "1",
@@ -4011,6 +4509,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK3",
"PerPkg": "1",
@@ -4019,6 +4518,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK4",
"PerPkg": "1",
@@ -4027,6 +4527,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK5",
"PerPkg": "1",
@@ -4035,6 +4536,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK6",
"PerPkg": "1",
@@ -4043,6 +4545,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK7",
"PerPkg": "1",
@@ -4051,6 +4554,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK8",
"PerPkg": "1",
@@ -4059,6 +4563,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANK9",
"PerPkg": "1",
@@ -4067,6 +4572,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank Group 0 (Banks 0-3)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANKG0",
"PerPkg": "1",
@@ -4075,6 +4581,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank Group 1 (Banks 4-7)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANKG1",
"PerPkg": "1",
@@ -4083,6 +4590,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank Group 2 (Banks 8-11)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANKG2",
"PerPkg": "1",
@@ -4091,6 +4599,7 @@
},
{
"BriefDescription": "WR_CAS Access to Rank 7; Bank Group 3 (Banks 12-15)",
+ "Counter": "0,1,2,3",
"EventCode": "0xBF",
"EventName": "UNC_M_WR_CAS_RANK7.BANKG3",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-power.json b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-power.json
index c6254af7a468..0c4c3f992a15 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-power.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/uncore-power.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "pclk Cycles",
+ "Counter": "0,1,2,3",
"EventName": "UNC_P_CLOCKTICKS",
"PerPkg": "1",
"PublicDescription": "The PCU runs off a fixed 1 GHz clock. This event counts the number of pclk cycles measured while the counter was enabled. The pclk, like the Memory Controller's dclk, counts at a constant rate making it a good measure of actual wall time.",
@@ -8,6 +9,7 @@
},
{
"BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_P_CORE_TRANSITION_CYCLES",
"PerPkg": "1",
@@ -15,6 +17,7 @@
},
{
"BriefDescription": "UNC_P_DEMOTIONS",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_P_DEMOTIONS",
"PerPkg": "1",
@@ -22,6 +25,7 @@
},
{
"BriefDescription": "Phase Shed 0 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_P_FIVR_PS_PS0_CYCLES",
"PerPkg": "1",
@@ -30,6 +34,7 @@
},
{
"BriefDescription": "Phase Shed 1 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_P_FIVR_PS_PS1_CYCLES",
"PerPkg": "1",
@@ -38,6 +43,7 @@
},
{
"BriefDescription": "Phase Shed 2 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x77",
"EventName": "UNC_P_FIVR_PS_PS2_CYCLES",
"PerPkg": "1",
@@ -46,6 +52,7 @@
},
{
"BriefDescription": "Phase Shed 3 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x78",
"EventName": "UNC_P_FIVR_PS_PS3_CYCLES",
"PerPkg": "1",
@@ -54,6 +61,7 @@
},
{
"BriefDescription": "Thermal Strongest Upper Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x4",
"EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
"PerPkg": "1",
@@ -62,6 +70,7 @@
},
{
"BriefDescription": "Power Strongest Upper Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x5",
"EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
"PerPkg": "1",
@@ -70,6 +79,7 @@
},
{
"BriefDescription": "IO P Limit Strongest Lower Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x73",
"EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES",
"PerPkg": "1",
@@ -78,6 +88,7 @@
},
{
"BriefDescription": "Cycles spent changing Frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_P_FREQ_TRANS_CYCLES",
"PerPkg": "1",
@@ -86,6 +97,7 @@
},
{
"BriefDescription": "UNC_P_MCP_PROCHOT_CYCLES",
+ "Counter": "0,1,2,3",
"EventCode": "0x6",
"EventName": "UNC_P_MCP_PROCHOT_CYCLES",
"PerPkg": "1",
@@ -93,6 +105,7 @@
},
{
"BriefDescription": "Memory Phase Shedding Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES",
"PerPkg": "1",
@@ -101,6 +114,7 @@
},
{
"BriefDescription": "Package C State Residency - C0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES",
"PerPkg": "1",
@@ -109,6 +123,7 @@
},
{
"BriefDescription": "Package C State Residency - C2E",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES",
"PerPkg": "1",
@@ -117,6 +132,7 @@
},
{
"BriefDescription": "Package C State Residency - C3",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_P_PKG_RESIDENCY_C3_CYCLES",
"PerPkg": "1",
@@ -125,6 +141,7 @@
},
{
"BriefDescription": "Package C State Residency - C6",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES",
"PerPkg": "1",
@@ -133,6 +150,7 @@
},
{
"BriefDescription": "UNC_P_PMAX_THROTTLED_CYCLES",
+ "Counter": "0,1,2,3",
"EventCode": "0x7",
"EventName": "UNC_P_PMAX_THROTTLED_CYCLES",
"PerPkg": "1",
@@ -140,6 +158,7 @@
},
{
"BriefDescription": "Number of cores in C-State; C0 and C1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0",
"PerPkg": "1",
@@ -148,6 +167,7 @@
},
{
"BriefDescription": "Number of cores in C-State; C3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3",
"PerPkg": "1",
@@ -156,6 +176,7 @@
},
{
"BriefDescription": "Number of cores in C-State; C6 and C7",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6",
"PerPkg": "1",
@@ -164,6 +185,7 @@
},
{
"BriefDescription": "External Prochot",
+ "Counter": "0,1,2,3",
"EventCode": "0xA",
"EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
"PerPkg": "1",
@@ -172,6 +194,7 @@
},
{
"BriefDescription": "Internal Prochot",
+ "Counter": "0,1,2,3",
"EventCode": "0x9",
"EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES",
"PerPkg": "1",
@@ -180,6 +203,7 @@
},
{
"BriefDescription": "Total Core C State Transition Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_P_TOTAL_TRANSITION_CYCLES",
"PerPkg": "1",
@@ -188,6 +212,7 @@
},
{
"BriefDescription": "VR Hot",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_P_VR_HOT_CYCLES",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/virtual-memory.json b/tools/perf/pmu-events/arch/x86/cascadelakex/virtual-memory.json
index f59405877ae8..d90314b383df 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/virtual-memory.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/virtual-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Load misses in all DTLB levels that cause page walks",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK",
"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all TLB levels, but the walk need not have completed.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Loads that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.STLB_HIT",
"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page walk duration are excluded in Skylake.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -34,6 +38,7 @@
},
{
"BriefDescription": "Page walk completed due to a demand data load to a 1G page",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -50,6 +56,7 @@
},
{
"BriefDescription": "Page walk completed due to a demand data load to a 4K page",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -58,6 +65,7 @@
},
{
"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for a load. EPT page walk duration are excluded in Skylake.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_PENDING",
"PublicDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for a load. EPT page walk duration are excluded in Skylake microarchitecture.",
@@ -66,6 +74,7 @@
},
{
"BriefDescription": "Store misses in all DTLB levels that cause page walks",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.MISS_CAUSES_A_WALK",
"PublicDescription": "Counts demand data stores that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all TLB levels, but the walk need not have completed.",
@@ -74,6 +83,7 @@
},
{
"BriefDescription": "Stores that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.STLB_HIT",
"PublicDescription": "Stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",
@@ -82,6 +92,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store. EPT page walk duration are excluded in Skylake.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",
@@ -91,6 +102,7 @@
},
{
"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -99,6 +111,7 @@
},
{
"BriefDescription": "Page walk completed due to a demand data store to a 1G page",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -107,6 +120,7 @@
},
{
"BriefDescription": "Page walk completed due to a demand data store to a 2M/4M page",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -115,6 +129,7 @@
},
{
"BriefDescription": "Page walk completed due to a demand data store to a 4K page",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -123,6 +138,7 @@
},
{
"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for a store. EPT page walk duration are excluded in Skylake.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_PENDING",
"PublicDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for a store. EPT page walk duration are excluded in Skylake microarchitecture.",
@@ -131,6 +147,7 @@
},
{
"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a EPT (Extended Page Table) walk for any request type.",
+ "Counter": "0,1,2,3",
"EventCode": "0x4f",
"EventName": "EPT.WALK_PENDING",
"PublicDescription": "Counts cycles for each PMH (Page Miss Handler) that is busy with an EPT (Extended Page Table) walk for any request type.",
@@ -139,6 +156,7 @@
},
{
"BriefDescription": "Flushing of the Instruction TLB (ITLB) pages, includes 4k/2M/4M pages.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAE",
"EventName": "ITLB.ITLB_FLUSH",
"PublicDescription": "Counts the number of flushes of the big or small ITLB pages. Counting include both TLB Flush (covering all sets) and TLB Set Clear (set-specific).",
@@ -147,6 +165,7 @@
},
{
"BriefDescription": "Misses at all ITLB levels that cause page walks",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.MISS_CAUSES_A_WALK",
"PublicDescription": "Counts page walks of any page size (4K/2M/4M/1G) caused by a code fetch. This implies it missed in the ITLB and further levels of TLB, but the walk need not have completed.",
@@ -155,6 +174,7 @@
},
{
"BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.STLB_HIT",
"SampleAfterValue": "100003",
@@ -162,6 +182,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction fetch) request. EPT page walk duration are excluded in Skylake.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_ACTIVE",
@@ -171,6 +192,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -179,6 +201,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (1G)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -187,6 +210,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -195,6 +219,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -203,6 +228,7 @@
},
{
"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for an instruction fetch request. EPT page walk duration are excluded in Skylake.",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_PENDING",
"PublicDescription": "Counts 1 per cycle for each PMH (Page Miss Handler) that is busy with a page walk for an instruction fetch request. EPT page walk duration are excluded in Skylake michroarchitecture.",
@@ -211,6 +237,7 @@
},
{
"BriefDescription": "DTLB flush attempts of the thread-specific entries",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "TLB_FLUSH.DTLB_THREAD",
"PublicDescription": "Counts the number of DTLB flush attempts of the thread-specific entries.",
@@ -219,6 +246,7 @@
},
{
"BriefDescription": "STLB flush attempts",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "TLB_FLUSH.STLB_ANY",
"PublicDescription": "Counts the number of any STLB flush attempts (such as entire, VPID, PCID, InvPage, CR3 write, etc.).",
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 06/18] perf pmu-events: Add event counter data for Icelakex
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (5 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 05/18] perf pmu-events: Add event counter data for Cascadelakex weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-25 4:54 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 07/18] perf stat: Add functions to set counter bitmaps for hardware-grouping method weilin.wang
` (11 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
The added new fields are required in this new grouping method. Currently,
the format of added fields are temporary for experiments.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
.../pmu-events/arch/x86/icelakex/cache.json | 98 +
.../pmu-events/arch/x86/icelakex/counter.json | 16 +
.../arch/x86/icelakex/floating-point.json | 13 +
.../arch/x86/icelakex/frontend.json | 55 +
.../pmu-events/arch/x86/icelakex/memory.json | 53 +
.../pmu-events/arch/x86/icelakex/other.json | 52 +
.../arch/x86/icelakex/pipeline.json | 92 +
.../arch/x86/icelakex/uncore-cache.json | 965 ++++++++++
.../x86/icelakex/uncore-interconnect.json | 1667 +++++++++++++++++
.../arch/x86/icelakex/uncore-io.json | 966 ++++++++++
.../arch/x86/icelakex/uncore-memory.json | 186 ++
.../arch/x86/icelakex/uncore-power.json | 26 +
.../arch/x86/icelakex/virtual-memory.json | 22 +
13 files changed, 4211 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/x86/icelakex/counter.json
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/cache.json b/tools/perf/pmu-events/arch/x86/icelakex/cache.json
index 3bdc56a75097..c1f542975ed4 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/cache.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts the number of cache lines replaced in L1 data cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "L1D.REPLACEMENT",
"PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.FB_FULL",
"PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x48",
@@ -27,6 +30,7 @@
},
{
"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 resources.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.L2_STALL",
"PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Number of L1D misses that are outstanding",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING",
"PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",
@@ -43,6 +48,7 @@
},
{
"BriefDescription": "Cycles with L1D load Misses outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING_CYCLES",
@@ -52,6 +58,7 @@
},
{
"BriefDescription": "L2 cache lines filling L2",
+ "Counter": "0,1,2,3",
"EventCode": "0xF1",
"EventName": "L2_LINES_IN.ALL",
"PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
@@ -60,6 +67,7 @@
},
{
"BriefDescription": "Cache lines that are evicted by L2 cache when triggered by an L2 cache fill.",
+ "Counter": "0,1,2,3",
"EventCode": "0xF2",
"EventName": "L2_LINES_OUT.NON_SILENT",
"PublicDescription": "Counts the number of lines that are evicted by the L2 cache due to L2 cache fills. Evicted lines are delivered to the L3, which may or may not cache them, according to system load and priorities.",
@@ -68,6 +76,7 @@
},
{
"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered by an L2 cache fill.",
+ "Counter": "0,1,2,3",
"EventCode": "0xF2",
"EventName": "L2_LINES_OUT.SILENT",
"PublicDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
@@ -76,6 +85,7 @@
},
{
"BriefDescription": "L2 code requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_CODE_RD",
"PublicDescription": "Counts the total number of L2 code requests.",
@@ -84,6 +94,7 @@
},
{
"BriefDescription": "Demand Data Read requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",
"PublicDescription": "Counts the number of demand Data Read requests (including requests from L1D hardware prefetchers). These loads may hit or miss L2 cache. Only non rejected loads are counted.",
@@ -92,6 +103,7 @@
},
{
"BriefDescription": "Demand requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_MISS",
"PublicDescription": "Counts demand requests that miss L2 cache.",
@@ -100,6 +112,7 @@
},
{
"BriefDescription": "RFO requests to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_RFO",
"PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",
@@ -108,6 +121,7 @@
},
{
"BriefDescription": "L2 cache hits when fetching instructions, code reads.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_HIT",
"PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",
@@ -116,6 +130,7 @@
},
{
"BriefDescription": "L2 cache misses when fetching instructions",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_MISS",
"PublicDescription": "Counts L2 cache misses when fetching instructions.",
@@ -124,6 +139,7 @@
},
{
"BriefDescription": "Demand Data Read requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
"PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",
@@ -132,6 +148,7 @@
},
{
"BriefDescription": "Demand Data Read miss L2, no rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",
"PublicDescription": "Counts the number of demand Data Read requests that miss L2 cache. Only not rejected loads are counted.",
@@ -140,6 +157,7 @@
},
{
"BriefDescription": "RFO requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_HIT",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
@@ -148,6 +166,7 @@
},
{
"BriefDescription": "RFO requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_MISS",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
@@ -156,6 +175,7 @@
},
{
"BriefDescription": "SW prefetch requests that hit L2 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.SWPF_HIT",
"PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
@@ -164,6 +184,7 @@
},
{
"BriefDescription": "SW prefetch requests that miss L2 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.SWPF_MISS",
"PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
@@ -172,6 +193,7 @@
},
{
"BriefDescription": "L2 writebacks that access L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xF0",
"EventName": "L2_TRANS.L2_WB",
"PublicDescription": "Counts L2 writebacks that access L2 cache.",
@@ -180,6 +202,7 @@
},
{
"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetches to the L3)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x2e",
"EventName": "LONGEST_LAT_CACHE.MISS",
"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
@@ -188,6 +211,7 @@
},
{
"BriefDescription": "Core-originated cacheable requests that refer to L3 (Except hardware prefetches to the L3)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x2e",
"EventName": "LONGEST_LAT_CACHE.REFERENCE",
"PublicDescription": "Counts core-originated cacheable requests to the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
@@ -196,6 +220,7 @@
},
{
"BriefDescription": "Retired load instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ALL_LOADS",
@@ -206,6 +231,7 @@
},
{
"BriefDescription": "Retired store instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ALL_STORES",
@@ -216,6 +242,7 @@
},
{
"BriefDescription": "All retired memory instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ANY",
@@ -226,6 +253,7 @@
},
{
"BriefDescription": "Retired load instructions with locked access.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.LOCK_LOADS",
@@ -236,6 +264,7 @@
},
{
"BriefDescription": "Retired load instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.SPLIT_LOADS",
@@ -246,6 +275,7 @@
},
{
"BriefDescription": "Retired store instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.SPLIT_STORES",
@@ -256,6 +286,7 @@
},
{
"BriefDescription": "Retired load instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
@@ -266,6 +297,7 @@
},
{
"BriefDescription": "Retired store instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",
@@ -276,6 +308,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were HitM responses from shared L3",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",
@@ -286,6 +319,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"Deprecated": "1",
"EventCode": "0xd2",
@@ -296,6 +330,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"Deprecated": "1",
"EventCode": "0xd2",
@@ -306,6 +341,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",
@@ -316,6 +352,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were hits in L3 without snoops required",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE",
@@ -326,6 +363,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",
@@ -336,6 +374,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources missed L3 but serviced from local dram",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.LOCAL_DRAM",
@@ -346,6 +385,7 @@
},
{
"BriefDescription": "Retired load instructions which data sources missed L3 but serviced from remote dram",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_DRAM",
@@ -355,6 +395,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources was forwarded from a remote cache",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_FWD",
@@ -365,6 +406,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources was remote HITM",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_HITM",
@@ -375,6 +417,7 @@
},
{
"BriefDescription": "Retired load instructions with remote Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd3",
"EventName": "MEM_LOAD_L3_MISS_RETIRED.REMOTE_PMM",
@@ -385,6 +428,7 @@
},
{
"BriefDescription": "Retired instructions with at least 1 uncacheable load or Bus Lock.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd4",
"EventName": "MEM_LOAD_MISC_RETIRED.UC",
@@ -395,6 +439,7 @@
},
{
"BriefDescription": "Number of completed demand load requests that missed the L1, but hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be brought into L1, but data is not yet ready in L1.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.FB_HIT",
@@ -405,6 +450,7 @@
},
{
"BriefDescription": "Retired load instructions with L1 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L1_HIT",
@@ -415,6 +461,7 @@
},
{
"BriefDescription": "Retired load instructions missed L1 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L1_MISS",
@@ -425,6 +472,7 @@
},
{
"BriefDescription": "Retired load instructions with L2 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L2_HIT",
@@ -435,6 +483,7 @@
},
{
"BriefDescription": "Retired load instructions missed L2 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L2_MISS",
@@ -445,6 +494,7 @@
},
{
"BriefDescription": "Retired load instructions with L3 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L3_HIT",
@@ -455,6 +505,7 @@
},
{
"BriefDescription": "Retired load instructions missed L3 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L3_MISS",
@@ -465,6 +516,7 @@
},
{
"BriefDescription": "Retired load instructions with local Intel(R) Optane(TM) DC persistent memory as the data source where the data request missed all caches.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.LOCAL_PMM",
@@ -475,6 +527,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -484,6 +537,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -493,6 +547,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -502,6 +557,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -511,6 +567,7 @@
},
{
"BriefDescription": "Counts demand data reads that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -520,6 +577,7 @@
},
{
"BriefDescription": "Counts demand data reads that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -529,6 +587,7 @@
},
{
"BriefDescription": "Counts demand data reads that resulted in a snoop that hit in another core, which did not forward the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -538,6 +597,7 @@
},
{
"BriefDescription": "Counts demand data reads that resulted in a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -547,6 +607,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_CACHE.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -556,6 +617,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by a cache on a remote socket where a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_CACHE.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -565,6 +627,7 @@
},
{
"BriefDescription": "Counts demand data reads that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -574,6 +637,7 @@
},
{
"BriefDescription": "Counts demand data reads that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -583,6 +647,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -592,6 +657,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -601,6 +667,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -610,6 +677,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -619,6 +687,7 @@
},
{
"BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L1D_AND_SWPF.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -628,6 +697,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L3.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -637,6 +707,7 @@
},
{
"BriefDescription": "Counts hardware and software prefetches to all cache levels that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PREFETCHES.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -646,6 +717,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -655,6 +727,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -664,6 +737,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop that hit in another core, which did not forward the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HIT_NO_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -673,6 +747,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that resulted in a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -682,6 +757,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop was sent and data was returned (Modified or Not Modified).",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -691,6 +767,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop hit a modified line in another core's caches which forwarded the data.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -700,6 +777,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by a cache on a remote socket where a snoop hit in another core's caches which forwarded the unmodified data to the requesting core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE_CACHE.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -709,6 +787,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that hit a modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.SNC_CACHE.HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -718,6 +797,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that either hit a non-modified line in a distant L3 Cache or were snooped from a distant core's L1/L2 caches on this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.SNC_CACHE.HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -727,6 +807,7 @@
},
{
"BriefDescription": "Counts streaming stores that hit in the L3 or were snooped from another core's caches on the same socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.STREAMING_WR.L3_HIT",
"MSRIndex": "0x1a6,0x1a7",
@@ -736,6 +817,7 @@
},
{
"BriefDescription": "Demand and prefetch data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.ALL_DATA_RD",
"PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",
@@ -744,6 +826,7 @@
},
{
"BriefDescription": "Counts memory transactions sent to the uncore.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",
"PublicDescription": "Counts memory transactions sent to the uncore including requests initiated by the core, all L3 prefetches, reads resulting from page walks, and snoop responses.",
@@ -752,6 +835,7 @@
},
{
"BriefDescription": "Counts cacheable and non-cacheable code reads to the core.",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.DEMAND_CODE_RD",
"PublicDescription": "Counts both cacheable and non-cacheable code reads to the core.",
@@ -760,6 +844,7 @@
},
{
"BriefDescription": "Demand Data Read requests sent to uncore",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",
"PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",
@@ -768,6 +853,7 @@
},
{
"BriefDescription": "Demand RFO requests including regular RFOs, locks, ItoM",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.DEMAND_RFO",
"PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",
@@ -776,6 +862,7 @@
},
{
"BriefDescription": "For every cycle, increments by the number of outstanding data read requests pending.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",
"PublicDescription": "For every cycle, increments by the number of outstanding data read requests pending. Data read requests include cacheable demand reads and L2 prefetches, but do not include RFOs, code reads or prefetches to the L3. Reads due to page walks resulting from any request type will also be counted. Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",
@@ -784,6 +871,7 @@
},
{
"BriefDescription": "Cycles where at least 1 outstanding data read request is pending.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
@@ -793,6 +881,7 @@
},
{
"BriefDescription": "Cycles with outstanding code read requests pending.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD",
@@ -802,6 +891,7 @@
},
{
"BriefDescription": "Cycles where at least 1 outstanding Demand RFO request is pending.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
@@ -811,6 +901,7 @@
},
{
"BriefDescription": "For every cycle, increments by the number of outstanding code read requests pending.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD",
"PublicDescription": "For every cycle, increments by the number of outstanding code read requests pending. Code Read requests include both cacheable and non-cacheable Code Reads. Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",
@@ -819,6 +910,7 @@
},
{
"BriefDescription": "For every cycle, increments by the number of outstanding demand data read requests pending.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",
"PublicDescription": "For every cycle, increments by the number of outstanding demand data read requests pending. Requests are considered outstanding from the time they miss the core's L2 cache until the transaction completion message is sent to the requestor.",
@@ -827,6 +919,7 @@
},
{
"BriefDescription": "Counts bus locks, accounts for cache line split locks and UC locks.",
+ "Counter": "0,1,2,3",
"EventCode": "0xF4",
"EventName": "SQ_MISC.BUS_LOCK",
"PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically. Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",
@@ -835,6 +928,7 @@
},
{
"BriefDescription": "Cycles the queue waiting for offcore responses is full.",
+ "Counter": "0,1,2,3",
"EventCode": "0xf4",
"EventName": "SQ_MISC.SQ_FULL",
"PublicDescription": "Counts the cycles for which the thread is active and the queue waiting for responses from the uncore cannot take any more entries.",
@@ -843,6 +937,7 @@
},
{
"BriefDescription": "Number of PREFETCHNTA instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.NTA",
"PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",
@@ -851,6 +946,7 @@
},
{
"BriefDescription": "Number of PREFETCHW instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.PREFETCHW",
"PublicDescription": "Counts the number of PREFETCHW instructions executed.",
@@ -859,6 +955,7 @@
},
{
"BriefDescription": "Number of PREFETCHT0 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.T0",
"PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",
@@ -867,6 +964,7 @@
},
{
"BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.T1_T2",
"PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/counter.json b/tools/perf/pmu-events/arch/x86/icelakex/counter.json
new file mode 100644
index 000000000000..5f8c0b7c8d19
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/icelakex/counter.json
@@ -0,0 +1,16 @@
+[
+ {
+ "Size": "8",
+ "FixedSize": "4"
+ },
+ {
+ "Unit": "UBOX",
+ "Size": "2",
+ "FixedSize": "0"
+ },
+ {
+ "Unit": "IRP",
+ "Size": "2",
+ "FixedSize": "0"
+ }
+]
\ No newline at end of file
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/floating-point.json b/tools/perf/pmu-events/arch/x86/icelakex/floating-point.json
index 85c26c889088..61ddce0c8db6 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/floating-point.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/floating-point.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts all microcode FP assists.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.FP",
"PublicDescription": "Counts all microcode Floating Point assists.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational scalar floating-point instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* scalar, double and single precision floating-point: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR",
"PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -89,6 +100,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
"PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -97,6 +109,7 @@
},
{
"BriefDescription": "Number of any Vector retired FP arithmetic instructions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.VECTOR",
"SampleAfterValue": "1000003",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/frontend.json b/tools/perf/pmu-events/arch/x86/icelakex/frontend.json
index f6edc4222f42..c008f3312d12 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/frontend.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/frontend.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts the total number when the front end is resteered, mainly when the BPU cannot provide a correct prediction and this is corrected by other branch handling mechanisms at the front end.",
+ "Counter": "0,1,2,3",
"EventCode": "0xe6",
"EventName": "BACLEARS.ANY",
"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch instruction in a fetch line. This occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction. [This event is alias to ILD_STALL.LCP]",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "DECODE.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. [This event is alias to ILD_STALL.LCP]",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xab",
@@ -27,6 +30,7 @@
},
{
"BriefDescription": "DSB-to-MITE switch true penalty cycles.",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",
"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Retired Instructions who experienced DSB miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",
"MSRIndex": "0x3F7",
@@ -42,10 +47,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.DSB_MISS",
"MSRIndex": "0x3F7",
@@ -53,10 +60,12 @@
"PEBS": "1",
"PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced iTLB true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.ITLB_MISS",
"MSRIndex": "0x3F7",
@@ -64,10 +73,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L1 Cache true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.L1I_MISS",
"MSRIndex": "0x3F7",
@@ -75,10 +86,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L2 Cache true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.L2_MISS",
"MSRIndex": "0x3F7",
@@ -86,10 +99,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_1",
"MSRIndex": "0x3F7",
@@ -97,10 +112,12 @@
"PEBS": "1",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_128",
"MSRIndex": "0x3F7",
@@ -108,10 +125,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_16",
"MSRIndex": "0x3F7",
@@ -119,10 +138,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2",
"MSRIndex": "0x3F7",
@@ -130,10 +151,12 @@
"PEBS": "1",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_256",
"MSRIndex": "0x3F7",
@@ -141,10 +164,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",
"MSRIndex": "0x3F7",
@@ -152,10 +177,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_32",
"MSRIndex": "0x3F7",
@@ -163,10 +190,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_4",
"MSRIndex": "0x3F7",
@@ -174,10 +203,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_512",
"MSRIndex": "0x3F7",
@@ -185,10 +216,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_64",
"MSRIndex": "0x3F7",
@@ -196,10 +229,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_8",
"MSRIndex": "0x3F7",
@@ -207,10 +242,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.STLB_MISS",
"MSRIndex": "0x3F7",
@@ -218,10 +255,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss. [This event is alias to ICACHE_DATA.STALLS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "ICACHE_16B.IFDATA_STALL",
"PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at a 16 Byte granularity. [This event is alias to ICACHE_DATA.STALLS]",
@@ -230,6 +269,7 @@
},
{
"BriefDescription": "Instruction fetch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_HIT",
"PublicDescription": "Counts instruction fetch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity. Accounts for both cacheable and uncacheable accesses.",
@@ -238,6 +278,7 @@
},
{
"BriefDescription": "Instruction fetch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_MISS",
"PublicDescription": "Counts instruction fetch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity. Accounts for both cacheable and uncacheable accesses.",
@@ -246,6 +287,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_TAG.STALLS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_STALL",
"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_TAG.STALLS]",
@@ -254,6 +296,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss. [This event is alias to ICACHE_16B.IFDATA_STALL]",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "ICACHE_DATA.STALLS",
"PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at a 16 Byte granularity. [This event is alias to ICACHE_16B.IFDATA_STALL]",
@@ -262,6 +305,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_64B.IFTAG_STALL]",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_TAG.STALLS",
"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_64B.IFTAG_STALL]",
@@ -270,6 +314,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_ANY",
@@ -279,6 +324,7 @@
},
{
"BriefDescription": "Cycles DSB is delivering optimal number of Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_OK",
@@ -288,6 +334,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.DSB_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",
@@ -296,6 +343,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES_ANY",
@@ -305,6 +353,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering optimal number of Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES_OK",
@@ -314,6 +363,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MITE_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",
@@ -322,6 +372,7 @@
},
{
"BriefDescription": "Number of switches from DSB or MITE to the MS",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x79",
@@ -332,6 +383,7 @@
},
{
"BriefDescription": "Uops delivered to IDQ while MS is busy",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MS_UOPS",
"PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS). Any instruction over 4 uops will be delivered by the MS. Some instructions such as transcendentals may additionally generate uops from the MS.",
@@ -340,6 +392,7 @@
},
{
"BriefDescription": "Uops not delivered by IDQ when backend of the machine is not stalled",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",
"PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
@@ -348,6 +401,7 @@
},
{
"BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "5",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",
@@ -357,6 +411,7 @@
},
{
"BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x9C",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/memory.json b/tools/perf/pmu-events/arch/x86/icelakex/memory.json
index f36ac04f8d76..97ae736c127f 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/memory.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of machine clears due to memory ordering conflicts.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc3",
"EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
"PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
@@ -25,10 +28,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "1009",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
@@ -37,10 +42,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "20011",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
@@ -49,10 +56,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "503",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
@@ -61,10 +70,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
@@ -73,10 +84,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
@@ -85,10 +98,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "101",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
@@ -97,10 +112,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "2003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
@@ -109,10 +126,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "50021",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -122,6 +141,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -131,6 +151,7 @@
},
{
"BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -140,6 +161,7 @@
},
{
"BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -149,6 +171,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -158,6 +181,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by the local socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -167,6 +191,7 @@
},
{
"BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L1D_AND_SWPF.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -176,6 +201,7 @@
},
{
"BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L1D_AND_SWPF.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -185,6 +211,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that missed the local socket's L1, L2, and L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L3.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -194,6 +221,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L3.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -203,6 +231,7 @@
},
{
"BriefDescription": "Counts full cacheline writes (ItoM) that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ITOM.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -212,6 +241,7 @@
},
{
"BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -221,6 +251,7 @@
},
{
"BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -230,6 +261,7 @@
},
{
"BriefDescription": "Counts hardware and software prefetches to all cache levels that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.PREFETCHES.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -239,6 +271,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -248,6 +281,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by the local socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -257,6 +291,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that missed the L3 Cache and were supplied by the local socket (DRAM or PMM), whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM or DRAM accesses that are controlled by the close or distant SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.L3_MISS_LOCAL_SOCKET",
"MSRIndex": "0x1a6,0x1a7",
@@ -266,6 +301,7 @@
},
{
"BriefDescription": "Counts streaming stores that missed the local socket's L1, L2, and L3 caches.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.STREAMING_WR.L3_MISS",
"MSRIndex": "0x1a6,0x1a7",
@@ -275,6 +311,7 @@
},
{
"BriefDescription": "Counts streaming stores that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline is homed locally.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.STREAMING_WR.L3_MISS_LOCAL",
"MSRIndex": "0x1a6,0x1a7",
@@ -284,6 +321,7 @@
},
{
"BriefDescription": "Counts demand data read requests that miss the L3 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
"SampleAfterValue": "100003",
@@ -291,6 +329,7 @@
},
{
"BriefDescription": "Cycles where at least one demand data read request known to have missed the L3 cache is pending.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_L3_MISS_DEMAND_DATA_RD",
@@ -300,6 +339,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD",
@@ -308,6 +348,7 @@
},
{
"BriefDescription": "Cycles where the core is waiting on at least 6 outstanding demand data read requests known to have missed the L3 cache.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD_GE_6",
@@ -317,6 +358,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED",
"PublicDescription": "Counts the number of times RTM abort was triggered.",
@@ -325,6 +367,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_EVENTS",
"PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).",
@@ -333,6 +376,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_MEM",
"PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",
@@ -341,6 +385,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_MEMTYPE",
"PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",
@@ -349,6 +394,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",
"PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",
@@ -357,6 +403,7 @@
},
{
"BriefDescription": "Number of times an RTM execution successfully committed",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.COMMIT",
"PublicDescription": "Counts the number of times RTM commit succeeded.",
@@ -365,6 +412,7 @@
},
{
"BriefDescription": "Number of times an RTM execution started.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.START",
"PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",
@@ -373,6 +421,7 @@
},
{
"BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed inside a transactional region",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC2",
"PublicDescription": "Counts Unfriendly TSX abort triggered by a vzeroupper instruction.",
@@ -381,6 +430,7 @@
},
{
"BriefDescription": "Number of times an instruction execution caused the transactional nest count supported to be exceeded",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC3",
"PublicDescription": "Counts Unfriendly TSX abort triggered by a nest count that is too deep.",
@@ -389,6 +439,7 @@
},
{
"BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY_READ",
"PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",
@@ -397,6 +448,7 @@
},
{
"BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional writes.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY_WRITE",
"PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",
@@ -405,6 +457,7 @@
},
{
"BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CONFLICT",
"PublicDescription": "Counts the number of times a TSX line had a cache conflict.",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/other.json b/tools/perf/pmu-events/arch/x86/icelakex/other.json
index 63d5faf2fc43..0bae49690d58 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/other.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/other.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
"PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
"PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
"PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). This includes high current AVX 512-bit instructions.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Hit snoop reply with data, line invalidated.",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.I_FWD_FE",
"PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's cache, after the data is forwarded back to the requestor and indicating the data was found unmodified in the (FE) Forward or Exclusive State in this cores caches cache. A single snoop response from the core counts on all hyperthreads of the core.",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "HitM snoop reply with data, line invalidated.",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.I_FWD_M",
"PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's caches, after the data is forwarded back to the requestor, and indicating the data was found modified(M) in this cores caches cache (aka HitM response). A single snoop response from the core counts on all hyperthreads of the core.",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Hit snoop reply without sending the data, line invalidated.",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.I_HIT_FSE",
"PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated in this core's caches without being forwarded back to the requestor. The line was in Forward, Shared or Exclusive (FSE) state in this cores caches. A single snoop response from the core counts on all hyperthreads of the core.",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Line not found snoop reply",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.MISS",
"PublicDescription": "Counts responses to snoops indicating that the data was not found (IHitI) in this core's caches. A single snoop response from the core counts on all hyperthreads of the Core.",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Hit snoop reply with data, line kept in Shared state.",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.S_FWD_FE",
"PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (FS) Forward or Shared state. A single snoop response from the core counts on all hyperthreads of the core.",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "HitM snoop reply with data, line kept in Shared state",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.S_FWD_M",
"PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (M)odified state. A single snoop response from the core counts on all hyperthreads of the core.",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "Hit snoop reply without sending the data, line kept in Shared state.",
+ "Counter": "0,1,2,3",
"EventCode": "0xef",
"EventName": "CORE_SNOOP_RESPONSE.S_HIT_FSE",
"PublicDescription": "Counts responses to snoops indicating the line was kept on this core in the (S)hared state, and that the data was found unmodified but not forwarded back to the requestor, initially the data was found in the cache in the (FSE) Forward, Shared state or Exclusive state. A single snoop response from the core counts on all hyperthreads of the core.",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -90,6 +101,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -99,6 +111,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -108,6 +121,7 @@
},
{
"BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_CODE_RD.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -117,6 +131,7 @@
},
{
"BriefDescription": "Counts demand data reads that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -126,6 +141,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -135,6 +151,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -144,6 +161,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those PMM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.LOCAL_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -153,6 +171,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -162,6 +181,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -171,6 +191,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.REMOTE_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -180,6 +201,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -189,6 +211,7 @@
},
{
"BriefDescription": "Counts demand data reads that were supplied by PMM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.SNC_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -198,6 +221,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -207,6 +231,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -216,6 +241,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -225,6 +251,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by PMM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those PMM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.LOCAL_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -234,6 +261,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by PMM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -243,6 +271,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.REMOTE_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -252,6 +281,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -261,6 +291,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that were supplied by PMM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.SNC_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -270,6 +301,7 @@
},
{
"BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L1D_AND_SWPF.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -279,6 +311,7 @@
},
{
"BriefDescription": "Counts L1 data cache prefetch requests and software prefetches (except PREFETCHW) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L1D_AND_SWPF.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -288,6 +321,7 @@
},
{
"BriefDescription": "Counts hardware prefetch (which bring data to L2) that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L2.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -297,6 +331,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L3.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -306,6 +341,7 @@
},
{
"BriefDescription": "Counts hardware prefetches to the L3 only that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline was homed in a remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.HWPF_L3.REMOTE",
"MSRIndex": "0x1a6,0x1a7",
@@ -315,6 +351,7 @@
},
{
"BriefDescription": "Counts full cacheline writes (ItoM) that were not supplied by the local socket's L1, L2, or L3 caches and the cacheline was homed in a remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.ITOM.REMOTE",
"MSRIndex": "0x1a6,0x1a7",
@@ -324,6 +361,7 @@
},
{
"BriefDescription": "Counts miscellaneous requests, such as I/O and un-cacheable accesses that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.OTHER.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -333,6 +371,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -342,6 +381,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -351,6 +391,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.LOCAL_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -360,6 +401,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only those PMM accesses that are controlled by the close SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.LOCAL_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -369,6 +411,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts DRAM accesses that are controlled by the close or distant SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -378,6 +421,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to this socket, whether or not in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM accesses that are controlled by the close or distant SNC Cluster.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.LOCAL_SOCKET_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -387,6 +431,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were not supplied by the local socket's L1, L2, or L3 caches and were supplied by a remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE",
"MSRIndex": "0x1a6,0x1a7",
@@ -396,6 +441,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -405,6 +451,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM or PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE_MEMORY",
"MSRIndex": "0x1a6,0x1a7",
@@ -414,6 +461,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM attached to another socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.REMOTE_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -423,6 +471,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by DRAM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.SNC_DRAM",
"MSRIndex": "0x1a6,0x1a7",
@@ -432,6 +481,7 @@
},
{
"BriefDescription": "Counts all (cacheable) data read, code read and RFO requests including demands and prefetches to the core caches (L1 or L2) that were supplied by PMM on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.READS_TO_CORE.SNC_PMM",
"MSRIndex": "0x1a6,0x1a7",
@@ -441,6 +491,7 @@
},
{
"BriefDescription": "Counts streaming stores that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
@@ -450,6 +501,7 @@
},
{
"BriefDescription": "Counts Demand RFOs, ItoM's, PREFECTHW's, Hardware RFO Prefetches to the L1/L2 and Streaming stores that likely resulted in a store to Memory (DRAM or PMM)",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.WRITE_ESTIMATE.MEMORY",
"MSRIndex": "0x1a6,0x1a7",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/pipeline.json b/tools/perf/pmu-events/arch/x86/icelakex/pipeline.json
index 176e5ef2a24a..50f5a8dce8a6 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/pipeline.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Cycles when divide unit is busy executing divide or square root operations.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x14",
"EventName": "ARITH.DIVIDER_ACTIVE",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.ANY",
"PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware Examples include AD (page Access Dirty), FP and AVX related assists.",
@@ -18,6 +20,7 @@
},
{
"BriefDescription": "All branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.ALL_BRANCHES",
"PEBS": "1",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND",
"PEBS": "1",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Not taken branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_NTAKEN",
"PEBS": "1",
@@ -44,6 +49,7 @@
},
{
"BriefDescription": "Taken conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_TAKEN",
"PEBS": "1",
@@ -53,6 +59,7 @@
},
{
"BriefDescription": "Far branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.FAR_BRANCH",
"PEBS": "1",
@@ -62,6 +69,7 @@
},
{
"BriefDescription": "Indirect near branch instructions retired (excluding returns)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.INDIRECT",
"PEBS": "1",
@@ -71,6 +79,7 @@
},
{
"BriefDescription": "Direct and indirect near call instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_CALL",
"PEBS": "1",
@@ -80,6 +89,7 @@
},
{
"BriefDescription": "Return instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_RETURN",
"PEBS": "1",
@@ -89,6 +99,7 @@
},
{
"BriefDescription": "Taken branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -98,6 +109,7 @@
},
{
"BriefDescription": "All mispredicted branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.ALL_BRANCHES",
"PEBS": "1",
@@ -106,6 +118,7 @@
},
{
"BriefDescription": "Mispredicted conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND",
"PEBS": "1",
@@ -115,6 +128,7 @@
},
{
"BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND_NTAKEN",
"PEBS": "1",
@@ -124,6 +138,7 @@
},
{
"BriefDescription": "number of branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND_TAKEN",
"PEBS": "1",
@@ -133,6 +148,7 @@
},
{
"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.INDIRECT",
"PEBS": "1",
@@ -142,6 +158,7 @@
},
{
"BriefDescription": "Mispredicted indirect CALL instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.INDIRECT_CALL",
"PEBS": "1",
@@ -151,6 +168,7 @@
},
{
"BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -160,6 +178,7 @@
},
{
"BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.RET",
"PEBS": "1",
@@ -169,6 +188,7 @@
},
{
"BriefDescription": "Cycle counts are evenly distributed between active threads in the Core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",
"PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
@@ -177,6 +197,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when this thread is unhalted and the other thread is halted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",
"PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",
@@ -185,6 +206,7 @@
},
{
"BriefDescription": "Core crystal clock cycles. Cycle counts are evenly distributed between active threads in the Core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",
"PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
@@ -193,6 +215,7 @@
},
{
"BriefDescription": "Reference cycles when the core is not in halt state.",
+ "Counter": "Fixed counter 2",
"EventName": "CPU_CLK_UNHALTED.REF_TSC",
"PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
"SampleAfterValue": "2000003",
@@ -200,6 +223,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when the thread is unhalted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.REF_XCLK",
"PublicDescription": "Counts core crystal clock cycles when the thread is unhalted.",
@@ -208,6 +232,7 @@
},
{
"BriefDescription": "Core cycles when the thread is not in halt state",
+ "Counter": "Fixed counter 1",
"EventName": "CPU_CLK_UNHALTED.THREAD",
"PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.",
"SampleAfterValue": "2000003",
@@ -215,6 +240,7 @@
},
{
"BriefDescription": "Thread cycles when thread is not in halt state",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3C",
"EventName": "CPU_CLK_UNHALTED.THREAD_P",
"PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",
@@ -222,6 +248,7 @@
},
{
"BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "8",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",
@@ -230,6 +257,7 @@
},
{
"BriefDescription": "Cycles while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",
@@ -238,6 +266,7 @@
},
{
"BriefDescription": "Cycles while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "16",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",
@@ -246,6 +275,7 @@
},
{
"BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "12",
"EventCode": "0xA3",
"EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",
@@ -254,6 +284,7 @@
},
{
"BriefDescription": "Execution stalls while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",
@@ -262,6 +293,7 @@
},
{
"BriefDescription": "Execution stalls while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "20",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_MEM_ANY",
@@ -270,6 +302,7 @@
},
{
"BriefDescription": "Total execution stalls.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",
@@ -278,6 +311,7 @@
},
{
"BriefDescription": "Cycles total of 1 uop is executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.1_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",
@@ -286,6 +320,7 @@
},
{
"BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.2_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",
@@ -294,6 +329,7 @@
},
{
"BriefDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.3_PORTS_UTIL",
"PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -302,6 +338,7 @@
},
{
"BriefDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.4_PORTS_UTIL",
"PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -310,6 +347,7 @@
},
{
"BriefDescription": "Cycles where the Store Buffer was full and no loads caused an execution stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xA6",
"EventName": "EXE_ACTIVITY.BOUND_ON_STORES",
@@ -319,6 +357,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction. [This event is alias to DECODE.LCP]",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "ILD_STALL.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. [This event is alias to DECODE.LCP]",
@@ -327,6 +366,7 @@
},
{
"BriefDescription": "Instruction decoders utilized in a cycle",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "INST_DECODED.DECODERS",
"PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
@@ -335,6 +375,7 @@
},
{
"BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.ANY",
"PEBS": "1",
"PublicDescription": "Counts the number of instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter.",
@@ -343,6 +384,7 @@
},
{
"BriefDescription": "Number of instructions retired. General Counter - architectural event",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.ANY_P",
"PEBS": "1",
@@ -351,6 +393,7 @@
},
{
"BriefDescription": "Number of all retired NOP instructions.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.NOP",
"PEBS": "1",
@@ -359,6 +402,7 @@
},
{
"BriefDescription": "Precise instruction retired event with a reduced effect of PEBS shadow in IP distribution",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.PREC_DIST",
"PEBS": "1",
"PublicDescription": "A version of INST_RETIRED that allows for a more unbiased distribution of samples across instructions retired. It utilizes the Precise Distribution of Instructions Retired (PDIR) feature to mitigate some bias in how retired instructions get sampled. Use on Fixed Counter 0.",
@@ -367,6 +411,7 @@
},
{
"BriefDescription": "Cycles the Backend cluster is recovering after a miss-speculation or a Store Buffer or Load Buffer drain stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x0D",
"EventName": "INT_MISC.ALL_RECOVERY_CYCLES",
@@ -376,6 +421,7 @@
},
{
"BriefDescription": "Clears speculative count",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x0D",
@@ -386,6 +432,7 @@
},
{
"BriefDescription": "Counts cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0d",
"EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",
"PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
@@ -394,6 +441,7 @@
},
{
"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for this thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0D",
"EventName": "INT_MISC.RECOVERY_CYCLES",
"PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",
@@ -402,6 +450,7 @@
},
{
"BriefDescription": "TMA slots where uops got dropped",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0d",
"EventName": "INT_MISC.UOP_DROPPING",
"PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",
@@ -410,6 +459,7 @@
},
{
"BriefDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.NO_SR",
"PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
@@ -418,6 +468,7 @@
},
{
"BriefDescription": "Loads blocked due to overlapping with a preceding store that cannot be forwarded.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.STORE_FORWARD",
"PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",
@@ -426,6 +477,7 @@
},
{
"BriefDescription": "False dependencies due to partial compare on address.",
+ "Counter": "0,1,2,3",
"EventCode": "0x07",
"EventName": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS",
"PublicDescription": "Counts the number of times a load got blocked due to false dependencies due to partial compare on address.",
@@ -434,6 +486,7 @@
},
{
"BriefDescription": "Counts the number of demand load dispatches that hit L1D fill buffer (FB) allocated for software prefetch.",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "LOAD_HIT_PREFETCH.SWPF",
"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
@@ -442,6 +495,7 @@
},
{
"BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xA8",
"EventName": "LSD.CYCLES_ACTIVE",
@@ -451,6 +505,7 @@
},
{
"BriefDescription": "Cycles optimal number of Uops delivered by the LSD, but did not come from the decoder.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0xa8",
"EventName": "LSD.CYCLES_OK",
@@ -460,6 +515,7 @@
},
{
"BriefDescription": "Number of Uops delivered by the LSD.",
+ "Counter": "0,1,2,3",
"EventCode": "0xa8",
"EventName": "LSD.UOPS",
"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
@@ -468,6 +524,7 @@
},
{
"BriefDescription": "Number of machine clears (nukes) of any type.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xc3",
@@ -478,6 +535,7 @@
},
{
"BriefDescription": "Self-modifying code (SMC) detected.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc3",
"EventName": "MACHINE_CLEARS.SMC",
"PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
@@ -486,6 +544,7 @@
},
{
"BriefDescription": "Increments whenever there is an update to the LBR array.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcc",
"EventName": "MISC_RETIRED.LBR_INSERTS",
"PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR to be enabled properly.",
@@ -494,6 +553,7 @@
},
{
"BriefDescription": "Number of retired PAUSE instructions. This event is not supported on first SKL and KBL products.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcc",
"EventName": "MISC_RETIRED.PAUSE_INST",
"PublicDescription": "Counts number of retired PAUSE instructions. This event is not supported on first SKL and KBL products.",
@@ -502,6 +562,7 @@
},
{
"BriefDescription": "Cycles stalled due to no store buffers available. (not including draining form sync).",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.SB",
"PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",
@@ -510,6 +571,7 @@
},
{
"BriefDescription": "Counts cycles where the pipeline is stalled due to serializing operations.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.SCOREBOARD",
"SampleAfterValue": "100003",
@@ -517,6 +579,7 @@
},
{
"BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x5e",
"EventName": "RS_EVENTS.EMPTY_CYCLES",
"PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into stravation periods (e.g. branch mispredictions or i-cache misses)",
@@ -525,6 +588,7 @@
},
{
"BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x5E",
@@ -536,6 +600,7 @@
},
{
"BriefDescription": "TMA slots where no uops were being issued due to lack of back-end resources.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",
"PublicDescription": "Counts the number of Top-down Microarchitecture Analysis (TMA) method's slots where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",
@@ -544,6 +609,7 @@
},
{
"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",
+ "Counter": "Fixed counter 3",
"EventName": "TOPDOWN.SLOTS",
"PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3).",
"SampleAfterValue": "10000003",
@@ -551,6 +617,7 @@
},
{
"BriefDescription": "TMA slots available for an unhalted logical processor. General counter - architectural event",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.SLOTS_P",
"PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",
@@ -559,6 +626,7 @@
},
{
"BriefDescription": "Number of uops decoded out of instructions exclusively fetched by decoder 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UOPS_DECODED.DEC0",
"PublicDescription": "Uops exclusively fetched by decoder 0",
@@ -567,6 +635,7 @@
},
{
"BriefDescription": "Number of uops executed on port 0",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_0",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 0.",
@@ -575,6 +644,7 @@
},
{
"BriefDescription": "Number of uops executed on port 1",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_1",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 1.",
@@ -583,6 +653,7 @@
},
{
"BriefDescription": "Number of uops executed on port 2 and 3",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_2_3",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to ports 2 and 3.",
@@ -591,6 +662,7 @@
},
{
"BriefDescription": "Number of uops executed on port 4 and 9",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_4_9",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to ports 5 and 9.",
@@ -599,6 +671,7 @@
},
{
"BriefDescription": "Number of uops executed on port 5",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_5",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 5.",
@@ -607,6 +680,7 @@
},
{
"BriefDescription": "Number of uops executed on port 6",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_6",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 6.",
@@ -615,6 +689,7 @@
},
{
"BriefDescription": "Number of uops executed on port 7 and 8",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_7_8",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to ports 7 and 8.",
@@ -623,6 +698,7 @@
},
{
"BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",
@@ -632,6 +708,7 @@
},
{
"BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",
@@ -641,6 +718,7 @@
},
{
"BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "3",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",
@@ -650,6 +728,7 @@
},
{
"BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",
@@ -659,6 +738,7 @@
},
{
"BriefDescription": "Cycles where at least 1 uop was executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_1",
@@ -668,6 +748,7 @@
},
{
"BriefDescription": "Cycles where at least 2 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_2",
@@ -677,6 +758,7 @@
},
{
"BriefDescription": "Cycles where at least 3 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "3",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_3",
@@ -686,6 +768,7 @@
},
{
"BriefDescription": "Cycles where at least 4 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_4",
@@ -695,6 +778,7 @@
},
{
"BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.STALL_CYCLES",
@@ -705,6 +789,7 @@
},
{
"BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.THREAD",
"SampleAfterValue": "2000003",
@@ -712,6 +797,7 @@
},
{
"BriefDescription": "Counts the number of x87 uops dispatched.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xB1",
"EventName": "UOPS_EXECUTED.X87",
"PublicDescription": "Counts the number of x87 uops executed.",
@@ -720,6 +806,7 @@
},
{
"BriefDescription": "Uops that RAT issues to RS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0e",
"EventName": "UOPS_ISSUED.ANY",
"PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",
@@ -728,6 +815,7 @@
},
{
"BriefDescription": "Cycles when RAT does not issue Uops to RS for the thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x0E",
"EventName": "UOPS_ISSUED.STALL_CYCLES",
@@ -738,6 +826,7 @@
},
{
"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector registers.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0e",
"EventName": "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH",
"PublicDescription": "Counts the number of Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order to preserve upper bits of vector registers. Starting with the Skylake microarchitecture, these Blend uops are needed since every Intel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destination register. For more information, refer to 'Mixing Intel AVX and Intel SSE Code' section of the Optimization Guide.",
@@ -746,6 +835,7 @@
},
{
"BriefDescription": "Retirement slots used.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.SLOTS",
"PublicDescription": "Counts the retirement slots used each cycle.",
@@ -754,6 +844,7 @@
},
{
"BriefDescription": "Cycles without actually retired uops.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.STALL_CYCLES",
@@ -764,6 +855,7 @@
},
{
"BriefDescription": "Cycles with less than 10 actually retired uops.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "10",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.TOTAL_CYCLES",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json b/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json
index b6ce14ebf844..016506576a4f 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x65",
"EventName": "UNC_CHA_2LM_NM_INVITOX.LOCAL",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x65",
"EventName": "UNC_CHA_2LM_NM_INVITOX.REMOTE",
@@ -19,6 +21,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x65",
"EventName": "UNC_CHA_2LM_NM_INVITOX.SETCONFLICT",
@@ -28,6 +31,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x64",
"EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.LLC",
@@ -37,6 +41,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x64",
"EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.SF",
@@ -46,6 +51,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x64",
"EventName": "UNC_CHA_2LM_NM_SETCONFLICTS.TOR",
@@ -55,6 +61,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x70",
"EventName": "UNC_CHA_2LM_NM_SETCONFLICTS2.MEMWR",
@@ -64,6 +71,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x70",
"EventName": "UNC_CHA_2LM_NM_SETCONFLICTS2.MEMWRNI",
@@ -73,6 +81,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -82,6 +91,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -91,6 +101,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -100,6 +111,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -109,6 +121,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -118,6 +131,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -127,6 +141,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -136,6 +151,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -145,6 +161,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -154,6 +171,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -163,6 +181,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_CHA_AG0_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -172,6 +191,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -181,6 +201,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -190,6 +211,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -199,6 +221,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -208,6 +231,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -217,6 +241,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -226,6 +251,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -235,6 +261,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -244,6 +271,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -253,6 +281,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -262,6 +291,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_CHA_AG0_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -271,6 +301,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -280,6 +311,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -289,6 +321,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -298,6 +331,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -307,6 +341,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -316,6 +351,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -325,6 +361,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -334,6 +371,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -343,6 +381,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -352,6 +391,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -361,6 +401,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_CHA_AG0_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -370,6 +411,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -379,6 +421,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -388,6 +431,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -397,6 +441,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -406,6 +451,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -415,6 +461,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -424,6 +471,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -433,6 +481,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -442,6 +491,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -451,6 +501,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -460,6 +511,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_CHA_AG0_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -469,6 +521,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -478,6 +531,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -487,6 +541,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -496,6 +551,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -505,6 +561,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -514,6 +571,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -523,6 +581,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -532,6 +591,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -541,6 +601,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -550,6 +611,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -559,6 +621,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_CHA_AG1_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -568,6 +631,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -577,6 +641,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -586,6 +651,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -595,6 +661,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -604,6 +671,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -613,6 +681,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -622,6 +691,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -631,6 +701,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -640,6 +711,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -649,6 +721,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -658,6 +731,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_CHA_AG1_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -667,6 +741,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -676,6 +751,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -685,6 +761,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -694,6 +771,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -703,6 +781,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -712,6 +791,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -721,6 +801,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -730,6 +811,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -739,6 +821,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -748,6 +831,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -757,6 +841,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_CHA_AG1_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -766,6 +851,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -775,6 +861,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -784,6 +871,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -793,6 +881,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -802,6 +891,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -811,6 +901,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -820,6 +911,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -829,6 +921,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -838,6 +931,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -847,6 +941,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -856,6 +951,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_CHA_AG1_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -865,6 +961,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass : Intermediate bypass Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.INTERMEDIATE",
"PerPkg": "1",
@@ -874,6 +971,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass : Not Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.NOT_TAKEN",
"PerPkg": "1",
@@ -883,6 +981,7 @@
},
{
"BriefDescription": "CHA to iMC Bypass : Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_CHA_BYPASS_CHA_IMC.TAKEN",
"PerPkg": "1",
@@ -892,12 +991,14 @@
},
{
"BriefDescription": "Clockticks of the uncore caching and home agent (CHA)",
+ "Counter": "0,1,2,3",
"EventName": "UNC_CHA_CLOCKTICKS",
"PerPkg": "1",
"Unit": "CHA"
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_CHA_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -905,6 +1006,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Any Cycle with Multiple Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_GTONE",
"PerPkg": "1",
@@ -914,6 +1016,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Any Single Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.ANY_ONE",
"PerPkg": "1",
@@ -923,6 +1026,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple Core Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_GTONE",
"PerPkg": "1",
@@ -932,6 +1036,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single Core Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.CORE_ONE",
"PerPkg": "1",
@@ -941,6 +1046,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_GTONE",
"PerPkg": "1",
@@ -950,6 +1056,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EVICT_ONE",
"PerPkg": "1",
@@ -959,6 +1066,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple External Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_GTONE",
"PerPkg": "1",
@@ -968,6 +1076,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single External Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.EXT_ONE",
"PerPkg": "1",
@@ -977,6 +1086,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Multiple Snoop Targets from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.REMOTE_GTONE",
"PerPkg": "1",
@@ -986,6 +1096,7 @@
},
{
"BriefDescription": "Core Cross Snoops Issued : Single Snoop Target from Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_CHA_CORE_SNP.REMOTE_ONE",
"PerPkg": "1",
@@ -995,6 +1106,7 @@
},
{
"BriefDescription": "Counter 0 Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_CHA_COUNTER0_OCCUPANCY",
"PerPkg": "1",
@@ -1003,6 +1115,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_DRD",
"PerPkg": "1",
@@ -1011,6 +1124,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_CHA_DIRECT_GO.HA_SUPPRESS_NO_D2C",
"PerPkg": "1",
@@ -1019,6 +1133,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_CHA_DIRECT_GO.HA_TOR_DEALLOC",
"PerPkg": "1",
@@ -1027,6 +1142,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.EXTCMP",
"PerPkg": "1",
@@ -1035,6 +1151,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO",
"PerPkg": "1",
@@ -1043,6 +1160,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.FAST_GO_PULL",
"PerPkg": "1",
@@ -1051,6 +1169,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.GO",
"PerPkg": "1",
@@ -1059,6 +1178,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.GO_PULL",
"PerPkg": "1",
@@ -1067,6 +1187,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.IDLE_DUE_SUPPRESS",
"PerPkg": "1",
@@ -1075,6 +1196,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.NOP",
"PerPkg": "1",
@@ -1083,6 +1205,7 @@
},
{
"BriefDescription": "Direct GO",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_CHA_DIRECT_GO_OPC.PULL",
"PerPkg": "1",
@@ -1091,6 +1214,7 @@
},
{
"BriefDescription": "Multi-socket cacheline directory state lookups : Snoop Not Needed",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_CHA_DIR_LOOKUP.NO_SNP",
"PerPkg": "1",
@@ -1100,6 +1224,7 @@
},
{
"BriefDescription": "Multi-socket cacheline directory state lookups : Snoop Needed",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_CHA_DIR_LOOKUP.SNP",
"PerPkg": "1",
@@ -1109,6 +1234,7 @@
},
{
"BriefDescription": "Multi-socket cacheline directory state updates; memory write due to directory update from the home agent (HA) pipe",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_CHA_DIR_UPDATE.HA",
"PerPkg": "1",
@@ -1118,6 +1244,7 @@
},
{
"BriefDescription": "Multi-socket cacheline directory state updates; memory write due to directory update from (table of requests) TOR pipe",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_CHA_DIR_UPDATE.TOR",
"PerPkg": "1",
@@ -1127,6 +1254,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_LOCAL",
"PerPkg": "1",
@@ -1136,6 +1264,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_NONLOCAL",
"PerPkg": "1",
@@ -1145,6 +1274,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_IV",
"PerPkg": "1",
@@ -1154,6 +1284,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - No Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.DPT_STALL_NOCRD",
"PerPkg": "1",
@@ -1163,6 +1294,7 @@
},
{
"BriefDescription": "Distress signal asserted : Horizontal",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.HORZ",
"PerPkg": "1",
@@ -1172,6 +1304,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.PMM_LOCAL",
"PerPkg": "1",
@@ -1181,6 +1314,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.PMM_NONLOCAL",
"PerPkg": "1",
@@ -1190,6 +1324,7 @@
},
{
"BriefDescription": "Distress signal asserted : Vertical",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_CHA_DISTRESS_ASSERTED.VERT",
"PerPkg": "1",
@@ -1199,6 +1334,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -1208,6 +1344,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_CHA_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -1217,6 +1354,7 @@
},
{
"BriefDescription": "Read request from a remote socket which hit in the HitMe Cache to a line In the E state",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.EX_RDS",
"PerPkg": "1",
@@ -1226,6 +1364,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache : Remote socket ownership read requests that hit in S state.",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.SHARED_OWNREQ",
"PerPkg": "1",
@@ -1235,6 +1374,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache : Remote socket WBMtoE requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.WBMTOE",
"PerPkg": "1",
@@ -1243,6 +1383,7 @@
},
{
"BriefDescription": "Counts Number of Hits in HitMe Cache : Remote socket writeback to I or S requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_CHA_HITME_HIT.WBMTOI_OR_S",
"PerPkg": "1",
@@ -1252,6 +1393,7 @@
},
{
"BriefDescription": "Counts Number of times HitMe Cache is accessed : Remote socket read requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_CHA_HITME_LOOKUP.READ",
"PerPkg": "1",
@@ -1261,6 +1403,7 @@
},
{
"BriefDescription": "Counts Number of times HitMe Cache is accessed : Remote socket write (i.e. writeback) requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_CHA_HITME_LOOKUP.WRITE",
"PerPkg": "1",
@@ -1270,6 +1413,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache : Remote socket RdInvOwn requests that are not to shared line",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.NOTSHARED_RDINVOWN",
"PerPkg": "1",
@@ -1279,6 +1423,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache : Remote socket read or invalidate requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.READ_OR_INV",
"PerPkg": "1",
@@ -1288,6 +1433,7 @@
},
{
"BriefDescription": "Counts Number of Misses in HitMe Cache : Remote socket RdInvOwn requests to shared line",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_CHA_HITME_MISS.SHARED_RDINVOWN",
"PerPkg": "1",
@@ -1297,6 +1443,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Deallocate HitME$ on Reads without RspFwdI*",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE",
"PerPkg": "1",
@@ -1305,6 +1452,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : op is RspIFwd or RspIFwdWb for a local request",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.DEALLOCATE_RSPFWDI_LOC",
"PerPkg": "1",
@@ -1314,6 +1462,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Update HitMe Cache on RdInvOwn even if not RspFwdI*",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.RDINVOWN",
"PerPkg": "1",
@@ -1322,6 +1471,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : op is RspIFwd or RspIFwdWb for a remote request",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.RSPFWDI_REM",
"PerPkg": "1",
@@ -1331,6 +1481,7 @@
},
{
"BriefDescription": "Counts the number of Allocate/Update to HitMe Cache : Update HitMe Cache to SHARed",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_CHA_HITME_UPDATE.SHARED",
"PerPkg": "1",
@@ -1339,6 +1490,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1348,6 +1500,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1357,6 +1510,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1366,6 +1520,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_CHA_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1375,6 +1530,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1384,6 +1540,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1393,6 +1550,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1402,6 +1560,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_CHA_HORZ_RING_AKC_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1411,6 +1570,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1420,6 +1580,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1429,6 +1590,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1438,6 +1600,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_CHA_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1447,6 +1610,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1456,6 +1620,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1465,6 +1630,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1474,6 +1640,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_CHA_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1483,6 +1650,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Left",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -1492,6 +1660,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Right",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_CHA_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -1501,6 +1670,7 @@
},
{
"BriefDescription": "Normal priority reads issued to the memory controller from the CHA",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_CHA_IMC_READS_COUNT.NORMAL",
"PerPkg": "1",
@@ -1510,6 +1680,7 @@
},
{
"BriefDescription": "HA to iMC Reads Issued : ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_CHA_IMC_READS_COUNT.PRIORITY",
"PerPkg": "1",
@@ -1519,6 +1690,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : Full Line Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL",
"PerPkg": "1",
@@ -1528,6 +1700,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Full Line",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.FULL_PRIORITY",
"PerPkg": "1",
@@ -1537,6 +1710,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : Partial Non-ISOCH",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL",
"PerPkg": "1",
@@ -1546,6 +1720,7 @@
},
{
"BriefDescription": "CHA to iMC Full Line Writes Issued : ISOCH Partial",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_CHA_IMC_WRITES_COUNT.PARTIAL_PRIORITY",
"PerPkg": "1",
@@ -1555,6 +1730,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Any Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ALL",
"PerPkg": "1",
@@ -1564,6 +1740,7 @@
},
{
"BriefDescription": "Cache Lookups : All transactions from Remote Agents",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ALL_REMOTE",
"PerPkg": "1",
@@ -1573,6 +1750,7 @@
},
{
"BriefDescription": "Cache Lookups : All Request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.ANY_F",
"PerPkg": "1",
@@ -1581,6 +1759,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.CODE_READ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE",
@@ -1590,6 +1769,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.CODE_READ_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_LOCAL",
@@ -1599,6 +1779,7 @@
},
{
"BriefDescription": "Cache Lookups : Code Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ",
"PerPkg": "1",
@@ -1608,6 +1789,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_F",
"PerPkg": "1",
@@ -1616,6 +1798,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_LOCAL",
"PerPkg": "1",
@@ -1625,6 +1808,7 @@
},
{
"BriefDescription": "Cache Lookups : Code Read Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_MISS",
"PerPkg": "1",
@@ -1634,6 +1818,7 @@
},
{
"BriefDescription": "Cache Lookups : CRd Requests that come from a Remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_READ_REMOTE",
"PerPkg": "1",
@@ -1643,6 +1828,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.CODE_READ_REMOTE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.CODE_REMOTE",
@@ -1652,6 +1838,7 @@
},
{
"BriefDescription": "Cache Lookups : Local request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.COREPREF_OR_DMND_LOCAL_F",
"PerPkg": "1",
@@ -1660,6 +1847,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.DATA_READ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_RD",
@@ -1669,6 +1857,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ",
"PerPkg": "1",
@@ -1678,6 +1867,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.DATA_READ",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_ALL",
@@ -1687,6 +1877,7 @@
},
{
"BriefDescription": "Cache Lookups : Data Read Request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_F",
"PerPkg": "1",
@@ -1695,6 +1886,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Request that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL",
"PerPkg": "1",
@@ -1704,6 +1896,7 @@
},
{
"BriefDescription": "Cache Lookups : Data Read Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_MISS",
"PerPkg": "1",
@@ -1713,6 +1906,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Data Read Requests that come from a Remote socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DATA_READ_REMOTE",
"PerPkg": "1",
@@ -1722,6 +1916,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.DATA_READ_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.DMND_READ_LOCAL",
@@ -1731,6 +1926,7 @@
},
{
"BriefDescription": "Cache Lookups : E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.E",
"PerPkg": "1",
@@ -1740,6 +1936,7 @@
},
{
"BriefDescription": "Cache Lookups : F State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.F",
"PerPkg": "1",
@@ -1749,6 +1946,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV",
"PerPkg": "1",
@@ -1758,6 +1956,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV_LOCAL",
"PerPkg": "1",
@@ -1767,6 +1966,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate requests that come from a Remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_INV_REMOTE",
"PerPkg": "1",
@@ -1776,6 +1976,7 @@
},
{
"BriefDescription": "Cache Lookups : Flush or Invalidate Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.FLUSH_OR_INV_F",
"PerPkg": "1",
@@ -1784,6 +1985,7 @@
},
{
"BriefDescription": "Cache Lookups : I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.I",
"PerPkg": "1",
@@ -1793,6 +1995,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Prefetch requests to the LLC that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL",
"PerPkg": "1",
@@ -1802,6 +2005,7 @@
},
{
"BriefDescription": "Cache Lookups : Local LLC prefetch requests (from LLC) Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL_F",
"PerPkg": "1",
@@ -1810,6 +2014,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.LLCPREF_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LLC_PF_LOCAL",
@@ -1819,6 +2024,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.LOC_HOM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCALLY_HOMED_ADDRESS",
@@ -1828,6 +2034,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed locally Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOCAL_F",
"PerPkg": "1",
@@ -1836,6 +2043,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.LOC_HOM",
"PerPkg": "1",
@@ -1845,6 +2053,7 @@
},
{
"BriefDescription": "Cache Lookups : M State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.M",
"PerPkg": "1",
@@ -1854,6 +2063,7 @@
},
{
"BriefDescription": "Cache Lookups : All Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.MISS_ALL",
"PerPkg": "1",
@@ -1863,6 +2073,7 @@
},
{
"BriefDescription": "Cache Lookups : Write Request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.OTHER_REQ_F",
"PerPkg": "1",
@@ -1871,6 +2082,7 @@
},
{
"BriefDescription": "Cache Lookups : Remote non-snoop request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.PREF_OR_DMND_REMOTE_F",
"PerPkg": "1",
@@ -1879,6 +2091,7 @@
},
{
"BriefDescription": "Cache Lookups : Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ",
"PerPkg": "1",
@@ -1888,6 +2101,7 @@
},
{
"BriefDescription": "Cache Lookups : Locally Requested Reads that are Locally HOMed",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_LOC_HOM",
"PerPkg": "1",
@@ -1897,6 +2111,7 @@
},
{
"BriefDescription": "Cache Lookups : Locally Requested Reads that are Remotely HOMed",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_LOCAL_REM_HOM",
"PerPkg": "1",
@@ -1906,6 +2121,7 @@
},
{
"BriefDescription": "Cache Lookups : Read Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS",
"PerPkg": "1",
@@ -1915,6 +2131,7 @@
},
{
"BriefDescription": "Cache Lookups : Locally HOMed Read Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_LOC_HOM",
"PerPkg": "1",
@@ -1924,6 +2141,7 @@
},
{
"BriefDescription": "Cache Lookups : Remotely HOMed Read Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_MISS_REM_HOM",
"PerPkg": "1",
@@ -1933,6 +2151,7 @@
},
{
"BriefDescription": "Cache Lookups : Remotely requested Read or Snoop Misses that are Remotely HOMed",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_OR_SNOOP_REMOTE_MISS_REM_HOM",
"PerPkg": "1",
@@ -1942,6 +2161,7 @@
},
{
"BriefDescription": "Cache Lookups : Remotely Requested Reads that are Locally HOMed",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_REMOTE_LOC_HOM",
"PerPkg": "1",
@@ -1951,6 +2171,7 @@
},
{
"BriefDescription": "Cache Lookups : Reads that Hit the Snoop Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.READ_SF_HIT",
"PerPkg": "1",
@@ -1960,6 +2181,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.REM_HOM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTELY_HOMED_ADDRESS",
@@ -1969,6 +2191,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed remotely Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_F",
"PerPkg": "1",
@@ -1977,6 +2200,7 @@
},
{
"BriefDescription": "Cache Lookups : Remote snoop request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP_F",
"PerPkg": "1",
@@ -1985,6 +2209,7 @@
},
{
"BriefDescription": "Cache and Snoop Filter Lookups; Snoop Requests from a Remote Socket",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REMOTE_SNP",
"PerPkg": "1",
@@ -1994,6 +2219,7 @@
},
{
"BriefDescription": "Cache Lookups : Transactions homed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.REM_HOM",
"PerPkg": "1",
@@ -2003,6 +2229,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO",
"PerPkg": "1",
@@ -2012,6 +2239,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Request Filter",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_F",
"PerPkg": "1",
@@ -2020,6 +2248,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Requests that come from the local socket (usually the core)",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_LOCAL",
"PerPkg": "1",
@@ -2029,6 +2258,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_MISS",
"PerPkg": "1",
@@ -2038,6 +2268,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.RFO_LOCAL",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_PREF_LOCAL",
@@ -2047,6 +2278,7 @@
},
{
"BriefDescription": "Cache Lookups : RFO Requests that come from a Remote socket.",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.RFO_REMOTE",
"PerPkg": "1",
@@ -2056,6 +2288,7 @@
},
{
"BriefDescription": "Cache Lookups : S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.S",
"PerPkg": "1",
@@ -2065,6 +2298,7 @@
},
{
"BriefDescription": "Cache Lookups : SnoopFilter - E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.SF_E",
"PerPkg": "1",
@@ -2074,6 +2308,7 @@
},
{
"BriefDescription": "Cache Lookups : SnoopFilter - H State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.SF_H",
"PerPkg": "1",
@@ -2083,6 +2318,7 @@
},
{
"BriefDescription": "Cache Lookups : SnoopFilter - S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.SF_S",
"PerPkg": "1",
@@ -2092,6 +2328,7 @@
},
{
"BriefDescription": "Cache Lookups : Filters Requests for those that write info into the cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER",
"PerPkg": "1",
@@ -2101,6 +2338,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.WRITE_LOCAL",
@@ -2110,6 +2348,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.WRITES_AND_OTHER",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x34",
"EventName": "UNC_CHA_LLC_LOOKUP.WRITE_REMOTE",
@@ -2119,6 +2358,7 @@
},
{
"BriefDescription": "Lines Victimized : All Lines Victimized",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.ALL",
"PerPkg": "1",
@@ -2128,6 +2368,7 @@
},
{
"BriefDescription": "Lines Victimized : Lines in E state",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.E_STATE",
"PerPkg": "1",
@@ -2137,6 +2378,7 @@
},
{
"BriefDescription": "Lines Victimized : Local - All Lines",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ALL",
"PerPkg": "1",
@@ -2146,6 +2388,7 @@
},
{
"BriefDescription": "Lines Victimized : Local - Lines in E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_E",
"PerPkg": "1",
@@ -2155,6 +2398,7 @@
},
{
"BriefDescription": "Lines Victimized : Local - Lines in M State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_M",
"PerPkg": "1",
@@ -2164,6 +2408,7 @@
},
{
"BriefDescription": "Lines Victimized : Local Only",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_ONLY",
"PerPkg": "1",
@@ -2172,6 +2417,7 @@
},
{
"BriefDescription": "Lines Victimized : Local - Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.LOCAL_S",
"PerPkg": "1",
@@ -2181,6 +2427,7 @@
},
{
"BriefDescription": "Lines Victimized : Lines in M state",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.M_STATE",
"PerPkg": "1",
@@ -2190,6 +2437,7 @@
},
{
"BriefDescription": "Lines Victimized : Remote - All Lines",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ALL",
"PerPkg": "1",
@@ -2199,6 +2447,7 @@
},
{
"BriefDescription": "Lines Victimized : Remote - Lines in E State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_E",
"PerPkg": "1",
@@ -2208,6 +2457,7 @@
},
{
"BriefDescription": "Lines Victimized : Remote - Lines in M State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_M",
"PerPkg": "1",
@@ -2217,6 +2467,7 @@
},
{
"BriefDescription": "Lines Victimized : Remote Only",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_ONLY",
"PerPkg": "1",
@@ -2225,6 +2476,7 @@
},
{
"BriefDescription": "Lines Victimized : Remote - Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.REMOTE_S",
"PerPkg": "1",
@@ -2234,6 +2486,7 @@
},
{
"BriefDescription": "Lines Victimized : Lines in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_CHA_LLC_VICTIMS.S_STATE",
"PerPkg": "1",
@@ -2243,6 +2496,7 @@
},
{
"BriefDescription": "Cbo Misc : CV0 Prefetch Miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.CV0_PREF_MISS",
"PerPkg": "1",
@@ -2252,6 +2506,7 @@
},
{
"BriefDescription": "Cbo Misc : CV0 Prefetch Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.CV0_PREF_VIC",
"PerPkg": "1",
@@ -2261,6 +2516,7 @@
},
{
"BriefDescription": "Number of times that an RFO hit in S state.",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.RFO_HIT_S",
"PerPkg": "1",
@@ -2270,6 +2526,7 @@
},
{
"BriefDescription": "Cbo Misc : Silent Snoop Eviction",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.RSPI_WAS_FSE",
"PerPkg": "1",
@@ -2279,6 +2536,7 @@
},
{
"BriefDescription": "Cbo Misc : Write Combining Aliasing",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_CHA_MISC.WC_ALIASING",
"PerPkg": "1",
@@ -2288,6 +2546,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI0",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST0",
"PerPkg": "1",
@@ -2296,6 +2555,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI1",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_CHA_MISC_EXTERNAL.MBE_INST1",
"PerPkg": "1",
@@ -2304,6 +2564,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Local InvItoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.LOCAL_INVITOE",
"PerPkg": "1",
@@ -2313,6 +2574,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Local Rd",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.LOCAL_READ",
"PerPkg": "1",
@@ -2322,6 +2584,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Off",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.OFF_PWRHEURISTIC",
"PerPkg": "1",
@@ -2331,6 +2594,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Remote Rd",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.REMOTE_READ",
"PerPkg": "1",
@@ -2340,6 +2604,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : Remote Rd InvItoE",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.REMOTE_READINVITOE",
"PerPkg": "1",
@@ -2349,6 +2614,7 @@
},
{
"BriefDescription": "OSB Snoop Broadcast : RFO HitS Snoop Broadcast",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_CHA_OSB.RFO_HITS_SNP_BCAST",
"PerPkg": "1",
@@ -2358,6 +2624,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.ADEGRCREDIT",
"PerPkg": "1",
@@ -2366,6 +2633,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.AKEGRCREDIT",
"PerPkg": "1",
@@ -2374,6 +2642,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.ALLRSFWAYS_RES",
"PerPkg": "1",
@@ -2382,6 +2651,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.BLEGRCREDIT",
"PerPkg": "1",
@@ -2390,6 +2660,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.FSF_VICP",
"PerPkg": "1",
@@ -2398,6 +2669,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLOWSNP",
"PerPkg": "1",
@@ -2407,6 +2679,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_ALLWAYRSV",
"PerPkg": "1",
@@ -2416,6 +2689,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_PAMATCH",
"PerPkg": "1",
@@ -2425,6 +2699,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.GOTRACK_WAYMATCH",
"PerPkg": "1",
@@ -2434,6 +2709,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.HACREDIT",
"PerPkg": "1",
@@ -2442,6 +2718,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.IDX_INPIPE",
"PerPkg": "1",
@@ -2450,6 +2727,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.IPQ_SETMATCH_VICP",
"PerPkg": "1",
@@ -2458,6 +2736,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.IRQ_PMM",
"PerPkg": "1",
@@ -2467,6 +2746,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.IRQ_SETMATCH_VICP",
"PerPkg": "1",
@@ -2475,6 +2755,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.ISMQ_SETMATCH_VICP",
"PerPkg": "1",
@@ -2483,6 +2764,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.IVEGRCREDIT",
"PerPkg": "1",
@@ -2491,6 +2773,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.LLC_WAYS_RES",
"PerPkg": "1",
@@ -2499,6 +2782,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.NOTALLOWSNOOP",
"PerPkg": "1",
@@ -2507,6 +2791,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.ONE_FSF_VIC",
"PerPkg": "1",
@@ -2515,6 +2800,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.ONE_RSP_CON",
"PerPkg": "1",
@@ -2523,6 +2809,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.PMM_MEMMODE_TORMATCH_MULTI",
"PerPkg": "1",
@@ -2531,6 +2818,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.PMM_MEMMODE_TOR_MATCH",
"PerPkg": "1",
@@ -2539,6 +2827,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.PRQ_PMM",
"PerPkg": "1",
@@ -2548,6 +2837,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.PTL_INPIPE",
"PerPkg": "1",
@@ -2557,6 +2847,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.RMW_SETMATCH",
"PerPkg": "1",
@@ -2566,6 +2857,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.RRQ_SETMATCH_VICP",
"PerPkg": "1",
@@ -2574,6 +2866,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.SETMATCHENTRYWSCT",
"PerPkg": "1",
@@ -2582,6 +2875,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.SF_WAYS_RES",
"PerPkg": "1",
@@ -2590,6 +2884,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.TOPA_MATCH",
"PerPkg": "1",
@@ -2598,6 +2893,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.TORID_MATCH_GO_P",
"PerPkg": "1",
@@ -2606,6 +2902,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.VN_AD_REQ",
"PerPkg": "1",
@@ -2614,6 +2911,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.VN_AD_RSP",
"PerPkg": "1",
@@ -2622,6 +2920,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCB",
"PerPkg": "1",
@@ -2630,6 +2929,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.VN_BL_NCS",
"PerPkg": "1",
@@ -2638,6 +2938,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.VN_BL_RSP",
"PerPkg": "1",
@@ -2646,6 +2947,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.VN_BL_WB",
"PerPkg": "1",
@@ -2654,6 +2956,7 @@
},
{
"BriefDescription": "Pipe Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_CHA_PIPE_REJECT.WAY_MATCH",
"PerPkg": "1",
@@ -2662,6 +2965,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.LOCAL",
"PerPkg": "1",
@@ -2670,6 +2974,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.REMOTE",
"PerPkg": "1",
@@ -2678,6 +2983,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_INVITOX.SETCONFLICT",
"PerPkg": "1",
@@ -2686,6 +2992,7 @@
},
{
"BriefDescription": "PMM Memory Mode related events : Counts the number of times CHA saw NM Set conflict in SF/LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.LLC",
"PerPkg": "1",
@@ -2695,6 +3002,7 @@
},
{
"BriefDescription": "PMM Memory Mode related events : Counts the number of times CHA saw NM Set conflict in SF/LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.SF",
"PerPkg": "1",
@@ -2704,6 +3012,7 @@
},
{
"BriefDescription": "PMM Memory Mode related events : Counts the number of times CHA saw NM Set conflict in TOR",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS.TOR",
"PerPkg": "1",
@@ -2713,6 +3022,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.IODC",
"PerPkg": "1",
@@ -2721,6 +3031,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWR",
"PerPkg": "1",
@@ -2729,6 +3040,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_CHA_PMM_MEMMODE_NM_SETCONFLICTS2.MEMWRNI",
"PerPkg": "1",
@@ -2737,6 +3049,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.DDR4_FAST_INSERT",
"PerPkg": "1",
@@ -2745,6 +3058,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.REJ_IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.REJ_IRQ",
"PerPkg": "1",
@@ -2753,6 +3067,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.SLOWTORQ_SKIP",
"PerPkg": "1",
@@ -2761,6 +3076,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.SLOW_INSERT",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.SLOW_INSERT",
"PerPkg": "1",
@@ -2769,6 +3085,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.THROTTLE",
"PerPkg": "1",
@@ -2777,6 +3094,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.THROTTLE_IRQ",
"PerPkg": "1",
@@ -2785,6 +3103,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS.THROTTLE_PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x66",
"EventName": "UNC_CHA_PMM_QOS.THROTTLE_PRQ",
"PerPkg": "1",
@@ -2793,6 +3112,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_FAST_FIFO",
"PerPkg": "1",
@@ -2802,6 +3122,7 @@
},
{
"BriefDescription": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO",
+ "Counter": "0,1,2,3",
"EventCode": "0x67",
"EventName": "UNC_CHA_PMM_QOS_OCCUPANCY.DDR_SLOW_FIFO",
"PerPkg": "1",
@@ -2811,6 +3132,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC0",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC0",
"PerPkg": "1",
@@ -2820,6 +3142,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC1",
"PerPkg": "1",
@@ -2829,6 +3152,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC10",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC10",
"PerPkg": "1",
@@ -2837,6 +3161,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC11",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC11",
"PerPkg": "1",
@@ -2845,6 +3170,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC12",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC12",
"PerPkg": "1",
@@ -2853,6 +3179,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC13",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC13",
"PerPkg": "1",
@@ -2861,6 +3188,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC2",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC2",
"PerPkg": "1",
@@ -2870,6 +3198,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC3",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC3",
"PerPkg": "1",
@@ -2879,6 +3208,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC4",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC4",
"PerPkg": "1",
@@ -2888,6 +3218,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC5",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC5",
"PerPkg": "1",
@@ -2897,6 +3228,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC6",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC6",
"PerPkg": "1",
@@ -2906,6 +3238,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC7",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC7",
"PerPkg": "1",
@@ -2915,6 +3248,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC8",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC8",
"PerPkg": "1",
@@ -2923,6 +3257,7 @@
},
{
"BriefDescription": "CHA iMC CHNx READ Credits Empty : MC9",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_CHA_READ_NO_CREDITS.MC9",
"PerPkg": "1",
@@ -2931,6 +3266,7 @@
},
{
"BriefDescription": "Local INVITOE requests (exclusive ownership of a cache line without receiving data) that miss the SF/LLC and remote INVITOE requests sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE",
"PerPkg": "1",
@@ -2940,6 +3276,7 @@
},
{
"BriefDescription": "Local INVITOE requests (exclusive ownership of a cache line without receiving data) that miss the SF/LLC and are sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE_LOCAL",
"PerPkg": "1",
@@ -2949,6 +3286,7 @@
},
{
"BriefDescription": "Remote INVITOE requests (exclusive ownership of a cache line without receiving data) sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.INVITOE_REMOTE",
"PerPkg": "1",
@@ -2958,6 +3296,7 @@
},
{
"BriefDescription": "Local read requests that miss the SF/LLC and remote read requests sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS",
"PerPkg": "1",
@@ -2967,6 +3306,7 @@
},
{
"BriefDescription": "Local read requests that miss the SF/LLC and are sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS_LOCAL",
"PerPkg": "1",
@@ -2976,6 +3316,7 @@
},
{
"BriefDescription": "Remote read requests sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.READS_REMOTE",
"PerPkg": "1",
@@ -2985,6 +3326,7 @@
},
{
"BriefDescription": "Local write requests that miss the SF/LLC and remote write requests sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES",
"PerPkg": "1",
@@ -2994,6 +3336,7 @@
},
{
"BriefDescription": "Local write requests that miss the SF/LLC and are sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES_LOCAL",
"PerPkg": "1",
@@ -3003,6 +3346,7 @@
},
{
"BriefDescription": "Remote write requests sent to the CHA's home agent",
+ "Counter": "0,1,2,3",
"EventCode": "0x50",
"EventName": "UNC_CHA_REQUESTS.WRITES_REMOTE",
"PerPkg": "1",
@@ -3012,6 +3356,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -3021,6 +3366,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -3030,6 +3376,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -3039,6 +3386,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_CHA_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -3048,6 +3396,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -3057,6 +3406,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -3066,6 +3416,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.AKC",
"PerPkg": "1",
@@ -3075,6 +3426,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -3084,6 +3436,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_CHA_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -3093,6 +3446,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -3101,6 +3455,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -3109,6 +3464,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : Acknowledgements to Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -3117,6 +3473,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -3125,6 +3482,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_CHA_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -3133,6 +3491,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -3141,6 +3500,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -3149,6 +3509,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.AKC",
"PerPkg": "1",
@@ -3157,6 +3518,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -3165,6 +3527,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_CHA_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -3173,6 +3536,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2,3",
"EventCode": "0xae",
"EventName": "UNC_CHA_RING_SRC_THRTL",
"PerPkg": "1",
@@ -3180,6 +3544,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : IPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IPQ",
"PerPkg": "1",
@@ -3189,6 +3554,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : IRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IRQ",
"PerPkg": "1",
@@ -3198,6 +3564,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : IRQ Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.IRQ_REJ",
"PerPkg": "1",
@@ -3207,6 +3574,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.PRQ",
"PerPkg": "1",
@@ -3216,6 +3584,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : PRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.PRQ_REJ",
"PerPkg": "1",
@@ -3225,6 +3594,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : RRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.RRQ",
"PerPkg": "1",
@@ -3234,6 +3604,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Allocations : WBQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_CHA_RxC_INSERTS.WBQ",
"PerPkg": "1",
@@ -3243,6 +3614,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -3252,6 +3624,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -3261,6 +3634,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -3270,6 +3644,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -3279,6 +3654,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -3288,6 +3664,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -3297,6 +3674,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -3306,6 +3684,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_CHA_RxC_IPQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -3315,6 +3694,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -3323,6 +3703,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -3332,6 +3713,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.HA",
"PerPkg": "1",
@@ -3340,6 +3722,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -3349,6 +3732,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -3357,6 +3741,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -3366,6 +3751,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -3375,6 +3761,7 @@
},
{
"BriefDescription": "IPQ Requests (from CMS) Rejected - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_CHA_RxC_IPQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -3383,6 +3770,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -3392,6 +3780,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -3401,6 +3790,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -3410,6 +3800,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -3419,6 +3810,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -3428,6 +3820,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -3437,6 +3830,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -3446,6 +3840,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_CHA_RxC_IRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -3455,6 +3850,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -3463,6 +3859,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -3472,6 +3869,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.HA",
"PerPkg": "1",
@@ -3480,6 +3878,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LLC or SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -3489,6 +3888,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -3497,6 +3897,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Request Queue Rejects; PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -3505,6 +3906,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -3514,6 +3916,7 @@
},
{
"BriefDescription": "IRQ Requests (from CMS) Rejected - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_CHA_RxC_IRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -3522,6 +3925,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -3531,6 +3935,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -3540,6 +3945,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -3549,6 +3955,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -3558,6 +3965,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -3567,6 +3975,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -3576,6 +3985,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -3585,6 +3995,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_CHA_RxC_ISMQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -3594,6 +4005,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -3603,6 +4015,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -3612,6 +4025,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -3621,6 +4035,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -3630,6 +4045,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -3639,6 +4055,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -3648,6 +4065,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -3657,6 +4075,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_CHA_RxC_ISMQ0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -3666,6 +4085,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_CHA_RxC_ISMQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -3675,6 +4095,7 @@
},
{
"BriefDescription": "ISMQ Rejects - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_CHA_RxC_ISMQ1_REJECT.HA",
"PerPkg": "1",
@@ -3684,6 +4105,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_CHA_RxC_ISMQ1_RETRY.ANY0",
"PerPkg": "1",
@@ -3693,6 +4115,7 @@
},
{
"BriefDescription": "ISMQ Retries - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_CHA_RxC_ISMQ1_RETRY.HA",
"PerPkg": "1",
@@ -3738,6 +4161,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -3747,6 +4171,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -3756,6 +4181,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -3765,6 +4191,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -3774,6 +4201,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -3783,6 +4211,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -3792,6 +4221,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -3801,6 +4231,7 @@
},
{
"BriefDescription": "Other Retries - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_CHA_RxC_OTHER0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -3810,6 +4241,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.ALLOW_SNP",
"PerPkg": "1",
@@ -3819,6 +4251,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.ANY0",
"PerPkg": "1",
@@ -3828,6 +4261,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.HA",
"PerPkg": "1",
@@ -3837,6 +4271,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -3846,6 +4281,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.LLC_VICTIM",
"PerPkg": "1",
@@ -3855,6 +4291,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.PA_MATCH",
"PerPkg": "1",
@@ -3864,6 +4301,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.SF_VICTIM",
"PerPkg": "1",
@@ -3873,6 +4311,7 @@
},
{
"BriefDescription": "Other Retries - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_CHA_RxC_OTHER1_RETRY.VICTIM",
"PerPkg": "1",
@@ -3882,6 +4321,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -3891,6 +4331,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -3900,6 +4341,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -3909,6 +4351,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -3918,6 +4361,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -3927,6 +4371,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -3936,6 +4381,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -3945,6 +4391,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_CHA_RxC_PRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -3954,6 +4401,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -3962,6 +4410,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -3971,6 +4420,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.HA",
"PerPkg": "1",
@@ -3979,6 +4429,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -3988,6 +4439,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -3996,6 +4448,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -4005,6 +4458,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -4014,6 +4468,7 @@
},
{
"BriefDescription": "PRQ Requests (from CMS) Rejected - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_CHA_RxC_PRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -4022,6 +4477,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_REQ_VN0",
"PerPkg": "1",
@@ -4031,6 +4487,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AD_RSP_VN0",
"PerPkg": "1",
@@ -4040,6 +4497,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.AK_NON_UPI",
"PerPkg": "1",
@@ -4049,6 +4507,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCB_VN0",
"PerPkg": "1",
@@ -4058,6 +4517,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_NCS_VN0",
"PerPkg": "1",
@@ -4067,6 +4527,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_RSP_VN0",
"PerPkg": "1",
@@ -4076,6 +4537,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.BL_WB_VN0",
"PerPkg": "1",
@@ -4085,6 +4547,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_CHA_RxC_REQ_Q0_RETRY.IV_NON_UPI",
"PerPkg": "1",
@@ -4094,6 +4557,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ALLOW_SNP",
"PerPkg": "1",
@@ -4103,6 +4567,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.ANY0",
"PerPkg": "1",
@@ -4112,6 +4577,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.HA",
"PerPkg": "1",
@@ -4121,6 +4587,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -4130,6 +4597,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.LLC_VICTIM",
"PerPkg": "1",
@@ -4139,6 +4607,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.PA_MATCH",
"PerPkg": "1",
@@ -4148,6 +4617,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.SF_VICTIM",
"PerPkg": "1",
@@ -4157,6 +4627,7 @@
},
{
"BriefDescription": "Request Queue Retries - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_CHA_RxC_REQ_Q1_RETRY.VICTIM",
"PerPkg": "1",
@@ -4166,6 +4637,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -4175,6 +4647,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -4184,6 +4657,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -4193,6 +4667,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -4202,6 +4677,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -4211,6 +4687,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -4220,6 +4697,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -4229,6 +4707,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_CHA_RxC_RRQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -4238,6 +4717,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -4247,6 +4727,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -4256,6 +4737,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.HA",
"PerPkg": "1",
@@ -4265,6 +4747,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -4274,6 +4757,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -4283,6 +4767,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -4292,6 +4777,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -4301,6 +4787,7 @@
},
{
"BriefDescription": "RRQ Rejects - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_CHA_RxC_RRQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -4310,6 +4797,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : AD REQ on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_REQ_VN0",
"PerPkg": "1",
@@ -4319,6 +4807,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : AD RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AD_RSP_VN0",
"PerPkg": "1",
@@ -4328,6 +4817,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : Non UPI AK Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.AK_NON_UPI",
"PerPkg": "1",
@@ -4337,6 +4827,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL NCB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCB_VN0",
"PerPkg": "1",
@@ -4346,6 +4837,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL NCS on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_NCS_VN0",
"PerPkg": "1",
@@ -4355,6 +4847,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL RSP on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_RSP_VN0",
"PerPkg": "1",
@@ -4364,6 +4857,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : BL WB on VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.BL_WB_VN0",
"PerPkg": "1",
@@ -4373,6 +4867,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 0 : Non UPI IV Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_CHA_RxC_WBQ0_REJECT.IV_NON_UPI",
"PerPkg": "1",
@@ -4382,6 +4877,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : Allow Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.ALLOW_SNP",
"PerPkg": "1",
@@ -4391,6 +4887,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : ANY0",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.ANY0",
"PerPkg": "1",
@@ -4400,6 +4897,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : HA",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.HA",
"PerPkg": "1",
@@ -4409,6 +4907,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : LLC OR SF Way",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_OR_SF_WAY",
"PerPkg": "1",
@@ -4418,6 +4917,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : LLC Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.LLC_VICTIM",
"PerPkg": "1",
@@ -4427,6 +4927,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : PhyAddr Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.PA_MATCH",
"PerPkg": "1",
@@ -4436,6 +4937,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : SF Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.SF_VICTIM",
"PerPkg": "1",
@@ -4445,6 +4947,7 @@
},
{
"BriefDescription": "WBQ Rejects - Set 1 : Victim",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_CHA_RxC_WBQ1_REJECT.VICTIM",
"PerPkg": "1",
@@ -4454,6 +4957,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_ALL",
"PerPkg": "1",
@@ -4463,6 +4967,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -4472,6 +4977,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -4481,6 +4987,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_ALL",
"PerPkg": "1",
@@ -4490,6 +4997,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -4499,6 +5007,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_CHA_RxR_BUSY_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -4508,6 +5017,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -4517,6 +5027,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -4526,6 +5037,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -4535,6 +5047,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.AK",
"PerPkg": "1",
@@ -4544,6 +5057,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -4553,6 +5067,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -4562,6 +5077,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -4571,6 +5087,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -4580,6 +5097,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_CHA_RxR_BYPASS.IV",
"PerPkg": "1",
@@ -4589,6 +5107,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AD_ALL",
"PerPkg": "1",
@@ -4598,6 +5117,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -4607,6 +5127,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -4616,6 +5137,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.AK",
"PerPkg": "1",
@@ -4625,6 +5147,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.BL_ALL",
"PerPkg": "1",
@@ -4634,6 +5157,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -4643,6 +5167,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -4652,6 +5177,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IFV - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -4661,6 +5187,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_CHA_RxR_CRD_STARVED.IV",
"PerPkg": "1",
@@ -4670,6 +5197,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_CHA_RxR_CRD_STARVED_1",
"PerPkg": "1",
@@ -4678,6 +5206,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -4687,6 +5216,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -4696,6 +5226,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -4705,6 +5236,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.AK",
"PerPkg": "1",
@@ -4714,6 +5246,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -4723,6 +5256,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -4732,6 +5266,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -4741,6 +5276,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -4750,6 +5286,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_CHA_RxR_INSERTS.IV",
"PerPkg": "1",
@@ -4759,6 +5296,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -4768,6 +5306,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -4777,6 +5316,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -4786,6 +5326,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AK",
"PerPkg": "1",
@@ -4795,6 +5336,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -4804,6 +5346,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -4813,6 +5356,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -4822,6 +5366,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -4831,6 +5376,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_CHA_RxR_OCCUPANCY.IV",
"PerPkg": "1",
@@ -4840,6 +5386,7 @@
},
{
"BriefDescription": "Snoop filter capacity evictions for E-state entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3D",
"EventName": "UNC_CHA_SF_EVICTION.E_STATE",
"PerPkg": "1",
@@ -4849,6 +5396,7 @@
},
{
"BriefDescription": "Snoop filter capacity evictions for M-state entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3D",
"EventName": "UNC_CHA_SF_EVICTION.M_STATE",
"PerPkg": "1",
@@ -4858,6 +5406,7 @@
},
{
"BriefDescription": "Snoop filter capacity evictions for S-state entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0x3D",
"EventName": "UNC_CHA_SF_EVICTION.S_STATE",
"PerPkg": "1",
@@ -4867,6 +5416,7 @@
},
{
"BriefDescription": "Snoops Sent : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.ALL",
"PerPkg": "1",
@@ -4876,6 +5426,7 @@
},
{
"BriefDescription": "Snoops Sent : Broadcast snoops for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.BCST_LOCAL",
"PerPkg": "1",
@@ -4885,6 +5436,7 @@
},
{
"BriefDescription": "Snoops Sent : Broadcast snoops for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.BCST_REMOTE",
"PerPkg": "1",
@@ -4894,6 +5446,7 @@
},
{
"BriefDescription": "Snoops Sent : Directed snoops for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_LOCAL",
"PerPkg": "1",
@@ -4903,6 +5456,7 @@
},
{
"BriefDescription": "Snoops Sent : Directed snoops for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.DIRECT_REMOTE",
"PerPkg": "1",
@@ -4912,6 +5466,7 @@
},
{
"BriefDescription": "Snoops Sent : Snoops sent for Local Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.LOCAL",
"PerPkg": "1",
@@ -4921,6 +5476,7 @@
},
{
"BriefDescription": "Snoops Sent : Snoops sent for Remote Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_CHA_SNOOPS_SENT.REMOTE",
"PerPkg": "1",
@@ -4930,6 +5486,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RSPCNFLCT*",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPCNFLCT",
"PerPkg": "1",
@@ -4939,6 +5496,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPFWD",
"PerPkg": "1",
@@ -4948,6 +5506,7 @@
},
{
"BriefDescription": "Snoop Responses Received : Rsp*Fwd*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPFWDWB",
"PerPkg": "1",
@@ -4957,6 +5516,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspI",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPI",
"PerPkg": "1",
@@ -4966,6 +5526,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspIFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPIFWD",
"PerPkg": "1",
@@ -4975,6 +5536,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPS",
"PerPkg": "1",
@@ -4984,6 +5546,7 @@
},
{
"BriefDescription": "Snoop Responses Received : RspSFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPSFWD",
"PerPkg": "1",
@@ -4993,6 +5556,7 @@
},
{
"BriefDescription": "Snoop Responses Received : Rsp*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_CHA_SNOOP_RESP.RSPWB",
"PerPkg": "1",
@@ -5002,6 +5566,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspCnflct",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPCNFLCT",
"PerPkg": "1",
@@ -5011,6 +5576,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWD",
"PerPkg": "1",
@@ -5020,6 +5586,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : Rsp*FWD*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPFWDWB",
"PerPkg": "1",
@@ -5029,6 +5596,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspI",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPI",
"PerPkg": "1",
@@ -5038,6 +5606,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspIFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPIFWD",
"PerPkg": "1",
@@ -5047,6 +5616,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspS",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPS",
"PerPkg": "1",
@@ -5056,6 +5626,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : RspSFwd",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPSFWD",
"PerPkg": "1",
@@ -5065,6 +5636,7 @@
},
{
"BriefDescription": "Snoop Responses Received Local : Rsp*WB",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_CHA_SNOOP_RESP_LOCAL.RSPWB",
"PerPkg": "1",
@@ -5074,6 +5646,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : MtoI RspIDataM",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPDATAM",
"PerPkg": "1",
@@ -5082,6 +5655,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : MtoI RspIFwdM",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.MTOI_RSPIFWDM",
"PerPkg": "1",
@@ -5090,6 +5664,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : Pull Data Partial - Hit LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITLLC",
"PerPkg": "1",
@@ -5098,6 +5673,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : Pull Data Partial - Hit SF",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.PULLDATAPTL_HITSF",
"PerPkg": "1",
@@ -5106,6 +5682,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hit LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITLLC",
"PerPkg": "1",
@@ -5114,6 +5691,7 @@
},
{
"BriefDescription": "Misc Snoop Responses Received : RspIFwdPtl Hit SF",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_CHA_SNOOP_RSP_MISC.RSPIFWDMPTL_HITSF",
"PerPkg": "1",
@@ -5122,6 +5700,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -5131,6 +5710,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -5140,6 +5720,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -5149,6 +5730,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -5158,6 +5740,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -5167,6 +5750,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -5176,6 +5760,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6",
"PerPkg": "1",
@@ -5185,6 +5770,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7",
"PerPkg": "1",
@@ -5194,6 +5780,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -5203,6 +5790,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -5212,6 +5800,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -5221,6 +5810,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -5230,6 +5820,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -5239,6 +5830,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -5248,6 +5840,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6",
"PerPkg": "1",
@@ -5257,6 +5850,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7",
"PerPkg": "1",
@@ -5266,6 +5860,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -5275,6 +5870,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -5284,6 +5880,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -5293,6 +5890,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -5302,6 +5900,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -5311,6 +5910,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -5320,6 +5920,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6",
"PerPkg": "1",
@@ -5329,6 +5930,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7",
"PerPkg": "1",
@@ -5338,6 +5940,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -5347,6 +5950,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -5356,6 +5960,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -5365,6 +5970,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -5374,6 +5980,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -5383,6 +5990,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -5392,6 +6000,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6",
"PerPkg": "1",
@@ -5401,6 +6010,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_CHA_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7",
"PerPkg": "1",
@@ -5410,6 +6020,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10",
"PerPkg": "1",
@@ -5419,6 +6030,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8",
"PerPkg": "1",
@@ -5428,6 +6040,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9",
"PerPkg": "1",
@@ -5437,6 +6050,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10",
"PerPkg": "1",
@@ -5446,6 +6060,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8",
"PerPkg": "1",
@@ -5455,6 +6070,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9",
"PerPkg": "1",
@@ -5464,6 +6080,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10",
"PerPkg": "1",
@@ -5473,6 +6090,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8",
"PerPkg": "1",
@@ -5482,6 +6100,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9",
"PerPkg": "1",
@@ -5491,6 +6110,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10",
"PerPkg": "1",
@@ -5500,6 +6120,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8",
"PerPkg": "1",
@@ -5509,6 +6130,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_CHA_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9",
"PerPkg": "1",
@@ -5518,6 +6140,7 @@
},
{
"BriefDescription": "TOR Inserts : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ALL",
"PerPkg": "1",
@@ -5527,6 +6150,7 @@
},
{
"BriefDescription": "TOR Inserts : DDR4 Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.DDR",
"PerPkg": "1",
@@ -5535,6 +6159,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.DDR4",
@@ -5543,6 +6168,7 @@
},
{
"BriefDescription": "TOR Inserts : SF/LLC Evictions",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.EVICT",
"PerPkg": "1",
@@ -5552,6 +6178,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Hits",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.HIT",
"PerPkg": "1",
@@ -5560,6 +6187,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA",
"PerPkg": "1",
@@ -5569,6 +6197,7 @@
},
{
"BriefDescription": "TOR Inserts : CLFlushes issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSH",
"PerPkg": "1",
@@ -5578,6 +6207,7 @@
},
{
"BriefDescription": "TOR Inserts : CLFlushOpts issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CLFLUSHOPT",
"PerPkg": "1",
@@ -5587,6 +6217,7 @@
},
{
"BriefDescription": "TOR Inserts : CRDs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CRD",
"PerPkg": "1",
@@ -5596,6 +6227,7 @@
},
{
"BriefDescription": "TOR Inserts; CRd Pref from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_CRD_PREF",
"PerPkg": "1",
@@ -5605,6 +6237,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD",
"PerPkg": "1",
@@ -5614,6 +6247,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRDPTE",
"PerPkg": "1",
@@ -5623,6 +6257,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT",
"PerPkg": "1",
@@ -5632,6 +6267,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_OPT_PREF",
"PerPkg": "1",
@@ -5641,6 +6277,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_DRD_PREF",
"PerPkg": "1",
@@ -5650,6 +6287,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT",
"PerPkg": "1",
@@ -5659,6 +6297,7 @@
},
{
"BriefDescription": "TOR Inserts : CRds issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD",
"PerPkg": "1",
@@ -5668,6 +6307,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CRD_PREF",
"PerPkg": "1",
@@ -5677,6 +6317,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD",
"PerPkg": "1",
@@ -5686,6 +6327,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRDPTE",
"PerPkg": "1",
@@ -5695,6 +6337,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Opts issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT",
"PerPkg": "1",
@@ -5704,6 +6347,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_OPT_PREF",
"PerPkg": "1",
@@ -5713,6 +6357,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_DRD_PREF",
"PerPkg": "1",
@@ -5722,6 +6367,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Hit LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_ITOM",
"PerPkg": "1",
@@ -5731,6 +6377,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE",
"PerPkg": "1",
@@ -5740,6 +6387,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCODE",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFCRD",
@@ -5749,6 +6397,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA",
"PerPkg": "1",
@@ -5758,6 +6407,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDATA",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFDRD",
@@ -5767,6 +6417,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_LLCPREFRFO",
"PerPkg": "1",
@@ -5776,6 +6427,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO",
"PerPkg": "1",
@@ -5785,6 +6437,7 @@
},
{
"BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_RFO_PREF",
"PerPkg": "1",
@@ -5794,6 +6447,7 @@
},
{
"BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores that hit in the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_SPECITOM",
"PerPkg": "1",
@@ -5803,6 +6457,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_ITOM",
"PerPkg": "1",
@@ -5812,6 +6467,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_ITOMCACHENEAR",
"PerPkg": "1",
@@ -5821,6 +6477,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFCODE",
"PerPkg": "1",
@@ -5830,6 +6487,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFDATA",
"PerPkg": "1",
@@ -5839,6 +6497,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_LLCPREFRFO",
"PerPkg": "1",
@@ -5848,6 +6507,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",
"PerPkg": "1",
@@ -5857,6 +6517,7 @@
},
{
"BriefDescription": "TOR Inserts : CRds issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD",
"PerPkg": "1",
@@ -5866,6 +6527,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_LOCAL",
"PerPkg": "1",
@@ -5875,6 +6537,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF",
"PerPkg": "1",
@@ -5884,6 +6547,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_LOCAL",
"PerPkg": "1",
@@ -5893,6 +6557,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd_Prefs issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF_REMOTE",
"PerPkg": "1",
@@ -5902,6 +6567,7 @@
},
{
"BriefDescription": "TOR Inserts : CRd issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_REMOTE",
"PerPkg": "1",
@@ -5911,6 +6577,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD",
"PerPkg": "1",
@@ -5920,6 +6587,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd PTEs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRDPTE",
"PerPkg": "1",
@@ -5929,6 +6597,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR",
"PerPkg": "1",
@@ -5938,6 +6607,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL",
"PerPkg": "1",
@@ -5947,6 +6617,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_DDR",
"PerPkg": "1",
@@ -5956,6 +6627,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL_PMM",
"PerPkg": "1",
@@ -5965,6 +6637,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Opt issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT",
"PerPkg": "1",
@@ -5974,6 +6647,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Opt_Prefs issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF",
"PerPkg": "1",
@@ -5983,6 +6657,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM",
"PerPkg": "1",
@@ -5992,6 +6667,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF",
"PerPkg": "1",
@@ -6001,6 +6677,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_DDR",
"PerPkg": "1",
@@ -6010,6 +6687,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Pref misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL",
"PerPkg": "1",
@@ -6019,6 +6697,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_DDR",
"PerPkg": "1",
@@ -6028,6 +6707,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL_PMM",
"PerPkg": "1",
@@ -6037,6 +6717,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_PMM",
"PerPkg": "1",
@@ -6046,6 +6727,7 @@
},
{
"BriefDescription": "TOR Inserts; DRd Pref misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE",
"PerPkg": "1",
@@ -6055,6 +6737,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_DDR",
"PerPkg": "1",
@@ -6064,6 +6747,7 @@
},
{
"BriefDescription": "TOR Inserts : DRd_Prefs issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_REMOTE_PMM",
"PerPkg": "1",
@@ -6073,6 +6757,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE",
"PerPkg": "1",
@@ -6082,6 +6767,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting DDR Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_DDR",
"PerPkg": "1",
@@ -6091,6 +6777,7 @@
},
{
"BriefDescription": "TOR Inserts : DRds issued by iA Cores targeting PMM Mem that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE_PMM",
"PerPkg": "1",
@@ -6100,6 +6787,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR",
"PerPkg": "1",
@@ -6109,6 +6797,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_DDR",
"PerPkg": "1",
@@ -6118,6 +6807,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_DRAM",
@@ -6127,6 +6817,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_DDR",
"PerPkg": "1",
@@ -6136,6 +6827,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_DRAM",
@@ -6145,6 +6837,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_LOCAL_PMM",
"PerPkg": "1",
@@ -6154,6 +6847,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_PMM",
"PerPkg": "1",
@@ -6163,6 +6857,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE_DDR",
"PerPkg": "1",
@@ -6172,6 +6867,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE_DRAM",
@@ -6181,6 +6877,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiLF misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_FULL_STREAMING_WR_REMOTE_PMM",
"PerPkg": "1",
@@ -6190,6 +6887,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by iA Cores that Missed LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_ITOM",
"PerPkg": "1",
@@ -6199,6 +6897,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefCode issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE",
"PerPkg": "1",
@@ -6208,6 +6907,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefData issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA",
"PerPkg": "1",
@@ -6217,6 +6917,7 @@
},
{
"BriefDescription": "TOR Inserts : LLCPrefRFO issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO",
"PerPkg": "1",
@@ -6226,6 +6927,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_DDR",
"PerPkg": "1",
@@ -6235,6 +6937,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCILF_PMM",
"PerPkg": "1",
@@ -6244,6 +6947,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR",
"PerPkg": "1",
@@ -6253,6 +6957,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_PMM",
"PerPkg": "1",
@@ -6262,6 +6967,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR",
"PerPkg": "1",
@@ -6271,6 +6977,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_DDR",
"PerPkg": "1",
@@ -6280,6 +6987,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_DRAM",
@@ -6289,6 +6997,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOCAL_DDR",
"PerPkg": "1",
@@ -6298,6 +7007,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS_LOCAL_WCIL_DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOCAL_DRAM",
@@ -6307,6 +7017,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_LOCAL_PMM",
"PerPkg": "1",
@@ -6316,6 +7027,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_PMM",
"PerPkg": "1",
@@ -6325,6 +7037,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REMOTE_DDR",
"PerPkg": "1",
@@ -6334,6 +7047,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REMOTE_DRAM",
@@ -6343,6 +7057,7 @@
},
{
"BriefDescription": "TOR Inserts; WCiL misses from local IA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_PARTIAL_STREAMING_WR_REMOTE_PMM",
"PerPkg": "1",
@@ -6352,6 +7067,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_DDR",
"PerPkg": "1",
@@ -6361,6 +7077,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC - HOMed remote memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCILF_PMM",
"PerPkg": "1",
@@ -6370,6 +7087,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_DDR",
"PerPkg": "1",
@@ -6379,6 +7097,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_REMOTE_WCIL_PMM",
"PerPkg": "1",
@@ -6388,6 +7107,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO",
"PerPkg": "1",
@@ -6397,6 +7117,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_LOCAL",
"PerPkg": "1",
@@ -6406,6 +7127,7 @@
},
{
"BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF",
"PerPkg": "1",
@@ -6415,6 +7137,7 @@
},
{
"BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Missed the LLC - HOMed locally",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_LOCAL",
"PerPkg": "1",
@@ -6424,6 +7147,7 @@
},
{
"BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_REMOTE",
"PerPkg": "1",
@@ -6433,6 +7157,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores that Missed the LLC - HOMed remotely",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_REMOTE",
"PerPkg": "1",
@@ -6442,6 +7167,7 @@
},
{
"BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_SPECITOM",
"PerPkg": "1",
@@ -6451,6 +7177,7 @@
},
{
"BriefDescription": "TOR Inserts : UCRdFs issued by iA Cores that Missed LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_UCRDF",
"PerPkg": "1",
@@ -6460,6 +7187,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL",
"PerPkg": "1",
@@ -6469,6 +7197,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLF issued by iA Cores that Missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF",
"PerPkg": "1",
@@ -6478,6 +7207,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting DDR that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_DDR",
"PerPkg": "1",
@@ -6487,6 +7217,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLFs issued by iA Cores targeting PMM that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF_PMM",
"PerPkg": "1",
@@ -6496,6 +7227,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting DDR that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_DDR",
"PerPkg": "1",
@@ -6505,6 +7237,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores targeting PMM that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL_PMM",
"PerPkg": "1",
@@ -6514,6 +7247,7 @@
},
{
"BriefDescription": "TOR Inserts : WiLs issued by iA Cores that Missed LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WIL",
"PerPkg": "1",
@@ -6523,6 +7257,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_RFO",
"PerPkg": "1",
@@ -6532,6 +7267,7 @@
},
{
"BriefDescription": "TOR Inserts : RFO_Prefs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_RFO_PREF",
"PerPkg": "1",
@@ -6541,6 +7277,7 @@
},
{
"BriefDescription": "TOR Inserts : SpecItoMs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_SPECITOM",
"PerPkg": "1",
@@ -6550,6 +7287,7 @@
},
{
"BriefDescription": "TOR Inserts : WBEFtoEs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOE",
"PerPkg": "1",
@@ -6559,6 +7297,7 @@
},
{
"BriefDescription": "TOR Inserts : WBEFtoIs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBEFTOI",
"PerPkg": "1",
@@ -6568,6 +7307,7 @@
},
{
"BriefDescription": "TOR Inserts : WBMtoEs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOE",
"PerPkg": "1",
@@ -6577,6 +7317,7 @@
},
{
"BriefDescription": "TOR Inserts : WbMtoIs issued by an iA Cores. Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBMTOI",
"PerPkg": "1",
@@ -6586,6 +7327,7 @@
},
{
"BriefDescription": "TOR Inserts : WBStoIs issued by an IA Core. Non Modified Write Backs",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WBSTOI",
"PerPkg": "1",
@@ -6595,6 +7337,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLs issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WCIL",
"PerPkg": "1",
@@ -6604,6 +7347,7 @@
},
{
"BriefDescription": "TOR Inserts : WCiLF issued by iA Cores",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IA_WCILF",
"PerPkg": "1",
@@ -6613,6 +7357,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO",
"PerPkg": "1",
@@ -6622,6 +7367,7 @@
},
{
"BriefDescription": "TOR Inserts : CLFlushes issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_CLFLUSH",
"PerPkg": "1",
@@ -6631,6 +7377,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from IO Devices that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT",
"PerPkg": "1",
@@ -6640,6 +7387,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that Hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOM",
"PerPkg": "1",
@@ -6649,6 +7397,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR",
"PerPkg": "1",
@@ -6658,6 +7407,7 @@
},
{
"BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_PCIRDCUR",
"PerPkg": "1",
@@ -6667,6 +7417,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by IO Devices that hit the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_HIT_RFO",
"PerPkg": "1",
@@ -6676,6 +7427,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM",
"PerPkg": "1",
@@ -6685,6 +7437,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR",
"PerPkg": "1",
@@ -6694,6 +7447,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices to locally HOMed memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL",
"PerPkg": "1",
@@ -6703,6 +7457,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices to remotely HOMed memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_REMOTE",
"PerPkg": "1",
@@ -6712,6 +7467,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to locally HOMed memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL",
"PerPkg": "1",
@@ -6721,6 +7477,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by IO Devices to remotely HOMed memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_ITOM_REMOTE",
"PerPkg": "1",
@@ -6730,6 +7487,7 @@
},
{
"BriefDescription": "TOR Inserts : All requests from IO Devices that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS",
"PerPkg": "1",
@@ -6739,6 +7497,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMs issued by IO Devices that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOM",
"PerPkg": "1",
@@ -6748,6 +7507,7 @@
},
{
"BriefDescription": "TOR Inserts : ItoMCacheNears, indicating a partial write request, from IO Devices that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR",
"PerPkg": "1",
@@ -6757,6 +7517,7 @@
},
{
"BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR",
"PerPkg": "1",
@@ -6766,6 +7527,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by IO Devices that missed the LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_MISS_RFO",
"PerPkg": "1",
@@ -6775,6 +7537,7 @@
},
{
"BriefDescription": "TOR Inserts : PCIRdCurs issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR",
"PerPkg": "1",
@@ -6784,6 +7547,7 @@
},
{
"BriefDescription": "TOR Inserts : RFOs issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_RFO",
"PerPkg": "1",
@@ -6793,6 +7557,7 @@
},
{
"BriefDescription": "TOR Inserts : WbMtoIs issued by IO Devices",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IO_WBMTOI",
"PerPkg": "1",
@@ -6802,6 +7567,7 @@
},
{
"BriefDescription": "TOR Inserts : IPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IPQ",
"PerPkg": "1",
@@ -6811,6 +7577,7 @@
},
{
"BriefDescription": "TOR Inserts : IRQ - iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IRQ_IA",
"PerPkg": "1",
@@ -6820,6 +7587,7 @@
},
{
"BriefDescription": "TOR Inserts : IRQ - Non iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.IRQ_NON_IA",
"PerPkg": "1",
@@ -6829,6 +7597,7 @@
},
{
"BriefDescription": "TOR Inserts : Just ISOC",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.ISOC",
"PerPkg": "1",
@@ -6837,6 +7606,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Local Targets",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOCAL_TGT",
"PerPkg": "1",
@@ -6845,6 +7615,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Local iA and IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_ALL",
"PerPkg": "1",
@@ -6854,6 +7625,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Local iA",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_IA",
"PerPkg": "1",
@@ -6863,6 +7635,7 @@
},
{
"BriefDescription": "TOR Inserts : All from Local IO",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.LOC_IO",
"PerPkg": "1",
@@ -6872,6 +7645,7 @@
},
{
"BriefDescription": "TOR Inserts : Match the Opcode in b[29:19] of the extended umask field",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MATCH_OPC",
"PerPkg": "1",
@@ -6880,6 +7654,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Misses",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MISS",
"PerPkg": "1",
@@ -6888,6 +7663,7 @@
},
{
"BriefDescription": "TOR Inserts : MMCFG Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.MMCFG",
"PerPkg": "1",
@@ -6896,6 +7672,7 @@
},
{
"BriefDescription": "TOR Inserts : Just NearMem",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.NEARMEM",
"PerPkg": "1",
@@ -6904,6 +7681,7 @@
},
{
"BriefDescription": "TOR Inserts : Just NonCoherent",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.NONCOH",
"PerPkg": "1",
@@ -6912,6 +7690,7 @@
},
{
"BriefDescription": "TOR Inserts : Just NotNearMem",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.NOT_NEARMEM",
"PerPkg": "1",
@@ -6920,6 +7699,7 @@
},
{
"BriefDescription": "TOR Inserts : PMM Access",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PMM",
"PerPkg": "1",
@@ -6928,6 +7708,7 @@
},
{
"BriefDescription": "TOR Inserts : Match the PreMorphed Opcode in b[29:19] of the extended umask field",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PREMORPH_OPC",
"PerPkg": "1",
@@ -6936,6 +7717,7 @@
},
{
"BriefDescription": "TOR Inserts : PRQ - IOSF",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PRQ_IOSF",
"PerPkg": "1",
@@ -6945,6 +7727,7 @@
},
{
"BriefDescription": "TOR Inserts : PRQ - Non IOSF",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.PRQ_NON_IOSF",
"PerPkg": "1",
@@ -6954,6 +7737,7 @@
},
{
"BriefDescription": "TOR Inserts : Just Remote Targets",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.REMOTE_TGT",
"PerPkg": "1",
@@ -6962,6 +7746,7 @@
},
{
"BriefDescription": "TOR Inserts : RRQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.RRQ",
"PerPkg": "1",
@@ -6971,6 +7756,7 @@
},
{
"BriefDescription": "TOR Inserts : WBQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_CHA_TOR_INSERTS.WBQ",
"PerPkg": "1",
@@ -8254,6 +9040,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_ALL",
"PerPkg": "1",
@@ -8263,6 +9050,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -8272,6 +9060,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.AD_UNCRD",
"PerPkg": "1",
@@ -8281,6 +9070,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_ALL",
"PerPkg": "1",
@@ -8290,6 +9080,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -8299,6 +9090,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_CHA_TxR_HORZ_ADS_USED.BL_UNCRD",
"PerPkg": "1",
@@ -8308,6 +9100,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -8317,6 +9110,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -8326,6 +9120,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -8335,6 +9130,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AK",
"PerPkg": "1",
@@ -8344,6 +9140,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -8353,6 +9150,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -8362,6 +9160,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -8371,6 +9170,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -8380,6 +9180,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_CHA_TxR_HORZ_BYPASS.IV",
"PerPkg": "1",
@@ -8389,6 +9190,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_ALL",
"PerPkg": "1",
@@ -8398,6 +9200,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -8407,6 +9210,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AD_UNCRD",
"PerPkg": "1",
@@ -8416,6 +9220,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AK",
"PerPkg": "1",
@@ -8425,6 +9230,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.AKC_UNCRD",
"PerPkg": "1",
@@ -8434,6 +9240,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_ALL",
"PerPkg": "1",
@@ -8443,6 +9250,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -8452,6 +9260,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.BL_UNCRD",
"PerPkg": "1",
@@ -8461,6 +9270,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -8470,6 +9280,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_ALL",
"PerPkg": "1",
@@ -8479,6 +9290,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -8488,6 +9300,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AD_UNCRD",
"PerPkg": "1",
@@ -8497,6 +9310,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AK",
"PerPkg": "1",
@@ -8506,6 +9320,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.AKC_UNCRD",
"PerPkg": "1",
@@ -8515,6 +9330,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_ALL",
"PerPkg": "1",
@@ -8524,6 +9340,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -8533,6 +9350,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.BL_UNCRD",
"PerPkg": "1",
@@ -8542,6 +9360,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_CHA_TxR_HORZ_CYCLES_NE.IV",
"PerPkg": "1",
@@ -8551,6 +9370,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -8560,6 +9380,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -8569,6 +9390,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -8578,6 +9400,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AK",
"PerPkg": "1",
@@ -8587,6 +9410,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -8596,6 +9420,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -8605,6 +9430,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -8614,6 +9440,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -8623,6 +9450,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_CHA_TxR_HORZ_INSERTS.IV",
"PerPkg": "1",
@@ -8632,6 +9460,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AD_ALL",
"PerPkg": "1",
@@ -8641,6 +9470,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -8650,6 +9480,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AD_UNCRD",
"PerPkg": "1",
@@ -8659,6 +9490,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AK",
"PerPkg": "1",
@@ -8668,6 +9500,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.AKC_UNCRD",
"PerPkg": "1",
@@ -8677,6 +9510,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.BL_ALL",
"PerPkg": "1",
@@ -8686,6 +9520,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -8695,6 +9530,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.BL_UNCRD",
"PerPkg": "1",
@@ -8704,6 +9540,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_CHA_TxR_HORZ_NACK.IV",
"PerPkg": "1",
@@ -8713,6 +9550,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -8722,6 +9560,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -8731,6 +9570,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -8740,6 +9580,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AK",
"PerPkg": "1",
@@ -8749,6 +9590,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -8758,6 +9600,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -8767,6 +9610,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -8776,6 +9620,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -8785,6 +9630,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_CHA_TxR_HORZ_OCCUPANCY.IV",
"PerPkg": "1",
@@ -8794,6 +9640,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_ALL",
"PerPkg": "1",
@@ -8803,6 +9650,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -8812,6 +9660,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.AK",
"PerPkg": "1",
@@ -8821,6 +9670,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.AKC_UNCRD",
"PerPkg": "1",
@@ -8830,6 +9680,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_ALL",
"PerPkg": "1",
@@ -8839,6 +9690,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -8848,6 +9700,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_CHA_TxR_HORZ_STARVED.IV",
"PerPkg": "1",
@@ -8857,6 +9710,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -8866,6 +9720,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -8875,6 +9730,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -8884,6 +9740,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_CHA_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -8893,6 +9750,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -8902,6 +9760,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -8911,6 +9770,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -8920,6 +9780,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -8929,6 +9790,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -8938,6 +9800,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -8947,6 +9810,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : IV - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_CHA_TxR_VERT_BYPASS.IV_AG1",
"PerPkg": "1",
@@ -8956,6 +9820,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG0",
"PerPkg": "1",
@@ -8965,6 +9830,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_CHA_TxR_VERT_BYPASS_1.AKC_AG1",
"PerPkg": "1",
@@ -8974,6 +9840,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG0",
"PerPkg": "1",
@@ -8983,6 +9850,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AD_AG1",
"PerPkg": "1",
@@ -8992,6 +9860,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG0",
"PerPkg": "1",
@@ -9001,6 +9870,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.AK_AG1",
"PerPkg": "1",
@@ -9010,6 +9880,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG0",
"PerPkg": "1",
@@ -9019,6 +9890,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.BL_AG1",
"PerPkg": "1",
@@ -9028,6 +9900,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL0.IV_AG0",
"PerPkg": "1",
@@ -9037,6 +9910,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG0",
"PerPkg": "1",
@@ -9046,6 +9920,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_FULL1.AKC_AG1",
"PerPkg": "1",
@@ -9055,6 +9930,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG0",
"PerPkg": "1",
@@ -9064,6 +9940,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AD_AG1",
"PerPkg": "1",
@@ -9073,6 +9950,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG0",
"PerPkg": "1",
@@ -9082,6 +9960,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.AK_AG1",
"PerPkg": "1",
@@ -9091,6 +9970,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG0",
"PerPkg": "1",
@@ -9100,6 +9980,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.BL_AG1",
"PerPkg": "1",
@@ -9109,6 +9990,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE0.IV_AG0",
"PerPkg": "1",
@@ -9118,6 +10000,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG0",
"PerPkg": "1",
@@ -9127,6 +10010,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_CHA_TxR_VERT_CYCLES_NE1.AKC_AG1",
"PerPkg": "1",
@@ -9136,6 +10020,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG0",
"PerPkg": "1",
@@ -9145,6 +10030,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.AD_AG1",
"PerPkg": "1",
@@ -9154,6 +10040,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG0",
"PerPkg": "1",
@@ -9163,6 +10050,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.AK_AG1",
"PerPkg": "1",
@@ -9172,6 +10060,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG0",
"PerPkg": "1",
@@ -9181,6 +10070,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.BL_AG1",
"PerPkg": "1",
@@ -9190,6 +10080,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_CHA_TxR_VERT_INSERTS0.IV_AG0",
"PerPkg": "1",
@@ -9199,6 +10090,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG0",
"PerPkg": "1",
@@ -9208,6 +10100,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_CHA_TxR_VERT_INSERTS1.AKC_AG1",
"PerPkg": "1",
@@ -9217,6 +10110,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG0",
"PerPkg": "1",
@@ -9226,6 +10120,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.AD_AG1",
"PerPkg": "1",
@@ -9235,6 +10130,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG0",
"PerPkg": "1",
@@ -9244,6 +10140,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.AK_AG1",
"PerPkg": "1",
@@ -9253,6 +10150,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG0",
"PerPkg": "1",
@@ -9262,6 +10160,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.BL_AG1",
"PerPkg": "1",
@@ -9271,6 +10170,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_CHA_TxR_VERT_NACK0.IV_AG0",
"PerPkg": "1",
@@ -9280,6 +10180,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG0",
"PerPkg": "1",
@@ -9289,6 +10190,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_CHA_TxR_VERT_NACK1.AKC_AG1",
"PerPkg": "1",
@@ -9298,6 +10200,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG0",
"PerPkg": "1",
@@ -9307,6 +10210,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AD_AG1",
"PerPkg": "1",
@@ -9316,6 +10220,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG0",
"PerPkg": "1",
@@ -9325,6 +10230,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.AK_AG1",
"PerPkg": "1",
@@ -9334,6 +10240,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG0",
"PerPkg": "1",
@@ -9343,6 +10250,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.BL_AG1",
"PerPkg": "1",
@@ -9352,6 +10260,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY0.IV_AG0",
"PerPkg": "1",
@@ -9361,6 +10270,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG0",
"PerPkg": "1",
@@ -9370,6 +10280,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_CHA_TxR_VERT_OCCUPANCY1.AKC_AG1",
"PerPkg": "1",
@@ -9379,6 +10290,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG0",
"PerPkg": "1",
@@ -9388,6 +10300,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.AD_AG1",
"PerPkg": "1",
@@ -9397,6 +10310,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG0",
"PerPkg": "1",
@@ -9406,6 +10320,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.AK_AG1",
"PerPkg": "1",
@@ -9415,6 +10330,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG0",
"PerPkg": "1",
@@ -9424,6 +10340,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.BL_AG1",
"PerPkg": "1",
@@ -9433,6 +10350,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_CHA_TxR_VERT_STARVED0.IV_AG0",
"PerPkg": "1",
@@ -9442,6 +10360,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG0",
"PerPkg": "1",
@@ -9451,6 +10370,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_VERT_STARVED1.AKC_AG1",
"PerPkg": "1",
@@ -9460,6 +10380,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_CHA_TxR_VERT_STARVED1.TGC",
"PerPkg": "1",
@@ -9469,6 +10390,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9478,6 +10400,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9487,6 +10410,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9496,6 +10420,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_CHA_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9505,6 +10430,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9514,6 +10440,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9523,6 +10450,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9532,6 +10460,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_CHA_VERT_RING_AKC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9541,6 +10470,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9550,6 +10480,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9559,6 +10490,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9568,6 +10500,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_CHA_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9577,6 +10510,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9586,6 +10520,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9595,6 +10530,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9604,6 +10540,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_CHA_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9613,6 +10550,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -9622,6 +10560,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_CHA_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -9631,6 +10570,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9640,6 +10580,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9649,6 +10590,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9658,6 +10600,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_CHA_VERT_RING_TGC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9667,6 +10610,7 @@
},
{
"BriefDescription": "WbPushMtoI : Pushed to LLC",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_CHA_WB_PUSH_MTOI.LLC",
"PerPkg": "1",
@@ -9676,6 +10620,7 @@
},
{
"BriefDescription": "WbPushMtoI : Pushed to Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_CHA_WB_PUSH_MTOI.MEM",
"PerPkg": "1",
@@ -9685,6 +10630,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC0",
"PerPkg": "1",
@@ -9694,6 +10640,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1",
"PerPkg": "1",
@@ -9703,6 +10650,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC10",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC10",
"PerPkg": "1",
@@ -9711,6 +10659,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC11",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC11",
"PerPkg": "1",
@@ -9719,6 +10668,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC12",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC12",
"PerPkg": "1",
@@ -9727,6 +10677,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC13",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC13",
"PerPkg": "1",
@@ -9735,6 +10686,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC2",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC2",
"PerPkg": "1",
@@ -9744,6 +10696,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC3",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC3",
"PerPkg": "1",
@@ -9753,6 +10706,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC4",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC4",
"PerPkg": "1",
@@ -9762,6 +10716,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC5",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC5",
"PerPkg": "1",
@@ -9771,6 +10726,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC6",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC6",
"PerPkg": "1",
@@ -9780,6 +10736,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC7",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC7",
"PerPkg": "1",
@@ -9789,6 +10746,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC8",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC8",
"PerPkg": "1",
@@ -9797,6 +10755,7 @@
},
{
"BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC9",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_CHA_WRITE_NO_CREDITS.MC9",
"PerPkg": "1",
@@ -9805,6 +10764,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 0?) - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP0_CONFLICT",
"PerPkg": "1",
@@ -9814,6 +10774,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 0?) - No Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP0_NOCRD",
"PerPkg": "1",
@@ -9823,6 +10784,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 1?) - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP1_CONFLICT",
"PerPkg": "1",
@@ -9832,6 +10794,7 @@
},
{
"BriefDescription": "XPT Prefetches : Dropped (on 1?) - No Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.DROP1_NOCRD",
"PerPkg": "1",
@@ -9841,6 +10804,7 @@
},
{
"BriefDescription": "XPT Prefetches : Sent (on 0?)",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.SENT0",
"PerPkg": "1",
@@ -9850,6 +10814,7 @@
},
{
"BriefDescription": "XPT Prefetches : Sent (on 1?)",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_CHA_XPT_PREF.SENT1",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.json
index f87ea3f66d1b..3f303b0be992 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-interconnect.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Total Write Cache Occupancy : Any Source",
+ "Counter": "0,1",
"EventCode": "0x0F",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY",
"PerPkg": "1",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "Total Write Cache Occupancy : Snoops",
+ "Counter": "0,1",
"EventCode": "0x0F",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.IV_Q",
"PerPkg": "1",
@@ -19,6 +21,7 @@
},
{
"BriefDescription": "Total IRP occupancy of inbound read and write requests to coherent memory.",
+ "Counter": "0,1",
"EventCode": "0x0f",
"EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.MEM",
"PerPkg": "1",
@@ -28,6 +31,7 @@
},
{
"BriefDescription": "Clockticks of the IO coherency tracker (IRP)",
+ "Counter": "0,1",
"EventCode": "0x01",
"EventName": "UNC_I_CLOCKTICKS",
"PerPkg": "1",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Coherent Ops : CLFlush",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.CLFLUSH",
"PerPkg": "1",
@@ -44,6 +49,7 @@
},
{
"BriefDescription": "PCIITOM request issued by the IRP unit to the mesh with the intention of writing a full cacheline.",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.PCITOM",
"PerPkg": "1",
@@ -53,6 +59,7 @@
},
{
"BriefDescription": "RFO request issued by the IRP unit to the mesh with the intention of writing a partial cacheline.",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.RFO",
"PerPkg": "1",
@@ -62,6 +69,7 @@
},
{
"BriefDescription": "Coherent Ops : WbMtoI",
+ "Counter": "0,1",
"EventCode": "0x10",
"EventName": "UNC_I_COHERENT_OPS.WBMTOI",
"PerPkg": "1",
@@ -71,6 +79,7 @@
},
{
"BriefDescription": "FAF RF full",
+ "Counter": "0,1",
"EventCode": "0x17",
"EventName": "UNC_I_FAF_FULL",
"PerPkg": "1",
@@ -78,6 +87,7 @@
},
{
"BriefDescription": "Inbound read requests received by the IRP and inserted into the FAF queue.",
+ "Counter": "0,1",
"EventCode": "0x18",
"EventName": "UNC_I_FAF_INSERTS",
"PerPkg": "1",
@@ -86,6 +96,7 @@
},
{
"BriefDescription": "Occupancy of the IRP FAF queue.",
+ "Counter": "0,1",
"EventCode": "0x19",
"EventName": "UNC_I_FAF_OCCUPANCY",
"PerPkg": "1",
@@ -94,6 +105,7 @@
},
{
"BriefDescription": "FAF allocation -- sent to ADQ",
+ "Counter": "0,1",
"EventCode": "0x16",
"EventName": "UNC_I_FAF_TRANSACTIONS",
"PerPkg": "1",
@@ -101,6 +113,7 @@
},
{
"BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)",
+ "Counter": "0,1",
"EventCode": "0x20",
"EventName": "UNC_I_IRP_ALL.EVICTS",
"PerPkg": "1",
@@ -109,6 +122,7 @@
},
{
"BriefDescription": ": All Inserts Inbound (p2p + faf + cset)",
+ "Counter": "0,1",
"EventCode": "0x20",
"EventName": "UNC_I_IRP_ALL.INBOUND_INSERTS",
"PerPkg": "1",
@@ -117,6 +131,7 @@
},
{
"BriefDescription": ": All Inserts Outbound (BL, AK, Snoops)",
+ "Counter": "0,1",
"EventCode": "0x20",
"EventName": "UNC_I_IRP_ALL.OUTBOUND_INSERTS",
"PerPkg": "1",
@@ -125,6 +140,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_MISC0.2ND_ATOMIC_INSERT",
"PerPkg": "1",
@@ -133,6 +149,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.2ND_RD_INSERT",
"PerPkg": "1",
@@ -141,6 +158,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.2ND_WR_INSERT",
"PerPkg": "1",
@@ -149,6 +167,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_MISC0.FAST_REJ",
"PerPkg": "1",
@@ -157,6 +176,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
+ "Counter": "0,1",
"EventCode": "0x1e",
"EventName": "UNC_I_MISC0.FAST_REQ",
"PerPkg": "1",
@@ -165,6 +185,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_MISC0.FAST_XFER",
"PerPkg": "1",
@@ -173,6 +194,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_MISC0.PF_ACK_HINT",
"PerPkg": "1",
@@ -181,6 +203,7 @@
},
{
"BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
+ "Counter": "0,1",
"EventCode": "0x1E",
"EventName": "UNC_I_MISC0.SLOWPATH_FWPF_NO_PRF",
"PerPkg": "1",
@@ -189,6 +212,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Lost Forward",
+ "Counter": "0,1",
"EventCode": "0x1F",
"EventName": "UNC_I_MISC1.LOST_FWD",
"PerPkg": "1",
@@ -198,6 +222,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Received Invalid",
+ "Counter": "0,1",
"EventCode": "0x1F",
"EventName": "UNC_I_MISC1.SEC_RCVD_INVLD",
"PerPkg": "1",
@@ -207,6 +232,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Received Valid",
+ "Counter": "0,1",
"EventCode": "0x1F",
"EventName": "UNC_I_MISC1.SEC_RCVD_VLD",
"PerPkg": "1",
@@ -216,6 +242,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of E Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_E",
"PerPkg": "1",
@@ -225,6 +252,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of I Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_I",
"PerPkg": "1",
@@ -234,6 +262,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of M Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_M",
"PerPkg": "1",
@@ -243,6 +272,7 @@
},
{
"BriefDescription": "Misc Events - Set 1 : Slow Transfer of S Line",
+ "Counter": "0,1",
"EventCode": "0x1f",
"EventName": "UNC_I_MISC1.SLOW_S",
"PerPkg": "1",
@@ -252,6 +282,7 @@
},
{
"BriefDescription": "P2P Requests",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_I_P2P_INSERTS",
"PerPkg": "1",
@@ -260,6 +291,7 @@
},
{
"BriefDescription": "P2P Occupancy",
+ "Counter": "0,1",
"EventCode": "0x15",
"EventName": "UNC_I_P2P_OCCUPANCY",
"PerPkg": "1",
@@ -268,6 +300,7 @@
},
{
"BriefDescription": "P2P Transactions : P2P completions",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.CMPL",
"PerPkg": "1",
@@ -276,6 +309,7 @@
},
{
"BriefDescription": "P2P Transactions : match if local only",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.LOC",
"PerPkg": "1",
@@ -284,6 +318,7 @@
},
{
"BriefDescription": "P2P Transactions : match if local and target matches",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.LOC_AND_TGT_MATCH",
"PerPkg": "1",
@@ -292,6 +327,7 @@
},
{
"BriefDescription": "P2P Transactions : P2P Message",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.MSG",
"PerPkg": "1",
@@ -300,6 +336,7 @@
},
{
"BriefDescription": "P2P Transactions : P2P reads",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.RD",
"PerPkg": "1",
@@ -308,6 +345,7 @@
},
{
"BriefDescription": "P2P Transactions : Match if remote only",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.REM",
"PerPkg": "1",
@@ -316,6 +354,7 @@
},
{
"BriefDescription": "P2P Transactions : match if remote and target matches",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.REM_AND_TGT_MATCH",
"PerPkg": "1",
@@ -324,6 +363,7 @@
},
{
"BriefDescription": "P2P Transactions : P2P Writes",
+ "Counter": "0,1",
"EventCode": "0x13",
"EventName": "UNC_I_P2P_TRANSACTIONS.WR",
"PerPkg": "1",
@@ -332,6 +372,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit M, E, S or I line in the IIO",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT",
"PerPkg": "1",
@@ -341,6 +382,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit E or S line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_ES",
"PerPkg": "1",
@@ -350,6 +392,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit I line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_I",
"PerPkg": "1",
@@ -359,6 +402,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that hit M line in the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_HIT_M",
"PerPkg": "1",
@@ -368,6 +412,7 @@
},
{
"BriefDescription": "Responses to snoops of any type that miss the IIO cache",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.ALL_MISS",
"PerPkg": "1",
@@ -377,6 +422,7 @@
},
{
"BriefDescription": "Snoop Responses : Hit E or S",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_ES",
"PerPkg": "1",
@@ -385,6 +431,7 @@
},
{
"BriefDescription": "Snoop Responses : Hit I",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_I",
"PerPkg": "1",
@@ -393,6 +440,7 @@
},
{
"BriefDescription": "Snoop Responses : Hit M",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.HIT_M",
"PerPkg": "1",
@@ -401,6 +449,7 @@
},
{
"BriefDescription": "Snoop Responses : Miss",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.MISS",
"PerPkg": "1",
@@ -409,6 +458,7 @@
},
{
"BriefDescription": "Snoop Responses : SnpCode",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPCODE",
"PerPkg": "1",
@@ -417,6 +467,7 @@
},
{
"BriefDescription": "Snoop Responses : SnpData",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPDATA",
"PerPkg": "1",
@@ -425,6 +476,7 @@
},
{
"BriefDescription": "Snoop Responses : SnpInv",
+ "Counter": "0,1",
"EventCode": "0x12",
"EventName": "UNC_I_SNOOP_RESP.SNPINV",
"PerPkg": "1",
@@ -433,6 +485,7 @@
},
{
"BriefDescription": "Inbound Transaction Count : Atomic",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.ATOMIC",
"PerPkg": "1",
@@ -442,6 +495,7 @@
},
{
"BriefDescription": "Inbound Transaction Count : Other",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.OTHER",
"PerPkg": "1",
@@ -451,6 +505,7 @@
},
{
"BriefDescription": "Inbound Transaction Count : Writes",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.WRITES",
"PerPkg": "1",
@@ -460,6 +515,7 @@
},
{
"BriefDescription": "Inbound write (fast path) requests received by the IRP.",
+ "Counter": "0,1",
"EventCode": "0x11",
"EventName": "UNC_I_TRANSACTIONS.WR_PREF",
"PerPkg": "1",
@@ -469,6 +525,7 @@
},
{
"BriefDescription": "AK Egress Allocations",
+ "Counter": "0,1",
"EventCode": "0x0B",
"EventName": "UNC_I_TxC_AK_INSERTS",
"PerPkg": "1",
@@ -476,6 +533,7 @@
},
{
"BriefDescription": "BL DRS Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x05",
"EventName": "UNC_I_TxC_BL_DRS_CYCLES_FULL",
"PerPkg": "1",
@@ -483,6 +541,7 @@
},
{
"BriefDescription": "BL DRS Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_I_TxC_BL_DRS_INSERTS",
"PerPkg": "1",
@@ -490,6 +549,7 @@
},
{
"BriefDescription": "BL DRS Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x08",
"EventName": "UNC_I_TxC_BL_DRS_OCCUPANCY",
"PerPkg": "1",
@@ -497,6 +557,7 @@
},
{
"BriefDescription": "BL NCB Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x06",
"EventName": "UNC_I_TxC_BL_NCB_CYCLES_FULL",
"PerPkg": "1",
@@ -504,6 +565,7 @@
},
{
"BriefDescription": "BL NCB Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_I_TxC_BL_NCB_INSERTS",
"PerPkg": "1",
@@ -511,6 +573,7 @@
},
{
"BriefDescription": "BL NCB Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x09",
"EventName": "UNC_I_TxC_BL_NCB_OCCUPANCY",
"PerPkg": "1",
@@ -518,6 +581,7 @@
},
{
"BriefDescription": "BL NCS Egress Cycles Full",
+ "Counter": "0,1",
"EventCode": "0x07",
"EventName": "UNC_I_TxC_BL_NCS_CYCLES_FULL",
"PerPkg": "1",
@@ -525,6 +589,7 @@
},
{
"BriefDescription": "BL NCS Egress Inserts",
+ "Counter": "0,1",
"EventCode": "0x04",
"EventName": "UNC_I_TxC_BL_NCS_INSERTS",
"PerPkg": "1",
@@ -532,6 +597,7 @@
},
{
"BriefDescription": "BL NCS Egress Occupancy",
+ "Counter": "0,1",
"EventCode": "0x0A",
"EventName": "UNC_I_TxC_BL_NCS_OCCUPANCY",
"PerPkg": "1",
@@ -539,6 +605,7 @@
},
{
"BriefDescription": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES",
+ "Counter": "0,1",
"EventCode": "0x1C",
"EventName": "UNC_I_TxR2_AD01_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -547,6 +614,7 @@
},
{
"BriefDescription": "No AD0 Egress Credits Stalls",
+ "Counter": "0,1",
"EventCode": "0x1A",
"EventName": "UNC_I_TxR2_AD0_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -555,6 +623,7 @@
},
{
"BriefDescription": "No AD1 Egress Credits Stalls",
+ "Counter": "0,1",
"EventCode": "0x1B",
"EventName": "UNC_I_TxR2_AD1_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -563,6 +632,7 @@
},
{
"BriefDescription": "No BL Egress Credit Stalls",
+ "Counter": "0,1",
"EventCode": "0x1D",
"EventName": "UNC_I_TxR2_BL_STALL_CREDIT_CYCLES",
"PerPkg": "1",
@@ -571,6 +641,7 @@
},
{
"BriefDescription": "Outbound Read Requests",
+ "Counter": "0,1",
"EventCode": "0x0D",
"EventName": "UNC_I_TxS_DATA_INSERTS_NCB",
"PerPkg": "1",
@@ -579,6 +650,7 @@
},
{
"BriefDescription": "Outbound Read Requests",
+ "Counter": "0,1",
"EventCode": "0x0E",
"EventName": "UNC_I_TxS_DATA_INSERTS_NCS",
"PerPkg": "1",
@@ -587,6 +659,7 @@
},
{
"BriefDescription": "Outbound Request Queue Occupancy",
+ "Counter": "0,1",
"EventCode": "0x0C",
"EventName": "UNC_I_TxS_REQUEST_OCCUPANCY",
"PerPkg": "1",
@@ -595,6 +668,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -604,6 +678,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -613,6 +688,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -622,6 +698,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -631,6 +708,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -640,6 +718,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -649,6 +728,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -658,6 +738,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -667,6 +748,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -676,6 +758,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -685,6 +768,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M2M_AG0_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -694,6 +778,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -703,6 +788,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -712,6 +798,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -721,6 +808,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -730,6 +818,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -739,6 +828,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -748,6 +838,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -757,6 +848,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -766,6 +858,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -775,6 +868,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -784,6 +878,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M2M_AG0_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -793,6 +888,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -802,6 +898,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -811,6 +908,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -820,6 +918,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -829,6 +928,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -838,6 +938,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -847,6 +948,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -856,6 +958,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -865,6 +968,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -874,6 +978,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -883,6 +988,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M2M_AG0_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -892,6 +998,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -901,6 +1008,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -910,6 +1018,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -919,6 +1028,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -928,6 +1038,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -937,6 +1048,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -946,6 +1058,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -955,6 +1068,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -964,6 +1078,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -973,6 +1088,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -982,6 +1098,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_M2M_AG0_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -991,6 +1108,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -1000,6 +1118,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -1009,6 +1128,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -1018,6 +1138,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -1027,6 +1148,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -1036,6 +1158,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -1045,6 +1168,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -1054,6 +1178,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -1063,6 +1188,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -1072,6 +1198,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -1081,6 +1208,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M2M_AG1_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -1090,6 +1218,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -1099,6 +1228,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -1108,6 +1238,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -1117,6 +1248,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -1126,6 +1258,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -1135,6 +1268,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -1144,6 +1278,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -1153,6 +1288,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -1162,6 +1298,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -1171,6 +1308,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -1180,6 +1318,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M2M_AG1_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -1189,6 +1328,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -1198,6 +1338,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -1207,6 +1348,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -1216,6 +1358,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -1225,6 +1368,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -1234,6 +1378,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -1243,6 +1388,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -1252,6 +1398,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -1261,6 +1408,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -1270,6 +1418,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -1279,6 +1428,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_M2M_AG1_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -1288,6 +1438,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -1297,6 +1448,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -1306,6 +1458,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -1315,6 +1468,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -1324,6 +1478,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -1333,6 +1488,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -1342,6 +1498,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -1351,6 +1508,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -1360,6 +1518,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -1369,6 +1528,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -1378,6 +1538,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_M2M_AG1_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -1387,6 +1548,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass : Not Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M2M_BYPASS_M2M_EGRESS.NOT_TAKEN",
"PerPkg": "1",
@@ -1395,6 +1557,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass : Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M2M_BYPASS_M2M_EGRESS.TAKEN",
"PerPkg": "1",
@@ -1403,6 +1566,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass : Not Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_BYPASS_M2M_INGRESS.NOT_TAKEN",
"PerPkg": "1",
@@ -1411,6 +1575,7 @@
},
{
"BriefDescription": "M2M to iMC Bypass : Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M2M_BYPASS_M2M_INGRESS.TAKEN",
"PerPkg": "1",
@@ -1419,12 +1584,14 @@
},
{
"BriefDescription": "Clockticks of the mesh to memory (M2M)",
+ "Counter": "0,1,2,3",
"EventName": "UNC_M2M_CLOCKTICKS",
"PerPkg": "1",
"Unit": "M2M"
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M2M_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -1432,6 +1599,7 @@
},
{
"BriefDescription": "Cycles when direct to core mode, which bypasses the CHA, was disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -1439,6 +1607,7 @@
},
{
"BriefDescription": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M2M_DIRECT2CORE_NOT_TAKEN_NOTFORKED",
"PerPkg": "1",
@@ -1446,6 +1615,7 @@
},
{
"BriefDescription": "Number of reads in which direct to core transaction was overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2M_DIRECT2CORE_TXN_OVERRIDE",
"PerPkg": "1",
@@ -1453,6 +1623,7 @@
},
{
"BriefDescription": "Number of reads in which direct to Intel UPI transactions were overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS",
"PerPkg": "1",
@@ -1460,6 +1631,7 @@
},
{
"BriefDescription": "Cycles when Direct2UPI was Disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE",
"PerPkg": "1",
@@ -1467,6 +1639,7 @@
},
{
"BriefDescription": "Number of reads that a message sent direct2 Intel UPI was overridden",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_M2M_DIRECT2UPI_TXN_OVERRIDE",
"PerPkg": "1",
@@ -1475,6 +1648,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_A",
"PerPkg": "1",
@@ -1483,6 +1657,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_I",
"PerPkg": "1",
@@ -1491,6 +1666,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_P",
"PerPkg": "1",
@@ -1499,6 +1675,7 @@
},
{
"BriefDescription": "Directory Hit : On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.CLEAN_S",
"PerPkg": "1",
@@ -1507,6 +1684,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_A",
"PerPkg": "1",
@@ -1515,6 +1693,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_I",
"PerPkg": "1",
@@ -1523,6 +1702,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_P",
"PerPkg": "1",
@@ -1531,6 +1711,7 @@
},
{
"BriefDescription": "Directory Hit : On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M2M_DIRECTORY_HIT.DIRTY_S",
"PerPkg": "1",
@@ -1539,6 +1720,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Lookups : Found in any state",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.ANY",
"PerPkg": "1",
@@ -1547,6 +1729,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Lookups : Found in A state",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_A",
"PerPkg": "1",
@@ -1555,6 +1738,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Lookups : Found in I state",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_I",
"PerPkg": "1",
@@ -1563,6 +1747,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Lookups : Found in S state",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M2M_DIRECTORY_LOOKUP.STATE_S",
"PerPkg": "1",
@@ -1571,6 +1756,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_A",
"PerPkg": "1",
@@ -1579,6 +1765,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_I",
"PerPkg": "1",
@@ -1587,6 +1774,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_P",
"PerPkg": "1",
@@ -1595,6 +1783,7 @@
},
{
"BriefDescription": "Directory Miss : On NonDirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.CLEAN_S",
"PerPkg": "1",
@@ -1603,6 +1792,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in A State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_A",
"PerPkg": "1",
@@ -1611,6 +1801,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in I State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_I",
"PerPkg": "1",
@@ -1619,6 +1810,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in L State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_P",
"PerPkg": "1",
@@ -1627,6 +1819,7 @@
},
{
"BriefDescription": "Directory Miss : On Dirty Line in S State",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M2M_DIRECTORY_MISS.DIRTY_S",
"PerPkg": "1",
@@ -1635,6 +1828,7 @@
},
{
"BriefDescription": "Multi-socket cacheline Directory Updates : From/to any state. Note: event counts are incorrect in 2LM mode.",
+ "Counter": "0,1,2,3",
"EventCode": "0x2e",
"EventName": "UNC_M2M_DIRECTORY_UPDATE.ANY",
"PerPkg": "1",
@@ -1643,6 +1837,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_LOCAL",
"PerPkg": "1",
@@ -1652,6 +1847,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_NONLOCAL",
"PerPkg": "1",
@@ -1661,6 +1857,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_IV",
"PerPkg": "1",
@@ -1670,6 +1867,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - No Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.DPT_STALL_NOCRD",
"PerPkg": "1",
@@ -1679,6 +1877,7 @@
},
{
"BriefDescription": "Distress signal asserted : Horizontal",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.HORZ",
"PerPkg": "1",
@@ -1688,6 +1887,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.PMM_LOCAL",
"PerPkg": "1",
@@ -1697,6 +1897,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.PMM_NONLOCAL",
"PerPkg": "1",
@@ -1706,6 +1907,7 @@
},
{
"BriefDescription": "Distress signal asserted : Vertical",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2M_DISTRESS_ASSERTED.VERT",
"PerPkg": "1",
@@ -1715,6 +1917,7 @@
},
{
"BriefDescription": "UNC_M2M_DISTRESS_PMM",
+ "Counter": "0,1,2,3",
"EventCode": "0xF2",
"EventName": "UNC_M2M_DISTRESS_PMM",
"PerPkg": "1",
@@ -1722,6 +1925,7 @@
},
{
"BriefDescription": "UNC_M2M_DISTRESS_PMM_MEMMODE",
+ "Counter": "0,1,2,3",
"EventCode": "0xF1",
"EventName": "UNC_M2M_DISTRESS_PMM_MEMMODE",
"PerPkg": "1",
@@ -1729,6 +1933,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -1738,6 +1943,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M2M_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -1747,6 +1953,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1756,6 +1963,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1765,6 +1973,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1774,6 +1983,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M2M_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1783,6 +1993,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1792,6 +2003,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1801,6 +2013,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1810,6 +2023,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M2M_HORZ_RING_AKC_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1819,6 +2033,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1828,6 +2043,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1837,6 +2053,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1846,6 +2063,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M2M_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1855,6 +2073,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -1864,6 +2083,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -1873,6 +2093,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -1882,6 +2103,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M2M_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -1891,6 +2113,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Left",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -1900,6 +2123,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Right",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M2M_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -1909,6 +2133,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : All, regardless of priority. - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.ALL",
"PerPkg": "1",
@@ -1917,6 +2142,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : All, regardless of priority. - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_ALL",
"PerPkg": "1",
@@ -1925,6 +2151,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_FROM_TGR",
"PerPkg": "1",
@@ -1933,6 +2160,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : Critical Priority - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_ISOCH",
"PerPkg": "1",
@@ -1941,6 +2169,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : Normal Priority - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_NORMAL",
"PerPkg": "1",
@@ -1949,6 +2178,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cache - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -1957,6 +2187,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : DDR - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -1965,6 +2196,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : PMM - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH0_TO_PMM",
"PerPkg": "1",
@@ -1974,6 +2206,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : All, regardless of priority. - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_ALL",
"PerPkg": "1",
@@ -1982,6 +2215,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_FROM_TGR",
"PerPkg": "1",
@@ -1990,6 +2224,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : Critical Priority - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_ISOCH",
"PerPkg": "1",
@@ -1998,6 +2233,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : Normal Priority - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_NORMAL",
"PerPkg": "1",
@@ -2006,6 +2242,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cache - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -2014,6 +2251,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : DDR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -2022,6 +2260,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : PMM - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH1_TO_PMM",
"PerPkg": "1",
@@ -2031,6 +2270,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : From TGR - Ch2",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.CH2_FROM_TGR",
"PerPkg": "1",
@@ -2039,6 +2279,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : From TGR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.FROM_TGR",
"PerPkg": "1",
@@ -2047,6 +2288,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : Critical Priority - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.ISOCH",
"PerPkg": "1",
@@ -2055,6 +2297,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : Normal Priority - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.NORMAL",
"PerPkg": "1",
@@ -2063,6 +2306,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : DDR, acting as Cache - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -2071,6 +2315,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : DDR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -2079,6 +2324,7 @@
},
{
"BriefDescription": "M2M Reads Issued to iMC : PMM - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x37",
"EventName": "UNC_M2M_IMC_READS.TO_PMM",
"PerPkg": "1",
@@ -2087,6 +2333,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : All Writes - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.ALL",
"PerPkg": "1",
@@ -2095,6 +2342,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_ALL",
"PerPkg": "1",
@@ -2103,6 +2351,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_FROM_TGR",
"PerPkg": "1",
@@ -2110,6 +2359,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOCH - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_FULL",
"PerPkg": "1",
@@ -2118,6 +2368,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_FULL_ISOCH",
"PerPkg": "1",
@@ -2126,6 +2377,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_NI",
"PerPkg": "1",
@@ -2133,6 +2385,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_NI_MISS",
"PerPkg": "1",
@@ -2140,6 +2393,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL",
"PerPkg": "1",
@@ -2148,6 +2402,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_PARTIAL_ISOCH",
"PerPkg": "1",
@@ -2156,6 +2411,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cache - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -2164,6 +2420,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : DDR - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -2172,6 +2429,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : PMM - Ch0",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH0_TO_PMM",
"PerPkg": "1",
@@ -2181,6 +2439,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : All Writes - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_ALL",
"PerPkg": "1",
@@ -2189,6 +2448,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : From TGR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_FROM_TGR",
"PerPkg": "1",
@@ -2196,6 +2456,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_FULL",
"PerPkg": "1",
@@ -2204,6 +2465,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_FULL_ISOCH",
"PerPkg": "1",
@@ -2212,6 +2474,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_NI",
"PerPkg": "1",
@@ -2219,6 +2482,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_NI_MISS",
"PerPkg": "1",
@@ -2226,6 +2490,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL",
"PerPkg": "1",
@@ -2234,6 +2499,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_PARTIAL_ISOCH",
"PerPkg": "1",
@@ -2242,6 +2508,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cache - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -2250,6 +2517,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : DDR - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -2258,6 +2526,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : PMM - Ch1",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.CH1_TO_PMM",
"PerPkg": "1",
@@ -2267,6 +2536,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : From TGR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.FROM_TGR",
"PerPkg": "1",
@@ -2274,6 +2544,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Full Line Non-ISOCH - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.FULL",
"PerPkg": "1",
@@ -2282,6 +2553,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : ISOCH Full Line - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.FULL_ISOCH",
"PerPkg": "1",
@@ -2290,6 +2562,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.NI",
"PerPkg": "1",
@@ -2297,6 +2570,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Non-Inclusive Miss - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.NI_MISS",
"PerPkg": "1",
@@ -2304,6 +2578,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : Partial Non-ISOCH - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.PARTIAL",
"PerPkg": "1",
@@ -2312,6 +2587,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : ISOCH Partial - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.PARTIAL_ISOCH",
"PerPkg": "1",
@@ -2320,6 +2596,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : DDR, acting as Cache - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_CACHE",
"PerPkg": "1",
@@ -2328,6 +2605,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : DDR - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.TO_DDR_AS_MEM",
"PerPkg": "1",
@@ -2336,6 +2614,7 @@
},
{
"BriefDescription": "M2M Writes Issued to iMC : PMM - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_M2M_IMC_WRITES.TO_PMM",
"PerPkg": "1",
@@ -2344,6 +2623,7 @@
},
{
"BriefDescription": "Write Tracker Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x64",
"EventName": "UNC_M2M_MIRR_WRQ_INSERTS",
"PerPkg": "1",
@@ -2351,6 +2631,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x65",
"EventName": "UNC_M2M_MIRR_WRQ_OCCUPANCY",
"PerPkg": "1",
@@ -2358,6 +2639,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI0",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST0",
"PerPkg": "1",
@@ -2366,6 +2648,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI1",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_M2M_MISC_EXTERNAL.MBE_INST1",
"PerPkg": "1",
@@ -2374,6 +2657,7 @@
},
{
"BriefDescription": "Number Packet Header Matches : MC Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M2M_PKT_MATCH.MC",
"PerPkg": "1",
@@ -2382,6 +2666,7 @@
},
{
"BriefDescription": "Number Packet Header Matches : Mesh Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M2M_PKT_MATCH.MESH",
"PerPkg": "1",
@@ -2390,6 +2675,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_CIS_DROPS",
+ "Counter": "0,1,2,3",
"EventCode": "0x73",
"EventName": "UNC_M2M_PREFCAM_CIS_DROPS",
"PerPkg": "1",
@@ -2397,6 +2683,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Full : All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.ALLCH",
"PerPkg": "1",
@@ -2405,6 +2692,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Full : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH0",
"PerPkg": "1",
@@ -2413,6 +2701,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Full : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH1",
"PerPkg": "1",
@@ -2421,6 +2710,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Full : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6B",
"EventName": "UNC_M2M_PREFCAM_CYCLES_FULL.CH2",
"PerPkg": "1",
@@ -2429,6 +2719,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Not Empty : All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6C",
"EventName": "UNC_M2M_PREFCAM_CYCLES_NE.ALLCH",
"PerPkg": "1",
@@ -2437,6 +2728,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6C",
"EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH0",
"PerPkg": "1",
@@ -2445,6 +2737,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6C",
"EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH1",
"PerPkg": "1",
@@ -2453,6 +2746,7 @@
},
{
"BriefDescription": "Prefetch CAM Cycles Not Empty : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6C",
"EventName": "UNC_M2M_PREFCAM_CYCLES_NE.CH2",
"PerPkg": "1",
@@ -2461,6 +2755,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA0_INVAL",
"PerPkg": "1",
@@ -2469,6 +2764,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_HITA1_INVAL",
"PerPkg": "1",
@@ -2477,6 +2773,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_MISS_INVAL",
"PerPkg": "1",
@@ -2485,6 +2782,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH0_RSP_PDRESET",
"PerPkg": "1",
@@ -2493,6 +2791,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA0_INVAL",
"PerPkg": "1",
@@ -2501,6 +2800,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_HITA1_INVAL",
"PerPkg": "1",
@@ -2509,6 +2809,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_MISS_INVAL",
"PerPkg": "1",
@@ -2517,6 +2818,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH1_RSP_PDRESET",
"PerPkg": "1",
@@ -2525,6 +2827,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_HITA0_INVAL",
"PerPkg": "1",
@@ -2532,6 +2835,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_HITA1_INVAL",
"PerPkg": "1",
@@ -2539,6 +2843,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_MISS_INVAL",
"PerPkg": "1",
@@ -2546,6 +2851,7 @@
},
{
"BriefDescription": "Prefetch CAM Deallocs",
+ "Counter": "0,1,2,3",
"EventCode": "0x6E",
"EventName": "UNC_M2M_PREFCAM_DEALLOCS.CH2_RSP_PDRESET",
"PerPkg": "1",
@@ -2553,6 +2859,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : UPI - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6F",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_UPI",
"PerPkg": "1",
@@ -2561,6 +2868,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : XPT - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6F",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH0_XPT",
"PerPkg": "1",
@@ -2569,6 +2877,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : UPI - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6F",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_UPI",
"PerPkg": "1",
@@ -2577,6 +2886,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : XPT - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6F",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH1_XPT",
"PerPkg": "1",
@@ -2585,6 +2895,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : UPI - Ch 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6F",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH2_UPI",
"PerPkg": "1",
@@ -2593,6 +2904,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : XPT - Ch 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6F",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.CH2_XPT",
"PerPkg": "1",
@@ -2601,6 +2913,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.UPI_ALLCH",
"PerPkg": "1",
@@ -2609,6 +2922,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped : XPT - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6f",
"EventName": "UNC_M2M_PREFCAM_DEMAND_DROPS.XPT_ALLCH",
"PerPkg": "1",
@@ -2617,6 +2931,7 @@
},
{
"BriefDescription": "Demands Merged with CAMed Prefetches : XPT & UPI- Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH0_XPTUPI",
"PerPkg": "1",
@@ -2626,6 +2941,7 @@
},
{
"BriefDescription": "Demands Merged with CAMed Prefetches : XPT & UPI - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH1_XPTUPI",
"PerPkg": "1",
@@ -2635,6 +2951,7 @@
},
{
"BriefDescription": "Demands Merged with CAMed Prefetches : XPT & UPI- Ch 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.CH2_XPTUPI",
"PerPkg": "1",
@@ -2644,6 +2961,7 @@
},
{
"BriefDescription": "Demands Merged with CAMed Prefetches : XPT & UPI- All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_M2M_PREFCAM_DEMAND_MERGE.XPTUPI_ALLCH",
"PerPkg": "1",
@@ -2653,6 +2971,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches : XPT & UPI - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH0_XPTUPI",
"PerPkg": "1",
@@ -2662,6 +2981,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches : XPT & UPI - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH1_XPTUPI",
"PerPkg": "1",
@@ -2671,6 +2991,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches : XPT & UPI - Ch 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.CH2_XPTUPI",
"PerPkg": "1",
@@ -2679,6 +3000,7 @@
},
{
"BriefDescription": "Demands Not Merged with CAMed Prefetches : XPT & UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_M2M_PREFCAM_DEMAND_NO_MERGE.XPTUPI_ALLCH",
"PerPkg": "1",
@@ -2687,6 +3009,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.ERRORBLK_RxC",
"PerPkg": "1",
@@ -2695,6 +3018,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.NOT_PF_SAD_REGION",
"PerPkg": "1",
@@ -2703,6 +3027,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_AD_CRD",
"PerPkg": "1",
@@ -2711,6 +3036,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_FULL",
"PerPkg": "1",
@@ -2719,6 +3045,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_CAM_HIT",
"PerPkg": "1",
@@ -2727,6 +3054,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.PF_SECURE_DROP",
"PerPkg": "1",
@@ -2735,6 +3063,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.RPQ_PROXY",
"PerPkg": "1",
@@ -2742,6 +3071,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.STOP_B2B",
"PerPkg": "1",
@@ -2750,6 +3080,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.UPI_THRESH",
"PerPkg": "1",
@@ -2757,6 +3088,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.WPQ_PROXY",
"PerPkg": "1",
@@ -2765,6 +3097,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch0 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x70",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH0.XPT_THRESH",
"PerPkg": "1",
@@ -2772,6 +3105,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.ERRORBLK_RxC",
"PerPkg": "1",
@@ -2780,6 +3114,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.NOT_PF_SAD_REGION",
"PerPkg": "1",
@@ -2788,6 +3123,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_AD_CRD",
"PerPkg": "1",
@@ -2796,6 +3132,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_FULL",
"PerPkg": "1",
@@ -2804,6 +3141,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_CAM_HIT",
"PerPkg": "1",
@@ -2812,6 +3150,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.PF_SECURE_DROP",
"PerPkg": "1",
@@ -2820,6 +3159,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.RPQ_PROXY",
"PerPkg": "1",
@@ -2827,6 +3167,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.STOP_B2B",
"PerPkg": "1",
@@ -2835,6 +3176,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.UPI_THRESH",
"PerPkg": "1",
@@ -2842,6 +3184,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.WPQ_PROXY",
"PerPkg": "1",
@@ -2850,6 +3193,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch1 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x71",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH1.XPT_THRESH",
"PerPkg": "1",
@@ -2857,6 +3201,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.ERRORBLK_RxC",
"PerPkg": "1",
@@ -2865,6 +3210,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.NOT_PF_SAD_REGION",
"PerPkg": "1",
@@ -2873,6 +3219,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_AD_CRD",
"PerPkg": "1",
@@ -2881,6 +3228,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_CAM_FULL",
"PerPkg": "1",
@@ -2889,6 +3237,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_CAM_HIT",
"PerPkg": "1",
@@ -2897,6 +3246,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.PF_SECURE_DROP",
"PerPkg": "1",
@@ -2905,6 +3255,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.RPQ_PROXY",
"PerPkg": "1",
@@ -2912,6 +3263,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.STOP_B2B",
"PerPkg": "1",
@@ -2920,6 +3272,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.UPI_THRESH",
"PerPkg": "1",
@@ -2927,6 +3280,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.WPQ_PROXY",
"PerPkg": "1",
@@ -2935,6 +3289,7 @@
},
{
"BriefDescription": "Data Prefetches Dropped Ch2 - Reasons",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_M2M_PREFCAM_DROP_REASONS_CH2.XPT_THRESH",
"PerPkg": "1",
@@ -2942,6 +3297,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_UPI",
"PerPkg": "1",
@@ -2950,6 +3306,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH0_XPT",
"PerPkg": "1",
@@ -2958,6 +3315,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_UPI",
"PerPkg": "1",
@@ -2966,6 +3324,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH1_XPT",
"PerPkg": "1",
@@ -2974,6 +3333,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - Ch 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH2_UPI",
"PerPkg": "1",
@@ -2982,6 +3342,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - Ch 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.CH2_XPT",
"PerPkg": "1",
@@ -2990,6 +3351,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : UPI - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6d",
"EventName": "UNC_M2M_PREFCAM_INSERTS.UPI_ALLCH",
"PerPkg": "1",
@@ -2998,6 +3360,7 @@
},
{
"BriefDescription": "Prefetch CAM Inserts : XPT - All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6D",
"EventName": "UNC_M2M_PREFCAM_INSERTS.XPT_ALLCH",
"PerPkg": "1",
@@ -3006,6 +3369,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x6A",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.ALLCH",
"PerPkg": "1",
@@ -3014,6 +3378,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x6A",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -3022,6 +3387,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x6A",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -3030,6 +3396,7 @@
},
{
"BriefDescription": "Prefetch CAM Occupancy : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x6A",
"EventName": "UNC_M2M_PREFCAM_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -3038,6 +3405,7 @@
},
{
"BriefDescription": ": All Channels",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.ALLCH",
"PerPkg": "1",
@@ -3046,6 +3414,7 @@
},
{
"BriefDescription": ": Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH0",
"PerPkg": "1",
@@ -3054,6 +3423,7 @@
},
{
"BriefDescription": ": Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH1",
"PerPkg": "1",
@@ -3062,6 +3432,7 @@
},
{
"BriefDescription": ": Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_M2M_PREFCAM_RESP_MISS.CH2",
"PerPkg": "1",
@@ -3070,6 +3441,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_CYCLES_NE",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "UNC_M2M_PREFCAM_RxC_CYCLES_NE",
"PerPkg": "1",
@@ -3077,6 +3449,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
+ "Counter": "0,1,2,3",
"EventCode": "0x7A",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.1LM_POSTED",
"PerPkg": "1",
@@ -3085,6 +3458,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS",
+ "Counter": "0,1,2,3",
"EventCode": "0x7A",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.CIS",
"PerPkg": "1",
@@ -3093,6 +3467,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT",
+ "Counter": "0,1,2,3",
"EventCode": "0x7A",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.PMM_MEMMODE_ACCEPT",
"PerPkg": "1",
@@ -3101,6 +3476,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED",
+ "Counter": "0,1,2,3",
"EventCode": "0x7A",
"EventName": "UNC_M2M_PREFCAM_RxC_DEALLOCS.SQUASHED",
"PerPkg": "1",
@@ -3109,6 +3485,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_INSERTS",
+ "Counter": "0,1,2,3",
"EventCode": "0x78",
"EventName": "UNC_M2M_PREFCAM_RxC_INSERTS",
"PerPkg": "1",
@@ -3116,6 +3493,7 @@
},
{
"BriefDescription": "UNC_M2M_PREFCAM_RxC_OCCUPANCY",
+ "Counter": "0,1,2,3",
"EventCode": "0x77",
"EventName": "UNC_M2M_PREFCAM_RxC_OCCUPANCY",
"PerPkg": "1",
@@ -3123,6 +3501,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -3132,6 +3511,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -3141,6 +3521,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -3150,6 +3531,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M2M_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -3159,6 +3541,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -3168,6 +3551,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -3177,6 +3561,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.AKC",
"PerPkg": "1",
@@ -3186,6 +3571,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -3195,6 +3581,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M2M_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -3204,6 +3591,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -3212,6 +3600,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -3220,6 +3609,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : Acknowledgements to Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -3228,6 +3618,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -3236,6 +3627,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M2M_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -3244,6 +3636,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -3252,6 +3645,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -3260,6 +3654,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.AKC",
"PerPkg": "1",
@@ -3268,6 +3663,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -3276,6 +3672,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M2M_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -3284,6 +3681,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2,3",
"EventCode": "0xae",
"EventName": "UNC_M2M_RING_SRC_THRTL",
"PerPkg": "1",
@@ -3291,6 +3689,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH0",
"PerPkg": "1",
@@ -3299,6 +3698,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH1",
"PerPkg": "1",
@@ -3307,6 +3707,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Regular : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2M_RPQ_NO_REG_CRD.CH2",
"PerPkg": "1",
@@ -3315,6 +3716,7 @@
},
{
"BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4F",
"EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN0",
"PerPkg": "1",
@@ -3323,6 +3725,7 @@
},
{
"BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4F",
"EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN1",
"PerPkg": "1",
@@ -3331,6 +3734,7 @@
},
{
"BriefDescription": "M2M->iMC RPQ Cycles w/Credits - PMM : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4F",
"EventName": "UNC_M2M_RPQ_NO_REG_CRD_PMM.CHN2",
"PerPkg": "1",
@@ -3339,6 +3743,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH0",
"PerPkg": "1",
@@ -3347,6 +3752,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH1",
"PerPkg": "1",
@@ -3355,6 +3761,7 @@
},
{
"BriefDescription": "M2M to iMC RPQ Cycles w/Credits - Special : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2M_RPQ_NO_SPEC_CRD.CH2",
"PerPkg": "1",
@@ -3363,6 +3770,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M2M_RxC_AD_CYCLES_FULL",
"PerPkg": "1",
@@ -3370,6 +3778,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_M2M_RxC_AD_CYCLES_NE",
"PerPkg": "1",
@@ -3377,6 +3786,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M2M_RxC_AD_INSERTS",
"PerPkg": "1",
@@ -3384,6 +3794,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M2M_RxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -3391,6 +3802,7 @@
},
{
"BriefDescription": "AD Ingress (from CMS) Occupancy - Prefetches",
+ "Counter": "0,1,2,3",
"EventCode": "0x77",
"EventName": "UNC_M2M_RxC_AD_PREF_OCCUPANCY",
"PerPkg": "1",
@@ -3398,6 +3810,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M2M_RxC_AK_WR_CMP",
"PerPkg": "1",
@@ -3405,6 +3818,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "UNC_M2M_RxC_BL_CYCLES_FULL",
"PerPkg": "1",
@@ -3412,6 +3826,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x07",
"EventName": "UNC_M2M_RxC_BL_CYCLES_NE",
"PerPkg": "1",
@@ -3419,6 +3834,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_M2M_RxC_BL_INSERTS",
"PerPkg": "1",
@@ -3426,6 +3842,7 @@
},
{
"BriefDescription": "BL Ingress (from CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_M2M_RxC_BL_OCCUPANCY",
"PerPkg": "1",
@@ -3433,6 +3850,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_ALL",
"PerPkg": "1",
@@ -3442,6 +3860,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -3451,6 +3870,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -3460,6 +3880,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_ALL",
"PerPkg": "1",
@@ -3469,6 +3890,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -3478,6 +3900,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M2M_RxR_BUSY_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -3487,6 +3910,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -3496,6 +3920,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -3505,6 +3930,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -3514,6 +3940,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.AK",
"PerPkg": "1",
@@ -3523,6 +3950,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -3532,6 +3960,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -3541,6 +3970,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -3550,6 +3980,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -3559,6 +3990,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M2M_RxR_BYPASS.IV",
"PerPkg": "1",
@@ -3568,6 +4000,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AD_ALL",
"PerPkg": "1",
@@ -3577,6 +4010,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -3586,6 +4020,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -3595,6 +4030,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.AK",
"PerPkg": "1",
@@ -3604,6 +4040,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.BL_ALL",
"PerPkg": "1",
@@ -3613,6 +4050,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -3622,6 +4060,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -3631,6 +4070,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IFV - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -3640,6 +4080,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M2M_RxR_CRD_STARVED.IV",
"PerPkg": "1",
@@ -3649,6 +4090,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_M2M_RxR_CRD_STARVED_1",
"PerPkg": "1",
@@ -3657,6 +4099,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -3666,6 +4109,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -3675,6 +4119,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -3684,6 +4129,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.AK",
"PerPkg": "1",
@@ -3693,6 +4139,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -3702,6 +4149,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -3711,6 +4159,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -3720,6 +4169,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -3729,6 +4179,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M2M_RxR_INSERTS.IV",
"PerPkg": "1",
@@ -3738,6 +4189,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -3747,6 +4199,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -3756,6 +4209,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -3765,6 +4219,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AK",
"PerPkg": "1",
@@ -3774,6 +4229,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -3783,6 +4239,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -3792,6 +4249,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -3801,6 +4259,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -3810,6 +4269,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M2M_RxR_OCCUPANCY.IV",
"PerPkg": "1",
@@ -3819,6 +4279,7 @@
},
{
"BriefDescription": "UNC_M2M_SCOREBOARD_AD_RETRY_ACCEPTS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2M_SCOREBOARD_AD_RETRY_ACCEPTS",
"PerPkg": "1",
@@ -3826,6 +4287,7 @@
},
{
"BriefDescription": "UNC_M2M_SCOREBOARD_AD_RETRY_REJECTS",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2M_SCOREBOARD_AD_RETRY_REJECTS",
"PerPkg": "1",
@@ -3833,6 +4295,7 @@
},
{
"BriefDescription": "Retry - Mem Mirroring Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M2M_SCOREBOARD_BL_RETRY_ACCEPTS",
"PerPkg": "1",
@@ -3840,6 +4303,7 @@
},
{
"BriefDescription": "Retry - Mem Mirroring Mode",
+ "Counter": "0,1,2,3",
"EventCode": "0x36",
"EventName": "UNC_M2M_SCOREBOARD_BL_RETRY_REJECTS",
"PerPkg": "1",
@@ -3847,6 +4311,7 @@
},
{
"BriefDescription": "Scoreboard Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_M2M_SCOREBOARD_RD_ACCEPTS",
"PerPkg": "1",
@@ -3854,6 +4319,7 @@
},
{
"BriefDescription": "Scoreboard Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M2M_SCOREBOARD_RD_REJECTS",
"PerPkg": "1",
@@ -3861,6 +4327,7 @@
},
{
"BriefDescription": "Scoreboard Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_M2M_SCOREBOARD_WR_ACCEPTS",
"PerPkg": "1",
@@ -3868,6 +4335,7 @@
},
{
"BriefDescription": "Scoreboard Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2M_SCOREBOARD_WR_REJECTS",
"PerPkg": "1",
@@ -3875,6 +4343,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -3884,6 +4353,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -3893,6 +4363,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -3902,6 +4373,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -3911,6 +4383,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -3920,6 +4393,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -3929,6 +4403,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6",
"PerPkg": "1",
@@ -3938,6 +4413,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7",
"PerPkg": "1",
@@ -3947,6 +4423,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -3956,6 +4433,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -3965,6 +4443,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -3974,6 +4453,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -3983,6 +4463,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -3992,6 +4473,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -4001,6 +4483,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6",
"PerPkg": "1",
@@ -4010,6 +4493,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7",
"PerPkg": "1",
@@ -4019,6 +4503,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -4028,6 +4513,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -4037,6 +4523,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -4046,6 +4533,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -4055,6 +4543,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -4064,6 +4553,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -4073,6 +4563,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6",
"PerPkg": "1",
@@ -4082,6 +4573,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7",
"PerPkg": "1",
@@ -4091,6 +4583,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -4100,6 +4593,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -4109,6 +4603,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -4118,6 +4613,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -4127,6 +4623,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -4136,6 +4633,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -4145,6 +4643,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6",
"PerPkg": "1",
@@ -4154,6 +4653,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M2M_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7",
"PerPkg": "1",
@@ -4163,6 +4663,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10",
"PerPkg": "1",
@@ -4172,6 +4673,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8",
"PerPkg": "1",
@@ -4181,6 +4683,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9",
"PerPkg": "1",
@@ -4190,6 +4693,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10",
"PerPkg": "1",
@@ -4199,6 +4703,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8",
"PerPkg": "1",
@@ -4208,6 +4713,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9",
"PerPkg": "1",
@@ -4217,6 +4723,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10",
"PerPkg": "1",
@@ -4226,6 +4733,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8",
"PerPkg": "1",
@@ -4235,6 +4743,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9",
"PerPkg": "1",
@@ -4244,6 +4753,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10",
"PerPkg": "1",
@@ -4253,6 +4763,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8",
"PerPkg": "1",
@@ -4262,6 +4773,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M2M_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9",
"PerPkg": "1",
@@ -4271,6 +4783,7 @@
},
{
"BriefDescription": "Tag Hit : Clean NearMem Read Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_CLEAN",
"PerPkg": "1",
@@ -4280,6 +4793,7 @@
},
{
"BriefDescription": "Tag Hit : Dirty NearMem Read Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY",
"PerPkg": "1",
@@ -4289,6 +4803,7 @@
},
{
"BriefDescription": "Tag Hit : Clean NearMem Underfill Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN",
"PerPkg": "1",
@@ -4298,6 +4813,7 @@
},
{
"BriefDescription": "Tag Hit : Dirty NearMem Underfill Hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY",
"PerPkg": "1",
@@ -4307,6 +4823,7 @@
},
{
"BriefDescription": "Tag Miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M2M_TAG_MISS",
"PerPkg": "1",
@@ -4314,6 +4831,7 @@
},
{
"BriefDescription": "Number AD Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2M_TGR_AD_CREDITS",
"PerPkg": "1",
@@ -4321,6 +4839,7 @@
},
{
"BriefDescription": "Number BL Ingress Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2M_TGR_BL_CREDITS",
"PerPkg": "1",
@@ -4328,6 +4847,7 @@
},
{
"BriefDescription": "Tracker Cycles Full : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2M_TRACKER_FULL.CH0",
"PerPkg": "1",
@@ -4336,6 +4856,7 @@
},
{
"BriefDescription": "Tracker Cycles Full : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2M_TRACKER_FULL.CH1",
"PerPkg": "1",
@@ -4344,6 +4865,7 @@
},
{
"BriefDescription": "Tracker Cycles Full : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2M_TRACKER_FULL.CH2",
"PerPkg": "1",
@@ -4352,6 +4874,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -4360,6 +4883,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -4368,6 +4892,7 @@
},
{
"BriefDescription": "Tracker Inserts : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2M_TRACKER_INSERTS.CH2",
"PerPkg": "1",
@@ -4376,6 +4901,7 @@
},
{
"BriefDescription": "Tracker Cycles Not Empty : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2M_TRACKER_NE.CH0",
"PerPkg": "1",
@@ -4384,6 +4910,7 @@
},
{
"BriefDescription": "Tracker Cycles Not Empty : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2M_TRACKER_NE.CH1",
"PerPkg": "1",
@@ -4392,6 +4919,7 @@
},
{
"BriefDescription": "Tracker Cycles Not Empty : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2M_TRACKER_NE.CH2",
"PerPkg": "1",
@@ -4400,6 +4928,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -4408,6 +4937,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -4416,6 +4946,7 @@
},
{
"BriefDescription": "Tracker Occupancy : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2M_TRACKER_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -4424,6 +4955,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Credit Acquired",
+ "Counter": "0,1,2,3",
"EventCode": "0x0d",
"EventName": "UNC_M2M_TxC_AD_CREDITS_ACQUIRED",
"PerPkg": "1",
@@ -4431,6 +4963,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Credits Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x0e",
"EventName": "UNC_M2M_TxC_AD_CREDIT_OCCUPANCY",
"PerPkg": "1",
@@ -4438,6 +4971,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x0c",
"EventName": "UNC_M2M_TxC_AD_CYCLES_FULL",
"PerPkg": "1",
@@ -4445,6 +4979,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x0b",
"EventName": "UNC_M2M_TxC_AD_CYCLES_NE",
"PerPkg": "1",
@@ -4452,6 +4987,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x09",
"EventName": "UNC_M2M_TxC_AD_INSERTS",
"PerPkg": "1",
@@ -4459,6 +4995,7 @@
},
{
"BriefDescription": "Cycles with No AD Egress (to CMS) Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x0f",
"EventName": "UNC_M2M_TxC_AD_NO_CREDIT_CYCLES",
"PerPkg": "1",
@@ -4466,6 +5003,7 @@
},
{
"BriefDescription": "Cycles Stalled with No AD Egress (to CMS) Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2M_TxC_AD_NO_CREDIT_STALLED",
"PerPkg": "1",
@@ -4473,6 +5011,7 @@
},
{
"BriefDescription": "AD Egress (to CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x0A",
"EventName": "UNC_M2M_TxC_AD_OCCUPANCY",
"PerPkg": "1",
@@ -4480,6 +5019,7 @@
},
{
"BriefDescription": "Outbound Ring Transactions on AK : CRD Transactions to Cbo",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_M2M_TxC_AK.CRD_CBO",
"PerPkg": "1",
@@ -4488,6 +5028,7 @@
},
{
"BriefDescription": "Outbound Ring Transactions on AK : NDR Transactions",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_M2M_TxC_AK.NDR",
"PerPkg": "1",
@@ -4496,6 +5037,7 @@
},
{
"BriefDescription": "AKC Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M2M_TxC_AKC_CREDITS",
"PerPkg": "1",
@@ -4503,6 +5045,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Credit Acquired : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1D",
"EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS0",
"PerPkg": "1",
@@ -4511,6 +5054,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Credit Acquired : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1D",
"EventName": "UNC_M2M_TxC_AK_CREDITS_ACQUIRED.CMS1",
"PerPkg": "1",
@@ -4519,6 +5063,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.ALL",
"PerPkg": "1",
@@ -4527,6 +5072,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS0",
"PerPkg": "1",
@@ -4535,6 +5081,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.CMS1",
"PerPkg": "1",
@@ -4543,6 +5090,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD0",
"PerPkg": "1",
@@ -4551,6 +5099,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.RDCRD1",
"PerPkg": "1",
@@ -4559,6 +5108,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP0",
"PerPkg": "1",
@@ -4567,6 +5117,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCMP1",
"PerPkg": "1",
@@ -4575,6 +5126,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD0",
"PerPkg": "1",
@@ -4583,6 +5135,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_M2M_TxC_AK_CYCLES_FULL.WRCRD1",
"PerPkg": "1",
@@ -4591,6 +5144,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.ALL",
"PerPkg": "1",
@@ -4599,6 +5153,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS0",
"PerPkg": "1",
@@ -4607,6 +5162,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.CMS1",
"PerPkg": "1",
@@ -4615,6 +5171,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.RDCRD",
"PerPkg": "1",
@@ -4623,6 +5180,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCMP",
"PerPkg": "1",
@@ -4631,6 +5189,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x13",
"EventName": "UNC_M2M_TxC_AK_CYCLES_NE.WRCRD",
"PerPkg": "1",
@@ -4639,6 +5198,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.ALL",
"PerPkg": "1",
@@ -4647,6 +5207,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.CMS0",
"PerPkg": "1",
@@ -4655,6 +5216,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.CMS1",
"PerPkg": "1",
@@ -4663,6 +5225,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.PREF_RD_CAM_HIT",
"PerPkg": "1",
@@ -4671,6 +5234,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.RDCRD",
"PerPkg": "1",
@@ -4679,6 +5243,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.WRCMP",
"PerPkg": "1",
@@ -4687,6 +5252,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2M_TxC_AK_INSERTS.WRCRD",
"PerPkg": "1",
@@ -4695,6 +5261,7 @@
},
{
"BriefDescription": "Cycles with No AK Egress (to CMS) Credits : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS0",
"PerPkg": "1",
@@ -4703,6 +5270,7 @@
},
{
"BriefDescription": "Cycles with No AK Egress (to CMS) Credits : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1F",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_CYCLES.CMS1",
"PerPkg": "1",
@@ -4711,6 +5279,7 @@
},
{
"BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Credits : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS0",
"PerPkg": "1",
@@ -4719,6 +5288,7 @@
},
{
"BriefDescription": "Cycles Stalled with No AK Egress (to CMS) Credits : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M2M_TxC_AK_NO_CREDIT_STALLED.CMS1",
"PerPkg": "1",
@@ -4727,6 +5297,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -4735,6 +5306,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS0",
"PerPkg": "1",
@@ -4743,6 +5315,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.CMS1",
"PerPkg": "1",
@@ -4751,6 +5324,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.RDCRD",
"PerPkg": "1",
@@ -4759,6 +5333,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCMP",
"PerPkg": "1",
@@ -4767,6 +5342,7 @@
},
{
"BriefDescription": "AK Egress (to CMS) Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M2M_TxC_AK_OCCUPANCY.WRCRD",
"PerPkg": "1",
@@ -4775,6 +5351,7 @@
},
{
"BriefDescription": "Outbound DRS Ring Transactions to Cache : Data to Cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_TxC_BL.DRS_CACHE",
"PerPkg": "1",
@@ -4783,6 +5360,7 @@
},
{
"BriefDescription": "Outbound DRS Ring Transactions to Cache : Data to Core",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_TxC_BL.DRS_CORE",
"PerPkg": "1",
@@ -4791,6 +5369,7 @@
},
{
"BriefDescription": "Outbound DRS Ring Transactions to Cache : Data to QPI",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2M_TxC_BL.DRS_UPI",
"PerPkg": "1",
@@ -4799,6 +5378,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Credit Acquired : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS0",
"PerPkg": "1",
@@ -4807,6 +5387,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Credit Acquired : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2M_TxC_BL_CREDITS_ACQUIRED.CMS1",
"PerPkg": "1",
@@ -4815,6 +5396,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Full : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.ALL",
"PerPkg": "1",
@@ -4823,6 +5405,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS0",
"PerPkg": "1",
@@ -4831,6 +5414,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Full : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2M_TxC_BL_CYCLES_FULL.CMS1",
"PerPkg": "1",
@@ -4839,6 +5423,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Not Empty : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_TxC_BL_CYCLES_NE.ALL",
"PerPkg": "1",
@@ -4847,6 +5432,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS0",
"PerPkg": "1",
@@ -4855,6 +5441,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Not Empty : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2M_TxC_BL_CYCLES_NE.CMS1",
"PerPkg": "1",
@@ -4863,6 +5450,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Allocations : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2M_TxC_BL_INSERTS.ALL",
"PerPkg": "1",
@@ -4871,6 +5459,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2M_TxC_BL_INSERTS.CMS0",
"PerPkg": "1",
@@ -4879,6 +5468,7 @@
},
{
"BriefDescription": "BL Egress (to CMS) Allocations : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2M_TxC_BL_INSERTS.CMS1",
"PerPkg": "1",
@@ -4887,6 +5477,7 @@
},
{
"BriefDescription": "Cycles with No BL Egress (to CMS) Credits : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1B",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS0",
"PerPkg": "1",
@@ -4895,6 +5486,7 @@
},
{
"BriefDescription": "Cycles with No BL Egress (to CMS) Credits : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1B",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_CYCLES.CMS1",
"PerPkg": "1",
@@ -4903,6 +5495,7 @@
},
{
"BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Credits : Common Mesh Stop - Near Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1C",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS0",
"PerPkg": "1",
@@ -4911,6 +5504,7 @@
},
{
"BriefDescription": "Cycles Stalled with No BL Egress (to CMS) Credits : Common Mesh Stop - Far Side",
+ "Counter": "0,1,2,3",
"EventCode": "0x1C",
"EventName": "UNC_M2M_TxC_BL_NO_CREDIT_STALLED.CMS1",
"PerPkg": "1",
@@ -4919,6 +5513,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_ALL",
"PerPkg": "1",
@@ -4928,6 +5523,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -4937,6 +5533,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.AD_UNCRD",
"PerPkg": "1",
@@ -4946,6 +5543,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_ALL",
"PerPkg": "1",
@@ -4955,6 +5553,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -4964,6 +5563,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M2M_TxR_HORZ_ADS_USED.BL_UNCRD",
"PerPkg": "1",
@@ -4973,6 +5573,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -4982,6 +5583,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -4991,6 +5593,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -5000,6 +5603,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AK",
"PerPkg": "1",
@@ -5009,6 +5613,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -5018,6 +5623,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -5027,6 +5633,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -5036,6 +5643,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -5045,6 +5653,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M2M_TxR_HORZ_BYPASS.IV",
"PerPkg": "1",
@@ -5054,6 +5663,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_ALL",
"PerPkg": "1",
@@ -5063,6 +5673,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -5072,6 +5683,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AD_UNCRD",
"PerPkg": "1",
@@ -5081,6 +5693,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AK",
"PerPkg": "1",
@@ -5090,6 +5703,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.AKC_UNCRD",
"PerPkg": "1",
@@ -5099,6 +5713,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_ALL",
"PerPkg": "1",
@@ -5108,6 +5723,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -5117,6 +5733,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.BL_UNCRD",
"PerPkg": "1",
@@ -5126,6 +5743,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -5135,6 +5753,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_ALL",
"PerPkg": "1",
@@ -5144,6 +5763,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -5153,6 +5773,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AD_UNCRD",
"PerPkg": "1",
@@ -5162,6 +5783,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AK",
"PerPkg": "1",
@@ -5171,6 +5793,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.AKC_UNCRD",
"PerPkg": "1",
@@ -5180,6 +5803,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_ALL",
"PerPkg": "1",
@@ -5189,6 +5813,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -5198,6 +5823,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.BL_UNCRD",
"PerPkg": "1",
@@ -5207,6 +5833,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M2M_TxR_HORZ_CYCLES_NE.IV",
"PerPkg": "1",
@@ -5216,6 +5843,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -5225,6 +5853,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -5234,6 +5863,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -5243,6 +5873,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AK",
"PerPkg": "1",
@@ -5252,6 +5883,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -5261,6 +5893,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -5270,6 +5903,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -5279,6 +5913,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -5288,6 +5923,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M2M_TxR_HORZ_INSERTS.IV",
"PerPkg": "1",
@@ -5297,6 +5933,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AD_ALL",
"PerPkg": "1",
@@ -5306,6 +5943,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -5315,6 +5953,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AD_UNCRD",
"PerPkg": "1",
@@ -5324,6 +5963,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AK",
"PerPkg": "1",
@@ -5333,6 +5973,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.AKC_UNCRD",
"PerPkg": "1",
@@ -5342,6 +5983,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.BL_ALL",
"PerPkg": "1",
@@ -5351,6 +5993,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -5360,6 +6003,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.BL_UNCRD",
"PerPkg": "1",
@@ -5369,6 +6013,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M2M_TxR_HORZ_NACK.IV",
"PerPkg": "1",
@@ -5378,6 +6023,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -5387,6 +6033,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -5396,6 +6043,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -5405,6 +6053,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AK",
"PerPkg": "1",
@@ -5414,6 +6063,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -5423,6 +6073,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -5432,6 +6083,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -5441,6 +6093,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -5450,6 +6103,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M2M_TxR_HORZ_OCCUPANCY.IV",
"PerPkg": "1",
@@ -5459,6 +6113,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_ALL",
"PerPkg": "1",
@@ -5468,6 +6123,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -5477,6 +6133,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.AK",
"PerPkg": "1",
@@ -5486,6 +6143,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.AKC_UNCRD",
"PerPkg": "1",
@@ -5495,6 +6153,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_ALL",
"PerPkg": "1",
@@ -5504,6 +6163,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -5513,6 +6173,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M2M_TxR_HORZ_STARVED.IV",
"PerPkg": "1",
@@ -5522,6 +6183,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -5531,6 +6193,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -5540,6 +6203,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -5549,6 +6213,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M2M_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -5558,6 +6223,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -5567,6 +6233,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -5576,6 +6243,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -5585,6 +6253,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -5594,6 +6263,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -5603,6 +6273,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -5612,6 +6283,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : IV - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M2M_TxR_VERT_BYPASS.IV_AG1",
"PerPkg": "1",
@@ -5621,6 +6293,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG0",
"PerPkg": "1",
@@ -5630,6 +6303,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M2M_TxR_VERT_BYPASS_1.AKC_AG1",
"PerPkg": "1",
@@ -5639,6 +6313,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG0",
"PerPkg": "1",
@@ -5648,6 +6323,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AD_AG1",
"PerPkg": "1",
@@ -5657,6 +6333,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG0",
"PerPkg": "1",
@@ -5666,6 +6343,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.AK_AG1",
"PerPkg": "1",
@@ -5675,6 +6353,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG0",
"PerPkg": "1",
@@ -5684,6 +6363,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.BL_AG1",
"PerPkg": "1",
@@ -5693,6 +6373,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL0.IV_AG0",
"PerPkg": "1",
@@ -5702,6 +6383,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG0",
"PerPkg": "1",
@@ -5711,6 +6393,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_FULL1.AKC_AG1",
"PerPkg": "1",
@@ -5720,6 +6403,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG0",
"PerPkg": "1",
@@ -5729,6 +6413,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AD_AG1",
"PerPkg": "1",
@@ -5738,6 +6423,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG0",
"PerPkg": "1",
@@ -5747,6 +6433,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.AK_AG1",
"PerPkg": "1",
@@ -5756,6 +6443,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG0",
"PerPkg": "1",
@@ -5765,6 +6453,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.BL_AG1",
"PerPkg": "1",
@@ -5774,6 +6463,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE0.IV_AG0",
"PerPkg": "1",
@@ -5783,6 +6473,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG0",
"PerPkg": "1",
@@ -5792,6 +6483,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2M_TxR_VERT_CYCLES_NE1.AKC_AG1",
"PerPkg": "1",
@@ -5801,6 +6493,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG0",
"PerPkg": "1",
@@ -5810,6 +6503,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.AD_AG1",
"PerPkg": "1",
@@ -5819,6 +6513,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG0",
"PerPkg": "1",
@@ -5828,6 +6523,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.AK_AG1",
"PerPkg": "1",
@@ -5837,6 +6533,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG0",
"PerPkg": "1",
@@ -5846,6 +6543,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.BL_AG1",
"PerPkg": "1",
@@ -5855,6 +6553,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2M_TxR_VERT_INSERTS0.IV_AG0",
"PerPkg": "1",
@@ -5864,6 +6563,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG0",
"PerPkg": "1",
@@ -5873,6 +6573,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2M_TxR_VERT_INSERTS1.AKC_AG1",
"PerPkg": "1",
@@ -5882,6 +6583,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG0",
"PerPkg": "1",
@@ -5891,6 +6593,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.AD_AG1",
"PerPkg": "1",
@@ -5900,6 +6603,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG0",
"PerPkg": "1",
@@ -5909,6 +6613,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.AK_AG1",
"PerPkg": "1",
@@ -5918,6 +6623,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG0",
"PerPkg": "1",
@@ -5927,6 +6633,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.BL_AG1",
"PerPkg": "1",
@@ -5936,6 +6643,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2M_TxR_VERT_NACK0.IV_AG0",
"PerPkg": "1",
@@ -5945,6 +6653,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG0",
"PerPkg": "1",
@@ -5954,6 +6663,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2M_TxR_VERT_NACK1.AKC_AG1",
"PerPkg": "1",
@@ -5963,6 +6673,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG0",
"PerPkg": "1",
@@ -5972,6 +6683,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AD_AG1",
"PerPkg": "1",
@@ -5981,6 +6693,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG0",
"PerPkg": "1",
@@ -5990,6 +6703,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.AK_AG1",
"PerPkg": "1",
@@ -5999,6 +6713,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG0",
"PerPkg": "1",
@@ -6008,6 +6723,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.BL_AG1",
"PerPkg": "1",
@@ -6017,6 +6733,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY0.IV_AG0",
"PerPkg": "1",
@@ -6026,6 +6743,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG0",
"PerPkg": "1",
@@ -6035,6 +6753,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2M_TxR_VERT_OCCUPANCY1.AKC_AG1",
"PerPkg": "1",
@@ -6044,6 +6763,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG0",
"PerPkg": "1",
@@ -6053,6 +6773,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.AD_AG1",
"PerPkg": "1",
@@ -6062,6 +6783,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG0",
"PerPkg": "1",
@@ -6071,6 +6793,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.AK_AG1",
"PerPkg": "1",
@@ -6080,6 +6803,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG0",
"PerPkg": "1",
@@ -6089,6 +6813,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.BL_AG1",
"PerPkg": "1",
@@ -6098,6 +6823,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M2M_TxR_VERT_STARVED0.IV_AG0",
"PerPkg": "1",
@@ -6107,6 +6833,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG0",
"PerPkg": "1",
@@ -6116,6 +6843,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_VERT_STARVED1.AKC_AG1",
"PerPkg": "1",
@@ -6125,6 +6853,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M2M_TxR_VERT_STARVED1.TGC",
"PerPkg": "1",
@@ -6134,6 +6863,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -6143,6 +6873,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -6152,6 +6883,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -6161,6 +6893,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M2M_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -6170,6 +6903,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -6179,6 +6913,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -6188,6 +6923,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -6197,6 +6933,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M2M_VERT_RING_AKC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -6206,6 +6943,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -6215,6 +6953,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -6224,6 +6963,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -6233,6 +6973,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M2M_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -6242,6 +6983,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -6251,6 +6993,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -6260,6 +7003,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -6269,6 +7013,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M2M_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -6278,6 +7023,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -6287,6 +7033,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M2M_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -6296,6 +7043,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -6305,6 +7053,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -6314,6 +7063,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -6323,6 +7073,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M2M_VERT_RING_TGC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -6332,6 +7083,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_WPQ_FLUSH.CH0",
"PerPkg": "1",
@@ -6340,6 +7092,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_WPQ_FLUSH.CH1",
"PerPkg": "1",
@@ -6348,6 +7101,7 @@
},
{
"BriefDescription": "WPQ Flush : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M2M_WPQ_FLUSH.CH2",
"PerPkg": "1",
@@ -6356,6 +7110,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN0",
"PerPkg": "1",
@@ -6364,6 +7119,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN1",
"PerPkg": "1",
@@ -6372,6 +7128,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Regular : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD.CHN2",
"PerPkg": "1",
@@ -6380,6 +7137,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN0",
"PerPkg": "1",
@@ -6388,6 +7146,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN1",
"PerPkg": "1",
@@ -6396,6 +7155,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - PMM : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M2M_WPQ_NO_REG_CRD_PMM.CHN2",
"PerPkg": "1",
@@ -6404,6 +7164,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4E",
"EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN0",
"PerPkg": "1",
@@ -6412,6 +7173,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4E",
"EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN1",
"PerPkg": "1",
@@ -6420,6 +7182,7 @@
},
{
"BriefDescription": "M2M->iMC WPQ Cycles w/Credits - Special : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4E",
"EventName": "UNC_M2M_WPQ_NO_SPEC_CRD.CHN2",
"PerPkg": "1",
@@ -6428,6 +7191,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WR_TRACKER_FULL.CH0",
"PerPkg": "1",
@@ -6436,6 +7200,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WR_TRACKER_FULL.CH1",
"PerPkg": "1",
@@ -6444,6 +7209,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WR_TRACKER_FULL.CH2",
"PerPkg": "1",
@@ -6452,6 +7218,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Full : Mirror",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M2M_WR_TRACKER_FULL.MIRR",
"PerPkg": "1",
@@ -6460,6 +7227,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH0",
"PerPkg": "1",
@@ -6468,6 +7236,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH1",
"PerPkg": "1",
@@ -6476,6 +7245,7 @@
},
{
"BriefDescription": "Write Tracker Inserts : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M2M_WR_TRACKER_INSERTS.CH2",
"PerPkg": "1",
@@ -6484,6 +7254,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WR_TRACKER_NE.CH0",
"PerPkg": "1",
@@ -6492,6 +7263,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WR_TRACKER_NE.CH1",
"PerPkg": "1",
@@ -6500,6 +7272,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WR_TRACKER_NE.CH2",
"PerPkg": "1",
@@ -6508,6 +7281,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty : Mirror",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WR_TRACKER_NE.MIRR",
"PerPkg": "1",
@@ -6516,6 +7290,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_NONTGR",
"PerPkg": "1",
@@ -6524,6 +7299,7 @@
},
{
"BriefDescription": "Write Tracker Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M2M_WR_TRACKER_NE.MIRR_PWR",
"PerPkg": "1",
@@ -6532,6 +7308,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH0",
"PerPkg": "1",
@@ -6540,6 +7317,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH1",
"PerPkg": "1",
@@ -6548,6 +7326,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Inserts : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_INSERTS.CH2",
"PerPkg": "1",
@@ -6556,6 +7335,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -6564,6 +7344,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -6572,6 +7353,7 @@
},
{
"BriefDescription": "Write Tracker Non-Posted Occupancy : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x62",
"EventName": "UNC_M2M_WR_TRACKER_NONPOSTED_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -6580,6 +7362,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -6588,6 +7371,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -6596,6 +7380,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -6604,6 +7389,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy : Mirror",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR",
"PerPkg": "1",
@@ -6612,6 +7398,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_NONTGR",
"PerPkg": "1",
@@ -6620,6 +7407,7 @@
},
{
"BriefDescription": "Write Tracker Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M2M_WR_TRACKER_OCCUPANCY.MIRR_PWR",
"PerPkg": "1",
@@ -6628,6 +7416,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH0",
"PerPkg": "1",
@@ -6636,6 +7425,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH1",
"PerPkg": "1",
@@ -6644,6 +7434,7 @@
},
{
"BriefDescription": "Write Tracker Posted Inserts : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_INSERTS.CH2",
"PerPkg": "1",
@@ -6652,6 +7443,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH0",
"PerPkg": "1",
@@ -6660,6 +7452,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH1",
"PerPkg": "1",
@@ -6668,6 +7461,7 @@
},
{
"BriefDescription": "Write Tracker Posted Occupancy : Channel 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M2M_WR_TRACKER_POSTED_OCCUPANCY.CH2",
"PerPkg": "1",
@@ -6676,6 +7470,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -6685,6 +7480,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -6694,6 +7490,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -6703,6 +7500,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -6712,6 +7510,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -6721,6 +7520,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -6730,6 +7530,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -6739,6 +7540,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -6748,6 +7550,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -6757,6 +7560,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -6766,6 +7570,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M3UPI_AG0_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -6775,6 +7580,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -6784,6 +7590,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -6793,6 +7600,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -6802,6 +7610,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -6811,6 +7620,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -6820,6 +7630,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -6829,6 +7640,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -6838,6 +7650,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -6847,6 +7660,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -6856,6 +7670,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -6865,6 +7680,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M3UPI_AG0_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -6874,6 +7690,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -6883,6 +7700,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -6892,6 +7710,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -6901,6 +7720,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -6910,6 +7730,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -6919,6 +7740,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -6928,6 +7750,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -6937,6 +7760,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -6946,6 +7770,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -6955,6 +7780,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -6964,6 +7790,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M3UPI_AG0_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -6973,6 +7800,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -6982,6 +7810,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -6991,6 +7820,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -7000,6 +7830,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -7009,6 +7840,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -7018,6 +7850,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -7027,6 +7860,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -7036,6 +7870,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8A",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -7045,6 +7880,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -7054,6 +7890,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -7063,6 +7900,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8B",
"EventName": "UNC_M3UPI_AG0_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -7072,6 +7910,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -7081,6 +7920,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -7090,6 +7930,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -7099,6 +7940,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -7108,6 +7950,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -7117,6 +7960,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -7126,6 +7970,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -7135,6 +7980,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -7144,6 +7990,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -7153,6 +8000,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -7162,6 +8010,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M3UPI_AG1_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -7171,6 +8020,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -7180,6 +8030,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -7189,6 +8040,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -7198,6 +8050,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -7207,6 +8060,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -7216,6 +8070,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -7225,6 +8080,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -7234,6 +8090,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -7243,6 +8100,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -7252,6 +8110,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -7261,6 +8120,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M3UPI_AG1_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -7270,6 +8130,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -7279,6 +8140,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -7288,6 +8150,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -7297,6 +8160,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -7306,6 +8170,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -7315,6 +8180,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -7324,6 +8190,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -7333,6 +8200,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8C",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -7342,6 +8210,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -7351,6 +8220,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -7360,6 +8230,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8D",
"EventName": "UNC_M3UPI_AG1_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -7369,6 +8240,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -7378,6 +8250,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -7387,6 +8260,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -7396,6 +8270,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -7405,6 +8280,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -7414,6 +8290,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -7423,6 +8300,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -7432,6 +8310,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -7441,6 +8320,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -7450,6 +8330,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -7459,6 +8340,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_M3UPI_AG1_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -7468,6 +8350,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : Requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.REQ",
"PerPkg": "1",
@@ -7477,6 +8360,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : Snoops",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.SNP",
"PerPkg": "1",
@@ -7486,6 +8370,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : VNA Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -7495,6 +8380,7 @@
},
{
"BriefDescription": "CBox AD Credits Empty : Writebacks",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M3UPI_CHA_AD_CREDITS_EMPTY.WB",
"PerPkg": "1",
@@ -7504,6 +8390,7 @@
},
{
"BriefDescription": "Clockticks of the mesh to UPI (M3UPI)",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M3UPI_CLOCKTICKS",
"PerPkg": "1",
@@ -7512,6 +8399,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M3UPI_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -7519,6 +8407,7 @@
},
{
"BriefDescription": "D2C Sent",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_M3UPI_D2C_SENT",
"PerPkg": "1",
@@ -7527,6 +8416,7 @@
},
{
"BriefDescription": "D2U Sent",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_M3UPI_D2U_SENT",
"PerPkg": "1",
@@ -7535,6 +8425,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_LOCAL",
"PerPkg": "1",
@@ -7544,6 +8435,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_NONLOCAL",
"PerPkg": "1",
@@ -7553,6 +8445,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_STALL_IV",
"PerPkg": "1",
@@ -7562,6 +8455,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - No Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.DPT_STALL_NOCRD",
"PerPkg": "1",
@@ -7571,6 +8465,7 @@
},
{
"BriefDescription": "Distress signal asserted : Horizontal",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.HORZ",
"PerPkg": "1",
@@ -7580,6 +8475,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.PMM_LOCAL",
"PerPkg": "1",
@@ -7589,6 +8485,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.PMM_NONLOCAL",
"PerPkg": "1",
@@ -7598,6 +8495,7 @@
},
{
"BriefDescription": "Distress signal asserted : Vertical",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M3UPI_DISTRESS_ASSERTED.VERT",
"PerPkg": "1",
@@ -7607,6 +8505,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -7616,6 +8515,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xBA",
"EventName": "UNC_M3UPI_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -7625,6 +8525,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -7634,6 +8535,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -7643,6 +8545,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -7652,6 +8555,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB6",
"EventName": "UNC_M3UPI_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -7661,6 +8565,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -7670,6 +8575,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -7679,6 +8585,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -7688,6 +8595,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xBB",
"EventName": "UNC_M3UPI_HORZ_RING_AKC_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -7697,6 +8605,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -7706,6 +8615,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -7715,6 +8625,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -7724,6 +8635,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7",
"EventName": "UNC_M3UPI_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -7733,6 +8645,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -7742,6 +8655,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -7751,6 +8665,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -7760,6 +8675,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB8",
"EventName": "UNC_M3UPI_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -7769,6 +8685,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Left",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -7778,6 +8695,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Right",
+ "Counter": "0,1,2,3",
"EventCode": "0xB9",
"EventName": "UNC_M3UPI_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -7787,6 +8705,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO0 and IIO1 share the same ring destination. (1 VN0 credit only)",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO1_NCB",
"PerPkg": "1",
@@ -7796,6 +8715,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO2",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO2_NCB",
"PerPkg": "1",
@@ -7805,6 +8725,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO3",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO3_NCB",
"PerPkg": "1",
@@ -7814,6 +8735,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO4",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO4_NCB",
"PerPkg": "1",
@@ -7823,6 +8745,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO5",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.IIO5_NCB",
"PerPkg": "1",
@@ -7832,6 +8755,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : All IIO targets for NCS are in single mask. ORs them together",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS",
"PerPkg": "1",
@@ -7841,6 +8765,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : Selected M2p BL NCS credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.NCS_SEL",
"PerPkg": "1",
@@ -7850,6 +8775,7 @@
},
{
"BriefDescription": "M2 BL Credits Empty : IIO5",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M3UPI_M2_BL_CREDITS_EMPTY.UBOX_NCB",
"PerPkg": "1",
@@ -7859,6 +8785,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI0",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_M3UPI_MISC_EXTERNAL.MBE_INST0",
"PerPkg": "1",
@@ -7867,6 +8794,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI1",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_M3UPI_MISC_EXTERNAL.MBE_INST1",
"PerPkg": "1",
@@ -7875,6 +8803,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AD - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT0",
"PerPkg": "1",
@@ -7884,6 +8813,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AD - Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT1",
"PerPkg": "1",
@@ -7893,6 +8823,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AD - Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AD_SLOT2",
"PerPkg": "1",
@@ -7902,6 +8833,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AK - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT0",
"PerPkg": "1",
@@ -7911,6 +8843,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : AK - Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.AK_SLOT2",
"PerPkg": "1",
@@ -7920,6 +8853,7 @@
},
{
"BriefDescription": "Multi Slot Flit Received : BL - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x3E",
"EventName": "UNC_M3UPI_MULTI_SLOT_RCVD.BL_SLOT0",
"PerPkg": "1",
@@ -7929,6 +8863,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -7938,6 +8873,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -7947,6 +8883,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -7956,6 +8893,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAC",
"EventName": "UNC_M3UPI_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -7965,6 +8903,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -7974,6 +8913,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -7983,6 +8923,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.AKC",
"PerPkg": "1",
@@ -7992,6 +8933,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -8001,6 +8943,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAA",
"EventName": "UNC_M3UPI_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -8010,6 +8953,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -8018,6 +8962,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -8026,6 +8971,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : Acknowledgements to Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -8034,6 +8980,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -8042,6 +8989,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xAD",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -8050,6 +8998,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -8058,6 +9007,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -8066,6 +9016,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.AKC",
"PerPkg": "1",
@@ -8074,6 +9025,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -8082,6 +9034,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xAB",
"EventName": "UNC_M3UPI_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -8090,6 +9043,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2,3",
"EventCode": "0xae",
"EventName": "UNC_M3UPI_RING_SRC_THRTL",
"PerPkg": "1",
@@ -8097,6 +9051,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_REQ",
"PerPkg": "1",
@@ -8106,6 +9061,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_RSP",
"PerPkg": "1",
@@ -8115,6 +9071,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.AD_SNP",
"PerPkg": "1",
@@ -8124,6 +9081,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCB",
"PerPkg": "1",
@@ -8133,6 +9091,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_NCS",
"PerPkg": "1",
@@ -8142,6 +9101,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_RSP",
"PerPkg": "1",
@@ -8151,6 +9111,7 @@
},
{
"BriefDescription": "Lost Arb for VN0 : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4B",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN0.BL_WB",
"PerPkg": "1",
@@ -8160,6 +9121,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_REQ",
"PerPkg": "1",
@@ -8169,6 +9131,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_RSP",
"PerPkg": "1",
@@ -8178,6 +9141,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.AD_SNP",
"PerPkg": "1",
@@ -8187,6 +9151,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCB",
"PerPkg": "1",
@@ -8196,6 +9161,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_NCS",
"PerPkg": "1",
@@ -8205,6 +9171,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_RSP",
"PerPkg": "1",
@@ -8214,6 +9181,7 @@
},
{
"BriefDescription": "Lost Arb for VN1 : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4C",
"EventName": "UNC_M3UPI_RxC_ARB_LOST_VN1.BL_WB",
"PerPkg": "1",
@@ -8223,6 +9191,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN0",
"PerPkg": "1",
@@ -8232,6 +9201,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : AD, BL Parallel Win VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.ADBL_PARALLEL_WIN_VN1",
"PerPkg": "1",
@@ -8241,6 +9211,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : Max Parallel Win",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.ALL_PARALLEL_WIN",
"PerPkg": "1",
@@ -8250,6 +9221,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : No Progress on Pending AD VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN0",
"PerPkg": "1",
@@ -8259,6 +9231,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : No Progress on Pending AD VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_AD_VN1",
"PerPkg": "1",
@@ -8268,6 +9241,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : No Progress on Pending BL VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN0",
"PerPkg": "1",
@@ -8277,6 +9251,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : No Progress on Pending BL VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.NO_PROG_BL_VN1",
"PerPkg": "1",
@@ -8286,6 +9261,7 @@
},
{
"BriefDescription": "Arb Miscellaneous : VN0, VN1 Parallel Win",
+ "Counter": "0,1,2,3",
"EventCode": "0x4D",
"EventName": "UNC_M3UPI_RxC_ARB_MISC.VN01_PARALLEL_WIN",
"PerPkg": "1",
@@ -8295,6 +9271,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_REQ",
"PerPkg": "1",
@@ -8304,6 +9281,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_RSP",
"PerPkg": "1",
@@ -8313,6 +9291,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.AD_SNP",
"PerPkg": "1",
@@ -8322,6 +9301,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCB",
"PerPkg": "1",
@@ -8331,6 +9311,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_NCS",
"PerPkg": "1",
@@ -8340,6 +9321,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_RSP",
"PerPkg": "1",
@@ -8349,6 +9331,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN0 : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN0.BL_WB",
"PerPkg": "1",
@@ -8358,6 +9341,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_REQ",
"PerPkg": "1",
@@ -8367,6 +9351,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_RSP",
"PerPkg": "1",
@@ -8376,6 +9361,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.AD_SNP",
"PerPkg": "1",
@@ -8385,6 +9371,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCB",
"PerPkg": "1",
@@ -8394,6 +9381,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_NCS",
"PerPkg": "1",
@@ -8403,6 +9391,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_RSP",
"PerPkg": "1",
@@ -8412,6 +9401,7 @@
},
{
"BriefDescription": "No Credits to Arb for VN1 : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M3UPI_RxC_ARB_NOCRD_VN1.BL_WB",
"PerPkg": "1",
@@ -8421,6 +9411,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_REQ",
"PerPkg": "1",
@@ -8430,6 +9421,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_RSP",
"PerPkg": "1",
@@ -8439,6 +9431,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.AD_SNP",
"PerPkg": "1",
@@ -8448,6 +9441,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCB",
"PerPkg": "1",
@@ -8457,6 +9451,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_NCS",
"PerPkg": "1",
@@ -8466,6 +9461,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_RSP",
"PerPkg": "1",
@@ -8475,6 +9471,7 @@
},
{
"BriefDescription": "Can't Arb for VN0 : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN0.BL_WB",
"PerPkg": "1",
@@ -8484,6 +9481,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_REQ",
"PerPkg": "1",
@@ -8493,6 +9491,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_RSP",
"PerPkg": "1",
@@ -8502,6 +9501,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.AD_SNP",
"PerPkg": "1",
@@ -8511,6 +9511,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCB",
"PerPkg": "1",
@@ -8520,6 +9521,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_NCS",
"PerPkg": "1",
@@ -8529,6 +9531,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_RSP",
"PerPkg": "1",
@@ -8538,6 +9541,7 @@
},
{
"BriefDescription": "Can't Arb for VN1 : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x4A",
"EventName": "UNC_M3UPI_RxC_ARB_NOREQ_VN1.BL_WB",
"PerPkg": "1",
@@ -8547,6 +9551,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on BL Arb",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_BL_ARB",
"PerPkg": "1",
@@ -8556,6 +9561,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD to Slot 0 on Idle",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S0_IDLE",
"PerPkg": "1",
@@ -8565,6 +9571,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 1",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S1_BL_SLOT",
"PerPkg": "1",
@@ -8574,6 +9581,7 @@
},
{
"BriefDescription": "Ingress Queue Bypasses : AD + BL to Slot 2",
+ "Counter": "0,1,2",
"EventCode": "0x40",
"EventName": "UNC_M3UPI_RxC_BYPASSED.AD_S2_BL_SLOT",
"PerPkg": "1",
@@ -8583,6 +9591,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events : Any In BGF FIFO",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_FIFO",
"PerPkg": "1",
@@ -8592,6 +9601,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events : Any in BGF Path",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.ANY_BGF_PATH",
"PerPkg": "1",
@@ -8601,6 +9611,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.LT1_FOR_D2K",
"PerPkg": "1",
@@ -8610,6 +9621,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.LT2_FOR_D2K",
"PerPkg": "1",
@@ -8619,6 +9631,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events : No D2K For Arb",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.VN0_NO_D2K_FOR_ARB",
"PerPkg": "1",
@@ -8628,6 +9641,7 @@
},
{
"BriefDescription": "Miscellaneous Credit Events",
+ "Counter": "0,1,2,3",
"EventCode": "0x5F",
"EventName": "UNC_M3UPI_RxC_CRD_MISC.VN1_NO_D2K_FOR_ARB",
"PerPkg": "1",
@@ -8637,6 +9651,7 @@
},
{
"BriefDescription": "Credit Occupancy : Credits Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.CONSUMED",
"PerPkg": "1",
@@ -8646,6 +9661,7 @@
},
{
"BriefDescription": "Credit Occupancy : D2K Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.D2K_CRD",
"PerPkg": "1",
@@ -8655,6 +9671,7 @@
},
{
"BriefDescription": "Credit Occupancy : Packets in BGF FIFO",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_FIFO",
"PerPkg": "1",
@@ -8664,6 +9681,7 @@
},
{
"BriefDescription": "Credit Occupancy : Packets in BGF Path",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.FLITS_IN_PATH",
"PerPkg": "1",
@@ -8673,6 +9691,7 @@
},
{
"BriefDescription": "Credit Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_FIFO",
"PerPkg": "1",
@@ -8682,6 +9701,7 @@
},
{
"BriefDescription": "Credit Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.P1P_TOTAL",
"PerPkg": "1",
@@ -8691,6 +9711,7 @@
},
{
"BriefDescription": "Credit Occupancy : Transmit Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.TxQ_CRD",
"PerPkg": "1",
@@ -8700,6 +9721,7 @@
},
{
"BriefDescription": "Credit Occupancy : VNA In Use",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_M3UPI_RxC_CRD_OCC.VNA_IN_USE",
"PerPkg": "1",
@@ -8709,6 +9731,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_REQ",
"PerPkg": "1",
@@ -8718,6 +9741,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_RSP",
"PerPkg": "1",
@@ -8727,6 +9751,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.AD_SNP",
"PerPkg": "1",
@@ -8736,6 +9761,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCB",
"PerPkg": "1",
@@ -8745,6 +9771,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_NCS",
"PerPkg": "1",
@@ -8754,6 +9781,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_RSP",
"PerPkg": "1",
@@ -8763,6 +9791,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Cycles Not Empty : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN0.BL_WB",
"PerPkg": "1",
@@ -8772,6 +9801,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_REQ",
"PerPkg": "1",
@@ -8781,6 +9811,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_RSP",
"PerPkg": "1",
@@ -8790,6 +9821,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.AD_SNP",
"PerPkg": "1",
@@ -8799,6 +9831,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCB",
"PerPkg": "1",
@@ -8808,6 +9841,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_NCS",
"PerPkg": "1",
@@ -8817,6 +9851,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_RSP",
"PerPkg": "1",
@@ -8826,6 +9861,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Cycles Not Empty : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M3UPI_RxC_CYCLES_NE_VN1.BL_WB",
"PerPkg": "1",
@@ -8835,6 +9871,7 @@
},
{
"BriefDescription": "Data Flit Not Sent : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.ALL",
"PerPkg": "1",
@@ -8844,6 +9881,7 @@
},
{
"BriefDescription": "Data Flit Not Sent : No BGF Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_BGF",
"PerPkg": "1",
@@ -8853,6 +9891,7 @@
},
{
"BriefDescription": "Data Flit Not Sent : No TxQ Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.NO_TXQ",
"PerPkg": "1",
@@ -8862,6 +9901,7 @@
},
{
"BriefDescription": "Data Flit Not Sent : TSV High",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.TSV_HI",
"PerPkg": "1",
@@ -8871,6 +9911,7 @@
},
{
"BriefDescription": "Data Flit Not Sent : Cycle valid for Flit",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "UNC_M3UPI_RxC_DATA_FLITS_NOT_SENT.VALID_FOR_FLIT",
"PerPkg": "1",
@@ -8880,6 +9921,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence : Wait on Pump 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P0_WAIT",
"PerPkg": "1",
@@ -8889,6 +9931,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_AT_LIMIT",
"PerPkg": "1",
@@ -8898,6 +9941,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_BUSY",
"PerPkg": "1",
@@ -8907,6 +9951,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_FIFO_FULL",
"PerPkg": "1",
@@ -8916,6 +9961,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_HOLD_P0",
"PerPkg": "1",
@@ -8925,6 +9971,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1P_TO_LIMBO",
"PerPkg": "1",
@@ -8934,6 +9981,7 @@
},
{
"BriefDescription": "Generating BL Data Flit Sequence : Wait on Pump 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x57",
"EventName": "UNC_M3UPI_RxC_FLITS_GEN_BL.P1_WAIT",
"PerPkg": "1",
@@ -8943,6 +9991,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_HOLDOFF",
"PerPkg": "1",
@@ -8952,6 +10001,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_IN_SERVICE",
"PerPkg": "1",
@@ -8961,6 +10011,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_RECEIVED",
"PerPkg": "1",
@@ -8970,6 +10021,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN",
+ "Counter": "0,1,2,3",
"EventCode": "0x58",
"EventName": "UNC_M3UPI_RxC_FLITS_MISC.S2REQ_WITHDRAWN",
"PerPkg": "1",
@@ -8979,6 +10031,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.ALL",
"PerPkg": "1",
@@ -8987,6 +10040,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : Needs Data Flit",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.NEED_DATA",
"PerPkg": "1",
@@ -8996,6 +10050,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : Wait on Pump 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P0_WAIT",
"PerPkg": "1",
@@ -9005,6 +10060,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : Don't Need Pump 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ",
"PerPkg": "1",
@@ -9014,6 +10070,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : Don't Need Pump 1 - Bubble",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_BUT_BUBBLE",
"PerPkg": "1",
@@ -9023,6 +10080,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : Don't Need Pump 1 - Not Avail",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_NOT_REQ_NOT_AVAIL",
"PerPkg": "1",
@@ -9032,6 +10090,7 @@
},
{
"BriefDescription": "Slotting BL Message Into Header Flit : Wait on Pump 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UNC_M3UPI_RxC_FLITS_SLOT_BL.P1_WAIT",
"PerPkg": "1",
@@ -9041,6 +10100,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1 : Accumulate",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM",
"PerPkg": "1",
@@ -9050,6 +10110,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1 : Accumulate Ready",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_READ",
"PerPkg": "1",
@@ -9059,6 +10120,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1 : Accumulate Wasted",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.ACCUM_WASTED",
"PerPkg": "1",
@@ -9068,6 +10130,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Blocked",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_BLOCKED",
"PerPkg": "1",
@@ -9077,6 +10140,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_AFTER",
"PerPkg": "1",
@@ -9086,6 +10150,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1 : Run-Ahead - Message",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG1_DURING",
"PerPkg": "1",
@@ -9095,6 +10160,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_AFTER",
"PerPkg": "1",
@@ -9104,6 +10170,7 @@
},
{
"BriefDescription": "Flit Gen - Header 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR1.AHEAD_MSG2_SENT",
"PerPkg": "1",
@@ -9113,6 +10180,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2 : Parallel Ok",
+ "Counter": "0,1,2,3",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR",
"PerPkg": "1",
@@ -9122,6 +10190,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2 : Parallel Flit Finished",
+ "Counter": "0,1,2,3",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_FLIT",
"PerPkg": "1",
@@ -9131,6 +10200,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2 : Parallel Message",
+ "Counter": "0,1,2,3",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.PAR_MSG",
"PerPkg": "1",
@@ -9140,6 +10210,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall",
+ "Counter": "0,1,2,3",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL",
"PerPkg": "1",
@@ -9149,6 +10220,7 @@
},
{
"BriefDescription": "Flit Gen - Header 2 : Rate-matching Stall - No Message",
+ "Counter": "0,1,2,3",
"EventCode": "0x52",
"EventName": "UNC_M3UPI_RxC_FLIT_GEN_HDR2.RMSTALL_NOMSG",
"PerPkg": "1",
@@ -9158,6 +10230,7 @@
},
{
"BriefDescription": "Sent Header Flit : One Message",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG",
"PerPkg": "1",
@@ -9167,6 +10240,7 @@
},
{
"BriefDescription": "Sent Header Flit : One Message in non-VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.1_MSG_VNX",
"PerPkg": "1",
@@ -9176,6 +10250,7 @@
},
{
"BriefDescription": "Sent Header Flit : Two Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.2_MSGS",
"PerPkg": "1",
@@ -9185,6 +10260,7 @@
},
{
"BriefDescription": "Sent Header Flit : Three Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.3_MSGS",
"PerPkg": "1",
@@ -9194,6 +10270,7 @@
},
{
"BriefDescription": "Sent Header Flit : One Slot Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_1",
"PerPkg": "1",
@@ -9202,6 +10279,7 @@
},
{
"BriefDescription": "Sent Header Flit : Two Slots Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_2",
"PerPkg": "1",
@@ -9210,6 +10288,7 @@
},
{
"BriefDescription": "Sent Header Flit : All Slots Taken",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "UNC_M3UPI_RxC_HDR_FLITS_SENT.SLOTS_3",
"PerPkg": "1",
@@ -9218,6 +10297,7 @@
},
{
"BriefDescription": "Header Not Sent : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.ALL",
"PerPkg": "1",
@@ -9227,6 +10307,7 @@
},
{
"BriefDescription": "Header Not Sent : No BGF Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_CRD",
"PerPkg": "1",
@@ -9236,6 +10317,7 @@
},
{
"BriefDescription": "Header Not Sent : No BGF Credits + No Extra Message Slotted",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_BGF_NO_MSG",
"PerPkg": "1",
@@ -9245,6 +10327,7 @@
},
{
"BriefDescription": "Header Not Sent : No TxQ Credits",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_CRD",
"PerPkg": "1",
@@ -9254,6 +10337,7 @@
},
{
"BriefDescription": "Header Not Sent : No TxQ Credits + No Extra Message Slotted",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.NO_TXQ_NO_MSG",
"PerPkg": "1",
@@ -9263,6 +10347,7 @@
},
{
"BriefDescription": "Header Not Sent : TSV High",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.TSV_HI",
"PerPkg": "1",
@@ -9272,6 +10357,7 @@
},
{
"BriefDescription": "Header Not Sent : Cycle valid for Flit",
+ "Counter": "0,1,2,3",
"EventCode": "0x53",
"EventName": "UNC_M3UPI_RxC_HDR_FLIT_NOT_SENT.VALID_FOR_FLIT",
"PerPkg": "1",
@@ -9281,6 +10367,7 @@
},
{
"BriefDescription": "Message Held : Can't Slot AD",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_AD",
"PerPkg": "1",
@@ -9290,6 +10377,7 @@
},
{
"BriefDescription": "Message Held : Can't Slot BL",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.CANT_SLOT_BL",
"PerPkg": "1",
@@ -9299,6 +10387,7 @@
},
{
"BriefDescription": "Message Held : Parallel Attempt",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_ATTEMPT",
"PerPkg": "1",
@@ -9308,6 +10397,7 @@
},
{
"BriefDescription": "Message Held : Parallel Success",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.PARALLEL_SUCCESS",
"PerPkg": "1",
@@ -9317,6 +10407,7 @@
},
{
"BriefDescription": "Message Held : VN0",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.VN0",
"PerPkg": "1",
@@ -9326,6 +10417,7 @@
},
{
"BriefDescription": "Message Held : VN1",
+ "Counter": "0,1,2",
"EventCode": "0x50",
"EventName": "UNC_M3UPI_RxC_HELD.VN1",
"PerPkg": "1",
@@ -9335,6 +10427,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_REQ",
"PerPkg": "1",
@@ -9344,6 +10437,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_RSP",
"PerPkg": "1",
@@ -9353,6 +10447,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.AD_SNP",
"PerPkg": "1",
@@ -9362,6 +10457,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCB",
"PerPkg": "1",
@@ -9371,6 +10467,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_NCS",
"PerPkg": "1",
@@ -9380,6 +10477,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_RSP",
"PerPkg": "1",
@@ -9389,6 +10487,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Inserts : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN0.BL_WB",
"PerPkg": "1",
@@ -9398,6 +10497,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_REQ",
"PerPkg": "1",
@@ -9407,6 +10507,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_RSP",
"PerPkg": "1",
@@ -9416,6 +10517,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.AD_SNP",
"PerPkg": "1",
@@ -9425,6 +10527,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCB",
"PerPkg": "1",
@@ -9434,6 +10537,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_NCS",
"PerPkg": "1",
@@ -9443,6 +10547,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_RSP",
"PerPkg": "1",
@@ -9452,6 +10557,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Inserts : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M3UPI_RxC_INSERTS_VN1.BL_WB",
"PerPkg": "1",
@@ -9461,6 +10567,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_REQ",
"PerPkg": "1",
@@ -9470,6 +10577,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_RSP",
"PerPkg": "1",
@@ -9479,6 +10587,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.AD_SNP",
"PerPkg": "1",
@@ -9488,6 +10597,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCB",
"PerPkg": "1",
@@ -9497,6 +10607,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_NCS",
"PerPkg": "1",
@@ -9506,6 +10617,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_RSP",
"PerPkg": "1",
@@ -9515,6 +10627,7 @@
},
{
"BriefDescription": "VN0 Ingress (from CMS) Queue - Occupancy : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN0.BL_WB",
"PerPkg": "1",
@@ -9524,6 +10637,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_REQ",
"PerPkg": "1",
@@ -9533,6 +10647,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_RSP",
"PerPkg": "1",
@@ -9542,6 +10657,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.AD_SNP",
"PerPkg": "1",
@@ -9551,6 +10667,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCB",
"PerPkg": "1",
@@ -9560,6 +10677,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : NCS on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_NCS",
"PerPkg": "1",
@@ -9569,6 +10687,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_RSP",
"PerPkg": "1",
@@ -9578,6 +10697,7 @@
},
{
"BriefDescription": "VN1 Ingress (from CMS) Queue - Occupancy : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M3UPI_RxC_OCCUPANCY_VN1.BL_WB",
"PerPkg": "1",
@@ -9587,6 +10707,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_REQ",
"PerPkg": "1",
@@ -9596,6 +10717,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_RSP",
"PerPkg": "1",
@@ -9605,6 +10727,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.AD_SNP",
"PerPkg": "1",
@@ -9614,6 +10737,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCB",
"PerPkg": "1",
@@ -9623,6 +10747,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_NCS",
"PerPkg": "1",
@@ -9632,6 +10757,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_RSP",
"PerPkg": "1",
@@ -9641,6 +10767,7 @@
},
{
"BriefDescription": "VN0 message can't slot into flit : WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4E",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN0.BL_WB",
"PerPkg": "1",
@@ -9650,6 +10777,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : REQ on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_REQ",
"PerPkg": "1",
@@ -9659,6 +10787,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : RSP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_RSP",
"PerPkg": "1",
@@ -9668,6 +10797,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : SNP on AD",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.AD_SNP",
"PerPkg": "1",
@@ -9677,6 +10807,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : NCB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCB",
"PerPkg": "1",
@@ -9686,6 +10817,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : NCS on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_NCS",
"PerPkg": "1",
@@ -9695,6 +10827,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : RSP on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_RSP",
"PerPkg": "1",
@@ -9704,6 +10837,7 @@
},
{
"BriefDescription": "VN1 message can't slot into flit : WB on BL",
+ "Counter": "0,1,2",
"EventCode": "0x4F",
"EventName": "UNC_M3UPI_RxC_PACKING_MISS_VN1.BL_WB",
"PerPkg": "1",
@@ -9713,6 +10847,7 @@
},
{
"BriefDescription": "Remote VNA Credits : Any In Use",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.ANY_IN_USE",
"PerPkg": "1",
@@ -9722,6 +10857,7 @@
},
{
"BriefDescription": "Remote VNA Credits : Corrected",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.CORRECTED",
"PerPkg": "1",
@@ -9731,6 +10867,7 @@
},
{
"BriefDescription": "Remote VNA Credits : Level < 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT1",
"PerPkg": "1",
@@ -9740,6 +10877,7 @@
},
{
"BriefDescription": "Remote VNA Credits : Level < 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT10",
"PerPkg": "1",
@@ -9749,6 +10887,7 @@
},
{
"BriefDescription": "Remote VNA Credits : Level < 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT4",
"PerPkg": "1",
@@ -9758,6 +10897,7 @@
},
{
"BriefDescription": "Remote VNA Credits : Level < 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x5A",
"EventName": "UNC_M3UPI_RxC_VNA_CRD.LT5",
"PerPkg": "1",
@@ -9767,6 +10907,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_ADBL_ALLOC_L5",
"PerPkg": "1",
@@ -9776,6 +10917,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT10",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.REQ_VN01_ALLOC_LT10",
"PerPkg": "1",
@@ -9785,6 +10927,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_AD",
"PerPkg": "1",
@@ -9794,6 +10937,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_JUST_BL",
"PerPkg": "1",
@@ -9803,6 +10947,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN0_ONLY",
"PerPkg": "1",
@@ -9812,6 +10957,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_AD",
"PerPkg": "1",
@@ -9821,6 +10967,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_JUST_BL",
"PerPkg": "1",
@@ -9830,6 +10977,7 @@
},
{
"BriefDescription": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY",
+ "Counter": "0,1,2,3",
"EventCode": "0x59",
"EventName": "UNC_M3UPI_RxC_VNA_CRD_MISC.VN1_ONLY",
"PerPkg": "1",
@@ -9839,6 +10987,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_ALL",
"PerPkg": "1",
@@ -9848,6 +10997,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -9857,6 +11007,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -9866,6 +11017,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_ALL",
"PerPkg": "1",
@@ -9875,6 +11027,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -9884,6 +11037,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M3UPI_RxR_BUSY_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -9893,6 +11047,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -9902,6 +11057,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -9911,6 +11067,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -9920,6 +11077,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AK",
"PerPkg": "1",
@@ -9929,6 +11087,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -9938,6 +11097,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -9947,6 +11107,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -9956,6 +11117,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -9965,6 +11127,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M3UPI_RxR_BYPASS.IV",
"PerPkg": "1",
@@ -9974,6 +11137,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_ALL",
"PerPkg": "1",
@@ -9983,6 +11147,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -9992,6 +11157,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -10001,6 +11167,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.AK",
"PerPkg": "1",
@@ -10010,6 +11177,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_ALL",
"PerPkg": "1",
@@ -10019,6 +11187,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -10028,6 +11197,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -10037,6 +11207,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IFV - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -10046,6 +11217,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED.IV",
"PerPkg": "1",
@@ -10055,6 +11227,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_M3UPI_RxR_CRD_STARVED_1",
"PerPkg": "1",
@@ -10063,6 +11236,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -10072,6 +11246,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -10081,6 +11256,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -10090,6 +11266,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AK",
"PerPkg": "1",
@@ -10099,6 +11276,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -10108,6 +11286,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -10117,6 +11296,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -10126,6 +11306,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -10135,6 +11316,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M3UPI_RxR_INSERTS.IV",
"PerPkg": "1",
@@ -10144,6 +11326,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -10153,6 +11336,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -10162,6 +11346,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -10171,6 +11356,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AK",
"PerPkg": "1",
@@ -10180,6 +11366,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -10189,6 +11376,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -10198,6 +11386,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -10207,6 +11396,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -10216,6 +11406,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M3UPI_RxR_OCCUPANCY.IV",
"PerPkg": "1",
@@ -10225,6 +11416,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -10234,6 +11426,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -10243,6 +11436,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -10252,6 +11446,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -10261,6 +11456,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -10270,6 +11466,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -10279,6 +11476,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6",
"PerPkg": "1",
@@ -10288,6 +11486,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7",
"PerPkg": "1",
@@ -10297,6 +11496,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -10306,6 +11506,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -10315,6 +11516,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -10324,6 +11526,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -10333,6 +11536,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -10342,6 +11546,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -10351,6 +11556,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6",
"PerPkg": "1",
@@ -10360,6 +11566,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7",
"PerPkg": "1",
@@ -10369,6 +11576,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -10378,6 +11586,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -10387,6 +11596,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -10396,6 +11606,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -10405,6 +11616,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -10414,6 +11626,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -10423,6 +11636,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6",
"PerPkg": "1",
@@ -10432,6 +11646,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7",
"PerPkg": "1",
@@ -10441,6 +11656,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -10450,6 +11666,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -10459,6 +11676,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -10468,6 +11686,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -10477,6 +11696,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -10486,6 +11706,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -10495,6 +11716,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6",
"PerPkg": "1",
@@ -10504,6 +11726,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M3UPI_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7",
"PerPkg": "1",
@@ -10513,6 +11736,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10",
"PerPkg": "1",
@@ -10522,6 +11746,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8",
"PerPkg": "1",
@@ -10531,6 +11756,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9",
"PerPkg": "1",
@@ -10540,6 +11766,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10",
"PerPkg": "1",
@@ -10549,6 +11776,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8",
"PerPkg": "1",
@@ -10558,6 +11786,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9",
"PerPkg": "1",
@@ -10567,6 +11796,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10",
"PerPkg": "1",
@@ -10576,6 +11806,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8",
"PerPkg": "1",
@@ -10585,6 +11816,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9",
"PerPkg": "1",
@@ -10594,6 +11826,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10",
"PerPkg": "1",
@@ -10603,6 +11836,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8",
"PerPkg": "1",
@@ -10612,6 +11846,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M3UPI_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9",
"PerPkg": "1",
@@ -10621,6 +11856,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_REQ",
"PerPkg": "1",
@@ -10630,6 +11866,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_RSP",
"PerPkg": "1",
@@ -10639,6 +11876,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_SNP",
"PerPkg": "1",
@@ -10648,6 +11886,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN0_WB",
"PerPkg": "1",
@@ -10657,6 +11896,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_REQ",
"PerPkg": "1",
@@ -10666,6 +11906,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_RSP",
"PerPkg": "1",
@@ -10675,6 +11916,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_SNP",
"PerPkg": "1",
@@ -10684,6 +11926,7 @@
},
{
"BriefDescription": "Failed ARB for AD : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_M3UPI_TxC_AD_ARB_FAIL.VN1_WB",
"PerPkg": "1",
@@ -10693,6 +11936,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT0",
"PerPkg": "1",
@@ -10702,6 +11946,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT1",
"PerPkg": "1",
@@ -10711,6 +11956,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.AD_SLOT2",
"PerPkg": "1",
@@ -10720,6 +11966,7 @@
},
{
"BriefDescription": "AD FlowQ Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_BYPASS.BL_EARLY_RSP",
"PerPkg": "1",
@@ -10729,6 +11976,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_REQ",
"PerPkg": "1",
@@ -10738,6 +11986,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_RSP",
"PerPkg": "1",
@@ -10747,6 +11996,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_SNP",
"PerPkg": "1",
@@ -10756,6 +12006,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN0_WB",
"PerPkg": "1",
@@ -10765,6 +12016,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_REQ",
"PerPkg": "1",
@@ -10774,6 +12026,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_RSP",
"PerPkg": "1",
@@ -10783,6 +12036,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_SNP",
"PerPkg": "1",
@@ -10792,6 +12046,7 @@
},
{
"BriefDescription": "AD Flow Q Not Empty : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_CYCLES_NE.VN1_WB",
"PerPkg": "1",
@@ -10801,6 +12056,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_REQ",
"PerPkg": "1",
@@ -10810,6 +12066,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_RSP",
"PerPkg": "1",
@@ -10819,6 +12076,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_SNP",
"PerPkg": "1",
@@ -10828,6 +12086,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN0_WB",
"PerPkg": "1",
@@ -10837,6 +12096,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_REQ",
"PerPkg": "1",
@@ -10846,6 +12106,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_RSP",
"PerPkg": "1",
@@ -10855,6 +12116,7 @@
},
{
"BriefDescription": "AD Flow Q Inserts : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_M3UPI_TxC_AD_FLQ_INSERTS.VN1_SNP",
"PerPkg": "1",
@@ -10920,6 +12182,7 @@
},
{
"BriefDescription": "AK Flow Q Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_M3UPI_TxC_AK_FLQ_INSERTS",
"PerPkg": "1",
@@ -10934,6 +12197,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN0 NCB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCB",
"PerPkg": "1",
@@ -10943,6 +12207,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN0 NCS Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_NCS",
"PerPkg": "1",
@@ -10952,6 +12217,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_RSP",
"PerPkg": "1",
@@ -10961,6 +12227,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN0_WB",
"PerPkg": "1",
@@ -10970,6 +12237,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN1 NCS Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCB",
"PerPkg": "1",
@@ -10979,6 +12247,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN1 NCB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_NCS",
"PerPkg": "1",
@@ -10988,6 +12257,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_RSP",
"PerPkg": "1",
@@ -10997,6 +12267,7 @@
},
{
"BriefDescription": "Failed ARB for BL : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x35",
"EventName": "UNC_M3UPI_TxC_BL_ARB_FAIL.VN1_WB",
"PerPkg": "1",
@@ -11006,6 +12277,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_REQ",
"PerPkg": "1",
@@ -11015,6 +12287,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_RSP",
"PerPkg": "1",
@@ -11024,6 +12297,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_SNP",
"PerPkg": "1",
@@ -11033,6 +12307,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN0_WB",
"PerPkg": "1",
@@ -11042,6 +12317,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_REQ",
"PerPkg": "1",
@@ -11051,6 +12327,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_RSP",
"PerPkg": "1",
@@ -11060,6 +12337,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_SNP",
"PerPkg": "1",
@@ -11069,6 +12347,7 @@
},
{
"BriefDescription": "BL Flow Q Not Empty : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_CYCLES_NE.VN1_WB",
"PerPkg": "1",
@@ -11078,6 +12357,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCB",
"PerPkg": "1",
@@ -11087,6 +12367,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_NCS",
"PerPkg": "1",
@@ -11096,6 +12377,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 NCS Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_RSP",
"PerPkg": "1",
@@ -11105,6 +12387,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN0 NCB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN0_WB",
"PerPkg": "1",
@@ -11114,6 +12397,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCB",
"PerPkg": "1",
@@ -11123,6 +12407,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1 WB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_NCS",
"PerPkg": "1",
@@ -11132,6 +12417,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1_NCB Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_RSP",
"PerPkg": "1",
@@ -11141,6 +12427,7 @@
},
{
"BriefDescription": "BL Flow Q Inserts : VN1_NCS Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x2E",
"EventName": "UNC_M3UPI_TxC_BL_FLQ_INSERTS.VN1_WB",
"PerPkg": "1",
@@ -11262,6 +12549,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_ALL",
"PerPkg": "1",
@@ -11271,6 +12559,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -11280,6 +12569,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.AD_UNCRD",
"PerPkg": "1",
@@ -11289,6 +12579,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_ALL",
"PerPkg": "1",
@@ -11298,6 +12589,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -11307,6 +12599,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA6",
"EventName": "UNC_M3UPI_TxR_HORZ_ADS_USED.BL_UNCRD",
"PerPkg": "1",
@@ -11316,6 +12609,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -11325,6 +12619,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -11334,6 +12629,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -11343,6 +12639,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AK",
"PerPkg": "1",
@@ -11352,6 +12649,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -11361,6 +12659,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -11370,6 +12669,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -11379,6 +12679,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -11388,6 +12689,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA7",
"EventName": "UNC_M3UPI_TxR_HORZ_BYPASS.IV",
"PerPkg": "1",
@@ -11397,6 +12699,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_ALL",
"PerPkg": "1",
@@ -11406,6 +12709,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -11415,6 +12719,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AD_UNCRD",
"PerPkg": "1",
@@ -11424,6 +12729,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AK",
"PerPkg": "1",
@@ -11433,6 +12739,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.AKC_UNCRD",
"PerPkg": "1",
@@ -11442,6 +12749,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_ALL",
"PerPkg": "1",
@@ -11451,6 +12759,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -11460,6 +12769,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.BL_UNCRD",
"PerPkg": "1",
@@ -11469,6 +12779,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA2",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -11478,6 +12789,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_ALL",
"PerPkg": "1",
@@ -11487,6 +12799,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -11496,6 +12809,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AD_UNCRD",
"PerPkg": "1",
@@ -11505,6 +12819,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AK",
"PerPkg": "1",
@@ -11514,6 +12829,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.AKC_UNCRD",
"PerPkg": "1",
@@ -11523,6 +12839,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_ALL",
"PerPkg": "1",
@@ -11532,6 +12849,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -11541,6 +12859,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.BL_UNCRD",
"PerPkg": "1",
@@ -11550,6 +12869,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA3",
"EventName": "UNC_M3UPI_TxR_HORZ_CYCLES_NE.IV",
"PerPkg": "1",
@@ -11559,6 +12879,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -11568,6 +12889,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -11577,6 +12899,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -11586,6 +12909,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AK",
"PerPkg": "1",
@@ -11595,6 +12919,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -11604,6 +12929,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -11613,6 +12939,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -11622,6 +12949,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -11631,6 +12959,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA1",
"EventName": "UNC_M3UPI_TxR_HORZ_INSERTS.IV",
"PerPkg": "1",
@@ -11640,6 +12969,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_ALL",
"PerPkg": "1",
@@ -11649,6 +12979,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -11658,6 +12989,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AD_UNCRD",
"PerPkg": "1",
@@ -11667,6 +12999,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AK",
"PerPkg": "1",
@@ -11676,6 +13009,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.AKC_UNCRD",
"PerPkg": "1",
@@ -11685,6 +13019,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_ALL",
"PerPkg": "1",
@@ -11694,6 +13029,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -11703,6 +13039,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.BL_UNCRD",
"PerPkg": "1",
@@ -11712,6 +13049,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA4",
"EventName": "UNC_M3UPI_TxR_HORZ_NACK.IV",
"PerPkg": "1",
@@ -11721,6 +13059,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -11730,6 +13069,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -11739,6 +13079,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -11748,6 +13089,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AK",
"PerPkg": "1",
@@ -11757,6 +13099,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -11766,6 +13109,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -11775,6 +13119,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -11784,6 +13129,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -11793,6 +13139,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M3UPI_TxR_HORZ_OCCUPANCY.IV",
"PerPkg": "1",
@@ -11802,6 +13149,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_ALL",
"PerPkg": "1",
@@ -11811,6 +13159,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -11820,6 +13169,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AK",
"PerPkg": "1",
@@ -11829,6 +13179,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.AKC_UNCRD",
"PerPkg": "1",
@@ -11838,6 +13189,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_ALL",
"PerPkg": "1",
@@ -11847,6 +13199,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -11856,6 +13209,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xA5",
"EventName": "UNC_M3UPI_TxR_HORZ_STARVED.IV",
"PerPkg": "1",
@@ -11865,6 +13219,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -11874,6 +13229,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -11883,6 +13239,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -11892,6 +13249,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9C",
"EventName": "UNC_M3UPI_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -11901,6 +13259,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -11910,6 +13269,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -11919,6 +13279,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -11928,6 +13289,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -11937,6 +13299,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -11946,6 +13309,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -11955,6 +13319,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : IV - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9D",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS.IV_AG1",
"PerPkg": "1",
@@ -11964,6 +13329,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS_1.AKC_AG0",
"PerPkg": "1",
@@ -11973,6 +13339,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9E",
"EventName": "UNC_M3UPI_TxR_VERT_BYPASS_1.AKC_AG1",
"PerPkg": "1",
@@ -11982,6 +13349,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AD_AG0",
"PerPkg": "1",
@@ -11991,6 +13359,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AD_AG1",
"PerPkg": "1",
@@ -12000,6 +13369,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AK_AG0",
"PerPkg": "1",
@@ -12009,6 +13379,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.AK_AG1",
"PerPkg": "1",
@@ -12018,6 +13389,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.BL_AG0",
"PerPkg": "1",
@@ -12027,6 +13399,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.BL_AG1",
"PerPkg": "1",
@@ -12036,6 +13409,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL0.IV_AG0",
"PerPkg": "1",
@@ -12045,6 +13419,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL1.AKC_AG0",
"PerPkg": "1",
@@ -12054,6 +13429,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_FULL1.AKC_AG1",
"PerPkg": "1",
@@ -12063,6 +13439,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AD_AG0",
"PerPkg": "1",
@@ -12072,6 +13449,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AD_AG1",
"PerPkg": "1",
@@ -12081,6 +13459,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AK_AG0",
"PerPkg": "1",
@@ -12090,6 +13469,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.AK_AG1",
"PerPkg": "1",
@@ -12099,6 +13479,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.BL_AG0",
"PerPkg": "1",
@@ -12108,6 +13489,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.BL_AG1",
"PerPkg": "1",
@@ -12117,6 +13499,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE0.IV_AG0",
"PerPkg": "1",
@@ -12126,6 +13509,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE1.AKC_AG0",
"PerPkg": "1",
@@ -12135,6 +13519,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M3UPI_TxR_VERT_CYCLES_NE1.AKC_AG1",
"PerPkg": "1",
@@ -12144,6 +13529,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AD_AG0",
"PerPkg": "1",
@@ -12153,6 +13539,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AD_AG1",
"PerPkg": "1",
@@ -12162,6 +13549,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AK_AG0",
"PerPkg": "1",
@@ -12171,6 +13559,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.AK_AG1",
"PerPkg": "1",
@@ -12180,6 +13569,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.BL_AG0",
"PerPkg": "1",
@@ -12189,6 +13579,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.BL_AG1",
"PerPkg": "1",
@@ -12198,6 +13589,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS0.IV_AG0",
"PerPkg": "1",
@@ -12207,6 +13599,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS1.AKC_AG0",
"PerPkg": "1",
@@ -12216,6 +13609,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M3UPI_TxR_VERT_INSERTS1.AKC_AG1",
"PerPkg": "1",
@@ -12225,6 +13619,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.AD_AG0",
"PerPkg": "1",
@@ -12234,6 +13629,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.AD_AG1",
"PerPkg": "1",
@@ -12243,6 +13639,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.AK_AG0",
"PerPkg": "1",
@@ -12252,6 +13649,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.AK_AG1",
"PerPkg": "1",
@@ -12261,6 +13659,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.BL_AG0",
"PerPkg": "1",
@@ -12270,6 +13669,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.BL_AG1",
"PerPkg": "1",
@@ -12279,6 +13679,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M3UPI_TxR_VERT_NACK0.IV_AG0",
"PerPkg": "1",
@@ -12288,6 +13689,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_VERT_NACK1.AKC_AG0",
"PerPkg": "1",
@@ -12297,6 +13699,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M3UPI_TxR_VERT_NACK1.AKC_AG1",
"PerPkg": "1",
@@ -12306,6 +13709,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AD_AG0",
"PerPkg": "1",
@@ -12315,6 +13719,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AD_AG1",
"PerPkg": "1",
@@ -12324,6 +13729,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AK_AG0",
"PerPkg": "1",
@@ -12333,6 +13739,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.AK_AG1",
"PerPkg": "1",
@@ -12342,6 +13749,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.BL_AG0",
"PerPkg": "1",
@@ -12351,6 +13759,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.BL_AG1",
"PerPkg": "1",
@@ -12360,6 +13769,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY0.IV_AG0",
"PerPkg": "1",
@@ -12369,6 +13779,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY1.AKC_AG0",
"PerPkg": "1",
@@ -12378,6 +13789,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M3UPI_TxR_VERT_OCCUPANCY1.AKC_AG1",
"PerPkg": "1",
@@ -12387,6 +13799,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AD_AG0",
"PerPkg": "1",
@@ -12396,6 +13809,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AD_AG1",
"PerPkg": "1",
@@ -12405,6 +13819,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AK_AG0",
"PerPkg": "1",
@@ -12414,6 +13829,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.AK_AG1",
"PerPkg": "1",
@@ -12423,6 +13839,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.BL_AG0",
"PerPkg": "1",
@@ -12432,6 +13849,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.BL_AG1",
"PerPkg": "1",
@@ -12441,6 +13859,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9A",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED0.IV_AG0",
"PerPkg": "1",
@@ -12450,6 +13869,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED1.AKC_AG0",
"PerPkg": "1",
@@ -12459,6 +13879,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED1.AKC_AG1",
"PerPkg": "1",
@@ -12468,6 +13889,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9B",
"EventName": "UNC_M3UPI_TxR_VERT_STARVED1.TGC",
"PerPkg": "1",
@@ -12477,6 +13899,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_REQ",
"PerPkg": "1",
@@ -12486,6 +13909,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_RSP",
"PerPkg": "1",
@@ -12495,6 +13919,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN0_SNP",
"PerPkg": "1",
@@ -12504,6 +13929,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_REQ",
"PerPkg": "1",
@@ -12513,6 +13939,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_RSP",
"PerPkg": "1",
@@ -12522,6 +13949,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VN1_SNP",
"PerPkg": "1",
@@ -12531,6 +13959,7 @@
},
{
"BriefDescription": "UPI0 AD Credits Empty : VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M3UPI_UPI_PEER_AD_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -12540,6 +13969,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VN0 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_NCS_NCB",
"PerPkg": "1",
@@ -12549,6 +13979,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VN0 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_RSP",
"PerPkg": "1",
@@ -12558,6 +13989,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VN0 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN0_WB",
"PerPkg": "1",
@@ -12567,6 +13999,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VN1 RSP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_NCS_NCB",
"PerPkg": "1",
@@ -12576,6 +14009,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VN1 REQ Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_RSP",
"PerPkg": "1",
@@ -12585,6 +14019,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VN1 SNP Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VN1_WB",
"PerPkg": "1",
@@ -12594,6 +14029,7 @@
},
{
"BriefDescription": "UPI0 BL Credits Empty : VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M3UPI_UPI_PEER_BL_CREDITS_EMPTY.VNA",
"PerPkg": "1",
@@ -12603,6 +14039,7 @@
},
{
"BriefDescription": "FlowQ Generated Prefetch",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_M3UPI_UPI_PREFETCH_SPAWN",
"PerPkg": "1",
@@ -12611,6 +14048,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -12620,6 +14058,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -12629,6 +14068,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -12638,6 +14078,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB0",
"EventName": "UNC_M3UPI_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -12647,6 +14088,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -12656,6 +14098,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -12665,6 +14108,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -12674,6 +14118,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB4",
"EventName": "UNC_M3UPI_VERT_RING_AKC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -12683,6 +14128,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -12692,6 +14138,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -12701,6 +14148,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -12710,6 +14158,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB1",
"EventName": "UNC_M3UPI_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -12719,6 +14168,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -12728,6 +14178,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -12737,6 +14188,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -12746,6 +14198,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB2",
"EventName": "UNC_M3UPI_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -12755,6 +14208,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -12764,6 +14218,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xB3",
"EventName": "UNC_M3UPI_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -12773,6 +14228,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -12782,6 +14238,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -12791,6 +14248,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -12800,6 +14258,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xB5",
"EventName": "UNC_M3UPI_VERT_RING_TGC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -12809,6 +14268,7 @@
},
{
"BriefDescription": "VN0 Credit Used : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCB",
"PerPkg": "1",
@@ -12818,6 +14278,7 @@
},
{
"BriefDescription": "VN0 Credit Used : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.NCS",
"PerPkg": "1",
@@ -12827,6 +14288,7 @@
},
{
"BriefDescription": "VN0 Credit Used : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.REQ",
"PerPkg": "1",
@@ -12836,6 +14298,7 @@
},
{
"BriefDescription": "VN0 Credit Used : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.RSP",
"PerPkg": "1",
@@ -12845,6 +14308,7 @@
},
{
"BriefDescription": "VN0 Credit Used : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.SNP",
"PerPkg": "1",
@@ -12854,6 +14318,7 @@
},
{
"BriefDescription": "VN0 Credit Used : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5B",
"EventName": "UNC_M3UPI_VN0_CREDITS_USED.WB",
"PerPkg": "1",
@@ -12863,6 +14328,7 @@
},
{
"BriefDescription": "VN0 No Credits : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCB",
"PerPkg": "1",
@@ -12872,6 +14338,7 @@
},
{
"BriefDescription": "VN0 No Credits : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.NCS",
"PerPkg": "1",
@@ -12881,6 +14348,7 @@
},
{
"BriefDescription": "VN0 No Credits : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.REQ",
"PerPkg": "1",
@@ -12890,6 +14358,7 @@
},
{
"BriefDescription": "VN0 No Credits : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.RSP",
"PerPkg": "1",
@@ -12899,6 +14368,7 @@
},
{
"BriefDescription": "VN0 No Credits : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.SNP",
"PerPkg": "1",
@@ -12908,6 +14378,7 @@
},
{
"BriefDescription": "VN0 No Credits : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5D",
"EventName": "UNC_M3UPI_VN0_NO_CREDITS.WB",
"PerPkg": "1",
@@ -12917,6 +14388,7 @@
},
{
"BriefDescription": "VN1 Credit Used : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCB",
"PerPkg": "1",
@@ -12926,6 +14398,7 @@
},
{
"BriefDescription": "VN1 Credit Used : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.NCS",
"PerPkg": "1",
@@ -12935,6 +14408,7 @@
},
{
"BriefDescription": "VN1 Credit Used : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.REQ",
"PerPkg": "1",
@@ -12944,6 +14418,7 @@
},
{
"BriefDescription": "VN1 Credit Used : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.RSP",
"PerPkg": "1",
@@ -12953,6 +14428,7 @@
},
{
"BriefDescription": "VN1 Credit Used : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.SNP",
"PerPkg": "1",
@@ -12962,6 +14438,7 @@
},
{
"BriefDescription": "VN1 Credit Used : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5C",
"EventName": "UNC_M3UPI_VN1_CREDITS_USED.WB",
"PerPkg": "1",
@@ -12971,6 +14448,7 @@
},
{
"BriefDescription": "VN1 No Credits : WB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCB",
"PerPkg": "1",
@@ -12980,6 +14458,7 @@
},
{
"BriefDescription": "VN1 No Credits : NCB on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.NCS",
"PerPkg": "1",
@@ -12989,6 +14468,7 @@
},
{
"BriefDescription": "VN1 No Credits : REQ on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.REQ",
"PerPkg": "1",
@@ -12998,6 +14478,7 @@
},
{
"BriefDescription": "VN1 No Credits : RSP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.RSP",
"PerPkg": "1",
@@ -13007,6 +14488,7 @@
},
{
"BriefDescription": "VN1 No Credits : SNP on AD",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.SNP",
"PerPkg": "1",
@@ -13016,6 +14498,7 @@
},
{
"BriefDescription": "VN1 No Credits : RSP on BL",
+ "Counter": "0,1,2,3",
"EventCode": "0x5E",
"EventName": "UNC_M3UPI_VN1_NO_CREDITS.WB",
"PerPkg": "1",
@@ -13025,6 +14508,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST_VN0",
"PerPkg": "1",
@@ -13033,6 +14517,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_EQ_LOCALDEST_VN1",
"PerPkg": "1",
@@ -13041,6 +14526,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST_VN0",
"PerPkg": "1",
@@ -13049,6 +14535,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_GT_LOCALDEST_VN1",
"PerPkg": "1",
@@ -13057,6 +14544,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST_VN0",
"PerPkg": "1",
@@ -13065,6 +14553,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.BOTHNONZERO_RT_LT_LOCALDEST_VN1",
"PerPkg": "1",
@@ -13073,6 +14562,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN0",
"PerPkg": "1",
@@ -13081,6 +14571,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_EQ_LOCALDEST_VN1",
"PerPkg": "1",
@@ -13089,6 +14580,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN0",
"PerPkg": "1",
@@ -13097,6 +14589,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_GT_LOCALDEST_VN1",
"PerPkg": "1",
@@ -13105,6 +14598,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN0",
"PerPkg": "1",
@@ -13113,6 +14607,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7E",
"EventName": "UNC_M3UPI_WB_OCC_COMPARE.RT_LT_LOCALDEST_VN1",
"PerPkg": "1",
@@ -13121,6 +14616,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN0",
"PerPkg": "1",
@@ -13129,6 +14625,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.LOCALDEST_VN1",
"PerPkg": "1",
@@ -13137,6 +14634,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN0",
"PerPkg": "1",
@@ -13145,6 +14643,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.LOCAL_AND_RT_VN1",
"PerPkg": "1",
@@ -13153,6 +14652,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN0",
"PerPkg": "1",
@@ -13161,6 +14661,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.ROUTETHRU_VN1",
"PerPkg": "1",
@@ -13169,6 +14670,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN0",
"PerPkg": "1",
@@ -13177,6 +14679,7 @@
},
{
"BriefDescription": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x7D",
"EventName": "UNC_M3UPI_WB_PENDING.WAITING4PULL_VN1",
"PerPkg": "1",
@@ -13185,6 +14688,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARB",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.ARB",
"PerPkg": "1",
@@ -13194,6 +14698,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.ARRIVED",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.ARRIVED",
"PerPkg": "1",
@@ -13203,6 +14708,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.BYPASS",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.BYPASS",
"PerPkg": "1",
@@ -13212,6 +14718,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.FLITTED",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.FLITTED",
"PerPkg": "1",
@@ -13221,6 +14728,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_ARB",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.LOST_ARB",
"PerPkg": "1",
@@ -13230,6 +14738,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_OLD",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.LOST_OLD",
"PerPkg": "1",
@@ -13239,6 +14748,7 @@
},
{
"BriefDescription": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL",
+ "Counter": "0,1,2,3",
"EventCode": "0x61",
"EventName": "UNC_M3UPI_XPT_PFTCH.LOST_QFULL",
"PerPkg": "1",
@@ -13248,6 +14758,7 @@
},
{
"BriefDescription": "Number of kfclks",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_UPI_CLOCKTICKS",
"PerPkg": "1",
@@ -13256,6 +14767,7 @@
},
{
"BriefDescription": "Direct packet attempts : D2C",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2C",
"PerPkg": "1",
@@ -13265,6 +14777,7 @@
},
{
"BriefDescription": "Direct packet attempts : D2K",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_UPI_DIRECT_ATTEMPTS.D2K",
"PerPkg": "1",
@@ -13274,6 +14787,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ0",
"PerPkg": "1",
@@ -13282,6 +14796,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ1",
"PerPkg": "1",
@@ -13290,6 +14805,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AD_VNA_EQ2",
"PerPkg": "1",
@@ -13298,6 +14814,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ0",
"PerPkg": "1",
@@ -13306,6 +14823,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ1",
"PerPkg": "1",
@@ -13314,6 +14832,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ2",
"PerPkg": "1",
@@ -13322,6 +14841,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.AK_VNA_EQ3",
"PerPkg": "1",
@@ -13330,6 +14850,7 @@
},
{
"BriefDescription": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_UPI_FLOWQ_NO_VNA_CRD.BL_VNA_EQ0",
"PerPkg": "1",
@@ -13338,6 +14859,7 @@
},
{
"BriefDescription": "Cycles in L1",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_UPI_L1_POWER_CYCLES",
"PerPkg": "1",
@@ -13346,6 +14868,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.BGF_CRD",
"PerPkg": "1",
@@ -13354,6 +14877,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AD_VNA_LE2",
"PerPkg": "1",
@@ -13362,6 +14886,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_AK_VNA_LE3",
"PerPkg": "1",
@@ -13370,6 +14895,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.FLOWQ_BL_VNA_EQ0",
"PerPkg": "1",
@@ -13378,6 +14904,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
+ "Counter": "0,1,2,3",
"EventCode": "0x14",
"EventName": "UNC_UPI_M3_BYP_BLOCKED.GV_BLOCK",
"PerPkg": "1",
@@ -13386,6 +14913,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_UPI_M3_CRD_RETURN_BLOCKED",
"PerPkg": "1",
@@ -13393,6 +14921,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.BGF_CRD",
"PerPkg": "1",
@@ -13401,6 +14930,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_BTW_2_THRESH",
"PerPkg": "1",
@@ -13409,6 +14939,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AD_VNA_LE2",
"PerPkg": "1",
@@ -13417,6 +14948,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_AK_VNA_LE3",
"PerPkg": "1",
@@ -13425,6 +14957,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_BTW_0_THRESH",
"PerPkg": "1",
@@ -13433,6 +14966,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.FLOWQ_BL_VNA_EQ0",
"PerPkg": "1",
@@ -13441,6 +14975,7 @@
},
{
"BriefDescription": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_UPI_M3_RXQ_BLOCKED.GV_BLOCK",
"PerPkg": "1",
@@ -13449,6 +14984,7 @@
},
{
"BriefDescription": "Cycles where phy is not in L0, L0c, L0p, L1",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_UPI_PHY_INIT_CYCLES",
"PerPkg": "1",
@@ -13456,6 +14992,7 @@
},
{
"BriefDescription": "L1 Req Nack",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_UPI_POWER_L1_NACK",
"PerPkg": "1",
@@ -13464,6 +15001,7 @@
},
{
"BriefDescription": "L1 Req (same as L1 Ack).",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_UPI_POWER_L1_REQ",
"PerPkg": "1",
@@ -13472,6 +15010,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.ACK",
"PerPkg": "1",
@@ -13480,6 +15019,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN0",
"PerPkg": "1",
@@ -13488,6 +15028,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VN1",
"PerPkg": "1",
@@ -13496,6 +15037,7 @@
},
{
"BriefDescription": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_UPI_REQ_SLOT2_FROM_M3.VNA",
"PerPkg": "1",
@@ -13504,6 +15046,7 @@
},
{
"BriefDescription": "Cycles in L0p",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_UPI_RxL0P_POWER_CYCLES",
"PerPkg": "1",
@@ -13512,6 +15055,7 @@
},
{
"BriefDescription": "Cycles in L0",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_UPI_RxL0_POWER_CYCLES",
"PerPkg": "1",
@@ -13520,6 +15064,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB",
"PerPkg": "1",
@@ -13529,6 +15074,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Bypass, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCB_OPC",
"PerPkg": "1",
@@ -13538,6 +15084,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS",
"PerPkg": "1",
@@ -13547,6 +15094,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Non-Coherent Standard, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.NCS_OPC",
"PerPkg": "1",
@@ -13556,6 +15104,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ",
"PerPkg": "1",
@@ -13565,6 +15114,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Request, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.REQ_OPC",
"PerPkg": "1",
@@ -13574,6 +15124,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Response - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPCNFLT",
"PerPkg": "1",
@@ -13583,6 +15134,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Response - Invalid",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSPI",
"PerPkg": "1",
@@ -13592,6 +15144,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Response - Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA",
"PerPkg": "1",
@@ -13601,6 +15154,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Response - Data, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_DATA_OPC",
"PerPkg": "1",
@@ -13610,6 +15164,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Response - No Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA",
"PerPkg": "1",
@@ -13619,6 +15174,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Response - No Data, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.RSP_NODATA_OPC",
"PerPkg": "1",
@@ -13628,6 +15184,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP",
"PerPkg": "1",
@@ -13637,6 +15194,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Snoop, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.SNP_OPC",
"PerPkg": "1",
@@ -13646,6 +15204,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Writeback",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB",
"PerPkg": "1",
@@ -13655,6 +15214,7 @@
},
{
"BriefDescription": "Matches on Receive path of a UPI Port : Writeback, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_UPI_RxL_BASIC_HDR_MATCH.WB_OPC",
"PerPkg": "1",
@@ -13664,6 +15224,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Bypassed : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT0",
"PerPkg": "1",
@@ -13673,6 +15234,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Bypassed : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT1",
"PerPkg": "1",
@@ -13682,6 +15244,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Bypassed : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x31",
"EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
"PerPkg": "1",
@@ -13691,6 +15254,7 @@
},
{
"BriefDescription": "CRC Errors Detected",
+ "Counter": "0,1,2,3",
"EventCode": "0x0B",
"EventName": "UNC_UPI_RxL_CRC_ERRORS",
"PerPkg": "1",
@@ -13699,6 +15263,7 @@
},
{
"BriefDescription": "LLR Requests Sent",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "UNC_UPI_RxL_CRC_LLR_REQ_TRANSMIT",
"PerPkg": "1",
@@ -13707,6 +15272,7 @@
},
{
"BriefDescription": "VN0 Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x39",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN0",
"PerPkg": "1",
@@ -13715,6 +15281,7 @@
},
{
"BriefDescription": "VN1 Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x3A",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VN1",
"PerPkg": "1",
@@ -13723,6 +15290,7 @@
},
{
"BriefDescription": "VNA Credit Consumed",
+ "Counter": "0,1,2,3",
"EventCode": "0x38",
"EventName": "UNC_UPI_RxL_CREDITS_CONSUMED_VNA",
"PerPkg": "1",
@@ -13731,6 +15299,7 @@
},
{
"BriefDescription": "Valid Flits Received : All Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.ALL_DATA",
"PerPkg": "1",
@@ -13740,6 +15309,7 @@
},
{
"BriefDescription": "Valid Flits Received : Null FLITs received from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.ALL_NULL",
"PerPkg": "1",
@@ -13749,6 +15319,7 @@
},
{
"BriefDescription": "Valid Flits Received : Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.DATA",
"PerPkg": "1",
@@ -13758,6 +15329,7 @@
},
{
"BriefDescription": "Valid Flits Received : Null FLITs received from any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.IDLE",
"PerPkg": "1",
@@ -13767,6 +15339,7 @@
},
{
"BriefDescription": "Valid Flits Received : LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.LLCRD",
"PerPkg": "1",
@@ -13776,6 +15349,7 @@
},
{
"BriefDescription": "Valid Flits Received : LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.LLCTRL",
"PerPkg": "1",
@@ -13785,6 +15359,7 @@
},
{
"BriefDescription": "Valid Flits Received : All Non Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.NON_DATA",
"PerPkg": "1",
@@ -13794,6 +15369,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot NULL or LLCRD Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.NULL",
"PerPkg": "1",
@@ -13803,6 +15379,7 @@
},
{
"BriefDescription": "Valid Flits Received : Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.PROTHDR",
"PerPkg": "1",
@@ -13812,6 +15389,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.SLOT0",
"PerPkg": "1",
@@ -13821,6 +15399,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.SLOT1",
"PerPkg": "1",
@@ -13830,6 +15409,7 @@
},
{
"BriefDescription": "Valid Flits Received : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "UNC_UPI_RxL_FLITS.SLOT2",
"PerPkg": "1",
@@ -13839,6 +15419,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT0",
"PerPkg": "1",
@@ -13848,6 +15429,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT1",
"PerPkg": "1",
@@ -13857,6 +15439,7 @@
},
{
"BriefDescription": "RxQ Flit Buffer Allocations : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
"PerPkg": "1",
@@ -13866,6 +15449,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT0",
"PerPkg": "1",
@@ -13875,6 +15459,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT1",
"PerPkg": "1",
@@ -13884,6 +15469,7 @@
},
{
"BriefDescription": "RxQ Occupancy - All Packets : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
"PerPkg": "1",
@@ -13893,6 +15479,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ1",
"PerPkg": "1",
@@ -13901,6 +15488,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S0_RXQ2",
"PerPkg": "1",
@@ -13909,6 +15497,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ0",
"PerPkg": "1",
@@ -13917,6 +15506,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S1_RXQ2",
"PerPkg": "1",
@@ -13925,6 +15515,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ0",
"PerPkg": "1",
@@ -13933,6 +15524,7 @@
},
{
"BriefDescription": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_UPI_RxL_SLOT_BYPASS.S2_RXQ1",
"PerPkg": "1",
@@ -13941,6 +15533,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.CFG_CTL",
"PerPkg": "1",
@@ -13949,6 +15542,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.DFX",
"PerPkg": "1",
@@ -13957,6 +15551,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RETRY",
"PerPkg": "1",
@@ -13965,6 +15560,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ",
"PerPkg": "1",
@@ -13973,6 +15569,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_BYPASS",
"PerPkg": "1",
@@ -13981,6 +15578,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.RXQ_CRED",
"PerPkg": "1",
@@ -13989,6 +15587,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.SPARE",
"PerPkg": "1",
@@ -13997,6 +15596,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_UPI_TxL0P_CLK_ACTIVE.TXQ",
"PerPkg": "1",
@@ -14005,6 +15605,7 @@
},
{
"BriefDescription": "Cycles in L0p",
+ "Counter": "0,1,2,3",
"EventCode": "0x27",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES",
"PerPkg": "1",
@@ -14013,6 +15614,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES_LL_ENTER",
"PerPkg": "1",
@@ -14020,6 +15622,7 @@
},
{
"BriefDescription": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
+ "Counter": "0,1,2,3",
"EventCode": "0x29",
"EventName": "UNC_UPI_TxL0P_POWER_CYCLES_M3_EXIT",
"PerPkg": "1",
@@ -14027,6 +15630,7 @@
},
{
"BriefDescription": "Cycles in L0",
+ "Counter": "0,1,2,3",
"EventCode": "0x26",
"EventName": "UNC_UPI_TxL0_POWER_CYCLES",
"PerPkg": "1",
@@ -14035,6 +15639,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB",
"PerPkg": "1",
@@ -14044,6 +15649,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Bypass, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCB_OPC",
"PerPkg": "1",
@@ -14053,6 +15659,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS",
"PerPkg": "1",
@@ -14062,6 +15669,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Non-Coherent Standard, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.NCS_OPC",
"PerPkg": "1",
@@ -14071,6 +15679,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Request",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ",
"PerPkg": "1",
@@ -14080,6 +15689,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Request, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.REQ_OPC",
"PerPkg": "1",
@@ -14089,6 +15699,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Response - Conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPCNFLT",
"PerPkg": "1",
@@ -14098,6 +15709,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Response - Invalid",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSPI",
"PerPkg": "1",
@@ -14107,6 +15719,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Response - Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA",
"PerPkg": "1",
@@ -14116,6 +15729,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Response - Data, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_DATA_OPC",
"PerPkg": "1",
@@ -14125,6 +15739,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Response - No Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA",
"PerPkg": "1",
@@ -14134,6 +15749,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Response - No Data, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.RSP_NODATA_OPC",
"PerPkg": "1",
@@ -14143,6 +15759,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Snoop",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP",
"PerPkg": "1",
@@ -14152,6 +15769,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Snoop, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.SNP_OPC",
"PerPkg": "1",
@@ -14161,6 +15779,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Writeback",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB",
"PerPkg": "1",
@@ -14170,6 +15789,7 @@
},
{
"BriefDescription": "Matches on Transmit path of a UPI Port : Writeback, Match Opcode",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_UPI_TxL_BASIC_HDR_MATCH.WB_OPC",
"PerPkg": "1",
@@ -14179,6 +15799,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Bypassed",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_UPI_TxL_BYPASSED",
"PerPkg": "1",
@@ -14187,6 +15808,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_DATA",
"PerPkg": "1",
@@ -14196,6 +15818,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Null FLITs transmitted to any slot",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.ALL_NULL",
"PerPkg": "1",
@@ -14205,6 +15828,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.DATA",
"PerPkg": "1",
@@ -14214,6 +15838,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Idle",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.IDLE",
"PerPkg": "1",
@@ -14223,6 +15848,7 @@
},
{
"BriefDescription": "Valid Flits Sent : LLCRD Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.LLCRD",
"PerPkg": "1",
@@ -14232,6 +15858,7 @@
},
{
"BriefDescription": "Valid Flits Sent : LLCTRL",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.LLCTRL",
"PerPkg": "1",
@@ -14241,6 +15868,7 @@
},
{
"BriefDescription": "Valid Flits Sent : All Non Data",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.NON_DATA",
"PerPkg": "1",
@@ -14250,6 +15878,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot NULL or LLCRD Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.NULL",
"PerPkg": "1",
@@ -14259,6 +15888,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Protocol Header",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.PROTHDR",
"PerPkg": "1",
@@ -14268,6 +15898,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.SLOT0",
"PerPkg": "1",
@@ -14277,6 +15908,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.SLOT1",
"PerPkg": "1",
@@ -14286,6 +15918,7 @@
},
{
"BriefDescription": "Valid Flits Sent : Slot 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_UPI_TxL_FLITS.SLOT2",
"PerPkg": "1",
@@ -14295,6 +15928,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_UPI_TxL_INSERTS",
"PerPkg": "1",
@@ -14303,6 +15937,7 @@
},
{
"BriefDescription": "Tx Flit Buffer Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_UPI_TxL_OCCUPANCY",
"PerPkg": "1",
@@ -14311,6 +15946,7 @@
},
{
"BriefDescription": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_UPI_VNA_CREDIT_RETURN_BLOCKED_VN01",
"PerPkg": "1",
@@ -14318,6 +15954,7 @@
},
{
"BriefDescription": "VNA Credits Pending Return - Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_UPI_VNA_CREDIT_RETURN_OCCUPANCY",
"PerPkg": "1",
@@ -14326,6 +15963,7 @@
},
{
"BriefDescription": "Clockticks in the UBOX using a dedicated 48-bit Fixed Counter",
+ "Counter": "FIXED",
"EventCode": "0xff",
"EventName": "UNC_U_CLOCKTICKS",
"PerPkg": "1",
@@ -14333,6 +15971,7 @@
},
{
"BriefDescription": "Message Received : Doorbell",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD",
"PerPkg": "1",
@@ -14341,6 +15980,7 @@
},
{
"BriefDescription": "Message Received : Interrupt",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.INT_PRIO",
"PerPkg": "1",
@@ -14350,6 +15990,7 @@
},
{
"BriefDescription": "Message Received : IPI",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.IPI_RCVD",
"PerPkg": "1",
@@ -14359,6 +16000,7 @@
},
{
"BriefDescription": "Message Received : MSI",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.MSI_RCVD",
"PerPkg": "1",
@@ -14368,6 +16010,7 @@
},
{
"BriefDescription": "Message Received : VLW",
+ "Counter": "0,1",
"EventCode": "0x42",
"EventName": "UNC_U_EVENT_MSG.VLW_RCVD",
"PerPkg": "1",
@@ -14377,6 +16020,7 @@
},
{
"BriefDescription": "IDI Lock/SplitLock Cycles",
+ "Counter": "0,1",
"EventCode": "0x44",
"EventName": "UNC_U_LOCK_CYCLES",
"PerPkg": "1",
@@ -14385,6 +16029,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCB",
"PerPkg": "1",
@@ -14393,6 +16038,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_CBO_NCS",
"PerPkg": "1",
@@ -14401,6 +16047,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCB",
"PerPkg": "1",
@@ -14409,6 +16056,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.RxC_CYCLES_NE_UPI_NCS",
"PerPkg": "1",
@@ -14417,6 +16065,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCB",
"PerPkg": "1",
@@ -14425,6 +16074,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_CBO_NCS",
"PerPkg": "1",
@@ -14433,6 +16083,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCB",
"PerPkg": "1",
@@ -14441,6 +16092,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS",
+ "Counter": "0,1",
"EventCode": "0x4D",
"EventName": "UNC_U_M2U_MISC1.TxC_CYCLES_CRD_OVF_UPI_NCS",
"PerPkg": "1",
@@ -14449,6 +16101,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_EMPTY_BL",
"PerPkg": "1",
@@ -14457,6 +16110,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.RxC_CYCLES_FULL_BL",
"PerPkg": "1",
@@ -14465,6 +16119,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCB",
"PerPkg": "1",
@@ -14473,6 +16128,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_CRD_OVF_VN0_NCS",
"PerPkg": "1",
@@ -14481,6 +16137,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AK",
"PerPkg": "1",
@@ -14489,6 +16146,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_AKC",
"PerPkg": "1",
@@ -14497,6 +16155,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_EMPTY_BL",
"PerPkg": "1",
@@ -14505,6 +16164,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL",
+ "Counter": "0,1",
"EventCode": "0x4E",
"EventName": "UNC_U_M2U_MISC2.TxC_CYCLES_FULL_BL",
"PerPkg": "1",
@@ -14513,6 +16173,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK",
+ "Counter": "0,1",
"EventCode": "0x4F",
"EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AK",
"PerPkg": "1",
@@ -14521,6 +16182,7 @@
},
{
"BriefDescription": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC",
+ "Counter": "0,1",
"EventCode": "0x4F",
"EventName": "UNC_U_M2U_MISC3.TxC_CYCLES_FULL_AKC",
"PerPkg": "1",
@@ -14529,6 +16191,7 @@
},
{
"BriefDescription": "Cycles PHOLD Assert to Ack : Assert to ACK",
+ "Counter": "0,1",
"EventCode": "0x45",
"EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK",
"PerPkg": "1",
@@ -14538,6 +16201,7 @@
},
{
"BriefDescription": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY",
+ "Counter": "0,1",
"EventCode": "0x4C",
"EventName": "UNC_U_RACU_DRNG.PFTCH_BUF_EMPTY",
"PerPkg": "1",
@@ -14546,6 +16210,7 @@
},
{
"BriefDescription": "UNC_U_RACU_DRNG.RDRAND",
+ "Counter": "0,1",
"EventCode": "0x4C",
"EventName": "UNC_U_RACU_DRNG.RDRAND",
"PerPkg": "1",
@@ -14554,6 +16219,7 @@
},
{
"BriefDescription": "UNC_U_RACU_DRNG.RDSEED",
+ "Counter": "0,1",
"EventCode": "0x4C",
"EventName": "UNC_U_RACU_DRNG.RDSEED",
"PerPkg": "1",
@@ -14562,6 +16228,7 @@
},
{
"BriefDescription": "RACU Request",
+ "Counter": "0,1",
"EventCode": "0x46",
"EventName": "UNC_U_RACU_REQUESTS",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json b/tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json
index 9cef8862c428..cffd9465d43a 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-io.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "1",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART0_FREERUN",
"PerPkg": "1",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "2",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART1_FREERUN",
"PerPkg": "1",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "3",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART2_FREERUN",
"PerPkg": "1",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "4",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART3_FREERUN",
"PerPkg": "1",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "5",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART4_FREERUN",
"PerPkg": "1",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "6",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART5_FREERUN",
"PerPkg": "1",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "7",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART6_FREERUN",
"PerPkg": "1",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Free running counter that increments for every 32 bytes of data sent from the IO agent to the SOC",
+ "Counter": "8",
"EventCode": "0xff",
"EventName": "UNC_IIO_BANDWIDTH_IN.PART7_FREERUN",
"PerPkg": "1",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Clockticks of the integrated IO (IIO) traffic controller",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_IIO_CLOCKTICKS",
"PerPkg": "1",
@@ -82,6 +91,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts : All Ports",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL",
"FCMask": "0x04",
@@ -92,6 +102,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",
"FCMask": "0x04",
@@ -103,6 +114,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",
"FCMask": "0x04",
@@ -114,6 +126,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",
"FCMask": "0x04",
@@ -125,6 +138,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2",
"FCMask": "0x04",
@@ -136,6 +150,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3",
"FCMask": "0x04",
@@ -147,6 +162,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4",
"FCMask": "0x04",
@@ -158,6 +174,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5",
"FCMask": "0x04",
@@ -169,6 +186,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6",
"FCMask": "0x04",
@@ -180,6 +198,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7",
"FCMask": "0x04",
@@ -191,6 +210,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7",
+ "Counter": "2,3",
"EventCode": "0xD5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL",
"FCMask": "0x04",
@@ -201,6 +221,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0-7",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
"FCMask": "0x04",
@@ -211,6 +232,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 0",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0",
"FCMask": "0x04",
@@ -221,6 +243,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 1",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1",
"FCMask": "0x04",
@@ -231,6 +254,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 2",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2",
"FCMask": "0x04",
@@ -241,6 +265,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 3",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3",
"FCMask": "0x04",
@@ -251,6 +276,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 4",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4",
"FCMask": "0x04",
@@ -261,6 +287,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 5",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5",
"FCMask": "0x04",
@@ -271,6 +298,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 6",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6",
"FCMask": "0x04",
@@ -281,6 +309,7 @@
},
{
"BriefDescription": "PCIe Completion Buffer Occupancy of completions with data : Part 7",
+ "Counter": "2,3",
"EventCode": "0xd5",
"EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7",
"FCMask": "0x04",
@@ -291,6 +320,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU0",
"FCMask": "0x07",
@@ -302,6 +332,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.IOMMU1",
"FCMask": "0x07",
@@ -313,6 +344,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART0",
"FCMask": "0x07",
@@ -324,6 +356,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART1",
"FCMask": "0x07",
@@ -335,6 +368,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART2",
"FCMask": "0x07",
@@ -346,6 +380,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART3",
"FCMask": "0x07",
@@ -357,6 +392,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART4",
"FCMask": "0x07",
@@ -368,6 +404,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART5",
"FCMask": "0x07",
@@ -379,6 +416,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART6",
"FCMask": "0x07",
@@ -390,6 +428,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_READ.PART7",
"FCMask": "0x07",
@@ -401,6 +440,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -412,6 +452,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -423,6 +464,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART0",
"FCMask": "0x07",
@@ -434,6 +476,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART1",
"FCMask": "0x07",
@@ -445,6 +488,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART2",
"FCMask": "0x07",
@@ -456,6 +500,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART3",
"FCMask": "0x07",
@@ -467,6 +512,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART4",
"FCMask": "0x07",
@@ -478,6 +524,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART5",
"FCMask": "0x07",
@@ -489,6 +536,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART6",
"FCMask": "0x07",
@@ -500,6 +548,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.CFG_WRITE.PART7",
"FCMask": "0x07",
@@ -511,6 +560,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU0",
"FCMask": "0x07",
@@ -522,6 +572,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.IOMMU1",
"FCMask": "0x07",
@@ -533,6 +584,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART0",
"FCMask": "0x07",
@@ -544,6 +596,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART1",
"FCMask": "0x07",
@@ -555,6 +608,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART2",
"FCMask": "0x07",
@@ -566,6 +620,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART3",
"FCMask": "0x07",
@@ -577,6 +632,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART4",
"FCMask": "0x07",
@@ -588,6 +644,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART5",
"FCMask": "0x07",
@@ -599,6 +656,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART6",
"FCMask": "0x07",
@@ -610,6 +668,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reading from Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_READ.PART7",
"FCMask": "0x07",
@@ -621,6 +680,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -632,6 +692,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -643,6 +704,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART0",
"FCMask": "0x07",
@@ -654,6 +716,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART1",
"FCMask": "0x07",
@@ -665,6 +728,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART2",
"FCMask": "0x07",
@@ -676,6 +740,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART3",
"FCMask": "0x07",
@@ -687,6 +752,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART4",
"FCMask": "0x07",
@@ -698,6 +764,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART5",
"FCMask": "0x07",
@@ -709,6 +776,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART6",
"FCMask": "0x07",
@@ -720,6 +788,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's IO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.IO_WRITE.PART7",
"FCMask": "0x07",
@@ -731,6 +800,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU0",
"FCMask": "0x07",
@@ -742,6 +812,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.IOMMU1",
"FCMask": "0x07",
@@ -753,6 +824,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -764,6 +836,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -775,6 +848,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -786,6 +860,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -797,6 +872,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -808,6 +884,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -819,6 +896,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -830,6 +908,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
+ "Counter": "2,3",
"EventCode": "0xc0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -841,6 +920,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -852,6 +932,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -863,6 +944,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -874,6 +956,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -885,6 +968,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -896,6 +980,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -907,6 +992,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -918,6 +1004,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -929,6 +1016,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -940,6 +1028,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -951,6 +1040,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU0",
"FCMask": "0x07",
@@ -962,6 +1052,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.IOMMU1",
"FCMask": "0x07",
@@ -973,6 +1064,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -984,6 +1076,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -995,6 +1088,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -1006,6 +1100,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -1017,6 +1112,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART4",
"FCMask": "0x07",
@@ -1028,6 +1124,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART5",
"FCMask": "0x07",
@@ -1039,6 +1136,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART6",
"FCMask": "0x07",
@@ -1050,6 +1148,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART7",
"FCMask": "0x07",
@@ -1061,6 +1160,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -1072,6 +1172,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -1083,6 +1184,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -1094,6 +1196,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -1105,6 +1208,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -1116,6 +1220,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -1127,6 +1232,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -1138,6 +1244,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -1149,6 +1256,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -1160,6 +1268,7 @@
},
{
"BriefDescription": "Data requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "2,3",
"EventCode": "0xC0",
"EventName": "UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -1171,6 +1280,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU0",
"FCMask": "0x07",
@@ -1182,6 +1292,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.IOMMU1",
"FCMask": "0x07",
@@ -1193,6 +1304,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART0",
"FCMask": "0x07",
@@ -1204,6 +1316,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART1",
"FCMask": "0x07",
@@ -1215,6 +1328,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART2",
"FCMask": "0x07",
@@ -1226,6 +1340,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART3",
"FCMask": "0x07",
@@ -1237,6 +1352,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART4",
"FCMask": "0x07",
@@ -1248,6 +1364,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART5",
"FCMask": "0x07",
@@ -1259,6 +1376,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART6",
"FCMask": "0x07",
@@ -1270,6 +1388,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.ATOMIC.PART7",
"FCMask": "0x07",
@@ -1281,6 +1400,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU0",
"FCMask": "0x07",
@@ -1292,6 +1412,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.IOMMU1",
"FCMask": "0x07",
@@ -1303,6 +1424,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART0",
"FCMask": "0x07",
@@ -1314,6 +1436,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART1",
"FCMask": "0x07",
@@ -1325,6 +1448,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART2",
"FCMask": "0x07",
@@ -1336,6 +1460,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART3",
"FCMask": "0x07",
@@ -1347,6 +1472,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART4",
"FCMask": "0x07",
@@ -1358,6 +1484,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART5",
"FCMask": "0x07",
@@ -1369,6 +1496,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART6",
"FCMask": "0x07",
@@ -1380,6 +1508,7 @@
},
{
"BriefDescription": "Data requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.CMPD.PART7",
"FCMask": "0x07",
@@ -1391,6 +1520,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU0",
"FCMask": "0x07",
@@ -1402,6 +1532,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.IOMMU1",
"FCMask": "0x07",
@@ -1413,6 +1544,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -1424,6 +1556,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -1435,6 +1568,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -1446,6 +1580,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -1457,6 +1592,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -1468,6 +1604,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -1479,6 +1616,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -1490,6 +1628,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -1501,6 +1640,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -1512,6 +1652,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -1523,6 +1664,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -1534,6 +1676,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -1545,6 +1688,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -1556,6 +1700,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -1567,6 +1712,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -1578,6 +1724,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -1589,6 +1736,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -1600,6 +1748,7 @@
},
{
"BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -1611,6 +1760,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU0",
"FCMask": "0x07",
@@ -1622,6 +1772,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.IOMMU1",
"FCMask": "0x07",
@@ -1633,6 +1784,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART0",
"FCMask": "0x07",
@@ -1644,6 +1796,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART1",
"FCMask": "0x07",
@@ -1655,6 +1808,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART2",
"FCMask": "0x07",
@@ -1666,6 +1820,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART3",
"FCMask": "0x07",
@@ -1677,6 +1832,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART4",
"FCMask": "0x07",
@@ -1688,6 +1844,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART5",
"FCMask": "0x07",
@@ -1699,6 +1856,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART6",
"FCMask": "0x07",
@@ -1710,6 +1868,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Messages",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.MSG.PART7",
"FCMask": "0x07",
@@ -1721,6 +1880,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU0",
"FCMask": "0x07",
@@ -1732,6 +1892,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.IOMMU1",
"FCMask": "0x07",
@@ -1743,6 +1904,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -1754,6 +1916,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -1765,6 +1928,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -1776,6 +1940,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -1787,6 +1952,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART4",
"FCMask": "0x07",
@@ -1798,6 +1964,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART5",
"FCMask": "0x07",
@@ -1809,6 +1976,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART6",
"FCMask": "0x07",
@@ -1820,6 +1988,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART7",
"FCMask": "0x07",
@@ -1831,6 +2000,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -1842,6 +2012,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -1853,6 +2024,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -1864,6 +2036,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -1875,6 +2048,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -1886,6 +2060,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -1897,6 +2072,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -1908,6 +2084,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -1919,6 +2096,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -1930,6 +2108,7 @@
},
{
"BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1",
"EventCode": "0x83",
"EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -1941,6 +2120,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.DATA",
"FCMask": "0x07",
@@ -1952,6 +2132,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.FINAL_RD_WR",
"FCMask": "0x07",
@@ -1963,6 +2144,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Processing response from IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_HIT",
"FCMask": "0x07",
@@ -1974,6 +2156,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Issuing to IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.IOMMU_REQ",
"FCMask": "0x07",
@@ -1985,6 +2168,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.REQ_OWN",
"FCMask": "0x07",
@@ -1996,6 +2180,7 @@
},
{
"BriefDescription": "Incoming arbitration requests : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_IIO_INBOUND_ARB_REQ.WR",
"FCMask": "0x07",
@@ -2007,6 +2192,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.DATA",
"FCMask": "0x07",
@@ -2018,6 +2204,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.FINAL_RD_WR",
"FCMask": "0x07",
@@ -2029,6 +2216,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Processing response from IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_HIT",
"FCMask": "0x07",
@@ -2040,6 +2228,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Issuing to IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.IOMMU_REQ",
"FCMask": "0x07",
@@ -2051,6 +2240,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.REQ_OWN",
"FCMask": "0x07",
@@ -2062,6 +2252,7 @@
},
{
"BriefDescription": "Incoming arbitration requests granted : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_IIO_INBOUND_ARB_WON.WR",
"FCMask": "0x07",
@@ -2073,6 +2264,7 @@
},
{
"BriefDescription": ": IOTLB Hits to a 1G Page",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.1G_HITS",
"PerPkg": "1",
@@ -2082,6 +2274,7 @@
},
{
"BriefDescription": ": IOTLB Hits to a 2M Page",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.2M_HITS",
"PerPkg": "1",
@@ -2091,6 +2284,7 @@
},
{
"BriefDescription": ": IOTLB Hits to a 4K Page",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.4K_HITS",
"PerPkg": "1",
@@ -2100,6 +2294,7 @@
},
{
"BriefDescription": ": IOTLB lookups all",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.ALL_LOOKUPS",
"PerPkg": "1",
@@ -2109,6 +2304,7 @@
},
{
"BriefDescription": ": Context cache hits",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS",
"PerPkg": "1",
@@ -2118,6 +2314,7 @@
},
{
"BriefDescription": ": Context cache lookups",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS",
"PerPkg": "1",
@@ -2127,6 +2324,7 @@
},
{
"BriefDescription": ": IOTLB lookups first",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS",
"PerPkg": "1",
@@ -2136,6 +2334,7 @@
},
{
"BriefDescription": ": IOTLB Fills (same as IOTLB miss)",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_IIO_IOMMU0.MISSES",
"PerPkg": "1",
@@ -2145,6 +2344,7 @@
},
{
"BriefDescription": ": Cycles PWT full",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.CYC_PWT_FULL",
"PerPkg": "1",
@@ -2154,6 +2354,7 @@
},
{
"BriefDescription": ": IOMMU memory access",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES",
"PerPkg": "1",
@@ -2163,6 +2364,7 @@
},
{
"BriefDescription": ": PWC Hit to a 1G page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_1G_HITS",
"PerPkg": "1",
@@ -2172,6 +2374,7 @@
},
{
"BriefDescription": ": PWC Hit to a 2M page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_2M_HITS",
"PerPkg": "1",
@@ -2181,6 +2384,7 @@
},
{
"BriefDescription": ": PWC Hit to a 4K page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_4K_HITS",
"PerPkg": "1",
@@ -2190,6 +2394,7 @@
},
{
"BriefDescription": ": PWT Hit to a 256T page",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_512G_HITS",
"PerPkg": "1",
@@ -2199,6 +2404,7 @@
},
{
"BriefDescription": ": PageWalk cache fill",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWC_CACHE_FILLS",
"PerPkg": "1",
@@ -2208,6 +2414,7 @@
},
{
"BriefDescription": ": PageWalk cache lookup",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_IIO_IOMMU1.PWT_CACHE_LOOKUPS",
"PerPkg": "1",
@@ -2217,6 +2424,7 @@
},
{
"BriefDescription": ": Interrupt Entry cache hit",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.INT_CACHE_HITS",
"PerPkg": "1",
@@ -2226,6 +2434,7 @@
},
{
"BriefDescription": ": Interrupt Entry cache lookup",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.INT_CACHE_LOOKUPS",
"PerPkg": "1",
@@ -2235,6 +2444,7 @@
},
{
"BriefDescription": ": Device-selective Context cache invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DEVICE",
"PerPkg": "1",
@@ -2244,6 +2454,7 @@
},
{
"BriefDescription": ": Domain-selective Context cache invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_DOMAIN",
"PerPkg": "1",
@@ -2253,6 +2464,7 @@
},
{
"BriefDescription": ": Context cache global invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.NUM_CTXT_CACHE_INVAL_GBL",
"PerPkg": "1",
@@ -2262,6 +2474,7 @@
},
{
"BriefDescription": ": Domain-selective IOTLB invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.NUM_INVAL_DOMAIN",
"PerPkg": "1",
@@ -2271,6 +2484,7 @@
},
{
"BriefDescription": ": Global IOTLB invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.NUM_INVAL_GBL",
"PerPkg": "1",
@@ -2280,6 +2494,7 @@
},
{
"BriefDescription": ": Page-selective IOTLB invalidation cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_IIO_IOMMU3.NUM_INVAL_PAGE",
"PerPkg": "1",
@@ -2289,6 +2504,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0",
"PerPkg": "1",
@@ -2298,6 +2514,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_BUS1",
"PerPkg": "1",
@@ -2307,6 +2524,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : Non-PCIE bus and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -2316,6 +2534,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.BUS1",
"PerPkg": "1",
@@ -2325,6 +2544,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus) and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_BUS1",
"PerPkg": "1",
@@ -2334,6 +2554,7 @@
},
{
"BriefDescription": "AND Mask/match for debug bus : !(Non-PCIE bus) and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x02",
"EventName": "UNC_IIO_MASK_MATCH_AND.NOT_BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -2343,6 +2564,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0",
"PerPkg": "1",
@@ -2352,6 +2574,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_BUS1",
"PerPkg": "1",
@@ -2361,6 +2584,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : Non-PCIE bus and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -2370,6 +2594,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.BUS1",
"PerPkg": "1",
@@ -2379,6 +2604,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus) and PCIE bus",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_BUS1",
"PerPkg": "1",
@@ -2388,6 +2614,7 @@
},
{
"BriefDescription": "OR Mask/match for debug bus : !(Non-PCIE bus) and !(PCIE bus)",
+ "Counter": "0,1",
"EventCode": "0x03",
"EventName": "UNC_IIO_MASK_MATCH_OR.NOT_BUS0_NOT_BUS1",
"PerPkg": "1",
@@ -2397,6 +2624,7 @@
},
{
"BriefDescription": "Counting disabled",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_IIO_NOTHING",
"PerPkg": "1",
@@ -2404,6 +2632,7 @@
},
{
"BriefDescription": "Occupancy of outbound request queue : To device",
+ "Counter": "2,3",
"EventCode": "0xC5",
"EventName": "UNC_IIO_NUM_OUSTANDING_REQ_FROM_CPU.TO_IO",
"FCMask": "0x07",
@@ -2415,6 +2644,7 @@
},
{
"BriefDescription": ": Passing data to be written",
+ "Counter": "2,3",
"EventCode": "0x88",
"EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.DATA",
"FCMask": "0x07",
@@ -2426,6 +2656,7 @@
},
{
"BriefDescription": ": Issuing final read or write of line",
+ "Counter": "2,3",
"EventCode": "0x88",
"EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.FINAL_RD_WR",
"FCMask": "0x07",
@@ -2436,6 +2667,7 @@
},
{
"BriefDescription": ": Processing response from IOMMU",
+ "Counter": "2,3",
"EventCode": "0x88",
"EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_HIT",
"FCMask": "0x07",
@@ -2446,6 +2678,7 @@
},
{
"BriefDescription": ": Issuing to IOMMU",
+ "Counter": "2,3",
"EventCode": "0x88",
"EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.IOMMU_REQ",
"FCMask": "0x07",
@@ -2456,6 +2689,7 @@
},
{
"BriefDescription": ": Request Ownership",
+ "Counter": "2,3",
"EventCode": "0x88",
"EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.REQ_OWN",
"FCMask": "0x07",
@@ -2467,6 +2701,7 @@
},
{
"BriefDescription": ": Writing line",
+ "Counter": "2,3",
"EventCode": "0x88",
"EventName": "UNC_IIO_NUM_OUTSTANDING_REQ_OF_CPU.WR",
"FCMask": "0x07",
@@ -2478,6 +2713,7 @@
},
{
"BriefDescription": "Number requests sent to PCIe from main die : From IRP",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_NUM_REQ_FROM_CPU.IRP",
"FCMask": "0x07",
@@ -2489,6 +2725,7 @@
},
{
"BriefDescription": "Number requests sent to PCIe from main die : From ITC",
+ "Counter": "0,1,2,3",
"EventCode": "0xC2",
"EventName": "UNC_IIO_NUM_REQ_FROM_CPU.ITC",
"FCMask": "0x07",
@@ -2500,6 +2737,7 @@
},
{
"BriefDescription": "Number requests sent to PCIe from main die : Completion allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0xc2",
"EventName": "UNC_IIO_NUM_REQ_FROM_CPU.PREALLOC",
"FCMask": "0x07",
@@ -2510,6 +2748,7 @@
},
{
"BriefDescription": "Number requests PCIe makes of the main die : Drop request",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU.ALL.DROP",
"FCMask": "0x07",
@@ -2521,6 +2760,7 @@
},
{
"BriefDescription": "Number requests PCIe makes of the main die : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU.COMMIT.ALL",
"FCMask": "0x07",
@@ -2532,6 +2772,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Abort",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT",
"FCMask": "0x07",
@@ -2542,6 +2783,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Confined P2P",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P",
"FCMask": "0x07",
@@ -2552,6 +2794,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Local P2P",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P",
"FCMask": "0x07",
@@ -2562,6 +2805,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Multi-cast",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST",
"FCMask": "0x07",
@@ -2572,6 +2816,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM",
"FCMask": "0x07",
@@ -2582,6 +2827,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : MsgB",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB",
"FCMask": "0x07",
@@ -2592,6 +2838,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Remote P2P",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.REM_P2P",
"FCMask": "0x07",
@@ -2602,6 +2849,7 @@
},
{
"BriefDescription": "Num requests sent by PCIe - by target : Ubox",
+ "Counter": "0,1,2,3",
"EventCode": "0x8E",
"EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX",
"FCMask": "0x07",
@@ -2612,6 +2860,7 @@
},
{
"BriefDescription": "ITC address map 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8F",
"EventName": "UNC_IIO_NUM_TGT_MATCHED_REQ_OF_CPU",
"PerPkg": "1",
@@ -2619,6 +2868,7 @@
},
{
"BriefDescription": "Outbound cacheline requests issued : 64B requests issued to device",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_IIO_OUTBOUND_CL_REQS_ISSUED.TO_IO",
"FCMask": "0x07",
@@ -2630,6 +2880,7 @@
},
{
"BriefDescription": "Outbound TLP (transaction layer packet) requests issued : To device",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_IIO_OUTBOUND_TLP_REQS_ISSUED.TO_IO",
"FCMask": "0x07",
@@ -2641,6 +2892,7 @@
},
{
"BriefDescription": "PWT occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_IIO_PWT_OCCUPANCY",
"PerPkg": "1",
@@ -2649,6 +2901,7 @@
},
{
"BriefDescription": "PCIe Request - cacheline complete : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.DATA",
"FCMask": "0x07",
@@ -2660,6 +2913,7 @@
},
{
"BriefDescription": "PCIe Request - cacheline complete : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.FINAL_RD_WR",
"FCMask": "0x07",
@@ -2671,6 +2925,7 @@
},
{
"BriefDescription": "PCIe Request - cacheline complete : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.REQ_OWN",
"FCMask": "0x07",
@@ -2682,6 +2937,7 @@
},
{
"BriefDescription": "PCIe Request - cacheline complete : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CL_CMPL.WR",
"FCMask": "0x07",
@@ -2693,6 +2949,7 @@
},
{
"BriefDescription": "PCIe Request complete : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.DATA",
"FCMask": "0x07",
@@ -2704,6 +2961,7 @@
},
{
"BriefDescription": "PCIe Request complete : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.FINAL_RD_WR",
"FCMask": "0x07",
@@ -2715,6 +2973,7 @@
},
{
"BriefDescription": "PCIe Request complete : Processing response from IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_HIT",
"FCMask": "0x07",
@@ -2726,6 +2985,7 @@
},
{
"BriefDescription": "PCIe Request complete : Issuing to IOMMU",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.IOMMU_REQ",
"FCMask": "0x07",
@@ -2737,6 +2997,7 @@
},
{
"BriefDescription": "PCIe Request complete : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.REQ_OWN",
"FCMask": "0x07",
@@ -2748,6 +3009,7 @@
},
{
"BriefDescription": "PCIe Request complete : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_IIO_REQ_FROM_PCIE_CMPL.WR",
"FCMask": "0x07",
@@ -2759,6 +3021,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Passing data to be written",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.DATA",
"FCMask": "0x07",
@@ -2770,6 +3033,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Issuing final read or write of line",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.FINAL_RD_WR",
"FCMask": "0x07",
@@ -2781,6 +3045,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Request Ownership",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.REQ_OWN",
"FCMask": "0x07",
@@ -2792,6 +3057,7 @@
},
{
"BriefDescription": "PCIe Request - pass complete : Writing line",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_IIO_REQ_FROM_PCIE_PASS_CMPL.WR",
"FCMask": "0x07",
@@ -2803,6 +3069,7 @@
},
{
"BriefDescription": "Symbol Times on Link",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_IIO_SYMBOL_TIMES",
"PerPkg": "1",
@@ -2811,6 +3078,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU0",
"FCMask": "0x07",
@@ -2822,6 +3090,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.IOMMU1",
"FCMask": "0x07",
@@ -2833,6 +3102,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART0",
"FCMask": "0x07",
@@ -2844,6 +3114,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART1",
"FCMask": "0x07",
@@ -2855,6 +3126,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART2",
"FCMask": "0x07",
@@ -2866,6 +3138,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART3",
"FCMask": "0x07",
@@ -2877,6 +3150,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART4",
"FCMask": "0x07",
@@ -2888,6 +3162,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART5",
"FCMask": "0x07",
@@ -2899,6 +3174,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART6",
"FCMask": "0x07",
@@ -2910,6 +3186,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_READ.PART7",
"FCMask": "0x07",
@@ -2921,6 +3198,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -2932,6 +3210,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -2943,6 +3222,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART0",
"FCMask": "0x07",
@@ -2954,6 +3234,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART1",
"FCMask": "0x07",
@@ -2965,6 +3246,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART2",
"FCMask": "0x07",
@@ -2976,6 +3258,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART3",
"FCMask": "0x07",
@@ -2987,6 +3270,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART4",
"FCMask": "0x07",
@@ -2998,6 +3282,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART5",
"FCMask": "0x07",
@@ -3009,6 +3294,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART6",
"FCMask": "0x07",
@@ -3020,6 +3306,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's PCICFG space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.CFG_WRITE.PART7",
"FCMask": "0x07",
@@ -3031,6 +3318,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU0",
"FCMask": "0x07",
@@ -3042,6 +3330,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.IOMMU1",
"FCMask": "0x07",
@@ -3053,6 +3342,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART0",
"FCMask": "0x07",
@@ -3064,6 +3354,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART1",
"FCMask": "0x07",
@@ -3075,6 +3366,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART2",
"FCMask": "0x07",
@@ -3086,6 +3378,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART3",
"FCMask": "0x07",
@@ -3097,6 +3390,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART4",
"FCMask": "0x07",
@@ -3108,6 +3402,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART5",
"FCMask": "0x07",
@@ -3119,6 +3414,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART6",
"FCMask": "0x07",
@@ -3130,6 +3426,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_READ.PART7",
"FCMask": "0x07",
@@ -3141,6 +3438,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -3152,6 +3450,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -3163,6 +3462,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART0",
"FCMask": "0x07",
@@ -3174,6 +3474,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART1",
"FCMask": "0x07",
@@ -3185,6 +3486,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART2",
"FCMask": "0x07",
@@ -3196,6 +3498,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART3",
"FCMask": "0x07",
@@ -3207,6 +3510,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART4",
"FCMask": "0x07",
@@ -3218,6 +3522,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART5",
"FCMask": "0x07",
@@ -3229,6 +3534,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART6",
"FCMask": "0x07",
@@ -3240,6 +3546,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's IO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.IO_WRITE.PART7",
"FCMask": "0x07",
@@ -3251,6 +3558,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU0",
"FCMask": "0x07",
@@ -3262,6 +3570,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.IOMMU1",
"FCMask": "0x07",
@@ -3273,6 +3582,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -3284,6 +3594,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -3295,6 +3606,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -3306,6 +3618,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -3317,6 +3630,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -3328,6 +3642,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -3339,6 +3654,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -3350,6 +3666,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core reading from Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -3361,6 +3678,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -3372,6 +3690,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -3383,6 +3702,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -3394,6 +3714,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -3405,6 +3726,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -3416,6 +3738,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -3427,6 +3750,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -3438,6 +3762,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -3449,6 +3774,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -3460,6 +3786,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Core writing to Card's MMIO space",
+ "Counter": "0,1,2,3",
"EventCode": "0xc1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -3471,6 +3798,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU0",
"FCMask": "0x07",
@@ -3482,6 +3810,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.IOMMU1",
"FCMask": "0x07",
@@ -3493,6 +3822,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -3504,6 +3834,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -3515,6 +3846,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -3526,6 +3858,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -3537,6 +3870,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART4",
"FCMask": "0x07",
@@ -3548,6 +3882,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART5",
"FCMask": "0x07",
@@ -3559,6 +3894,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART6",
"FCMask": "0x07",
@@ -3570,6 +3906,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) reading from this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART7",
"FCMask": "0x07",
@@ -3581,6 +3918,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -3592,6 +3930,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -3603,6 +3942,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -3614,6 +3954,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -3625,6 +3966,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -3636,6 +3978,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -3647,6 +3990,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -3658,6 +4002,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -3669,6 +4014,7 @@
},
{
"BriefDescription": "Number Transactions requested by the CPU : Another card (different IIO stack) writing to this card.",
+ "Counter": "0,1,2,3",
"EventCode": "0xC1",
"EventName": "UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -3680,6 +4026,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU0",
"FCMask": "0x07",
@@ -3691,6 +4038,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.IOMMU1",
"FCMask": "0x07",
@@ -3702,6 +4050,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART0",
"FCMask": "0x07",
@@ -3713,6 +4062,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART1",
"FCMask": "0x07",
@@ -3724,6 +4074,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART2",
"FCMask": "0x07",
@@ -3735,6 +4086,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART3",
"FCMask": "0x07",
@@ -3746,6 +4098,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART4",
"FCMask": "0x07",
@@ -3757,6 +4110,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART5",
"FCMask": "0x07",
@@ -3768,6 +4122,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART6",
"FCMask": "0x07",
@@ -3779,6 +4134,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Atomic requests targeting DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.ATOMIC.PART7",
"FCMask": "0x07",
@@ -3790,6 +4146,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU0",
"FCMask": "0x07",
@@ -3801,6 +4158,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.IOMMU1",
"FCMask": "0x07",
@@ -3812,6 +4170,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART0",
"FCMask": "0x07",
@@ -3823,6 +4182,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART1",
"FCMask": "0x07",
@@ -3834,6 +4194,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART2",
"FCMask": "0x07",
@@ -3845,6 +4206,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART3",
"FCMask": "0x07",
@@ -3856,6 +4218,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART4",
"FCMask": "0x07",
@@ -3867,6 +4230,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART5",
"FCMask": "0x07",
@@ -3878,6 +4242,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART6",
"FCMask": "0x07",
@@ -3889,6 +4254,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : CmpD - device sending completion to CPU request",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.CMPD.PART7",
"FCMask": "0x07",
@@ -3900,6 +4266,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU0",
"FCMask": "0x07",
@@ -3911,6 +4278,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.IOMMU1",
"FCMask": "0x07",
@@ -3922,6 +4290,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0",
"FCMask": "0x07",
@@ -3933,6 +4302,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1",
"FCMask": "0x07",
@@ -3944,6 +4314,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2",
"FCMask": "0x07",
@@ -3955,6 +4326,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3",
"FCMask": "0x07",
@@ -3966,6 +4338,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4",
"FCMask": "0x07",
@@ -3977,6 +4350,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5",
"FCMask": "0x07",
@@ -3988,6 +4362,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6",
"FCMask": "0x07",
@@ -3999,6 +4374,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7",
"FCMask": "0x07",
@@ -4010,6 +4386,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -4021,6 +4398,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -4032,6 +4410,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",
"FCMask": "0x07",
@@ -4043,6 +4422,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",
"FCMask": "0x07",
@@ -4054,6 +4434,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",
"FCMask": "0x07",
@@ -4065,6 +4446,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",
"FCMask": "0x07",
@@ -4076,6 +4458,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4",
"FCMask": "0x07",
@@ -4087,6 +4470,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5",
"FCMask": "0x07",
@@ -4098,6 +4482,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6",
"FCMask": "0x07",
@@ -4109,6 +4494,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7",
"FCMask": "0x07",
@@ -4120,6 +4506,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU0",
"FCMask": "0x07",
@@ -4131,6 +4518,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.IOMMU1",
"FCMask": "0x07",
@@ -4142,6 +4530,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART0",
"FCMask": "0x07",
@@ -4153,6 +4542,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART1",
"FCMask": "0x07",
@@ -4164,6 +4554,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART2",
"FCMask": "0x07",
@@ -4175,6 +4566,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART3",
"FCMask": "0x07",
@@ -4186,6 +4578,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART4",
"FCMask": "0x07",
@@ -4197,6 +4590,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART5",
"FCMask": "0x07",
@@ -4208,6 +4602,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART6",
"FCMask": "0x07",
@@ -4219,6 +4614,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Messages",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.MSG.PART7",
"FCMask": "0x07",
@@ -4230,6 +4626,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU0",
"FCMask": "0x07",
@@ -4241,6 +4638,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.IOMMU1",
"FCMask": "0x07",
@@ -4252,6 +4650,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0",
"FCMask": "0x07",
@@ -4263,6 +4662,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1",
"FCMask": "0x07",
@@ -4274,6 +4674,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2",
"FCMask": "0x07",
@@ -4285,6 +4686,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3",
"FCMask": "0x07",
@@ -4296,6 +4698,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART4",
"FCMask": "0x07",
@@ -4307,6 +4710,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART5",
"FCMask": "0x07",
@@ -4318,6 +4722,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART6",
"FCMask": "0x07",
@@ -4329,6 +4734,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card reading from another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART7",
"FCMask": "0x07",
@@ -4340,6 +4746,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU0",
"FCMask": "0x07",
@@ -4351,6 +4758,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.IOMMU1",
"FCMask": "0x07",
@@ -4362,6 +4770,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0",
"FCMask": "0x07",
@@ -4373,6 +4782,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1",
"FCMask": "0x07",
@@ -4384,6 +4794,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2",
"FCMask": "0x07",
@@ -4395,6 +4806,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3",
"FCMask": "0x07",
@@ -4406,6 +4818,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4",
"FCMask": "0x07",
@@ -4417,6 +4830,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5",
"FCMask": "0x07",
@@ -4428,6 +4842,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6",
"FCMask": "0x07",
@@ -4439,6 +4854,7 @@
},
{
"BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7",
"FCMask": "0x07",
@@ -4450,6 +4866,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -4459,6 +4876,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -4468,6 +4886,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -4477,6 +4896,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -4486,6 +4906,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -4495,6 +4916,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -4504,6 +4926,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -4513,6 +4936,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -4522,6 +4946,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -4531,6 +4956,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -4540,6 +4966,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M2P_AG0_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -4549,6 +4976,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -4558,6 +4986,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -4567,6 +4996,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -4576,6 +5006,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -4585,6 +5016,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -4594,6 +5026,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -4603,6 +5036,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -4612,6 +5046,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -4621,6 +5056,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -4630,6 +5066,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -4639,6 +5076,7 @@
},
{
"BriefDescription": "CMS Agent0 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M2P_AG0_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -4648,6 +5086,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -4657,6 +5096,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -4666,6 +5106,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -4675,6 +5116,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -4684,6 +5126,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -4693,6 +5136,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -4702,6 +5146,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -4711,6 +5156,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x88",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -4720,6 +5166,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -4729,6 +5176,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -4738,6 +5186,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x89",
"EventName": "UNC_M2P_AG0_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -4747,6 +5196,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -4756,6 +5206,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -4765,6 +5216,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -4774,6 +5226,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -4783,6 +5236,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -4792,6 +5246,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -4801,6 +5256,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -4810,6 +5266,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8a",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -4819,6 +5276,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8b",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -4828,6 +5286,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8b",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -4837,6 +5296,7 @@
},
{
"BriefDescription": "CMS Agent0 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8b",
"EventName": "UNC_M2P_AG0_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -4846,6 +5306,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -4855,6 +5316,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -4864,6 +5326,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -4873,6 +5336,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -4882,6 +5346,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -4891,6 +5356,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -4900,6 +5366,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -4909,6 +5376,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x84",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -4918,6 +5386,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -4927,6 +5396,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -4936,6 +5406,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M2P_AG1_AD_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -4945,6 +5416,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -4954,6 +5426,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -4963,6 +5436,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -4972,6 +5446,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -4981,6 +5456,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -4990,6 +5466,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -4999,6 +5476,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -5008,6 +5486,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -5017,6 +5496,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -5026,6 +5506,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -5035,6 +5516,7 @@
},
{
"BriefDescription": "CMS Agent1 AD Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "UNC_M2P_AG1_AD_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -5044,6 +5526,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR0",
"PerPkg": "1",
@@ -5053,6 +5536,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR1",
"PerPkg": "1",
@@ -5062,6 +5546,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR2",
"PerPkg": "1",
@@ -5071,6 +5556,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR3",
"PerPkg": "1",
@@ -5080,6 +5566,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR4",
"PerPkg": "1",
@@ -5089,6 +5576,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR5",
"PerPkg": "1",
@@ -5098,6 +5586,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR6",
"PerPkg": "1",
@@ -5107,6 +5596,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8c",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED0.TGR7",
"PerPkg": "1",
@@ -5116,6 +5606,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8d",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR10",
"PerPkg": "1",
@@ -5125,6 +5616,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8d",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR8",
"PerPkg": "1",
@@ -5134,6 +5626,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Acquired : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8d",
"EventName": "UNC_M2P_AG1_BL_CRD_ACQUIRED1.TGR9",
"PerPkg": "1",
@@ -5143,6 +5636,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR0",
"PerPkg": "1",
@@ -5152,6 +5646,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR1",
"PerPkg": "1",
@@ -5161,6 +5656,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR2",
"PerPkg": "1",
@@ -5170,6 +5666,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR3",
"PerPkg": "1",
@@ -5179,6 +5676,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR4",
"PerPkg": "1",
@@ -5188,6 +5686,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR5",
"PerPkg": "1",
@@ -5197,6 +5696,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR6",
"PerPkg": "1",
@@ -5206,6 +5706,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0x8e",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY0.TGR7",
"PerPkg": "1",
@@ -5215,6 +5716,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0x8f",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR10",
"PerPkg": "1",
@@ -5224,6 +5726,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0x8f",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR8",
"PerPkg": "1",
@@ -5233,6 +5736,7 @@
},
{
"BriefDescription": "CMS Agent1 BL Credits Occupancy : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0x8f",
"EventName": "UNC_M2P_AG1_BL_CRD_OCCUPANCY1.TGR9",
"PerPkg": "1",
@@ -5242,6 +5746,7 @@
},
{
"BriefDescription": "Clockticks of the mesh to PCI (M2P)",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M2P_CLOCKTICKS",
"PerPkg": "1",
@@ -5250,6 +5755,7 @@
},
{
"BriefDescription": "CMS Clockticks",
+ "Counter": "0,1,2,3",
"EventCode": "0xc0",
"EventName": "UNC_M2P_CMS_CLOCKTICKS",
"PerPkg": "1",
@@ -5257,6 +5763,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xaf",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_LOCAL",
"PerPkg": "1",
@@ -5266,6 +5773,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xaf",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_NONLOCAL",
"PerPkg": "1",
@@ -5275,6 +5783,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xaf",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_IV",
"PerPkg": "1",
@@ -5284,6 +5793,7 @@
},
{
"BriefDescription": "Distress signal asserted : DPT Stalled - No Credit",
+ "Counter": "0,1,2,3",
"EventCode": "0xaf",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.DPT_STALL_NOCRD",
"PerPkg": "1",
@@ -5293,6 +5803,7 @@
},
{
"BriefDescription": "Distress signal asserted : Horizontal",
+ "Counter": "0,1,2,3",
"EventCode": "0xaf",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.HORZ",
"PerPkg": "1",
@@ -5302,6 +5813,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Local",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.PMM_LOCAL",
"PerPkg": "1",
@@ -5311,6 +5823,7 @@
},
{
"BriefDescription": "Distress signal asserted : PMM Remote",
+ "Counter": "0,1,2,3",
"EventCode": "0xAF",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.PMM_NONLOCAL",
"PerPkg": "1",
@@ -5320,6 +5833,7 @@
},
{
"BriefDescription": "Distress signal asserted : Vertical",
+ "Counter": "0,1,2,3",
"EventCode": "0xaf",
"EventName": "UNC_M2P_DISTRESS_ASSERTED.VERT",
"PerPkg": "1",
@@ -5329,6 +5843,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_DN",
"PerPkg": "1",
@@ -5338,6 +5853,7 @@
},
{
"BriefDescription": "Egress Blocking due to Ordering requirements : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xba",
"EventName": "UNC_M2P_EGRESS_ORDERING.IV_SNOOPGO_UP",
"PerPkg": "1",
@@ -5347,6 +5863,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb6",
"EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -5356,6 +5873,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb6",
"EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -5365,6 +5883,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb6",
"EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -5374,6 +5893,7 @@
},
{
"BriefDescription": "Horizontal AD Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb6",
"EventName": "UNC_M2P_HORZ_RING_AD_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5383,6 +5903,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xbb",
"EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -5392,6 +5913,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xbb",
"EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -5401,6 +5923,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xbb",
"EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -5410,6 +5933,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xbb",
"EventName": "UNC_M2P_HORZ_RING_AKC_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5419,6 +5943,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb7",
"EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -5428,6 +5953,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb7",
"EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -5437,6 +5963,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb7",
"EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -5446,6 +5973,7 @@
},
{
"BriefDescription": "Horizontal AK Ring In Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb7",
"EventName": "UNC_M2P_HORZ_RING_AK_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5455,6 +5983,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb8",
"EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_EVEN",
"PerPkg": "1",
@@ -5464,6 +5993,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Left and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb8",
"EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.LEFT_ODD",
"PerPkg": "1",
@@ -5473,6 +6003,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb8",
"EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_EVEN",
"PerPkg": "1",
@@ -5482,6 +6013,7 @@
},
{
"BriefDescription": "Horizontal BL Ring in Use : Right and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb8",
"EventName": "UNC_M2P_HORZ_RING_BL_IN_USE.RIGHT_ODD",
"PerPkg": "1",
@@ -5491,6 +6023,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Left",
+ "Counter": "0,1,2,3",
"EventCode": "0xb9",
"EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.LEFT",
"PerPkg": "1",
@@ -5500,6 +6033,7 @@
},
{
"BriefDescription": "Horizontal IV Ring in Use : Right",
+ "Counter": "0,1,2,3",
"EventCode": "0xb9",
"EventName": "UNC_M2P_HORZ_RING_IV_IN_USE.RIGHT",
"PerPkg": "1",
@@ -5509,6 +6043,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_0",
"PerPkg": "1",
@@ -5518,6 +6053,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.DRS_1",
"PerPkg": "1",
@@ -5527,6 +6063,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_0",
"PerPkg": "1",
@@ -5536,6 +6073,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCB_1",
"PerPkg": "1",
@@ -5545,6 +6083,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_0",
"PerPkg": "1",
@@ -5554,6 +6093,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credit Acquired : NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x33",
"EventName": "UNC_M2P_IIO_CREDITS_ACQUIRED.NCS_1",
"PerPkg": "1",
@@ -5563,6 +6103,7 @@
},
{
"BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2P_IIO_CREDITS_REJECT.DRS",
"PerPkg": "1",
@@ -5572,6 +6113,7 @@
},
{
"BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCB",
"PerPkg": "1",
@@ -5581,6 +6123,7 @@
},
{
"BriefDescription": "M2PCIe IIO Failed to Acquire a Credit : NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x34",
"EventName": "UNC_M2P_IIO_CREDITS_REJECT.NCS",
"PerPkg": "1",
@@ -5590,6 +6133,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_0",
"PerPkg": "1",
@@ -5599,6 +6143,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : DRS to CMS Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.DRS_1",
"PerPkg": "1",
@@ -5608,6 +6153,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_0",
"PerPkg": "1",
@@ -5617,6 +6163,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCB to CMS Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCB_1",
"PerPkg": "1",
@@ -5626,6 +6173,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_0",
"PerPkg": "1",
@@ -5635,6 +6183,7 @@
},
{
"BriefDescription": "M2PCIe IIO Credits in Use : NCS to CMS Port 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "UNC_M2P_IIO_CREDITS_USED.NCS_1",
"PerPkg": "1",
@@ -5644,6 +6193,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCB",
"PerPkg": "1",
@@ -5652,6 +6202,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF0_NCS",
"PerPkg": "1",
@@ -5660,6 +6211,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCB",
"PerPkg": "1",
@@ -5668,6 +6220,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF1_NCS",
"PerPkg": "1",
@@ -5676,6 +6229,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCB",
"PerPkg": "1",
@@ -5684,6 +6238,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF2_NCS",
"PerPkg": "1",
@@ -5692,6 +6247,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCB",
"PerPkg": "1",
@@ -5700,6 +6256,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_0.M2IOSF3_NCS",
"PerPkg": "1",
@@ -5708,6 +6265,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCB",
"PerPkg": "1",
@@ -5716,6 +6274,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF4_NCS",
"PerPkg": "1",
@@ -5724,6 +6283,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCB",
"PerPkg": "1",
@@ -5732,6 +6292,7 @@
},
{
"BriefDescription": "Local Dedicated P2P Credit Taken - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M2P_LOCAL_DED_P2P_CRD_TAKEN_1.M2IOSF5_NCS",
"PerPkg": "1",
@@ -5740,6 +6301,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCB",
"PerPkg": "1",
@@ -5748,6 +6310,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF0_NCS",
"PerPkg": "1",
@@ -5756,6 +6319,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCB",
"PerPkg": "1",
@@ -5764,6 +6328,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF1_NCS",
"PerPkg": "1",
@@ -5772,6 +6337,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCB",
"PerPkg": "1",
@@ -5780,6 +6346,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF2_NCS",
"PerPkg": "1",
@@ -5788,6 +6355,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCB",
"PerPkg": "1",
@@ -5796,6 +6364,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_0.MS2IOSF3_NCS",
"PerPkg": "1",
@@ -5804,6 +6373,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCB",
"PerPkg": "1",
@@ -5812,6 +6382,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF4_NCS",
"PerPkg": "1",
@@ -5820,6 +6391,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCB",
"PerPkg": "1",
@@ -5828,6 +6400,7 @@
},
{
"BriefDescription": "Local P2P Dedicated Credits Returned - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1a",
"EventName": "UNC_M2P_LOCAL_P2P_DED_RETURNED_1.MS2IOSF5_NCS",
"PerPkg": "1",
@@ -5836,6 +6409,7 @@
},
{
"BriefDescription": "Local P2P Shared Credits Returned : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -5844,6 +6418,7 @@
},
{
"BriefDescription": "Local P2P Shared Credits Returned : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -5852,6 +6427,7 @@
},
{
"BriefDescription": "Local P2P Shared Credits Returned : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M2P_LOCAL_P2P_SHAR_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -5860,6 +6436,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -5868,6 +6445,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -5876,6 +6454,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -5884,6 +6463,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent3",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_3",
"PerPkg": "1",
@@ -5892,6 +6472,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent4",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_4",
"PerPkg": "1",
@@ -5900,6 +6481,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Returned to credit ring : Agent5",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_RETURNED.AGENT_5",
"PerPkg": "1",
@@ -5908,6 +6490,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCB",
"PerPkg": "1",
@@ -5916,6 +6499,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF0_NCS",
"PerPkg": "1",
@@ -5924,6 +6508,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCB",
"PerPkg": "1",
@@ -5932,6 +6517,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF1_NCS",
"PerPkg": "1",
@@ -5940,6 +6526,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCB",
"PerPkg": "1",
@@ -5948,6 +6535,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF2_NCS",
"PerPkg": "1",
@@ -5956,6 +6544,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCB",
"PerPkg": "1",
@@ -5964,6 +6553,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x40",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_0.M2IOSF3_NCS",
"PerPkg": "1",
@@ -5972,6 +6562,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCB",
"PerPkg": "1",
@@ -5980,6 +6571,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF4_NCS",
"PerPkg": "1",
@@ -5988,6 +6580,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCB",
"PerPkg": "1",
@@ -5996,6 +6589,7 @@
},
{
"BriefDescription": "Local Shared P2P Credit Taken - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x41",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_TAKEN_1.M2IOSF5_NCS",
"PerPkg": "1",
@@ -6004,6 +6598,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCB",
"PerPkg": "1",
@@ -6012,6 +6607,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF0_NCS",
"PerPkg": "1",
@@ -6020,6 +6616,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCB",
"PerPkg": "1",
@@ -6028,6 +6625,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF1_NCS",
"PerPkg": "1",
@@ -6036,6 +6634,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCB",
"PerPkg": "1",
@@ -6044,6 +6643,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF2_NCS",
"PerPkg": "1",
@@ -6052,6 +6652,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF3 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCB",
"PerPkg": "1",
@@ -6060,6 +6661,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 0 : M2IOSF3 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_0.M2IOSF3_NCS",
"PerPkg": "1",
@@ -6068,6 +6670,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF4 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCB",
"PerPkg": "1",
@@ -6076,6 +6679,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF4 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF4_NCS",
"PerPkg": "1",
@@ -6084,6 +6688,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF5 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCB",
"PerPkg": "1",
@@ -6092,6 +6697,7 @@
},
{
"BriefDescription": "Waiting on Local Shared P2P Credit - 1 : M2IOSF5 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4b",
"EventName": "UNC_M2P_LOCAL_SHAR_P2P_CRD_WAIT_1.M2IOSF5_NCS",
"PerPkg": "1",
@@ -6100,6 +6706,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI0",
+ "Counter": "0,1,2,3",
"EventCode": "0xe6",
"EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST0",
"PerPkg": "1",
@@ -6108,6 +6715,7 @@
},
{
"BriefDescription": "Miscellaneous Events (mostly from MS2IDI) : Number of cycles MBE is high for MS2IDI1",
+ "Counter": "0,1,2,3",
"EventCode": "0xe6",
"EventName": "UNC_M2P_MISC_EXTERNAL.MBE_INST1",
"PerPkg": "1",
@@ -6116,6 +6724,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : All",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -6124,6 +6733,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Local NCB",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCB",
"PerPkg": "1",
@@ -6132,6 +6742,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Local NCS",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.LOCAL_NCS",
"PerPkg": "1",
@@ -6140,6 +6751,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Remote NCB",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCB",
"PerPkg": "1",
@@ -6148,6 +6760,7 @@
},
{
"BriefDescription": "P2P Credit Occupancy : Remote NCS",
+ "Counter": "0,1",
"EventCode": "0x14",
"EventName": "UNC_M2P_P2P_CRD_OCCUPANCY.REMOTE_NCS",
"PerPkg": "1",
@@ -6156,6 +6769,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.ALL",
"PerPkg": "1",
@@ -6164,6 +6778,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Local NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCB",
"PerPkg": "1",
@@ -6172,6 +6787,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Local NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.LOCAL_NCS",
"PerPkg": "1",
@@ -6180,6 +6796,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Remote NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCB",
"PerPkg": "1",
@@ -6188,6 +6805,7 @@
},
{
"BriefDescription": "Dedicated Credits Received : Remote NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M2P_P2P_DED_RECEIVED.REMOTE_NCS",
"PerPkg": "1",
@@ -6196,6 +6814,7 @@
},
{
"BriefDescription": "Shared Credits Received : All",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.ALL",
"PerPkg": "1",
@@ -6204,6 +6823,7 @@
},
{
"BriefDescription": "Shared Credits Received : Local NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCB",
"PerPkg": "1",
@@ -6212,6 +6832,7 @@
},
{
"BriefDescription": "Shared Credits Received : Local NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.LOCAL_NCS",
"PerPkg": "1",
@@ -6220,6 +6841,7 @@
},
{
"BriefDescription": "Shared Credits Received : Remote NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCB",
"PerPkg": "1",
@@ -6228,6 +6850,7 @@
},
{
"BriefDescription": "Shared Credits Received : Remote NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M2P_P2P_SHAR_RECEIVED.REMOTE_NCS",
"PerPkg": "1",
@@ -6236,6 +6859,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_DRS",
"PerPkg": "1",
@@ -6244,6 +6868,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCB",
"PerPkg": "1",
@@ -6252,6 +6877,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI0_NCS",
"PerPkg": "1",
@@ -6260,6 +6886,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_DRS",
"PerPkg": "1",
@@ -6268,6 +6895,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCB",
"PerPkg": "1",
@@ -6276,6 +6904,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 0 : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_0.UPI1_NCS",
"PerPkg": "1",
@@ -6284,6 +6913,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_DRS",
"PerPkg": "1",
@@ -6292,6 +6922,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCB",
"PerPkg": "1",
@@ -6300,6 +6931,7 @@
},
{
"BriefDescription": "Remote Dedicated P2P Credit Taken - 1 : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_M2P_REMOTE_DED_P2P_CRD_TAKEN_1.UPI2_NCS",
"PerPkg": "1",
@@ -6308,6 +6940,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCB",
"PerPkg": "1",
@@ -6316,6 +6949,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI0_NCS",
"PerPkg": "1",
@@ -6324,6 +6958,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCB",
"PerPkg": "1",
@@ -6332,6 +6967,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI1_NCS",
"PerPkg": "1",
@@ -6340,6 +6976,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCB",
"PerPkg": "1",
@@ -6348,6 +6985,7 @@
},
{
"BriefDescription": "Remote P2P Dedicated Credits Returned : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x1b",
"EventName": "UNC_M2P_REMOTE_P2P_DED_RETURNED.UPI2_NCS",
"PerPkg": "1",
@@ -6356,6 +6994,7 @@
},
{
"BriefDescription": "Remote P2P Shared Credits Returned : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -6364,6 +7003,7 @@
},
{
"BriefDescription": "Remote P2P Shared Credits Returned : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -6372,6 +7012,7 @@
},
{
"BriefDescription": "Remote P2P Shared Credits Returned : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M2P_REMOTE_P2P_SHAR_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -6380,6 +7021,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent0",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_0",
"PerPkg": "1",
@@ -6388,6 +7030,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent1",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_1",
"PerPkg": "1",
@@ -6396,6 +7039,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Returned to credit ring : Agent2",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_RETURNED.AGENT_2",
"PerPkg": "1",
@@ -6404,6 +7048,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_DRS",
"PerPkg": "1",
@@ -6412,6 +7057,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCB",
"PerPkg": "1",
@@ -6420,6 +7066,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI0_NCS",
"PerPkg": "1",
@@ -6428,6 +7075,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_DRS",
"PerPkg": "1",
@@ -6436,6 +7084,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCB",
"PerPkg": "1",
@@ -6444,6 +7093,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 0 : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_0.UPI1_NCS",
"PerPkg": "1",
@@ -6452,6 +7102,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_DRS",
"PerPkg": "1",
@@ -6460,6 +7111,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCB",
"PerPkg": "1",
@@ -6468,6 +7120,7 @@
},
{
"BriefDescription": "Remote Shared P2P Credit Taken - 1 : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_TAKEN_1.UPI2_NCS",
"PerPkg": "1",
@@ -6476,6 +7129,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_DRS",
"PerPkg": "1",
@@ -6484,6 +7138,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCB",
"PerPkg": "1",
@@ -6492,6 +7147,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI0 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI0_NCS",
"PerPkg": "1",
@@ -6500,6 +7156,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_DRS",
"PerPkg": "1",
@@ -6508,6 +7165,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCB",
"PerPkg": "1",
@@ -6516,6 +7174,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 0 : UPI1 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_0.UPI1_NCS",
"PerPkg": "1",
@@ -6524,6 +7183,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - DRS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_DRS",
"PerPkg": "1",
@@ -6532,6 +7192,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - NCB",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCB",
"PerPkg": "1",
@@ -6540,6 +7201,7 @@
},
{
"BriefDescription": "Waiting on Remote Shared P2P Credit - 1 : UPI2 - NCS",
+ "Counter": "0,1,2,3",
"EventCode": "0x4d",
"EventName": "UNC_M2P_REMOTE_SHAR_P2P_CRD_WAIT_1.UPI2_NCS",
"PerPkg": "1",
@@ -6548,6 +7210,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xac",
"EventName": "UNC_M2P_RING_BOUNCES_HORZ.AD",
"PerPkg": "1",
@@ -6557,6 +7220,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xac",
"EventName": "UNC_M2P_RING_BOUNCES_HORZ.AK",
"PerPkg": "1",
@@ -6566,6 +7230,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xac",
"EventName": "UNC_M2P_RING_BOUNCES_HORZ.BL",
"PerPkg": "1",
@@ -6575,6 +7240,7 @@
},
{
"BriefDescription": "Messages that bounced on the Horizontal Ring. : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xac",
"EventName": "UNC_M2P_RING_BOUNCES_HORZ.IV",
"PerPkg": "1",
@@ -6584,6 +7250,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xaa",
"EventName": "UNC_M2P_RING_BOUNCES_VERT.AD",
"PerPkg": "1",
@@ -6593,6 +7260,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xaa",
"EventName": "UNC_M2P_RING_BOUNCES_VERT.AK",
"PerPkg": "1",
@@ -6602,6 +7270,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring.",
+ "Counter": "0,1,2,3",
"EventCode": "0xaa",
"EventName": "UNC_M2P_RING_BOUNCES_VERT.AKC",
"PerPkg": "1",
@@ -6611,6 +7280,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xaa",
"EventName": "UNC_M2P_RING_BOUNCES_VERT.BL",
"PerPkg": "1",
@@ -6620,6 +7290,7 @@
},
{
"BriefDescription": "Messages that bounced on the Vertical Ring. : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xaa",
"EventName": "UNC_M2P_RING_BOUNCES_VERT.IV",
"PerPkg": "1",
@@ -6629,6 +7300,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xad",
"EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AD",
"PerPkg": "1",
@@ -6637,6 +7309,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xad",
"EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK",
"PerPkg": "1",
@@ -6645,6 +7318,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : Acknowledgements to Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xad",
"EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.AK_AG1",
"PerPkg": "1",
@@ -6653,6 +7327,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : BL",
+ "Counter": "0,1,2,3",
"EventCode": "0xad",
"EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.BL",
"PerPkg": "1",
@@ -6661,6 +7336,7 @@
},
{
"BriefDescription": "Sink Starvation on Horizontal Ring : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xad",
"EventName": "UNC_M2P_RING_SINK_STARVED_HORZ.IV",
"PerPkg": "1",
@@ -6669,6 +7345,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : AD",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AD",
"PerPkg": "1",
@@ -6677,6 +7354,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Acknowledgements to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AK",
"PerPkg": "1",
@@ -6685,6 +7363,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "UNC_M2P_RING_SINK_STARVED_VERT.AKC",
"PerPkg": "1",
@@ -6693,6 +7372,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Data Responses to core",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "UNC_M2P_RING_SINK_STARVED_VERT.BL",
"PerPkg": "1",
@@ -6701,6 +7381,7 @@
},
{
"BriefDescription": "Sink Starvation on Vertical Ring : Snoops of processor's cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "UNC_M2P_RING_SINK_STARVED_VERT.IV",
"PerPkg": "1",
@@ -6709,6 +7390,7 @@
},
{
"BriefDescription": "Source Throttle",
+ "Counter": "0,1,2,3",
"EventCode": "0xae",
"EventName": "UNC_M2P_RING_SRC_THRTL",
"PerPkg": "1",
@@ -6716,6 +7398,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.ALL",
"PerPkg": "1",
@@ -6725,6 +7408,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_IDI",
"PerPkg": "1",
@@ -6734,6 +7418,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCB",
"PerPkg": "1",
@@ -6743,6 +7428,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.CHA_NCS",
"PerPkg": "1",
@@ -6752,6 +7438,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCB",
"PerPkg": "1",
@@ -6761,6 +7448,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.IIO_NCS",
"PerPkg": "1",
@@ -6770,6 +7458,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCB",
"PerPkg": "1",
@@ -6779,6 +7468,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M2P_RxC_CYCLES_NE.UPI_NCS",
"PerPkg": "1",
@@ -6788,6 +7478,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.ALL",
"PerPkg": "1",
@@ -6797,6 +7488,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.CHA_IDI",
"PerPkg": "1",
@@ -6806,6 +7498,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.CHA_NCB",
"PerPkg": "1",
@@ -6815,6 +7508,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.CHA_NCS",
"PerPkg": "1",
@@ -6824,6 +7518,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.IIO_NCB",
"PerPkg": "1",
@@ -6833,6 +7528,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.IIO_NCS",
"PerPkg": "1",
@@ -6842,6 +7538,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.UPI_NCB",
"PerPkg": "1",
@@ -6851,6 +7548,7 @@
},
{
"BriefDescription": "Ingress (from CMS) Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M2P_RxC_INSERTS.UPI_NCS",
"PerPkg": "1",
@@ -6860,6 +7558,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_ALL",
"PerPkg": "1",
@@ -6869,6 +7568,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_CRD",
"PerPkg": "1",
@@ -6878,6 +7578,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M2P_RxR_BUSY_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -6887,6 +7588,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_ALL",
"PerPkg": "1",
@@ -6896,6 +7598,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_CRD",
"PerPkg": "1",
@@ -6905,6 +7608,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe5",
"EventName": "UNC_M2P_RxR_BUSY_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -6914,6 +7618,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -6923,6 +7628,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -6932,6 +7638,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -6941,6 +7648,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.AK",
"PerPkg": "1",
@@ -6950,6 +7658,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -6959,6 +7668,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -6968,6 +7678,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -6977,6 +7688,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -6986,6 +7698,7 @@
},
{
"BriefDescription": "Transgress Ingress Bypass : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xe2",
"EventName": "UNC_M2P_RxR_BYPASS.IV",
"PerPkg": "1",
@@ -6995,6 +7708,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.AD_ALL",
"PerPkg": "1",
@@ -7004,6 +7718,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.AD_CRD",
"PerPkg": "1",
@@ -7013,6 +7728,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -7022,6 +7738,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.AK",
"PerPkg": "1",
@@ -7031,6 +7748,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.BL_ALL",
"PerPkg": "1",
@@ -7040,6 +7758,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.BL_CRD",
"PerPkg": "1",
@@ -7049,6 +7768,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -7058,6 +7778,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IFV - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.IFV",
"PerPkg": "1",
@@ -7067,6 +7788,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xe3",
"EventName": "UNC_M2P_RxR_CRD_STARVED.IV",
"PerPkg": "1",
@@ -7076,6 +7798,7 @@
},
{
"BriefDescription": "Transgress Injection Starvation",
+ "Counter": "0,1,2,3",
"EventCode": "0xe4",
"EventName": "UNC_M2P_RxR_CRD_STARVED_1",
"PerPkg": "1",
@@ -7084,6 +7807,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -7093,6 +7817,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -7102,6 +7827,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -7111,6 +7837,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.AK",
"PerPkg": "1",
@@ -7120,6 +7847,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -7129,6 +7857,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -7138,6 +7867,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -7147,6 +7877,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -7156,6 +7887,7 @@
},
{
"BriefDescription": "Transgress Ingress Allocations : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xe1",
"EventName": "UNC_M2P_RxR_INSERTS.IV",
"PerPkg": "1",
@@ -7165,6 +7897,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -7174,6 +7907,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -7183,6 +7917,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -7192,6 +7927,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.AK",
"PerPkg": "1",
@@ -7201,6 +7937,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -7210,6 +7947,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -7219,6 +7957,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -7228,6 +7967,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -7237,6 +7977,7 @@
},
{
"BriefDescription": "Transgress Ingress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xe0",
"EventName": "UNC_M2P_RxR_OCCUPANCY.IV",
"PerPkg": "1",
@@ -7246,6 +7987,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR0",
"PerPkg": "1",
@@ -7255,6 +7997,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR1",
"PerPkg": "1",
@@ -7264,6 +8007,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR2",
"PerPkg": "1",
@@ -7273,6 +8017,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR3",
"PerPkg": "1",
@@ -7282,6 +8027,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR4",
"PerPkg": "1",
@@ -7291,6 +8037,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR5",
"PerPkg": "1",
@@ -7300,6 +8047,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR6",
"PerPkg": "1",
@@ -7309,6 +8057,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xd0",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG0.TGR7",
"PerPkg": "1",
@@ -7318,6 +8067,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR0",
"PerPkg": "1",
@@ -7327,6 +8077,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR1",
"PerPkg": "1",
@@ -7336,6 +8087,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR2",
"PerPkg": "1",
@@ -7345,6 +8097,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR3",
"PerPkg": "1",
@@ -7354,6 +8107,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR4",
"PerPkg": "1",
@@ -7363,6 +8117,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR5",
"PerPkg": "1",
@@ -7372,6 +8127,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR6",
"PerPkg": "1",
@@ -7381,6 +8137,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xd2",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_AD_AG1.TGR7",
"PerPkg": "1",
@@ -7390,6 +8147,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR0",
"PerPkg": "1",
@@ -7399,6 +8157,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR1",
"PerPkg": "1",
@@ -7408,6 +8167,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR2",
"PerPkg": "1",
@@ -7417,6 +8177,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR3",
"PerPkg": "1",
@@ -7426,6 +8187,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR4",
"PerPkg": "1",
@@ -7435,6 +8197,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR5",
"PerPkg": "1",
@@ -7444,6 +8207,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR6",
"PerPkg": "1",
@@ -7453,6 +8217,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xd4",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG0.TGR7",
"PerPkg": "1",
@@ -7462,6 +8227,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR0",
"PerPkg": "1",
@@ -7471,6 +8237,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR1",
"PerPkg": "1",
@@ -7480,6 +8247,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR2",
"PerPkg": "1",
@@ -7489,6 +8257,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 3",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR3",
"PerPkg": "1",
@@ -7498,6 +8267,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 4",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR4",
"PerPkg": "1",
@@ -7507,6 +8277,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 5",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR5",
"PerPkg": "1",
@@ -7516,6 +8287,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 6",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR6",
"PerPkg": "1",
@@ -7525,6 +8297,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 7",
+ "Counter": "0,1,2,3",
"EventCode": "0xd6",
"EventName": "UNC_M2P_STALL0_NO_TxR_HORZ_CRD_BL_AG1.TGR7",
"PerPkg": "1",
@@ -7534,6 +8307,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xd1",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR10",
"PerPkg": "1",
@@ -7543,6 +8317,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xd1",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR8",
"PerPkg": "1",
@@ -7552,6 +8327,7 @@
},
{
"BriefDescription": "Stall on No AD Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xd1",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG0.TGR9",
"PerPkg": "1",
@@ -7561,6 +8337,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR10",
"PerPkg": "1",
@@ -7570,6 +8347,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR8",
"PerPkg": "1",
@@ -7579,6 +8357,7 @@
},
{
"BriefDescription": "Stall on No AD Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xd3",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_AD_AG1_1.TGR9",
"PerPkg": "1",
@@ -7588,6 +8367,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR10",
"PerPkg": "1",
@@ -7597,6 +8377,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR8",
"PerPkg": "1",
@@ -7606,6 +8387,7 @@
},
{
"BriefDescription": "Stall on No BL Agent0 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xd5",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG0_1.TGR9",
"PerPkg": "1",
@@ -7615,6 +8397,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 10",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR10",
"PerPkg": "1",
@@ -7624,6 +8407,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 8",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR8",
"PerPkg": "1",
@@ -7633,6 +8417,7 @@
},
{
"BriefDescription": "Stall on No BL Agent1 Transgress Credits : For Transgress 9",
+ "Counter": "0,1,2,3",
"EventCode": "0xd7",
"EventName": "UNC_M2P_STALL1_NO_TxR_HORZ_CRD_BL_AG1_1.TGR9",
"PerPkg": "1",
@@ -7642,6 +8427,7 @@
},
{
"BriefDescription": "UNC_M2P_TxC_CREDITS.PMM",
+ "Counter": "0,1",
"EventCode": "0x2D",
"EventName": "UNC_M2P_TxC_CREDITS.PMM",
"PerPkg": "1",
@@ -7650,6 +8436,7 @@
},
{
"BriefDescription": "UNC_M2P_TxC_CREDITS.PRQ",
+ "Counter": "0,1",
"EventCode": "0x2d",
"EventName": "UNC_M2P_TxC_CREDITS.PRQ",
"PerPkg": "1",
@@ -7658,6 +8445,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_0",
"PerPkg": "1",
@@ -7667,6 +8455,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.AD_1",
"PerPkg": "1",
@@ -7676,6 +8465,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_0",
"PerPkg": "1",
@@ -7685,6 +8475,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.AK_1",
"PerPkg": "1",
@@ -7694,6 +8485,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_0",
"PerPkg": "1",
@@ -7703,6 +8495,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.BL_1",
"PerPkg": "1",
@@ -7712,6 +8505,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_0",
"PerPkg": "1",
@@ -7721,6 +8515,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x25",
"EventName": "UNC_M2P_TxC_CYCLES_FULL.PMM_BLOCK_1",
"PerPkg": "1",
@@ -7730,6 +8525,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.AD_0",
"PerPkg": "1",
@@ -7739,6 +8535,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.AD_1",
"PerPkg": "1",
@@ -7748,6 +8545,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.AK_0",
"PerPkg": "1",
@@ -7757,6 +8555,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.AK_1",
"PerPkg": "1",
@@ -7766,6 +8565,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.BL_0",
"PerPkg": "1",
@@ -7775,6 +8575,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.BL_1",
"PerPkg": "1",
@@ -7784,6 +8585,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_0",
"PerPkg": "1",
@@ -7793,6 +8595,7 @@
},
{
"BriefDescription": "Egress (to CMS) Cycles Not Empty",
+ "Counter": "0,1",
"EventCode": "0x23",
"EventName": "UNC_M2P_TxC_CYCLES_NE.PMM_DISTRESS_1",
"PerPkg": "1",
@@ -7802,6 +8605,7 @@
},
{
"BriefDescription": "Egress (to CMS) Ingress",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2P_TxC_INSERTS.AD_0",
"PerPkg": "1",
@@ -7811,6 +8615,7 @@
},
{
"BriefDescription": "Egress (to CMS) Ingress",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2P_TxC_INSERTS.AD_1",
"PerPkg": "1",
@@ -7820,6 +8625,7 @@
},
{
"BriefDescription": "Egress (to CMS) Ingress",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_0",
"PerPkg": "1",
@@ -7829,6 +8635,7 @@
},
{
"BriefDescription": "Egress (to CMS) Ingress",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2P_TxC_INSERTS.AK_CRD_1",
"PerPkg": "1",
@@ -7838,6 +8645,7 @@
},
{
"BriefDescription": "Egress (to CMS) Ingress",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2P_TxC_INSERTS.BL_0",
"PerPkg": "1",
@@ -7847,6 +8655,7 @@
},
{
"BriefDescription": "Egress (to CMS) Ingress",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M2P_TxC_INSERTS.BL_1",
"PerPkg": "1",
@@ -7856,6 +8665,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa6",
"EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_ALL",
"PerPkg": "1",
@@ -7865,6 +8675,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa6",
"EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_CRD",
"PerPkg": "1",
@@ -7874,6 +8685,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa6",
"EventName": "UNC_M2P_TxR_HORZ_ADS_USED.AD_UNCRD",
"PerPkg": "1",
@@ -7883,6 +8695,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa6",
"EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_ALL",
"PerPkg": "1",
@@ -7892,6 +8705,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa6",
"EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_CRD",
"PerPkg": "1",
@@ -7901,6 +8715,7 @@
},
{
"BriefDescription": "CMS Horizontal ADS Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa6",
"EventName": "UNC_M2P_TxR_HORZ_ADS_USED.BL_UNCRD",
"PerPkg": "1",
@@ -7910,6 +8725,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_ALL",
"PerPkg": "1",
@@ -7919,6 +8735,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_CRD",
"PerPkg": "1",
@@ -7928,6 +8745,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.AD_UNCRD",
"PerPkg": "1",
@@ -7937,6 +8755,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.AK",
"PerPkg": "1",
@@ -7946,6 +8765,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.AKC_UNCRD",
"PerPkg": "1",
@@ -7955,6 +8775,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_ALL",
"PerPkg": "1",
@@ -7964,6 +8785,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_CRD",
"PerPkg": "1",
@@ -7973,6 +8795,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.BL_UNCRD",
"PerPkg": "1",
@@ -7982,6 +8805,7 @@
},
{
"BriefDescription": "CMS Horizontal Bypass Used : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa7",
"EventName": "UNC_M2P_TxR_HORZ_BYPASS.IV",
"PerPkg": "1",
@@ -7991,6 +8815,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_ALL",
"PerPkg": "1",
@@ -8000,6 +8825,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_CRD",
"PerPkg": "1",
@@ -8009,6 +8835,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AD_UNCRD",
"PerPkg": "1",
@@ -8018,6 +8845,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AK",
"PerPkg": "1",
@@ -8027,6 +8855,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.AKC_UNCRD",
"PerPkg": "1",
@@ -8036,6 +8865,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_ALL",
"PerPkg": "1",
@@ -8045,6 +8875,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_CRD",
"PerPkg": "1",
@@ -8054,6 +8885,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.BL_UNCRD",
"PerPkg": "1",
@@ -8063,6 +8895,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Full : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa2",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_FULL.IV",
"PerPkg": "1",
@@ -8072,6 +8905,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_ALL",
"PerPkg": "1",
@@ -8081,6 +8915,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_CRD",
"PerPkg": "1",
@@ -8090,6 +8925,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AD_UNCRD",
"PerPkg": "1",
@@ -8099,6 +8935,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AK",
"PerPkg": "1",
@@ -8108,6 +8945,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.AKC_UNCRD",
"PerPkg": "1",
@@ -8117,6 +8955,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_ALL",
"PerPkg": "1",
@@ -8126,6 +8965,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_CRD",
"PerPkg": "1",
@@ -8135,6 +8975,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.BL_UNCRD",
"PerPkg": "1",
@@ -8144,6 +8985,7 @@
},
{
"BriefDescription": "Cycles CMS Horizontal Egress Queue is Not Empty : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa3",
"EventName": "UNC_M2P_TxR_HORZ_CYCLES_NE.IV",
"PerPkg": "1",
@@ -8153,6 +8995,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_ALL",
"PerPkg": "1",
@@ -8162,6 +9005,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_CRD",
"PerPkg": "1",
@@ -8171,6 +9015,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.AD_UNCRD",
"PerPkg": "1",
@@ -8180,6 +9025,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.AK",
"PerPkg": "1",
@@ -8189,6 +9035,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.AKC_UNCRD",
"PerPkg": "1",
@@ -8198,6 +9045,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_ALL",
"PerPkg": "1",
@@ -8207,6 +9055,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_CRD",
"PerPkg": "1",
@@ -8216,6 +9065,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.BL_UNCRD",
"PerPkg": "1",
@@ -8225,6 +9075,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Inserts : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa1",
"EventName": "UNC_M2P_TxR_HORZ_INSERTS.IV",
"PerPkg": "1",
@@ -8234,6 +9085,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.AD_ALL",
"PerPkg": "1",
@@ -8243,6 +9095,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.AD_CRD",
"PerPkg": "1",
@@ -8252,6 +9105,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.AD_UNCRD",
"PerPkg": "1",
@@ -8261,6 +9115,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.AK",
"PerPkg": "1",
@@ -8270,6 +9125,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.AKC_UNCRD",
"PerPkg": "1",
@@ -8279,6 +9135,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.BL_ALL",
"PerPkg": "1",
@@ -8288,6 +9145,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.BL_CRD",
"PerPkg": "1",
@@ -8297,6 +9155,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.BL_UNCRD",
"PerPkg": "1",
@@ -8306,6 +9165,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa4",
"EventName": "UNC_M2P_TxR_HORZ_NACK.IV",
"PerPkg": "1",
@@ -8315,6 +9175,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_ALL",
"PerPkg": "1",
@@ -8324,6 +9185,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_CRD",
"PerPkg": "1",
@@ -8333,6 +9195,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AD_UNCRD",
"PerPkg": "1",
@@ -8342,6 +9205,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AK",
"PerPkg": "1",
@@ -8351,6 +9215,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.AKC_UNCRD",
"PerPkg": "1",
@@ -8360,6 +9225,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_ALL",
"PerPkg": "1",
@@ -8369,6 +9235,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Credited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_CRD",
"PerPkg": "1",
@@ -8378,6 +9245,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.BL_UNCRD",
"PerPkg": "1",
@@ -8387,6 +9255,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Occupancy : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa0",
"EventName": "UNC_M2P_TxR_HORZ_OCCUPANCY.IV",
"PerPkg": "1",
@@ -8396,6 +9265,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_ALL",
"PerPkg": "1",
@@ -8405,6 +9275,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AD - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.AD_UNCRD",
"PerPkg": "1",
@@ -8414,6 +9285,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AK",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.AK",
"PerPkg": "1",
@@ -8423,6 +9295,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : AKC - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.AKC_UNCRD",
"PerPkg": "1",
@@ -8432,6 +9305,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - All",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_ALL",
"PerPkg": "1",
@@ -8441,6 +9315,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : BL - Uncredited",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.BL_UNCRD",
"PerPkg": "1",
@@ -8450,6 +9325,7 @@
},
{
"BriefDescription": "CMS Horizontal Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0xa5",
"EventName": "UNC_M2P_TxR_HORZ_STARVED.IV",
"PerPkg": "1",
@@ -8459,6 +9335,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9c",
"EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG0",
"PerPkg": "1",
@@ -8468,6 +9345,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9c",
"EventName": "UNC_M2P_TxR_VERT_ADS_USED.AD_AG1",
"PerPkg": "1",
@@ -8477,6 +9355,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9c",
"EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG0",
"PerPkg": "1",
@@ -8486,6 +9365,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9c",
"EventName": "UNC_M2P_TxR_VERT_ADS_USED.BL_AG1",
"PerPkg": "1",
@@ -8495,6 +9375,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG0",
"PerPkg": "1",
@@ -8504,6 +9385,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.AD_AG1",
"PerPkg": "1",
@@ -8513,6 +9395,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG0",
"PerPkg": "1",
@@ -8522,6 +9405,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.AK_AG1",
"PerPkg": "1",
@@ -8531,6 +9415,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG0",
"PerPkg": "1",
@@ -8540,6 +9425,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.BL_AG1",
"PerPkg": "1",
@@ -8549,6 +9435,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : IV - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9d",
"EventName": "UNC_M2P_TxR_VERT_BYPASS.IV_AG1",
"PerPkg": "1",
@@ -8558,6 +9445,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9e",
"EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG0",
"PerPkg": "1",
@@ -8567,6 +9455,7 @@
},
{
"BriefDescription": "CMS Vertical ADS Used : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9e",
"EventName": "UNC_M2P_TxR_VERT_BYPASS_1.AKC_AG1",
"PerPkg": "1",
@@ -8576,6 +9465,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG0",
"PerPkg": "1",
@@ -8585,6 +9475,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AD_AG1",
"PerPkg": "1",
@@ -8594,6 +9485,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG0",
"PerPkg": "1",
@@ -8603,6 +9495,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.AK_AG1",
"PerPkg": "1",
@@ -8612,6 +9505,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG0",
"PerPkg": "1",
@@ -8621,6 +9515,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.BL_AG1",
"PerPkg": "1",
@@ -8630,6 +9525,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x94",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL0.IV_AG0",
"PerPkg": "1",
@@ -8639,6 +9535,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG0",
"PerPkg": "1",
@@ -8648,6 +9545,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Full : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x95",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_FULL1.AKC_AG1",
"PerPkg": "1",
@@ -8657,6 +9555,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG0",
"PerPkg": "1",
@@ -8666,6 +9565,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AD_AG1",
"PerPkg": "1",
@@ -8675,6 +9575,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG0",
"PerPkg": "1",
@@ -8684,6 +9585,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.AK_AG1",
"PerPkg": "1",
@@ -8693,6 +9595,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG0",
"PerPkg": "1",
@@ -8702,6 +9605,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.BL_AG1",
"PerPkg": "1",
@@ -8711,6 +9615,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x96",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE0.IV_AG0",
"PerPkg": "1",
@@ -8720,6 +9625,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG0",
"PerPkg": "1",
@@ -8729,6 +9635,7 @@
},
{
"BriefDescription": "Cycles CMS Vertical Egress Queue Is Not Empty : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x97",
"EventName": "UNC_M2P_TxR_VERT_CYCLES_NE1.AKC_AG1",
"PerPkg": "1",
@@ -8738,6 +9645,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG0",
"PerPkg": "1",
@@ -8747,6 +9655,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.AD_AG1",
"PerPkg": "1",
@@ -8756,6 +9665,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG0",
"PerPkg": "1",
@@ -8765,6 +9675,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.AK_AG1",
"PerPkg": "1",
@@ -8774,6 +9685,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG0",
"PerPkg": "1",
@@ -8783,6 +9695,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.BL_AG1",
"PerPkg": "1",
@@ -8792,6 +9705,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x92",
"EventName": "UNC_M2P_TxR_VERT_INSERTS0.IV_AG0",
"PerPkg": "1",
@@ -8801,6 +9715,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG0",
"PerPkg": "1",
@@ -8810,6 +9725,7 @@
},
{
"BriefDescription": "CMS Vert Egress Allocations : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x93",
"EventName": "UNC_M2P_TxR_VERT_INSERTS1.AKC_AG1",
"PerPkg": "1",
@@ -8819,6 +9735,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG0",
"PerPkg": "1",
@@ -8828,6 +9745,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.AD_AG1",
"PerPkg": "1",
@@ -8837,6 +9755,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG0",
"PerPkg": "1",
@@ -8846,6 +9765,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.AK_AG1",
"PerPkg": "1",
@@ -8855,6 +9775,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG0",
"PerPkg": "1",
@@ -8864,6 +9785,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.BL_AG1",
"PerPkg": "1",
@@ -8873,6 +9795,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x98",
"EventName": "UNC_M2P_TxR_VERT_NACK0.IV_AG0",
"PerPkg": "1",
@@ -8882,6 +9805,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG0",
"PerPkg": "1",
@@ -8891,6 +9815,7 @@
},
{
"BriefDescription": "CMS Vertical Egress NACKs : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x99",
"EventName": "UNC_M2P_TxR_VERT_NACK1.AKC_AG1",
"PerPkg": "1",
@@ -8900,6 +9825,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG0",
"PerPkg": "1",
@@ -8909,6 +9835,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AD_AG1",
"PerPkg": "1",
@@ -8918,6 +9845,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG0",
"PerPkg": "1",
@@ -8927,6 +9855,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.AK_AG1",
"PerPkg": "1",
@@ -8936,6 +9865,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG0",
"PerPkg": "1",
@@ -8945,6 +9875,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.BL_AG1",
"PerPkg": "1",
@@ -8954,6 +9885,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : IV - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x90",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY0.IV_AG0",
"PerPkg": "1",
@@ -8963,6 +9895,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG0",
"PerPkg": "1",
@@ -8972,6 +9905,7 @@
},
{
"BriefDescription": "CMS Vert Egress Occupancy : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x91",
"EventName": "UNC_M2P_TxR_VERT_OCCUPANCY1.AKC_AG1",
"PerPkg": "1",
@@ -8981,6 +9915,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG0",
"PerPkg": "1",
@@ -8990,6 +9925,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AD - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.AD_AG1",
"PerPkg": "1",
@@ -8999,6 +9935,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG0",
"PerPkg": "1",
@@ -9008,6 +9945,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AK - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.AK_AG1",
"PerPkg": "1",
@@ -9017,6 +9955,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG0",
"PerPkg": "1",
@@ -9026,6 +9965,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : BL - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.BL_AG1",
"PerPkg": "1",
@@ -9035,6 +9975,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : IV",
+ "Counter": "0,1,2,3",
"EventCode": "0x9a",
"EventName": "UNC_M2P_TxR_VERT_STARVED0.IV_AG0",
"PerPkg": "1",
@@ -9044,6 +9985,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9b",
"EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG0",
"PerPkg": "1",
@@ -9053,6 +9995,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 1",
+ "Counter": "0,1,2,3",
"EventCode": "0x9b",
"EventName": "UNC_M2P_TxR_VERT_STARVED1.AKC_AG1",
"PerPkg": "1",
@@ -9062,6 +10005,7 @@
},
{
"BriefDescription": "CMS Vertical Egress Injection Starvation : AKC - Agent 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x9b",
"EventName": "UNC_M2P_TxR_VERT_STARVED1.TGC",
"PerPkg": "1",
@@ -9071,6 +10015,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9080,6 +10025,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "UNC_M2P_VERT_RING_AD_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9089,6 +10035,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9098,6 +10045,7 @@
},
{
"BriefDescription": "Vertical AD Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "UNC_M2P_VERT_RING_AD_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9107,6 +10055,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb4",
"EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9116,6 +10065,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb4",
"EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9125,6 +10075,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb4",
"EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9134,6 +10085,7 @@
},
{
"BriefDescription": "Vertical AKC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb4",
"EventName": "UNC_M2P_VERT_RING_AKC_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9143,6 +10095,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb1",
"EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9152,6 +10105,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb1",
"EventName": "UNC_M2P_VERT_RING_AK_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9161,6 +10115,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb1",
"EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9170,6 +10125,7 @@
},
{
"BriefDescription": "Vertical AK Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb1",
"EventName": "UNC_M2P_VERT_RING_AK_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9179,6 +10135,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb2",
"EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9188,6 +10145,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb2",
"EventName": "UNC_M2P_VERT_RING_BL_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9197,6 +10155,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb2",
"EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9206,6 +10165,7 @@
},
{
"BriefDescription": "Vertical BL Ring in Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb2",
"EventName": "UNC_M2P_VERT_RING_BL_IN_USE.UP_ODD",
"PerPkg": "1",
@@ -9215,6 +10175,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Down",
+ "Counter": "0,1,2,3",
"EventCode": "0xb3",
"EventName": "UNC_M2P_VERT_RING_IV_IN_USE.DN",
"PerPkg": "1",
@@ -9224,6 +10185,7 @@
},
{
"BriefDescription": "Vertical IV Ring in Use : Up",
+ "Counter": "0,1,2,3",
"EventCode": "0xb3",
"EventName": "UNC_M2P_VERT_RING_IV_IN_USE.UP",
"PerPkg": "1",
@@ -9233,6 +10195,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb5",
"EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_EVEN",
"PerPkg": "1",
@@ -9242,6 +10205,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Down and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb5",
"EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.DN_ODD",
"PerPkg": "1",
@@ -9251,6 +10215,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Even",
+ "Counter": "0,1,2,3",
"EventCode": "0xb5",
"EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_EVEN",
"PerPkg": "1",
@@ -9260,6 +10225,7 @@
},
{
"BriefDescription": "Vertical TGC Ring In Use : Up and Odd",
+ "Counter": "0,1,2,3",
"EventCode": "0xb5",
"EventName": "UNC_M2P_VERT_RING_TGC_IN_USE.UP_ODD",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json b/tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json
index 814d9599474d..cdaba16b52ce 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "DRAM Activate Count : All Activates",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M_ACT_COUNT.ALL",
"PerPkg": "1",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "DRAM Activate Count : Activate due to Bypass",
+ "Counter": "0,1,2,3",
"EventCode": "0x01",
"EventName": "UNC_M_ACT_COUNT.BYP",
"PerPkg": "1",
@@ -19,6 +21,7 @@
},
{
"BriefDescription": "All DRAM CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.ALL",
"PerPkg": "1",
@@ -28,6 +31,7 @@
},
{
"BriefDescription": "All DRAM read CAS commands issued (including underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.RD",
"PerPkg": "1",
@@ -37,6 +41,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.RD_PRE_REG",
"PerPkg": "1",
@@ -46,6 +51,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.RD_PRE_UNDERFILL",
"PerPkg": "1",
@@ -55,6 +61,7 @@
},
{
"BriefDescription": "All DRAM read CAS commands issued (does not include underfills)",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.RD_REG",
"PerPkg": "1",
@@ -64,6 +71,7 @@
},
{
"BriefDescription": "DRAM underfill read CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
"PerPkg": "1",
@@ -73,6 +81,7 @@
},
{
"BriefDescription": "All DRAM write CAS commands issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.WR",
"PerPkg": "1",
@@ -82,6 +91,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.WR_NONPRE",
"PerPkg": "1",
@@ -91,6 +101,7 @@
},
{
"BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/ auto-pre",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_M_CAS_COUNT.WR_PRE",
"PerPkg": "1",
@@ -100,12 +111,14 @@
},
{
"BriefDescription": "DRAM Clockticks",
+ "Counter": "0,1,2,3",
"EventName": "UNC_M_CLOCKTICKS",
"PerPkg": "1",
"Unit": "iMC"
},
{
"BriefDescription": "Free running counter that increments for the Memory Controller",
+ "Counter": "4",
"EventCode": "0xff",
"EventName": "UNC_M_CLOCKTICKS_FREERUN",
"PerPkg": "1",
@@ -114,6 +127,7 @@
},
{
"BriefDescription": "DRAM Precharge All Commands",
+ "Counter": "0,1,2,3",
"EventCode": "0x44",
"EventName": "UNC_M_DRAM_PRE_ALL",
"PerPkg": "1",
@@ -122,6 +136,7 @@
},
{
"BriefDescription": "Number of DRAM Refreshes Issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M_DRAM_REFRESH.HIGH",
"PerPkg": "1",
@@ -131,6 +146,7 @@
},
{
"BriefDescription": "Number of DRAM Refreshes Issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M_DRAM_REFRESH.OPPORTUNISTIC",
"PerPkg": "1",
@@ -140,6 +156,7 @@
},
{
"BriefDescription": "Number of DRAM Refreshes Issued",
+ "Counter": "0,1,2,3",
"EventCode": "0x45",
"EventName": "UNC_M_DRAM_REFRESH.PANIC",
"PerPkg": "1",
@@ -149,6 +166,7 @@
},
{
"BriefDescription": "Half clockticks for IMC",
+ "Counter": "FIXED",
"EventCode": "0xff",
"EventName": "UNC_M_HCLOCKTICKS",
"PerPkg": "1",
@@ -156,6 +174,7 @@
},
{
"BriefDescription": "UNC_M_PARITY_ERRORS",
+ "Counter": "0,1,2,3",
"EventCode": "0x2c",
"EventName": "UNC_M_PARITY_ERRORS",
"PerPkg": "1",
@@ -163,6 +182,7 @@
},
{
"BriefDescription": "UNC_M_PCLS.RD",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_PCLS.RD",
"PerPkg": "1",
@@ -171,6 +191,7 @@
},
{
"BriefDescription": "UNC_M_PCLS.TOTAL",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_PCLS.TOTAL",
"PerPkg": "1",
@@ -179,6 +200,7 @@
},
{
"BriefDescription": "UNC_M_PCLS.WR",
+ "Counter": "0,1,2,3",
"EventCode": "0xA0",
"EventName": "UNC_M_PCLS.WR",
"PerPkg": "1",
@@ -187,6 +209,7 @@
},
{
"BriefDescription": "PMM Commands : All",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.ALL",
"PerPkg": "1",
@@ -196,6 +219,7 @@
},
{
"BriefDescription": "PMM Commands : Misc Commands (error, flow ACKs)",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.MISC",
"PerPkg": "1",
@@ -204,6 +228,7 @@
},
{
"BriefDescription": "PMM Commands : Misc GNTs",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.MISC_GNT",
"PerPkg": "1",
@@ -212,6 +237,7 @@
},
{
"BriefDescription": "PMM Commands : Reads - RPQ",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.RD",
"PerPkg": "1",
@@ -221,6 +247,7 @@
},
{
"BriefDescription": "PMM Commands : RPQ GNTs",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.RPQ_GNTS",
"PerPkg": "1",
@@ -229,6 +256,7 @@
},
{
"BriefDescription": "PMM Commands : Underfill reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.UFILL_RD",
"PerPkg": "1",
@@ -238,6 +266,7 @@
},
{
"BriefDescription": "PMM Commands : Underfill GNTs",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.WPQ_GNTS",
"PerPkg": "1",
@@ -246,6 +275,7 @@
},
{
"BriefDescription": "PMM Commands : Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xEA",
"EventName": "UNC_M_PMM_CMD1.WR",
"PerPkg": "1",
@@ -255,6 +285,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : Expected No data packet (ERID matched NDP encoding)",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.NODATA_EXP",
"PerPkg": "1",
@@ -263,6 +294,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : Unexpected No data packet (ERID matched a Read, but data was a NDP)",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.NODATA_UNEXP",
"PerPkg": "1",
@@ -271,6 +303,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : Opportunistic Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.OPP_RD",
"PerPkg": "1",
@@ -279,6 +312,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : ECC Errors",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.PMM_ECC_ERROR",
"PerPkg": "1",
@@ -287,6 +321,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : ERID detectable parity error",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.PMM_ERID_ERROR",
"PerPkg": "1",
@@ -295,6 +330,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.PMM_ERID_STARVED",
"PerPkg": "1",
@@ -303,6 +339,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : Read Requests - Slot 0",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.REQS_SLOT0",
"PerPkg": "1",
@@ -311,6 +348,7 @@
},
{
"BriefDescription": "PMM Commands - Part 2 : Read Requests - Slot 1",
+ "Counter": "0,1,2,3",
"EventCode": "0xEB",
"EventName": "UNC_M_PMM_CMD2.REQS_SLOT1",
"PerPkg": "1",
@@ -319,6 +357,7 @@
},
{
"BriefDescription": "PMM Read Queue Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xE2",
"EventName": "UNC_M_PMM_RPQ_CYCLES_FULL",
"PerPkg": "1",
@@ -326,6 +365,7 @@
},
{
"BriefDescription": "PMM Read Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xE1",
"EventName": "UNC_M_PMM_RPQ_CYCLES_NE",
"PerPkg": "1",
@@ -333,6 +373,7 @@
},
{
"BriefDescription": "PMM Read Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xE3",
"EventName": "UNC_M_PMM_RPQ_INSERTS",
"PerPkg": "1",
@@ -341,6 +382,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -350,6 +392,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.GNT_WAIT",
"PerPkg": "1",
@@ -359,6 +402,7 @@
},
{
"BriefDescription": "PMM Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE0",
"EventName": "UNC_M_PMM_RPQ_OCCUPANCY.NO_GNT",
"PerPkg": "1",
@@ -368,6 +412,7 @@
},
{
"BriefDescription": "PMM Write Queue Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xE6",
"EventName": "UNC_M_PMM_WPQ_CYCLES_FULL",
"PerPkg": "1",
@@ -375,6 +420,7 @@
},
{
"BriefDescription": "PMM Write Queue Cycles Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xE5",
"EventName": "UNC_M_PMM_WPQ_CYCLES_NE",
"PerPkg": "1",
@@ -382,6 +428,7 @@
},
{
"BriefDescription": "UNC_M_PMM_WPQ_FLUSH",
+ "Counter": "0,1,2,3",
"EventCode": "0xe8",
"EventName": "UNC_M_PMM_WPQ_FLUSH",
"PerPkg": "1",
@@ -389,6 +436,7 @@
},
{
"BriefDescription": "UNC_M_PMM_WPQ_FLUSH_CYC",
+ "Counter": "0,1,2,3",
"EventCode": "0xe9",
"EventName": "UNC_M_PMM_WPQ_FLUSH_CYC",
"PerPkg": "1",
@@ -396,6 +444,7 @@
},
{
"BriefDescription": "PMM Write Queue Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0xE7",
"EventName": "UNC_M_PMM_WPQ_INSERTS",
"PerPkg": "1",
@@ -404,6 +453,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -413,6 +463,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.CAS",
"PerPkg": "1",
@@ -422,6 +473,7 @@
},
{
"BriefDescription": "PMM Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0xE4",
"EventName": "UNC_M_PMM_WPQ_OCCUPANCY.PWR",
"PerPkg": "1",
@@ -431,6 +483,7 @@
},
{
"BriefDescription": "Channel PPD Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "UNC_M_POWER_CHANNEL_PPD",
"PerPkg": "1",
@@ -439,6 +492,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_0",
"PerPkg": "1",
@@ -448,6 +502,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_1",
"PerPkg": "1",
@@ -457,6 +512,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_2",
"PerPkg": "1",
@@ -466,6 +522,7 @@
},
{
"BriefDescription": "CKE_ON_CYCLES by Rank : DIMM ID",
+ "Counter": "0,1,2,3",
"EventCode": "0x47",
"EventName": "UNC_M_POWER_CKE_CYCLES.LOW_3",
"PerPkg": "1",
@@ -475,6 +532,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT0",
"PerPkg": "1",
@@ -484,6 +542,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x86",
"EventName": "UNC_M_POWER_CRIT_THROTTLE_CYCLES.SLOT1",
"PerPkg": "1",
@@ -493,6 +552,7 @@
},
{
"BriefDescription": "Clock-Enabled Self-Refresh",
+ "Counter": "0,1,2,3",
"EventCode": "0x43",
"EventName": "UNC_M_POWER_SELF_REFRESH",
"PerPkg": "1",
@@ -501,6 +561,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT0",
"PerPkg": "1",
@@ -510,6 +571,7 @@
},
{
"BriefDescription": "Throttle Cycles for Rank 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x46",
"EventName": "UNC_M_POWER_THROTTLE_CYCLES.SLOT1",
"PerPkg": "1",
@@ -519,6 +581,7 @@
},
{
"BriefDescription": "DRAM Precharge commands.",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M_PRE_COUNT.ALL",
"PerPkg": "1",
@@ -528,6 +591,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to page miss",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M_PRE_COUNT.PAGE_MISS",
"PerPkg": "1",
@@ -537,6 +601,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to page table",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M_PRE_COUNT.PGT",
"PerPkg": "1",
@@ -546,6 +611,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to read",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M_PRE_COUNT.RD",
"PerPkg": "1",
@@ -555,6 +621,7 @@
},
{
"BriefDescription": "DRAM Precharge commands. : Precharge due to write",
+ "Counter": "0,1,2,3",
"EventCode": "0x02",
"EventName": "UNC_M_PRE_COUNT.WR",
"PerPkg": "1",
@@ -564,6 +631,7 @@
},
{
"BriefDescription": "Read Data Buffer Full",
+ "Counter": "0,1,2,3",
"EventCode": "0x19",
"EventName": "UNC_M_RDB_FULL",
"PerPkg": "1",
@@ -571,6 +639,7 @@
},
{
"BriefDescription": "Read Data Buffer Inserts",
+ "Counter": "0,1,2,3",
"EventCode": "0x17",
"EventName": "UNC_M_RDB_INSERTS",
"PerPkg": "1",
@@ -578,6 +647,7 @@
},
{
"BriefDescription": "Read Data Buffer Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x18",
"EventName": "UNC_M_RDB_NOT_EMPTY",
"PerPkg": "1",
@@ -585,6 +655,7 @@
},
{
"BriefDescription": "Read Data Buffer Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x1A",
"EventName": "UNC_M_RDB_OCCUPANCY",
"PerPkg": "1",
@@ -592,6 +663,7 @@
},
{
"BriefDescription": "Read Pending Queue Full Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x12",
"EventName": "UNC_M_RPQ_CYCLES_FULL_PCH0",
"PerPkg": "1",
@@ -600,6 +672,7 @@
},
{
"BriefDescription": "Read Pending Queue Full Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x15",
"EventName": "UNC_M_RPQ_CYCLES_FULL_PCH1",
"PerPkg": "1",
@@ -608,6 +681,7 @@
},
{
"BriefDescription": "Read Pending Queue Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M_RPQ_CYCLES_NE.PCH0",
"PerPkg": "1",
@@ -617,6 +691,7 @@
},
{
"BriefDescription": "Read Pending Queue Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x11",
"EventName": "UNC_M_RPQ_CYCLES_NE.PCH1",
"PerPkg": "1",
@@ -626,6 +701,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS.PCH0",
"PerPkg": "1",
@@ -635,6 +711,7 @@
},
{
"BriefDescription": "Read Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x10",
"EventName": "UNC_M_RPQ_INSERTS.PCH1",
"PerPkg": "1",
@@ -644,6 +721,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_M_RPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
@@ -652,6 +730,7 @@
},
{
"BriefDescription": "Read Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x81",
"EventName": "UNC_M_RPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
@@ -660,6 +739,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Scoreboard Accesses Accepted",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.ACCEPTS",
"PerPkg": "1",
@@ -668,6 +748,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.FMRD_CMPS",
@@ -677,6 +758,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.FMWR_CMPS",
@@ -686,6 +768,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Write Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.FM_RD_CMPS",
"PerPkg": "1",
@@ -694,6 +777,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Write Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.FM_WR_CMPS",
"PerPkg": "1",
@@ -702,6 +786,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.NMRD_CMPS",
@@ -711,6 +796,7 @@
},
{
"BriefDescription": "This event is deprecated.",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd2",
"EventName": "UNC_M_SB_ACCESSES.NMWR_CMPS",
@@ -720,6 +806,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : FM read completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.NM_RD_CMPS",
"PerPkg": "1",
@@ -728,6 +815,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : FM write completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.NM_WR_CMPS",
"PerPkg": "1",
@@ -736,6 +824,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Read Accepts",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.RD_ACCEPTS",
"PerPkg": "1",
@@ -744,6 +833,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Read Rejects",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.RD_REJECTS",
"PerPkg": "1",
@@ -752,6 +842,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : Scoreboard Accesses Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.REJECTS",
"PerPkg": "1",
@@ -760,6 +851,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : NM read completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.WR_ACCEPTS",
"PerPkg": "1",
@@ -768,6 +860,7 @@
},
{
"BriefDescription": "Scoreboard Accesses : NM write completions",
+ "Counter": "0,1,2,3",
"EventCode": "0xD2",
"EventName": "UNC_M_SB_ACCESSES.WR_REJECTS",
"PerPkg": "1",
@@ -776,6 +869,7 @@
},
{
"BriefDescription": ": Alloc",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.ALLOC",
"PerPkg": "1",
@@ -784,6 +878,7 @@
},
{
"BriefDescription": ": Dealloc",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.DEALLOC",
"PerPkg": "1",
@@ -792,6 +887,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_CANARY.FM_RD_STARVED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.FMRD_STARVED",
@@ -801,6 +897,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_CANARY.FM_TGR_WR_STARVED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.FMTGRWR_STARVED",
@@ -810,6 +907,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_CANARY.FM_WR_STARVED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.FMWR_STARVED",
@@ -819,6 +917,7 @@
},
{
"BriefDescription": ": Near Mem Write Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.FM_RD_STARVED",
"PerPkg": "1",
@@ -827,6 +926,7 @@
},
{
"BriefDescription": ": Far Mem Write Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.FM_TGR_WR_STARVED",
"PerPkg": "1",
@@ -835,6 +935,7 @@
},
{
"BriefDescription": ": Far Mem Read Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.FM_WR_STARVED",
"PerPkg": "1",
@@ -843,6 +944,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_CANARY.NM_RD_STARVED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.NMRD_STARVED",
@@ -852,6 +954,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_CANARY.NM_WR_STARVED",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd9",
"EventName": "UNC_M_SB_CANARY.NMWR_STARVED",
@@ -861,6 +964,7 @@
},
{
"BriefDescription": ": Valid",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.NM_RD_STARVED",
"PerPkg": "1",
@@ -869,6 +973,7 @@
},
{
"BriefDescription": ": Near Mem Read Starved",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.NM_WR_STARVED",
"PerPkg": "1",
@@ -877,6 +982,7 @@
},
{
"BriefDescription": ": Reject",
+ "Counter": "0,1,2,3",
"EventCode": "0xD9",
"EventName": "UNC_M_SB_CANARY.VLD",
"PerPkg": "1",
@@ -885,6 +991,7 @@
},
{
"BriefDescription": "Scoreboard Cycles Full",
+ "Counter": "0,1,2,3",
"EventCode": "0xD1",
"EventName": "UNC_M_SB_CYCLES_FULL",
"PerPkg": "1",
@@ -892,6 +999,7 @@
},
{
"BriefDescription": "Scoreboard Cycles Not-Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0xD0",
"EventName": "UNC_M_SB_CYCLES_NE",
"PerPkg": "1",
@@ -899,6 +1007,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Block region reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.BLOCK_RDS",
"PerPkg": "1",
@@ -907,6 +1016,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Block region writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.BLOCK_WRS",
"PerPkg": "1",
@@ -915,6 +1025,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Persistent Mem reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.PMM_RDS",
"PerPkg": "1",
@@ -923,6 +1034,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Persistent Mem writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.PMM_WRS",
"PerPkg": "1",
@@ -931,6 +1043,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.RDS",
"PerPkg": "1",
@@ -939,6 +1052,7 @@
},
{
"BriefDescription": "Scoreboard Inserts : Writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD6",
"EventName": "UNC_M_SB_INSERTS.WRS",
"PerPkg": "1",
@@ -947,6 +1061,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Block region reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.BLOCK_RDS",
"PerPkg": "1",
@@ -955,6 +1070,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Block region writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.BLOCK_WRS",
"PerPkg": "1",
@@ -963,6 +1079,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Persistent Mem reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.PMM_RDS",
"PerPkg": "1",
@@ -971,6 +1088,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Persistent Mem writes",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.PMM_WRS",
"PerPkg": "1",
@@ -979,6 +1097,7 @@
},
{
"BriefDescription": "Scoreboard Occupancy : Reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xD5",
"EventName": "UNC_M_SB_OCCUPANCY.RDS",
"PerPkg": "1",
@@ -987,6 +1106,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Inserts : All",
+ "Counter": "0,1,2,3",
"EventCode": "0xDA",
"EventName": "UNC_M_SB_PREF_INSERTS.ALL",
"PerPkg": "1",
@@ -995,6 +1115,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Inserts : DDR4",
+ "Counter": "0,1,2,3",
"EventCode": "0xDA",
"EventName": "UNC_M_SB_PREF_INSERTS.DDR",
"PerPkg": "1",
@@ -1003,6 +1124,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Inserts : Persistent Mem",
+ "Counter": "0,1,2,3",
"EventCode": "0xDA",
"EventName": "UNC_M_SB_PREF_INSERTS.PMM",
"PerPkg": "1",
@@ -1011,6 +1133,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Occupancy : All",
+ "Counter": "0,1,2,3",
"EventCode": "0xDB",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -1019,6 +1142,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Occupancy : DDR4",
+ "Counter": "0,1,2,3",
"EventCode": "0xDB",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.DDR",
"PerPkg": "1",
@@ -1027,6 +1151,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_PREF_OCCUPANCY.PMM",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xdb",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.PMEM",
@@ -1036,6 +1161,7 @@
},
{
"BriefDescription": "Scoreboard Prefetch Occupancy : Persistent Mem",
+ "Counter": "0,1,2,3",
"EventCode": "0xdb",
"EventName": "UNC_M_SB_PREF_OCCUPANCY.PMM",
"PerPkg": "1",
@@ -1044,6 +1170,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.CANARY",
"PerPkg": "1",
@@ -1052,6 +1179,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.DDR_EARLY_CMP",
"PerPkg": "1",
@@ -1060,6 +1188,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected : FM requests rejected due to full address conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.FM_ADDR_CNFLT",
"PerPkg": "1",
@@ -1068,6 +1197,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected : NM requests rejected due to set conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.NM_SET_CNFLT",
"PerPkg": "1",
@@ -1076,6 +1206,7 @@
},
{
"BriefDescription": "Number of Scoreboard Requests Rejected : Patrol requests rejected due to set conflict",
+ "Counter": "0,1,2,3",
"EventCode": "0xD4",
"EventName": "UNC_M_SB_REJECT.PATROL_SET_CNFLT",
"PerPkg": "1",
@@ -1084,6 +1215,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_ALLOC.FM_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMRD",
@@ -1093,6 +1225,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_ALLOC.FM_TGR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMTGR",
@@ -1102,6 +1235,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_ALLOC.FM_WR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.FMWR",
@@ -1111,6 +1245,7 @@
},
{
"BriefDescription": ": Far Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FM_RD",
"PerPkg": "1",
@@ -1119,6 +1254,7 @@
},
{
"BriefDescription": ": Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FM_TGR",
"PerPkg": "1",
@@ -1127,6 +1263,7 @@
},
{
"BriefDescription": ": Far Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.FM_WR",
"PerPkg": "1",
@@ -1135,6 +1272,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_ALLOC.NM_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.NMRD",
@@ -1144,6 +1282,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_ALLOC.NM_WR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd7",
"EventName": "UNC_M_SB_STRV_ALLOC.NMWR",
@@ -1153,6 +1292,7 @@
},
{
"BriefDescription": ": Near Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.NM_RD",
"PerPkg": "1",
@@ -1161,6 +1301,7 @@
},
{
"BriefDescription": ": Near Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xD7",
"EventName": "UNC_M_SB_STRV_ALLOC.NM_WR",
"PerPkg": "1",
@@ -1169,6 +1310,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_DEALLOC.FM_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.FMRD",
@@ -1178,6 +1320,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_DEALLOC.FM_TGR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.FMTGR",
@@ -1187,6 +1330,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_DEALLOC.FM_WR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.FMWR",
@@ -1196,6 +1340,7 @@
},
{
"BriefDescription": ": Far Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xDE",
"EventName": "UNC_M_SB_STRV_DEALLOC.FM_RD",
"PerPkg": "1",
@@ -1204,6 +1349,7 @@
},
{
"BriefDescription": ": Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xDE",
"EventName": "UNC_M_SB_STRV_DEALLOC.FM_TGR",
"PerPkg": "1",
@@ -1212,6 +1358,7 @@
},
{
"BriefDescription": ": Far Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xDE",
"EventName": "UNC_M_SB_STRV_DEALLOC.FM_WR",
"PerPkg": "1",
@@ -1220,6 +1367,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_DEALLOC.NM_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.NMRD",
@@ -1229,6 +1377,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_DEALLOC.NM_WR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xde",
"EventName": "UNC_M_SB_STRV_DEALLOC.NMWR",
@@ -1238,6 +1387,7 @@
},
{
"BriefDescription": ": Near Mem Read - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xDE",
"EventName": "UNC_M_SB_STRV_DEALLOC.NM_RD",
"PerPkg": "1",
@@ -1246,6 +1396,7 @@
},
{
"BriefDescription": ": Near Mem Write - Set",
+ "Counter": "0,1,2,3",
"EventCode": "0xDE",
"EventName": "UNC_M_SB_STRV_DEALLOC.NM_WR",
"PerPkg": "1",
@@ -1254,6 +1405,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_OCC.FM_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.FMRD",
@@ -1263,6 +1415,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_OCC.FM_TGR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.FMTGR",
@@ -1272,6 +1425,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_OCC.FM_WR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.FMWR",
@@ -1281,6 +1435,7 @@
},
{
"BriefDescription": ": Far Mem Read",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.FM_RD",
"PerPkg": "1",
@@ -1289,6 +1444,7 @@
},
{
"BriefDescription": ": Near Mem Read - Clear",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.FM_TGR",
"PerPkg": "1",
@@ -1297,6 +1453,7 @@
},
{
"BriefDescription": ": Far Mem Write",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.FM_WR",
"PerPkg": "1",
@@ -1305,6 +1462,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_OCC.NM_RD",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.NMRD",
@@ -1314,6 +1472,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_M_SB_STRV_OCC.NM_WR",
+ "Counter": "0,1,2,3",
"Deprecated": "1",
"EventCode": "0xd8",
"EventName": "UNC_M_SB_STRV_OCC.NMWR",
@@ -1323,6 +1482,7 @@
},
{
"BriefDescription": ": Near Mem Read",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.NM_RD",
"PerPkg": "1",
@@ -1331,6 +1491,7 @@
},
{
"BriefDescription": ": Near Mem Write",
+ "Counter": "0,1,2,3",
"EventCode": "0xD8",
"EventName": "UNC_M_SB_STRV_OCC.NM_WR",
"PerPkg": "1",
@@ -1339,6 +1500,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.DDR4_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.DDR4_CMP",
"PerPkg": "1",
@@ -1347,6 +1509,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.NEW",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.NEW",
"PerPkg": "1",
@@ -1355,6 +1518,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.OCC",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.OCC",
"PerPkg": "1",
@@ -1363,6 +1527,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM0_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.PMM0_CMP",
"PerPkg": "1",
@@ -1371,6 +1536,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM1_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.PMM1_CMP",
"PerPkg": "1",
@@ -1379,6 +1545,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.PMM2_CMP",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.PMM2_CMP",
"PerPkg": "1",
@@ -1387,6 +1554,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.RD_HIT",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.RD_HIT",
"PerPkg": "1",
@@ -1395,6 +1563,7 @@
},
{
"BriefDescription": "UNC_M_SB_TAGGED.RD_MISS",
+ "Counter": "0,1,2,3",
"EventCode": "0xDD",
"EventName": "UNC_M_SB_TAGGED.RD_MISS",
"PerPkg": "1",
@@ -1403,6 +1572,7 @@
},
{
"BriefDescription": "2LM Tag Check : Hit in Near Memory Cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.HIT",
"PerPkg": "1",
@@ -1411,6 +1581,7 @@
},
{
"BriefDescription": "2LM Tag Check : Miss, no data in this line",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.MISS_CLEAN",
"PerPkg": "1",
@@ -1419,6 +1590,7 @@
},
{
"BriefDescription": "2LM Tag Check : Miss, existing data may be evicted to Far Memory",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.MISS_DIRTY",
"PerPkg": "1",
@@ -1427,6 +1599,7 @@
},
{
"BriefDescription": "2LM Tag Check : Read Hit in Near Memory Cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.NM_RD_HIT",
"PerPkg": "1",
@@ -1435,6 +1608,7 @@
},
{
"BriefDescription": "2LM Tag Check : Write Hit in Near Memory Cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xD3",
"EventName": "UNC_M_TAGCHK.NM_WR_HIT",
"PerPkg": "1",
@@ -1443,6 +1617,7 @@
},
{
"BriefDescription": "Write Pending Queue Full Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x22",
"EventName": "UNC_M_WPQ_CYCLES_FULL_PCH0",
"PerPkg": "1",
@@ -1451,6 +1626,7 @@
},
{
"BriefDescription": "Write Pending Queue Full Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x16",
"EventName": "UNC_M_WPQ_CYCLES_FULL_PCH1",
"PerPkg": "1",
@@ -1459,6 +1635,7 @@
},
{
"BriefDescription": "Write Pending Queue Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M_WPQ_CYCLES_NE.PCH0",
"PerPkg": "1",
@@ -1468,6 +1645,7 @@
},
{
"BriefDescription": "Write Pending Queue Not Empty",
+ "Counter": "0,1,2,3",
"EventCode": "0x21",
"EventName": "UNC_M_WPQ_CYCLES_NE.PCH1",
"PerPkg": "1",
@@ -1477,6 +1655,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS.PCH0",
"PerPkg": "1",
@@ -1486,6 +1665,7 @@
},
{
"BriefDescription": "Write Pending Queue Allocations",
+ "Counter": "0,1,2,3",
"EventCode": "0x20",
"EventName": "UNC_M_WPQ_INSERTS.PCH1",
"PerPkg": "1",
@@ -1495,6 +1675,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x82",
"EventName": "UNC_M_WPQ_OCCUPANCY_PCH0",
"PerPkg": "1",
@@ -1503,6 +1684,7 @@
},
{
"BriefDescription": "Write Pending Queue Occupancy",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "UNC_M_WPQ_OCCUPANCY_PCH1",
"PerPkg": "1",
@@ -1511,6 +1693,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M_WPQ_READ_HIT.PCH0",
"PerPkg": "1",
@@ -1520,6 +1703,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x23",
"EventName": "UNC_M_WPQ_READ_HIT.PCH1",
"PerPkg": "1",
@@ -1529,6 +1713,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M_WPQ_WRITE_HIT.PCH0",
"PerPkg": "1",
@@ -1538,6 +1723,7 @@
},
{
"BriefDescription": "Write Pending Queue CAM Match",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "UNC_M_WPQ_WRITE_HIT.PCH1",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/uncore-power.json b/tools/perf/pmu-events/arch/x86/icelakex/uncore-power.json
index ee4dac6fc797..51679fb7d38e 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/uncore-power.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/uncore-power.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Clockticks of the power control unit (PCU)",
+ "Counter": "0,1,2,3",
"EventName": "UNC_P_CLOCKTICKS",
"PerPkg": "1",
"PublicDescription": "Clockticks of the power control unit (PCU) : The PCU runs off a fixed 1 GHz clock. This event counts the number of pclk cycles measured while the counter was enabled. The pclk, like the Memory Controller's dclk, counts at a constant rate making it a good measure of actual wall time.",
@@ -8,6 +9,7 @@
},
{
"BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "UNC_P_CORE_TRANSITION_CYCLES",
"PerPkg": "1",
@@ -15,6 +17,7 @@
},
{
"BriefDescription": "UNC_P_DEMOTIONS",
+ "Counter": "0,1,2,3",
"EventCode": "0x30",
"EventName": "UNC_P_DEMOTIONS",
"PerPkg": "1",
@@ -22,6 +25,7 @@
},
{
"BriefDescription": "Phase Shed 0 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x75",
"EventName": "UNC_P_FIVR_PS_PS0_CYCLES",
"PerPkg": "1",
@@ -30,6 +34,7 @@
},
{
"BriefDescription": "Phase Shed 1 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x76",
"EventName": "UNC_P_FIVR_PS_PS1_CYCLES",
"PerPkg": "1",
@@ -38,6 +43,7 @@
},
{
"BriefDescription": "Phase Shed 2 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x77",
"EventName": "UNC_P_FIVR_PS_PS2_CYCLES",
"PerPkg": "1",
@@ -46,6 +52,7 @@
},
{
"BriefDescription": "Phase Shed 3 Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x78",
"EventName": "UNC_P_FIVR_PS_PS3_CYCLES",
"PerPkg": "1",
@@ -54,6 +61,7 @@
},
{
"BriefDescription": "AVX256 Frequency Clipping",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "UNC_P_FREQ_CLIP_AVX256",
"PerPkg": "1",
@@ -61,6 +69,7 @@
},
{
"BriefDescription": "AVX512 Frequency Clipping",
+ "Counter": "0,1,2,3",
"EventCode": "0x4a",
"EventName": "UNC_P_FREQ_CLIP_AVX512",
"PerPkg": "1",
@@ -68,6 +77,7 @@
},
{
"BriefDescription": "Thermal Strongest Upper Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x04",
"EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
"PerPkg": "1",
@@ -76,6 +86,7 @@
},
{
"BriefDescription": "Power Strongest Upper Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x05",
"EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
"PerPkg": "1",
@@ -84,6 +95,7 @@
},
{
"BriefDescription": "IO P Limit Strongest Lower Limit Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x73",
"EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES",
"PerPkg": "1",
@@ -92,6 +104,7 @@
},
{
"BriefDescription": "Cycles spent changing Frequency",
+ "Counter": "0,1,2,3",
"EventCode": "0x74",
"EventName": "UNC_P_FREQ_TRANS_CYCLES",
"PerPkg": "1",
@@ -100,6 +113,7 @@
},
{
"BriefDescription": "Memory Phase Shedding Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x2F",
"EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES",
"PerPkg": "1",
@@ -108,6 +122,7 @@
},
{
"BriefDescription": "Package C State Residency - C0",
+ "Counter": "0,1,2,3",
"EventCode": "0x2A",
"EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES",
"PerPkg": "1",
@@ -116,6 +131,7 @@
},
{
"BriefDescription": "Package C State Residency - C2E",
+ "Counter": "0,1,2,3",
"EventCode": "0x2B",
"EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES",
"PerPkg": "1",
@@ -124,6 +140,7 @@
},
{
"BriefDescription": "Package C State Residency - C3",
+ "Counter": "0,1,2,3",
"EventCode": "0x2C",
"EventName": "UNC_P_PKG_RESIDENCY_C3_CYCLES",
"PerPkg": "1",
@@ -132,6 +149,7 @@
},
{
"BriefDescription": "Package C State Residency - C6",
+ "Counter": "0,1,2,3",
"EventCode": "0x2D",
"EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES",
"PerPkg": "1",
@@ -140,6 +158,7 @@
},
{
"BriefDescription": "UNC_P_PMAX_THROTTLED_CYCLES",
+ "Counter": "0,1,2,3",
"EventCode": "0x06",
"EventName": "UNC_P_PMAX_THROTTLED_CYCLES",
"PerPkg": "1",
@@ -147,6 +166,7 @@
},
{
"BriefDescription": "Number of cores in C-State : C0 and C1",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0",
"PerPkg": "1",
@@ -155,6 +175,7 @@
},
{
"BriefDescription": "Number of cores in C-State : C3",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3",
"PerPkg": "1",
@@ -163,6 +184,7 @@
},
{
"BriefDescription": "Number of cores in C-State : C6 and C7",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6",
"PerPkg": "1",
@@ -171,6 +193,7 @@
},
{
"BriefDescription": "External Prochot",
+ "Counter": "0,1,2,3",
"EventCode": "0x0A",
"EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
"PerPkg": "1",
@@ -179,6 +202,7 @@
},
{
"BriefDescription": "Internal Prochot",
+ "Counter": "0,1,2,3",
"EventCode": "0x09",
"EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES",
"PerPkg": "1",
@@ -187,6 +211,7 @@
},
{
"BriefDescription": "Total Core C State Transition Cycles",
+ "Counter": "0,1,2,3",
"EventCode": "0x72",
"EventName": "UNC_P_TOTAL_TRANSITION_CYCLES",
"PerPkg": "1",
@@ -195,6 +220,7 @@
},
{
"BriefDescription": "VR Hot",
+ "Counter": "0,1,2,3",
"EventCode": "0x42",
"EventName": "UNC_P_VR_HOT_CYCLES",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/icelakex/virtual-memory.json b/tools/perf/pmu-events/arch/x86/icelakex/virtual-memory.json
index e3227c7f2fe9..9df790d4361f 100644
--- a/tools/perf/pmu-events/arch/x86/icelakex/virtual-memory.json
+++ b/tools/perf/pmu-events/arch/x86/icelakex/virtual-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Loads that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.STLB_HIT",
"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",
@@ -18,6 +20,7 @@
},
{
"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -34,6 +38,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 2M/4M page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 4K page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -50,6 +56,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for a demand load in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",
@@ -58,6 +65,7 @@
},
{
"BriefDescription": "Stores that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.STLB_HIT",
"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",
@@ -66,6 +74,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",
@@ -75,6 +84,7 @@
},
{
"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -83,6 +93,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 1G page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_1G",
"PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -91,6 +102,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 2M/4M page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -99,6 +111,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 4K page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -107,6 +120,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for a store in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",
@@ -115,6 +129,7 @@
},
{
"BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.STLB_HIT",
"PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
@@ -123,6 +138,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction fetch) request.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_ACTIVE",
@@ -132,6 +148,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -140,6 +157,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -148,6 +166,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -156,6 +175,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for an outstanding code request in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",
@@ -164,6 +184,7 @@
},
{
"BriefDescription": "DTLB flush attempts of the thread-specific entries",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "TLB_FLUSH.DTLB_THREAD",
"PublicDescription": "Counts the number of DTLB flush attempts of the thread-specific entries.",
@@ -172,6 +193,7 @@
},
{
"BriefDescription": "STLB flush attempts",
+ "Counter": "0,1,2,3",
"EventCode": "0xBD",
"EventName": "TLB_FLUSH.STLB_ANY",
"PublicDescription": "Counts the number of any STLB flush attempts (such as entire, VPID, PCID, InvPage, CR3 write, etc.).",
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 06/18] perf pmu-events: Add event counter data for Icelakex
2023-12-12 23:02 ` [RFC PATCH v3 06/18] perf pmu-events: Add event counter data for Icelakex weilin.wang
@ 2024-01-25 4:54 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2024-01-25 4:54 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> The added new fields are required in this new grouping method. Currently,
> the format of added fields are temporary for experiments.
It'd be nice in the commit message to state which fields are added.
I'm somewhat confused about the meaning of TakenAlone on an event.
Thanks,
Ian
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 07/18] perf stat: Add functions to set counter bitmaps for hardware-grouping method
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (6 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 06/18] perf pmu-events: Add event counter data for Icelakex weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 5:17 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 08/18] perf stat: Add functions to get counter info weilin.wang
` (10 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add metricgroup__event_info data structure to represent an event in the
metric grouping context; the list of counters and the PMU name an event
should be collected with.
Add functions to parse event counter info from pmu-events and generate a
list of metricgroup__event_info data to prepare grouping.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 196 +++++++++++++++++++++++++++++++++-
tools/perf/util/metricgroup.h | 27 +++++
2 files changed, 220 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 8d1143ee898c..24268882d355 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1432,6 +1432,182 @@ static int build_combined_expr_ctx(const struct list_head *metric_list,
return ret;
}
+/**
+ * set_counter_bitmap - The counter bit mapping: [8-15,0-7], e.g. the GP0 is the
+ * 8th bit and GP7 is the 1st bit in this 16-bits bitmap. It is helpful for
+ * assigning GP4-7 before GP0-3 because some events can be collected using GP0-3
+ * only on some platforms.
+ */
+static int set_counter_bitmap(int pos, unsigned long *bitmap)
+{
+ if (pos >= NR_COUNTERS || pos < 0)
+ return -EINVAL;
+ if (pos <= 7)
+ pos = TRANSFER_FIRST_BYTE(pos);
+ else
+ pos = TRANSFER_SEC_BYTE(pos);
+ *bitmap |= 1ul << pos;
+ return 0;
+}
+
+static int parse_fixed_counter(const char *counter,
+ unsigned long *bitmap,
+ bool *fixed)
+{
+ int ret = -ENOENT;
+ //TODO: this pattern is different on some other platforms
+ const char *pattern = "Fixed counter ";
+ int pos = 0;
+
+ if (!strncmp(counter, pattern, strlen(pattern))) {
+ pos = atoi(counter + strlen(pattern));
+ ret = set_counter_bitmap(pos, bitmap);
+ if (ret)
+ return ret;
+ *fixed = true;
+ return 0;
+ }
+ return ret;
+}
+
+/**
+ * parse_counter - Parse event counter info from pmu-events and set up bitmap
+ * accordingly.
+ *
+ * @counter: counter info string to be parsed.
+ * @bitmap: bitmap to set based on counter info parsed.
+ * @fixed: is set to true if the event uses fixed counter.
+ */
+static int parse_counter(const char *counter,
+ unsigned long *bitmap,
+ bool *fixed)
+{
+ int ret = 0;
+ char *p;
+ char *tok;
+ int pos = 0;
+
+ ret = parse_fixed_counter(counter, bitmap, fixed);
+ // ret==0 means matched with fixed counter
+ if (ret == 0)
+ return ret;
+
+ p = strdup(counter);
+ tok = strtok(p, ",");
+ if (!tok)
+ return -ENOENT;
+
+ while (tok) {
+ pos = atoi(tok);
+ ret = set_counter_bitmap(pos, bitmap);
+ if (ret)
+ return ret;
+ tok = strtok(NULL, ",");
+ }
+ return 0;
+}
+
+static struct metricgroup__event_info *event_info__new(const char *name,
+ const char *pmu_name,
+ const char *counter,
+ bool free_counter)
+{
+ int ret = 0;
+ char *bit_buf = malloc(NR_COUNTERS);
+ bool fixed_counter = false;
+ struct metricgroup__event_info *e;
+
+ e = zalloc(sizeof(*e));
+ if (!e)
+ return NULL;
+ if (!pmu_name)
+ pmu_name = "core";
+
+ e->name = name;
+ e->free_counter = free_counter;
+ e->pmu_name = strdup(pmu_name);
+ if (free_counter) {
+ ret = set_counter_bitmap(0, e->counters);
+ if (ret)
+ return NULL;
+ } else {
+ ret = parse_counter(counter, e->counters, &fixed_counter);
+ if (ret)
+ return NULL;
+ e->fixed_counter = fixed_counter;
+ }
+
+ bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
+ pr_debug("Event %s requires pmu %s counter: %s bitmap %s, [pmu=%s]\n",
+ e->name, e->pmu_name, counter, bit_buf, pmu_name);
+
+ return e;
+}
+
+struct metricgroup__add_metric_event_data {
+ struct list_head *list;
+ /* pure event name, exclude umask and other info*/
+ const char *event_name;
+ /* event name and umask if applicable*/
+ const char *event_id;
+};
+
+static int metricgroup__add_metric_event_callback(const struct pmu_event *pe,
+ const struct pmu_events_table *table __maybe_unused,
+ void *data)
+{
+ struct metricgroup__event_info *event;
+ struct metricgroup__add_metric_event_data *d = data;
+
+ if (!strcasecmp(pe->name, d->event_name)) {
+ event = event_info__new(d->event_id, pe->pmu, pe->counter, /*free_counter=*/false);
+ if (!event)
+ return -ENOMEM;
+ list_add(&event->nd, d->list);
+ }
+
+ return 0;
+}
+
+/**
+ * get_metricgroup_events - Find counter requirement of events from the
+ * pmu_events table
+ * @full_id: the full event identifiers.
+ * @table: pmu_events table that is searched for event data.
+ * @event_info_list: the list that the new event counter info added to.
+ */
+static int get_metricgroup_events(const char *full_id,
+ const struct pmu_events_table *table,
+ struct list_head *event_info_list)
+{
+ LIST_HEAD(list);
+ int ret = 0;
+ const char *id;
+ const char *rsep, *sep = strchr(full_id, '@');
+
+ if (sep) {
+ rsep = strchr(full_id, ',');
+ id = strndup(sep + 1, rsep - sep - 1);
+ if (ret)
+ goto out;
+ } else {
+ id = full_id;
+ }
+ {
+ struct metricgroup__add_metric_event_data data = {
+ .list = &list,
+ .event_name = id,
+ .event_id = full_id,
+ };
+ ret = pmu_events_table_for_each_event(table,
+ metricgroup__add_metric_event_callback, &data);
+ }
+
+out:
+ list_splice(&list, event_info_list);
+ return ret;
+}
+
/**
* hw_aware_build_grouping - Build event groupings by reading counter
* requirement of the events and counter available on the system from
@@ -1445,9 +1621,25 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
const char *modifier __maybe_unused)
{
int ret = 0;
+ struct hashmap_entry *cur;
+ LIST_HEAD(pmu_info_list);
+ LIST_HEAD(event_info_list);
+ size_t bkt;
+ const struct pmu_events_table *etable = perf_pmu__find_events_table(NULL);
+
+#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
+ hashmap__for_each_entry(ctx->ids, cur, bkt) {
+ const char *id = cur->pkey;
+
+ pr_debug("found event %s\n", id);
+
+ ret = get_metricgroup_events(id, etable, &event_info_list);
+ if (ret)
+ return ret;
+ }
- pr_debug("This is a placeholder\n");
return ret;
+#undef RETURN_IF_NON_ZERO
}
static void group_str_free(struct metricgroup__group_strs *g)
@@ -1521,8 +1713,6 @@ static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
*out_evlist = parsed_evlist;
parsed_evlist = NULL;
err_out:
- parse_events_error__exit(&parse_error);
- evlist__delete(parsed_evlist);
metricgroup__free_grouping_strs(&groupings);
return ret;
}
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 89809df85644..3704545c9a11 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -5,6 +5,7 @@
#include <linux/list.h>
#include <linux/rbtree.h>
#include <stdbool.h>
+#include <linux/bitmap.h>
#include "pmu-events/pmu-events.h"
#include "strbuf.h"
@@ -67,6 +68,32 @@ struct metric_expr {
int runtime;
};
+/* Maximum number of counters per PMU*/
+#define NR_COUNTERS 16
+/*
+ * Transfer bit position in the bitmap to ensure start assigning counter from
+ * the last GP counter to the first.
+ * bit15 <---> bit0
+ * [GP8-GP15] [GP0-GP7]
+ */
+#define TRANSFER_FIRST_BYTE(pos) (7 - pos)
+#define TRANSFER_SEC_BYTE(pos) (23 - pos)
+
+/**
+ * An event used in a metric. This info is for metric grouping.
+ */
+struct metricgroup__event_info {
+ struct list_head nd;
+ /** The name of the event. */
+ const char *name;
+ /** The name of the pmu the event be collected on. */
+ const char *pmu_name;
+ bool fixed_counter;
+ bool free_counter;
+ /** The counters the event allowed to be collected on. */
+ DECLARE_BITMAP(counters, NR_COUNTERS);
+};
+
/**
* Each group is one node in the group string list.
*/
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 07/18] perf stat: Add functions to set counter bitmaps for hardware-grouping method
2023-12-12 23:02 ` [RFC PATCH v3 07/18] perf stat: Add functions to set counter bitmaps for hardware-grouping method weilin.wang
@ 2024-01-24 5:17 ` Ian Rogers
2024-01-24 16:59 ` Wang, Weilin
0 siblings, 1 reply; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 5:17 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Add metricgroup__event_info data structure to represent an event in the
> metric grouping context; the list of counters and the PMU name an event
> should be collected with.
>
> Add functions to parse event counter info from pmu-events and generate a
> list of metricgroup__event_info data to prepare grouping.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/perf/util/metricgroup.c | 196 +++++++++++++++++++++++++++++++++-
> tools/perf/util/metricgroup.h | 27 +++++
> 2 files changed, 220 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index 8d1143ee898c..24268882d355 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1432,6 +1432,182 @@ static int build_combined_expr_ctx(const struct list_head *metric_list,
> return ret;
> }
>
> +/**
> + * set_counter_bitmap - The counter bit mapping: [8-15,0-7], e.g. the GP0 is the
> + * 8th bit and GP7 is the 1st bit in this 16-bits bitmap. It is helpful for
> + * assigning GP4-7 before GP0-3 because some events can be collected using GP0-3
> + * only on some platforms.
> + */
> +static int set_counter_bitmap(int pos, unsigned long *bitmap)
> +{
> + if (pos >= NR_COUNTERS || pos < 0)
> + return -EINVAL;
> + if (pos <= 7)
> + pos = TRANSFER_FIRST_BYTE(pos);
> + else
> + pos = TRANSFER_SEC_BYTE(pos);
> + *bitmap |= 1ul << pos;
__set_bit may be more canonical here, in case we ever had more than 64 counters.
> + return 0;
> +}
> +
> +static int parse_fixed_counter(const char *counter,
> + unsigned long *bitmap,
> + bool *fixed)
> +{
> + int ret = -ENOENT;
> + //TODO: this pattern is different on some other platforms
> + const char *pattern = "Fixed counter ";
> + int pos = 0;
> +
> + if (!strncmp(counter, pattern, strlen(pattern))) {
> + pos = atoi(counter + strlen(pattern));
> + ret = set_counter_bitmap(pos, bitmap);
> + if (ret)
> + return ret;
> + *fixed = true;
> + return 0;
> + }
> + return ret;
> +}
It'd be nice if the counter APIs that are specific to a PMU could be
part of the struct pmu API.
> +
> +/**
> + * parse_counter - Parse event counter info from pmu-events and set up bitmap
> + * accordingly.
> + *
> + * @counter: counter info string to be parsed.
> + * @bitmap: bitmap to set based on counter info parsed.
> + * @fixed: is set to true if the event uses fixed counter.
> + */
> +static int parse_counter(const char *counter,
> + unsigned long *bitmap,
> + bool *fixed)
> +{
> + int ret = 0;
> + char *p;
> + char *tok;
> + int pos = 0;
> +
> + ret = parse_fixed_counter(counter, bitmap, fixed);
> + // ret==0 means matched with fixed counter
> + if (ret == 0)
> + return ret;
> +
> + p = strdup(counter);
> + tok = strtok(p, ",");
> + if (!tok)
> + return -ENOENT;
> +
> + while (tok) {
> + pos = atoi(tok);
> + ret = set_counter_bitmap(pos, bitmap);
> + if (ret)
> + return ret;
> + tok = strtok(NULL, ",");
> + }
> + return 0;
> +}
> +
> +static struct metricgroup__event_info *event_info__new(const char *name,
> + const char *pmu_name,
> + const char *counter,
> + bool free_counter)
> +{
> + int ret = 0;
> + char *bit_buf = malloc(NR_COUNTERS);
> + bool fixed_counter = false;
> + struct metricgroup__event_info *e;
> +
> + e = zalloc(sizeof(*e));
> + if (!e)
> + return NULL;
> + if (!pmu_name)
> + pmu_name = "core";
> +
> + e->name = name;
> + e->free_counter = free_counter;
> + e->pmu_name = strdup(pmu_name);
> + if (free_counter) {
> + ret = set_counter_bitmap(0, e->counters);
> + if (ret)
> + return NULL;
> + } else {
> + ret = parse_counter(counter, e->counters, &fixed_counter);
> + if (ret)
> + return NULL;
> + e->fixed_counter = fixed_counter;
> + }
> +
> + bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
> + pr_debug("Event %s requires pmu %s counter: %s bitmap %s, [pmu=%s]\n",
> + e->name, e->pmu_name, counter, bit_buf, pmu_name);
> +
> + return e;
> +}
> +
> +struct metricgroup__add_metric_event_data {
> + struct list_head *list;
> + /* pure event name, exclude umask and other info*/
> + const char *event_name;
> + /* event name and umask if applicable*/
> + const char *event_id;
> +};
> +
> +static int metricgroup__add_metric_event_callback(const struct pmu_event *pe,
> + const struct pmu_events_table *table __maybe_unused,
> + void *data)
> +{
> + struct metricgroup__event_info *event;
> + struct metricgroup__add_metric_event_data *d = data;
> +
> + if (!strcasecmp(pe->name, d->event_name)) {
> + event = event_info__new(d->event_id, pe->pmu, pe->counter, /*free_counter=*/false);
> + if (!event)
> + return -ENOMEM;
> + list_add(&event->nd, d->list);
> + }
> +
> + return 0;
> +}
> +
> +/**
> + * get_metricgroup_events - Find counter requirement of events from the
> + * pmu_events table
> + * @full_id: the full event identifiers.
> + * @table: pmu_events table that is searched for event data.
> + * @event_info_list: the list that the new event counter info added to.
> + */
> +static int get_metricgroup_events(const char *full_id,
> + const struct pmu_events_table *table,
> + struct list_head *event_info_list)
> +{
> + LIST_HEAD(list);
> + int ret = 0;
> + const char *id;
> + const char *rsep, *sep = strchr(full_id, '@');
> +
> + if (sep) {
> + rsep = strchr(full_id, ',');
> + id = strndup(sep + 1, rsep - sep - 1);
> + if (ret)
> + goto out;
> + } else {
> + id = full_id;
> + }
> + {
> + struct metricgroup__add_metric_event_data data = {
> + .list = &list,
> + .event_name = id,
> + .event_id = full_id,
> + };
> + ret = pmu_events_table_for_each_event(table,
> + metricgroup__add_metric_event_callback, &data);
> + }
> +
> +out:
> + list_splice(&list, event_info_list);
> + return ret;
> +}
> +
> /**
> * hw_aware_build_grouping - Build event groupings by reading counter
> * requirement of the events and counter available on the system from
> @@ -1445,9 +1621,25 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> const char *modifier __maybe_unused)
> {
> int ret = 0;
> + struct hashmap_entry *cur;
> + LIST_HEAD(pmu_info_list);
> + LIST_HEAD(event_info_list);
> + size_t bkt;
> + const struct pmu_events_table *etable = perf_pmu__find_events_table(NULL);
> +
> +#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
> + hashmap__for_each_entry(ctx->ids, cur, bkt) {
> + const char *id = cur->pkey;
> +
> + pr_debug("found event %s\n", id);
> +
> + ret = get_metricgroup_events(id, etable, &event_info_list);
> + if (ret)
> + return ret;
> + }
>
> - pr_debug("This is a placeholder\n");
> return ret;
> +#undef RETURN_IF_NON_ZERO
> }
>
> static void group_str_free(struct metricgroup__group_strs *g)
> @@ -1521,8 +1713,6 @@ static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
> *out_evlist = parsed_evlist;
> parsed_evlist = NULL;
> err_out:
> - parse_events_error__exit(&parse_error);
> - evlist__delete(parsed_evlist);
> metricgroup__free_grouping_strs(&groupings);
> return ret;
> }
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index 89809df85644..3704545c9a11 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -5,6 +5,7 @@
> #include <linux/list.h>
> #include <linux/rbtree.h>
> #include <stdbool.h>
> +#include <linux/bitmap.h>
> #include "pmu-events/pmu-events.h"
> #include "strbuf.h"
>
> @@ -67,6 +68,32 @@ struct metric_expr {
> int runtime;
> };
>
If this is just used in metricgroup.c then it'd be better to keep the
definitions there for the sake of encapsulation.
> +/* Maximum number of counters per PMU*/
> +#define NR_COUNTERS 16
Fixed and/or generic?
> +/*
> + * Transfer bit position in the bitmap to ensure start assigning counter from
> + * the last GP counter to the first.
> + * bit15 <---> bit0
> + * [GP8-GP15] [GP0-GP7]
> + */
> +#define TRANSFER_FIRST_BYTE(pos) (7 - pos)
> +#define TRANSFER_SEC_BYTE(pos) (23 - pos)
Not sure why this bit flipping is necessary, if fixed counters are
separated out to their own bitmap does it help?
> +
> +/**
> + * An event used in a metric. This info is for metric grouping.
> + */
> +struct metricgroup__event_info {
> + struct list_head nd;
> + /** The name of the event. */
> + const char *name;
> + /** The name of the pmu the event be collected on. */
> + const char *pmu_name;
Could we use the "struct pmu*" here?
> + bool fixed_counter;
> + bool free_counter;
Missing comment for *_counter.
Thanks,
Ian
> + /** The counters the event allowed to be collected on. */
> + DECLARE_BITMAP(counters, NR_COUNTERS);
> +};
> +
> /**
> * Each group is one node in the group string list.
> */
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread* RE: [RFC PATCH v3 07/18] perf stat: Add functions to set counter bitmaps for hardware-grouping method
2024-01-24 5:17 ` Ian Rogers
@ 2024-01-24 16:59 ` Wang, Weilin
0 siblings, 0 replies; 34+ messages in thread
From: Wang, Weilin @ 2024-01-24 16:59 UTC (permalink / raw)
To: Ian Rogers
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Hunter, Adrian,
Kan Liang, linux-perf-users@vger.kernel.org,
linux-kernel@vger.kernel.org, Taylor, Perry, Alt, Samantha,
Biggers, Caleb, Mark Rutland, Yang Jihong
> -----Original Message-----
> From: Ian Rogers <irogers@google.com>
> Sent: Tuesday, January 23, 2024 9:18 PM
> To: Wang, Weilin <weilin.wang@intel.com>
> Cc: Peter Zijlstra <peterz@infradead.org>; Ingo Molnar <mingo@redhat.com>;
> Arnaldo Carvalho de Melo <acme@kernel.org>; Alexander Shishkin
> <alexander.shishkin@linux.intel.com>; Jiri Olsa <jolsa@kernel.org>; Namhyung
> Kim <namhyung@kernel.org>; Hunter, Adrian <adrian.hunter@intel.com>;
> Kan Liang <kan.liang@linux.intel.com>; linux-perf-users@vger.kernel.org;
> linux-kernel@vger.kernel.org; Taylor, Perry <perry.taylor@intel.com>; Alt,
> Samantha <samantha.alt@intel.com>; Biggers, Caleb
> <caleb.biggers@intel.com>; Mark Rutland <mark.rutland@arm.com>; Yang
> Jihong <yangjihong1@huawei.com>
> Subject: Re: [RFC PATCH v3 07/18] perf stat: Add functions to set counter
> bitmaps for hardware-grouping method
>
> On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
> >
> > From: Weilin Wang <weilin.wang@intel.com>
> >
> > Add metricgroup__event_info data structure to represent an event in the
> > metric grouping context; the list of counters and the PMU name an event
> > should be collected with.
> >
> > Add functions to parse event counter info from pmu-events and generate a
> > list of metricgroup__event_info data to prepare grouping.
> >
> > Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> > ---
> > tools/perf/util/metricgroup.c | 196
> +++++++++++++++++++++++++++++++++-
> > tools/perf/util/metricgroup.h | 27 +++++
> > 2 files changed, 220 insertions(+), 3 deletions(-)
> >
> > diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> > index 8d1143ee898c..24268882d355 100644
> > --- a/tools/perf/util/metricgroup.c
> > +++ b/tools/perf/util/metricgroup.c
> > @@ -1432,6 +1432,182 @@ static int build_combined_expr_ctx(const
> struct list_head *metric_list,
> > return ret;
> > }
> >
> > +/**
> > + * set_counter_bitmap - The counter bit mapping: [8-15,0-7], e.g. the GP0
> is the
> > + * 8th bit and GP7 is the 1st bit in this 16-bits bitmap. It is helpful for
> > + * assigning GP4-7 before GP0-3 because some events can be collected
> using GP0-3
> > + * only on some platforms.
> > + */
> > +static int set_counter_bitmap(int pos, unsigned long *bitmap)
> > +{
> > + if (pos >= NR_COUNTERS || pos < 0)
> > + return -EINVAL;
> > + if (pos <= 7)
> > + pos = TRANSFER_FIRST_BYTE(pos);
> > + else
> > + pos = TRANSFER_SEC_BYTE(pos);
> > + *bitmap |= 1ul << pos;
>
> __set_bit may be more canonical here, in case we ever had more than 64
> counters.
>
> > + return 0;
> > +}
> > +
> > +static int parse_fixed_counter(const char *counter,
> > + unsigned long *bitmap,
> > + bool *fixed)
> > +{
> > + int ret = -ENOENT;
> > + //TODO: this pattern is different on some other platforms
> > + const char *pattern = "Fixed counter ";
> > + int pos = 0;
> > +
> > + if (!strncmp(counter, pattern, strlen(pattern))) {
> > + pos = atoi(counter + strlen(pattern));
> > + ret = set_counter_bitmap(pos, bitmap);
> > + if (ret)
> > + return ret;
> > + *fixed = true;
> > + return 0;
> > + }
> > + return ret;
> > +}
>
> It'd be nice if the counter APIs that are specific to a PMU could be
> part of the struct pmu API.
>
> > +
> > +/**
> > + * parse_counter - Parse event counter info from pmu-events and set up
> bitmap
> > + * accordingly.
> > + *
> > + * @counter: counter info string to be parsed.
> > + * @bitmap: bitmap to set based on counter info parsed.
> > + * @fixed: is set to true if the event uses fixed counter.
> > + */
> > +static int parse_counter(const char *counter,
> > + unsigned long *bitmap,
> > + bool *fixed)
> > +{
> > + int ret = 0;
> > + char *p;
> > + char *tok;
> > + int pos = 0;
> > +
> > + ret = parse_fixed_counter(counter, bitmap, fixed);
> > + // ret==0 means matched with fixed counter
> > + if (ret == 0)
> > + return ret;
> > +
> > + p = strdup(counter);
> > + tok = strtok(p, ",");
> > + if (!tok)
> > + return -ENOENT;
> > +
> > + while (tok) {
> > + pos = atoi(tok);
> > + ret = set_counter_bitmap(pos, bitmap);
> > + if (ret)
> > + return ret;
> > + tok = strtok(NULL, ",");
> > + }
> > + return 0;
> > +}
> > +
> > +static struct metricgroup__event_info *event_info__new(const char
> *name,
> > + const char *pmu_name,
> > + const char *counter,
> > + bool free_counter)
> > +{
> > + int ret = 0;
> > + char *bit_buf = malloc(NR_COUNTERS);
> > + bool fixed_counter = false;
> > + struct metricgroup__event_info *e;
> > +
> > + e = zalloc(sizeof(*e));
> > + if (!e)
> > + return NULL;
> > + if (!pmu_name)
> > + pmu_name = "core";
> > +
> > + e->name = name;
> > + e->free_counter = free_counter;
> > + e->pmu_name = strdup(pmu_name);
> > + if (free_counter) {
> > + ret = set_counter_bitmap(0, e->counters);
> > + if (ret)
> > + return NULL;
> > + } else {
> > + ret = parse_counter(counter, e->counters, &fixed_counter);
> > + if (ret)
> > + return NULL;
> > + e->fixed_counter = fixed_counter;
> > + }
> > +
> > + bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf,
> NR_COUNTERS);
> > + pr_debug("Event %s requires pmu %s counter: %s bitmap %s,
> [pmu=%s]\n",
> > + e->name, e->pmu_name, counter, bit_buf, pmu_name);
> > +
> > + return e;
> > +}
> > +
> > +struct metricgroup__add_metric_event_data {
> > + struct list_head *list;
> > + /* pure event name, exclude umask and other info*/
> > + const char *event_name;
> > + /* event name and umask if applicable*/
> > + const char *event_id;
> > +};
> > +
> > +static int metricgroup__add_metric_event_callback(const struct pmu_event
> *pe,
> > + const struct pmu_events_table *table
> __maybe_unused,
> > + void *data)
> > +{
> > + struct metricgroup__event_info *event;
> > + struct metricgroup__add_metric_event_data *d = data;
> > +
> > + if (!strcasecmp(pe->name, d->event_name)) {
> > + event = event_info__new(d->event_id, pe->pmu, pe->counter,
> /*free_counter=*/false);
> > + if (!event)
> > + return -ENOMEM;
> > + list_add(&event->nd, d->list);
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +/**
> > + * get_metricgroup_events - Find counter requirement of events from the
> > + * pmu_events table
> > + * @full_id: the full event identifiers.
> > + * @table: pmu_events table that is searched for event data.
> > + * @event_info_list: the list that the new event counter info added to.
> > + */
> > +static int get_metricgroup_events(const char *full_id,
> > + const struct pmu_events_table *table,
> > + struct list_head *event_info_list)
> > +{
> > + LIST_HEAD(list);
> > + int ret = 0;
> > + const char *id;
> > + const char *rsep, *sep = strchr(full_id, '@');
> > +
> > + if (sep) {
> > + rsep = strchr(full_id, ',');
> > + id = strndup(sep + 1, rsep - sep - 1);
> > + if (ret)
> > + goto out;
> > + } else {
> > + id = full_id;
> > + }
> > + {
> > + struct metricgroup__add_metric_event_data data = {
> > + .list = &list,
> > + .event_name = id,
> > + .event_id = full_id,
> > + };
> > + ret = pmu_events_table_for_each_event(table,
> > + metricgroup__add_metric_event_callback, &data);
> > + }
> > +
> > +out:
> > + list_splice(&list, event_info_list);
> > + return ret;
> > +}
> > +
> > /**
> > * hw_aware_build_grouping - Build event groupings by reading counter
> > * requirement of the events and counter available on the system from
> > @@ -1445,9 +1621,25 @@ static int hw_aware_build_grouping(struct
> expr_parse_ctx *ctx __maybe_unused,
> > const char *modifier __maybe_unused)
> > {
> > int ret = 0;
> > + struct hashmap_entry *cur;
> > + LIST_HEAD(pmu_info_list);
> > + LIST_HEAD(event_info_list);
> > + size_t bkt;
> > + const struct pmu_events_table *etable =
> perf_pmu__find_events_table(NULL);
> > +
> > +#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
> > + hashmap__for_each_entry(ctx->ids, cur, bkt) {
> > + const char *id = cur->pkey;
> > +
> > + pr_debug("found event %s\n", id);
> > +
> > + ret = get_metricgroup_events(id, etable, &event_info_list);
> > + if (ret)
> > + return ret;
> > + }
> >
> > - pr_debug("This is a placeholder\n");
> > return ret;
> > +#undef RETURN_IF_NON_ZERO
> > }
> >
> > static void group_str_free(struct metricgroup__group_strs *g)
> > @@ -1521,8 +1713,6 @@ static int hw_aware_parse_ids(struct perf_pmu
> *fake_pmu,
> > *out_evlist = parsed_evlist;
> > parsed_evlist = NULL;
> > err_out:
> > - parse_events_error__exit(&parse_error);
> > - evlist__delete(parsed_evlist);
> > metricgroup__free_grouping_strs(&groupings);
> > return ret;
> > }
> > diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> > index 89809df85644..3704545c9a11 100644
> > --- a/tools/perf/util/metricgroup.h
> > +++ b/tools/perf/util/metricgroup.h
> > @@ -5,6 +5,7 @@
> > #include <linux/list.h>
> > #include <linux/rbtree.h>
> > #include <stdbool.h>
> > +#include <linux/bitmap.h>
> > #include "pmu-events/pmu-events.h"
> > #include "strbuf.h"
> >
> > @@ -67,6 +68,32 @@ struct metric_expr {
> > int runtime;
> > };
> >
>
> If this is just used in metricgroup.c then it'd be better to keep the
> definitions there for the sake of encapsulation.
I will move these definitions to metricgroup.c.
>
> > +/* Maximum number of counters per PMU*/
> > +#define NR_COUNTERS 16
>
> Fixed and/or generic?
>
> > +/*
> > + * Transfer bit position in the bitmap to ensure start assigning counter from
> > + * the last GP counter to the first.
> > + * bit15 <---> bit0
> > + * [GP8-GP15] [GP0-GP7]
> > + */
> > +#define TRANSFER_FIRST_BYTE(pos) (7 - pos)
> > +#define TRANSFER_SEC_BYTE(pos) (23 - pos)
>
> Not sure why this bit flipping is necessary, if fixed counters are
> separated out to their own bitmap does it help?
>
Kan also commented on this part. I've made some updates on bitmap related functions
and going to send that out in next version.
The goal of this flipping was to ensure to assign the highest indexed available counter first.
I did not find a find_last_and_bit() so used find_first_and_bit() and then this flipping.
> > +
> > +/**
> > + * An event used in a metric. This info is for metric grouping.
> > + */
> > +struct metricgroup__event_info {
> > + struct list_head nd;
> > + /** The name of the event. */
> > + const char *name;
> > + /** The name of the pmu the event be collected on. */
> > + const char *pmu_name;
>
> Could we use the "struct pmu*" here?
>
> > + bool fixed_counter;
> > + bool free_counter;
>
> Missing comment for *_counter.
>
> Thanks,
> Ian
>
> > + /** The counters the event allowed to be collected on. */
> > + DECLARE_BITMAP(counters, NR_COUNTERS);
> > +};
> > +
> > /**
> > * Each group is one node in the group string list.
> > */
> > --
> > 2.39.3
> >
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 08/18] perf stat: Add functions to get counter info
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (7 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 07/18] perf stat: Add functions to set counter bitmaps for hardware-grouping method weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 15:57 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 09/18] perf stat: Add functions to create new group and assign events into groups for hardware-grouping method weilin.wang
` (9 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add data structure metricgroup__pmu_counters to represent hardware counters
available in the system.
Add functions to parse pmu-events and create the list of pmu_info_list to
hold the counter information of the system.
Add functions to free pmu_info_list and event_info_list before exit
grouping for hardware-grouping method
This method would fall back to normal grouping when event json files do not
support hardware aware grouping.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 85 +++++++++++++++++++++++++++++++++--
tools/perf/util/metricgroup.h | 15 +++++++
2 files changed, 97 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 24268882d355..a393584c7a73 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1507,6 +1507,27 @@ static int parse_counter(const char *counter,
return 0;
}
+static void metricgroup__free_event_info(struct list_head
+ *event_info_list)
+{
+ struct metricgroup__event_info *e, *tmp;
+
+ list_for_each_entry_safe(e, tmp, event_info_list, nd) {
+ list_del_init(&e->nd);
+ free(e);
+ }
+}
+
+static void metricgroup__free_pmu_info(struct list_head *pmu_info_list)
+{
+ struct metricgroup__pmu_counters *p, *tmp;
+
+ list_for_each_entry_safe(p, tmp, pmu_info_list, nd) {
+ list_del_init(&p->nd);
+ free(p);
+ }
+}
+
static struct metricgroup__event_info *event_info__new(const char *name,
const char *pmu_name,
const char *counter,
@@ -1525,7 +1546,7 @@ static struct metricgroup__event_info *event_info__new(const char *name,
e->name = name;
e->free_counter = free_counter;
- e->pmu_name = strdup(pmu_name);
+ e->pmu_name = pmu_name;
if (free_counter) {
ret = set_counter_bitmap(0, e->counters);
if (ret)
@@ -1560,6 +1581,8 @@ static int metricgroup__add_metric_event_callback(const struct pmu_event *pe,
struct metricgroup__add_metric_event_data *d = data;
if (!strcasecmp(pe->name, d->event_name)) {
+ if (!pe->counter)
+ return -EINVAL;
event = event_info__new(d->event_id, pe->pmu, pe->counter, /*free_counter=*/false);
if (!event)
return -ENOMEM;
@@ -1599,7 +1622,7 @@ static int get_metricgroup_events(const char *full_id,
.event_name = id,
.event_id = full_id,
};
- ret = pmu_events_table_for_each_event(table,
+ ret = pmu_events_table__for_each_event(table, /*pmu=*/NULL,
metricgroup__add_metric_event_callback, &data);
}
@@ -1608,6 +1631,57 @@ static int get_metricgroup_events(const char *full_id,
return ret;
}
+static struct metricgroup__pmu_counters *pmu_layout__new(const struct pmu_layout *pl)
+{
+ struct metricgroup__pmu_counters *l;
+
+ l = zalloc(sizeof(*l));
+
+ if (!l)
+ return NULL;
+
+ l->name = pl->pmu;
+ l->size = pl->size;
+ l->fixed_size = pl->fixed_size;
+ pr_debug("create new pmu_layout: [pmu]=%s, [gp_size]=%ld, [fixed_size]=%ld\n",
+ l->name, l->size, l->fixed_size);
+ return l;
+}
+
+static int metricgroup__add_pmu_layout_callback(const struct pmu_layout *pl,
+ void *data)
+{
+ struct metricgroup__pmu_counters *pmu;
+ struct list_head *d = data;
+ int ret = 0;
+
+ pmu = pmu_layout__new(pl);
+ if (!pmu)
+ return -ENOMEM;
+ list_add(&pmu->nd, d);
+ return ret;
+}
+
+/**
+ * get_pmu_counter_layouts - Find counter info of the architecture from
+ * the pmu_layouts table
+ * @pmu_info_list: the list that the new counter info of a pmu is added to.
+ * @table: pmu_layouts table that is searched for counter info.
+ */
+static int get_pmu_counter_layouts(struct list_head *pmu_info_list,
+ const struct pmu_layouts_table
+ *table)
+{
+ LIST_HEAD(list);
+ int ret;
+
+ ret = pmu_layouts_table__for_each_layout(table,
+ metricgroup__add_pmu_layout_callback, &list);
+
+ list_splice(&list, pmu_info_list);
+ return ret;
+}
+
/**
* hw_aware_build_grouping - Build event groupings by reading counter
* requirement of the events and counter available on the system from
@@ -1626,6 +1700,7 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
LIST_HEAD(event_info_list);
size_t bkt;
const struct pmu_events_table *etable = perf_pmu__find_events_table(NULL);
+ const struct pmu_layouts_table *ltable = perf_pmu__find_layouts_table(NULL);
#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
hashmap__for_each_entry(ctx->ids, cur, bkt) {
@@ -1635,9 +1710,13 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
ret = get_metricgroup_events(id, etable, &event_info_list);
if (ret)
- return ret;
+ goto err_out;
}
+ ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
+err_out:
+ metricgroup__free_event_info(&event_info_list);
+ metricgroup__free_pmu_info(&pmu_info_list);
return ret;
#undef RETURN_IF_NON_ZERO
}
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 3704545c9a11..802ca15e7c6b 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -94,6 +94,21 @@ struct metricgroup__event_info {
DECLARE_BITMAP(counters, NR_COUNTERS);
};
+/**
+ * A node is the counter availability of a pmu.
+ * This info is built up at the beginning from JSON file and
+ * used as a reference in metric grouping process.
+ */
+struct metricgroup__pmu_counters {
+ struct list_head nd;
+ /** The name of the pmu the event collected on. */
+ const char *name;
+ //DECLARE_BITMAP(counter_bits, NR_COUNTERS);
+ /** The number of gp counters in the pmu. */
+ size_t size;
+ size_t fixed_size;
+};
+
/**
* Each group is one node in the group string list.
*/
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 08/18] perf stat: Add functions to get counter info
2023-12-12 23:02 ` [RFC PATCH v3 08/18] perf stat: Add functions to get counter info weilin.wang
@ 2024-01-24 15:57 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 15:57 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Add data structure metricgroup__pmu_counters to represent hardware counters
> available in the system.
>
> Add functions to parse pmu-events and create the list of pmu_info_list to
> hold the counter information of the system.
>
> Add functions to free pmu_info_list and event_info_list before exit
> grouping for hardware-grouping method
>
> This method would fall back to normal grouping when event json files do not
> support hardware aware grouping.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/perf/util/metricgroup.c | 85 +++++++++++++++++++++++++++++++++--
> tools/perf/util/metricgroup.h | 15 +++++++
> 2 files changed, 97 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index 24268882d355..a393584c7a73 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1507,6 +1507,27 @@ static int parse_counter(const char *counter,
> return 0;
> }
>
> +static void metricgroup__free_event_info(struct list_head
> + *event_info_list)
> +{
> + struct metricgroup__event_info *e, *tmp;
> +
> + list_for_each_entry_safe(e, tmp, event_info_list, nd) {
> + list_del_init(&e->nd);
> + free(e);
> + }
> +}
> +
> +static void metricgroup__free_pmu_info(struct list_head *pmu_info_list)
> +{
> + struct metricgroup__pmu_counters *p, *tmp;
> +
> + list_for_each_entry_safe(p, tmp, pmu_info_list, nd) {
> + list_del_init(&p->nd);
> + free(p);
> + }
> +}
> +
> static struct metricgroup__event_info *event_info__new(const char *name,
> const char *pmu_name,
> const char *counter,
> @@ -1525,7 +1546,7 @@ static struct metricgroup__event_info *event_info__new(const char *name,
>
> e->name = name;
> e->free_counter = free_counter;
> - e->pmu_name = strdup(pmu_name);
> + e->pmu_name = pmu_name;
> if (free_counter) {
> ret = set_counter_bitmap(0, e->counters);
> if (ret)
> @@ -1560,6 +1581,8 @@ static int metricgroup__add_metric_event_callback(const struct pmu_event *pe,
> struct metricgroup__add_metric_event_data *d = data;
>
> if (!strcasecmp(pe->name, d->event_name)) {
> + if (!pe->counter)
> + return -EINVAL;
> event = event_info__new(d->event_id, pe->pmu, pe->counter, /*free_counter=*/false);
> if (!event)
> return -ENOMEM;
> @@ -1599,7 +1622,7 @@ static int get_metricgroup_events(const char *full_id,
> .event_name = id,
> .event_id = full_id,
> };
> - ret = pmu_events_table_for_each_event(table,
> + ret = pmu_events_table__for_each_event(table, /*pmu=*/NULL,
> metricgroup__add_metric_event_callback, &data);
> }
>
> @@ -1608,6 +1631,57 @@ static int get_metricgroup_events(const char *full_id,
> return ret;
> }
>
> +static struct metricgroup__pmu_counters *pmu_layout__new(const struct pmu_layout *pl)
> +{
> + struct metricgroup__pmu_counters *l;
> +
> + l = zalloc(sizeof(*l));
> +
> + if (!l)
> + return NULL;
> +
> + l->name = pl->pmu;
> + l->size = pl->size;
> + l->fixed_size = pl->fixed_size;
> + pr_debug("create new pmu_layout: [pmu]=%s, [gp_size]=%ld, [fixed_size]=%ld\n",
> + l->name, l->size, l->fixed_size);
> + return l;
> +}
> +
> +static int metricgroup__add_pmu_layout_callback(const struct pmu_layout *pl,
> + void *data)
> +{
> + struct metricgroup__pmu_counters *pmu;
> + struct list_head *d = data;
> + int ret = 0;
> +
> + pmu = pmu_layout__new(pl);
> + if (!pmu)
> + return -ENOMEM;
> + list_add(&pmu->nd, d);
> + return ret;
> +}
> +
> +/**
> + * get_pmu_counter_layouts - Find counter info of the architecture from
> + * the pmu_layouts table
> + * @pmu_info_list: the list that the new counter info of a pmu is added to.
> + * @table: pmu_layouts table that is searched for counter info.
> + */
> +static int get_pmu_counter_layouts(struct list_head *pmu_info_list,
> + const struct pmu_layouts_table
> + *table)
> +{
> + LIST_HEAD(list);
> + int ret;
> +
> + ret = pmu_layouts_table__for_each_layout(table,
> + metricgroup__add_pmu_layout_callback, &list);
> +
> + list_splice(&list, pmu_info_list);
> + return ret;
> +}
> +
> /**
> * hw_aware_build_grouping - Build event groupings by reading counter
> * requirement of the events and counter available on the system from
> @@ -1626,6 +1700,7 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> LIST_HEAD(event_info_list);
> size_t bkt;
> const struct pmu_events_table *etable = perf_pmu__find_events_table(NULL);
> + const struct pmu_layouts_table *ltable = perf_pmu__find_layouts_table(NULL);
>
> #define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
> hashmap__for_each_entry(ctx->ids, cur, bkt) {
> @@ -1635,9 +1710,13 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
>
> ret = get_metricgroup_events(id, etable, &event_info_list);
> if (ret)
> - return ret;
> + goto err_out;
> }
> + ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
>
> +err_out:
> + metricgroup__free_event_info(&event_info_list);
> + metricgroup__free_pmu_info(&pmu_info_list);
> return ret;
> #undef RETURN_IF_NON_ZERO
> }
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index 3704545c9a11..802ca15e7c6b 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -94,6 +94,21 @@ struct metricgroup__event_info {
> DECLARE_BITMAP(counters, NR_COUNTERS);
> };
>
> +/**
> + * A node is the counter availability of a pmu.
> + * This info is built up at the beginning from JSON file and
> + * used as a reference in metric grouping process.
> + */
> +struct metricgroup__pmu_counters {
> + struct list_head nd;
> + /** The name of the pmu the event collected on. */
> + const char *name;
> + //DECLARE_BITMAP(counter_bits, NR_COUNTERS);
nit: this can go.
> + /** The number of gp counters in the pmu. */
> + size_t size;
> + size_t fixed_size;
nit: same naming concern.
Thanks,
Ian
> +};
> +
> /**
> * Each group is one node in the group string list.
> */
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 09/18] perf stat: Add functions to create new group and assign events into groups for hardware-grouping method
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (8 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 08/18] perf stat: Add functions to get counter info weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 16:52 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 10/18] perf stat: Add build string function and topdown events handling in hardware-grouping weilin.wang
` (8 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add struct metricgroup__pmu_group_list to hold the lists of groups from
different PMUs. Each PMU has one separate list.
Add struct metricgroup__group as one node (one group in the grouping
result) of the metricgroup__pmu_group_list. It uses two bitmaps to log
counter availabilities(gp counters and fixed counters).
Add functions to create group and assign event into the groups based on the
event restrictions (struct metricgroup__event_info) and counter
availability (pmu_info_list and bitmaps). New group is inserted into the
list of groups.
Add functions to handle counter bitmaps. Add functions do find and insert
operations to handle inserting event into groups.
Add function to fill all bits of one counter bitmap. Add functions to
create new groups when no counter is available in all the existing groups.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/lib/bitmap.c | 20 +++
tools/perf/util/metricgroup.c | 254 ++++++++++++++++++++++++++++++++++
tools/perf/util/metricgroup.h | 37 +++++
3 files changed, 311 insertions(+)
diff --git a/tools/lib/bitmap.c b/tools/lib/bitmap.c
index c3e4871967bc..a96dbf001244 100644
--- a/tools/lib/bitmap.c
+++ b/tools/lib/bitmap.c
@@ -100,3 +100,23 @@ bool __bitmap_intersects(const unsigned long *bitmap1,
return true;
return false;
}
+
+void bitmap_clear(unsigned long *map, unsigned int start, int len)
+{
+ unsigned long *p = map + BIT_WORD(start);
+ const unsigned int size = start + len;
+ int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG);
+ unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start);
+
+ while (len - bits_to_clear >= 0) {
+ *p &= ~mask_to_clear;
+ len -= bits_to_clear;
+ bits_to_clear = BITS_PER_LONG;
+ mask_to_clear = ~0UL;
+ p++;
+ }
+ if (len) {
+ mask_to_clear &= BITMAP_LAST_WORD_MASK(size);
+ *p &= ~mask_to_clear;
+ }
+}
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index a393584c7a73..9d06fe4488dc 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1450,6 +1450,27 @@ static int set_counter_bitmap(int pos, unsigned long *bitmap)
return 0;
}
+static int find_counter_bitmap(unsigned long *addr1,
+ unsigned long *addr2,
+ unsigned long *bit)
+{
+ unsigned long find_bit = find_next_and_bit(addr1, addr2, NR_COUNTERS, 0);
+
+ if (find_bit == NR_COUNTERS)
+ return -ERANGE;
+ *bit = find_bit;
+ return 0;
+}
+
+static int use_counter_bitmap(unsigned long *bitmap,
+ unsigned long find_bit)
+{
+ if (find_bit >= NR_COUNTERS)
+ return -EINVAL;
+ bitmap_clear(bitmap, find_bit, 1);
+ return 0;
+}
+
static int parse_fixed_counter(const char *counter,
unsigned long *bitmap,
bool *fixed)
@@ -1507,6 +1528,38 @@ static int parse_counter(const char *counter,
return 0;
}
+static void group_event_list_free(struct metricgroup__group *groups)
+{
+ struct metricgroup__group_events *e, *tmp;
+
+ list_for_each_entry_safe(e, tmp, &groups->event_head, nd) {
+ list_del_init(&e->nd);
+ free(e);
+ }
+}
+
+static void group_list_free(struct metricgroup__pmu_group_list *groups)
+{
+ struct metricgroup__group *g, *tmp;
+
+ list_for_each_entry_safe(g, tmp, &groups->group_head, nd) {
+ list_del_init(&g->nd);
+ group_event_list_free(g);
+ free(g);
+ }
+}
+
+static void metricgroup__free_group_list(struct list_head *groups)
+{
+ struct metricgroup__pmu_group_list *g, *tmp;
+
+ list_for_each_entry_safe(g, tmp, groups, nd) {
+ list_del_init(&g->nd);
+ group_list_free(g);
+ free(g);
+ }
+}
+
static void metricgroup__free_event_info(struct list_head
*event_info_list)
{
@@ -1682,6 +1735,203 @@ static int get_pmu_counter_layouts(struct list_head *pmu_info_list,
return ret;
}
+static int fill_counter_bitmap(unsigned long *bitmap, int start, int size)
+{
+ int ret;
+
+ bitmap_zero(bitmap, NR_COUNTERS);
+
+ for (int pos = start; pos < start + size; pos++) {
+ ret = set_counter_bitmap(pos, bitmap);
+ if (ret)
+ return ret;
+ }
+ return 0;
+}
+
+/**
+ * Find if there is a counter available for event e in current_group. If a
+ * counter is available, use this counter by fill the bit in the correct counter
+ * bitmap. Otherwise, return error (-ERANGE).
+ */
+static int find_and_set_counters(struct metricgroup__event_info *e,
+ struct metricgroup__group *current_group)
+{
+ int ret;
+ unsigned long find_bit = 0;
+
+ if (e->free_counter)
+ return 0;
+ if (e->fixed_counter) {
+ ret = find_counter_bitmap(current_group->fixed_counters, e->counters,
+ &find_bit);
+ if (ret)
+ return ret;
+ pr_debug("found counter for [event]=%s [e->fixed_counters]=%lu\n",
+ e->name, *current_group->fixed_counters);
+ ret = use_counter_bitmap(current_group->fixed_counters, find_bit);
+ } else {
+ ret = find_counter_bitmap(current_group->gp_counters, e->counters,
+ &find_bit);
+ if (ret)
+ return ret;
+ pr_debug("found counter for [event]=%s [e->gp_counters]=%lu\n",
+ e->name, *current_group->gp_counters);
+ ret = use_counter_bitmap(current_group->gp_counters, find_bit);
+ }
+ return ret;
+}
+
+static int _insert_event(struct metricgroup__event_info *e,
+ struct metricgroup__group *group)
+{
+ struct metricgroup__group_events *event = malloc(sizeof(struct metricgroup__group_events));
+
+ if (!event)
+ return -ENOMEM;
+ event->event_name = e->name;
+ if (e->fixed_counter)
+ list_add(&event->nd, &group->event_head);
+ else
+ list_add_tail(&event->nd, &group->event_head);
+ return 0;
+}
+
+/**
+ * Insert the new_group node at the end of the group list.
+ */
+static int insert_new_group(struct list_head *head,
+ struct metricgroup__group *new_group,
+ size_t size,
+ size_t fixed_size)
+{
+ INIT_LIST_HEAD(&new_group->event_head);
+ fill_counter_bitmap(new_group->gp_counters, 0, size);
+ fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
+ list_add_tail(&new_group->nd, head);
+ return 0;
+}
+
+/**
+ * Insert event e into a group capable to include it
+ *
+ */
+static int insert_event_to_group(struct metricgroup__event_info *e,
+ struct metricgroup__pmu_group_list *pmu_group_head)
+{
+ struct metricgroup__group *g;
+ int ret;
+ struct list_head *head;
+
+ list_for_each_entry(g, &pmu_group_head->group_head, nd) {
+ ret = find_and_set_counters(e, g);
+ if (!ret) { /* return if successfully find and set counter*/
+ ret = _insert_event(e, g);
+ return ret;
+ }
+ }
+ /*
+ * We were not able to find an existing group to insert this event.
+ * Continue to create a new group and insert the event in it.
+ */
+ {
+ struct metricgroup__group *current_group =
+ malloc(sizeof(struct metricgroup__group));
+
+ if (!current_group)
+ return -ENOMEM;
+ pr_debug("create_new_group for [event] %s\n", e->name);
+
+ head = &pmu_group_head->group_head;
+ ret = insert_new_group(head, current_group, pmu_group_head->size,
+ pmu_group_head->fixed_size);
+ if (ret)
+ return ret;
+ ret = find_and_set_counters(e, current_group);
+ if (ret)
+ return ret;
+ ret = _insert_event(e, current_group);
+ }
+
+ return ret;
+}
+
+/**
+ * assign_event_grouping - Assign an event into a group. If existing group
+ * cannot include it, create a new group and insert the event to it.
+ */
+static int assign_event_grouping(struct metricgroup__event_info *e,
+ struct list_head *pmu_info_list,
+ struct list_head *groups)
+{
+ int ret = 0;
+
+ struct metricgroup__pmu_group_list *g = NULL;
+ struct metricgroup__pmu_group_list *pmu_group_head = NULL;
+
+ list_for_each_entry(g, groups, nd) {
+ if (!strcasecmp(g->pmu_name, e->pmu_name)) {
+ pr_debug("found group for event %s in pmu %s\n", e->name, g->pmu_name);
+ pmu_group_head = g;
+ break;
+ }
+ }
+ if (!pmu_group_head) {
+ struct metricgroup__pmu_counters *p;
+
+ pmu_group_head = malloc(sizeof(struct metricgroup__pmu_group_list));
+ if (!pmu_group_head)
+ return -ENOMEM;
+ INIT_LIST_HEAD(&pmu_group_head->group_head);
+ pr_debug("create new group for event %s in pmu %s\n", e->name, e->pmu_name);
+ pmu_group_head->pmu_name = e->pmu_name;
+ list_for_each_entry(p, pmu_info_list, nd) {
+ if (!strcasecmp(p->name, e->pmu_name)) {
+ pmu_group_head->size = p->size;
+ pmu_group_head->fixed_size = p->fixed_size;
+ break;
+ }
+ }
+ list_add_tail(&pmu_group_head->nd, groups);
+ }
+
+ ret = insert_event_to_group(e, pmu_group_head);
+ return ret;
+}
+
+/**
+ * create_grouping - Create a list of groups and place all the events of
+ * event_info_list into these groups.
+ * @pmu_info_list: the list of PMU units info based on pmu-events data, used for
+ * creating new groups.
+ * @event_info_list: the list of events to be grouped.
+ * @groupings: the list of groups with events placed in.
+ * @modifier: any modifiers added to the events.
+ */
+static int create_grouping(struct list_head *pmu_info_list,
+ struct list_head *event_info_list,
+ struct list_head *groupings __maybe_unused,
+ const char *modifier __maybe_unused)
+{
+ int ret = 0;
+ struct metricgroup__event_info *e;
+ LIST_HEAD(groups);
+ char *bit_buf = malloc(NR_COUNTERS);
+
+ //TODO: for each new core group, we should consider to add events that uses fixed counters
+ list_for_each_entry(e, event_info_list, nd) {
+ bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
+ pr_debug("Event name %s, [pmu]=%s, [counters]=%s\n", e->name,
+ e->pmu_name, bit_buf);
+ ret = assign_event_grouping(e, pmu_info_list, &groups);
+ if (ret)
+ goto out;
+ }
+out:
+ metricgroup__free_group_list(&groups);
+ return ret;
+};
+
/**
* hw_aware_build_grouping - Build event groupings by reading counter
* requirement of the events and counter available on the system from
@@ -1713,6 +1963,10 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
goto err_out;
}
ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
+ if (ret)
+ goto err_out;
+ ret = create_grouping(&pmu_info_list, &event_info_list, groupings,
+ modifier);
err_out:
metricgroup__free_event_info(&event_info_list);
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 802ca15e7c6b..51596e4b4341 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -109,6 +109,43 @@ struct metricgroup__pmu_counters {
size_t fixed_size;
};
+/**
+ * A list of groups for this pmu.
+ * This is updated during the grouping.
+ */
+struct metricgroup__pmu_group_list {
+ struct list_head nd;
+ /** The name of the pmu(/core) the events collected on. */
+ const char *pmu_name;
+ /** The number of gp counters in the pmu(/core). */
+ size_t size;
+ /** The number of fixed counters in the pmu(/core) if applicable. */
+ size_t fixed_size;
+ /** Head to the list of groups using this pmu(/core)*/
+ struct list_head group_head;
+};
+
+/**
+ * This is one node in the metricgroup__pmu_group_list.
+ * It represents on group.
+ */
+struct metricgroup__group {
+ struct list_head nd;
+ /** The bitmaps represent availability of the counters.
+ * They are updated once the corresponding counter is used by
+ * an event (event inserted into the group).
+ */
+ DECLARE_BITMAP(gp_counters, NR_COUNTERS);
+ DECLARE_BITMAP(fixed_counters, NR_COUNTERS);
+ /** Head to the list of event names in this group*/
+ struct list_head event_head;
+};
+
+struct metricgroup__group_events {
+ struct list_head nd;
+ const char *event_name;
+};
+
/**
* Each group is one node in the group string list.
*/
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 09/18] perf stat: Add functions to create new group and assign events into groups for hardware-grouping method
2023-12-12 23:02 ` [RFC PATCH v3 09/18] perf stat: Add functions to create new group and assign events into groups for hardware-grouping method weilin.wang
@ 2024-01-24 16:52 ` Ian Rogers
2024-01-24 17:06 ` Wang, Weilin
0 siblings, 1 reply; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 16:52 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Add struct metricgroup__pmu_group_list to hold the lists of groups from
> different PMUs. Each PMU has one separate list.
>
> Add struct metricgroup__group as one node (one group in the grouping
> result) of the metricgroup__pmu_group_list. It uses two bitmaps to log
> counter availabilities(gp counters and fixed counters).
>
> Add functions to create group and assign event into the groups based on the
> event restrictions (struct metricgroup__event_info) and counter
> availability (pmu_info_list and bitmaps). New group is inserted into the
> list of groups.
>
> Add functions to handle counter bitmaps. Add functions do find and insert
> operations to handle inserting event into groups.
>
> Add function to fill all bits of one counter bitmap. Add functions to
> create new groups when no counter is available in all the existing groups.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/lib/bitmap.c | 20 +++
> tools/perf/util/metricgroup.c | 254 ++++++++++++++++++++++++++++++++++
> tools/perf/util/metricgroup.h | 37 +++++
> 3 files changed, 311 insertions(+)
>
> diff --git a/tools/lib/bitmap.c b/tools/lib/bitmap.c
> index c3e4871967bc..a96dbf001244 100644
> --- a/tools/lib/bitmap.c
> +++ b/tools/lib/bitmap.c
> @@ -100,3 +100,23 @@ bool __bitmap_intersects(const unsigned long *bitmap1,
> return true;
> return false;
> }
> +
> +void bitmap_clear(unsigned long *map, unsigned int start, int len)
> +{
> + unsigned long *p = map + BIT_WORD(start);
> + const unsigned int size = start + len;
> + int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG);
> + unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start);
> +
> + while (len - bits_to_clear >= 0) {
> + *p &= ~mask_to_clear;
> + len -= bits_to_clear;
> + bits_to_clear = BITS_PER_LONG;
> + mask_to_clear = ~0UL;
> + p++;
> + }
> + if (len) {
> + mask_to_clear &= BITMAP_LAST_WORD_MASK(size);
> + *p &= ~mask_to_clear;
> + }
> +}
This is worth having its own commit. This looks derived from the kernel version:
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/lib/bitmap.c?h=perf-tools-next#n372
How can we sync these better? Generally we check things are kept in
sync as part of the build:
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/check-headers.sh?h=perf-tools-next
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/Makefile.perf?h=perf-tools-next#n250
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index a393584c7a73..9d06fe4488dc 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1450,6 +1450,27 @@ static int set_counter_bitmap(int pos, unsigned long *bitmap)
> return 0;
> }
>
> +static int find_counter_bitmap(unsigned long *addr1,
> + unsigned long *addr2,
> + unsigned long *bit)
Presumably addr1 and addr2 can be const here, could we have more
intention revealing variable names. A comment like:
/** Returns 0 on success. finds the first counter that is in use by
both <better name for addr1> and <better name for addr2>. */
> +{
> + unsigned long find_bit = find_next_and_bit(addr1, addr2, NR_COUNTERS, 0);
Why find_next and not find_first?
> +
> + if (find_bit == NR_COUNTERS)
> + return -ERANGE;
> + *bit = find_bit;
> + return 0;
> +}
> +
> +static int use_counter_bitmap(unsigned long *bitmap,
> + unsigned long find_bit)
> +{
> + if (find_bit >= NR_COUNTERS)
> + return -EINVAL;
> + bitmap_clear(bitmap, find_bit, 1);
> + return 0;
> +}
> +
> static int parse_fixed_counter(const char *counter,
> unsigned long *bitmap,
> bool *fixed)
> @@ -1507,6 +1528,38 @@ static int parse_counter(const char *counter,
> return 0;
> }
>
> +static void group_event_list_free(struct metricgroup__group *groups)
> +{
> + struct metricgroup__group_events *e, *tmp;
> +
> + list_for_each_entry_safe(e, tmp, &groups->event_head, nd) {
> + list_del_init(&e->nd);
> + free(e);
> + }
> +}
> +
> +static void group_list_free(struct metricgroup__pmu_group_list *groups)
> +{
> + struct metricgroup__group *g, *tmp;
> +
> + list_for_each_entry_safe(g, tmp, &groups->group_head, nd) {
> + list_del_init(&g->nd);
> + group_event_list_free(g);
> + free(g);
> + }
> +}
> +
> +static void metricgroup__free_group_list(struct list_head *groups)
> +{
> + struct metricgroup__pmu_group_list *g, *tmp;
> +
> + list_for_each_entry_safe(g, tmp, groups, nd) {
> + list_del_init(&g->nd);
> + group_list_free(g);
> + free(g);
> + }
> +}
> +
> static void metricgroup__free_event_info(struct list_head
> *event_info_list)
> {
> @@ -1682,6 +1735,203 @@ static int get_pmu_counter_layouts(struct list_head *pmu_info_list,
> return ret;
> }
>
> +static int fill_counter_bitmap(unsigned long *bitmap, int start, int size)
> +{
> + int ret;
> +
> + bitmap_zero(bitmap, NR_COUNTERS);
> +
> + for (int pos = start; pos < start + size; pos++) {
> + ret = set_counter_bitmap(pos, bitmap);
> + if (ret)
> + return ret;
> + }
> + return 0;
> +}
> +
> +/**
> + * Find if there is a counter available for event e in current_group. If a
> + * counter is available, use this counter by fill the bit in the correct counter
nit: s/fill/filling/
> + * bitmap. Otherwise, return error (-ERANGE).
> + */
> +static int find_and_set_counters(struct metricgroup__event_info *e,
> + struct metricgroup__group *current_group)
> +{
> + int ret;
> + unsigned long find_bit = 0;
> +
> + if (e->free_counter)
> + return 0;
> + if (e->fixed_counter) {
> + ret = find_counter_bitmap(current_group->fixed_counters, e->counters,
> + &find_bit);
> + if (ret)
> + return ret;
> + pr_debug("found counter for [event]=%s [e->fixed_counters]=%lu\n",
> + e->name, *current_group->fixed_counters);
> + ret = use_counter_bitmap(current_group->fixed_counters, find_bit);
> + } else {
> + ret = find_counter_bitmap(current_group->gp_counters, e->counters,
> + &find_bit);
> + if (ret)
> + return ret;
> + pr_debug("found counter for [event]=%s [e->gp_counters]=%lu\n",
> + e->name, *current_group->gp_counters);
> + ret = use_counter_bitmap(current_group->gp_counters, find_bit);
> + }
> + return ret;
> +}
> +
> +static int _insert_event(struct metricgroup__event_info *e,
> + struct metricgroup__group *group)
> +{
> + struct metricgroup__group_events *event = malloc(sizeof(struct metricgroup__group_events));
> +
> + if (!event)
> + return -ENOMEM;
> + event->event_name = e->name;
> + if (e->fixed_counter)
> + list_add(&event->nd, &group->event_head);
> + else
> + list_add_tail(&event->nd, &group->event_head);
> + return 0;
> +}
> +
> +/**
> + * Insert the new_group node at the end of the group list.
> + */
> +static int insert_new_group(struct list_head *head,
> + struct metricgroup__group *new_group,
> + size_t size,
> + size_t fixed_size)
> +{
> + INIT_LIST_HEAD(&new_group->event_head);
> + fill_counter_bitmap(new_group->gp_counters, 0, size);
> + fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
> + list_add_tail(&new_group->nd, head);
> + return 0;
> +}
> +
> +/**
> + * Insert event e into a group capable to include it
> + *
> + */
> +static int insert_event_to_group(struct metricgroup__event_info *e,
> + struct metricgroup__pmu_group_list *pmu_group_head)
> +{
> + struct metricgroup__group *g;
> + int ret;
> + struct list_head *head;
> +
> + list_for_each_entry(g, &pmu_group_head->group_head, nd) {
> + ret = find_and_set_counters(e, g);
> + if (!ret) { /* return if successfully find and set counter*/
> + ret = _insert_event(e, g);
> + return ret;
> + }
> + }
> + /*
> + * We were not able to find an existing group to insert this event.
> + * Continue to create a new group and insert the event in it.
> + */
> + {
> + struct metricgroup__group *current_group =
> + malloc(sizeof(struct metricgroup__group));
> +
> + if (!current_group)
> + return -ENOMEM;
> + pr_debug("create_new_group for [event] %s\n", e->name);
> +
> + head = &pmu_group_head->group_head;
> + ret = insert_new_group(head, current_group, pmu_group_head->size,
> + pmu_group_head->fixed_size);
> + if (ret)
> + return ret;
> + ret = find_and_set_counters(e, current_group);
> + if (ret)
> + return ret;
> + ret = _insert_event(e, current_group);
> + }
> +
> + return ret;
> +}
> +
> +/**
> + * assign_event_grouping - Assign an event into a group. If existing group
> + * cannot include it, create a new group and insert the event to it.
> + */
> +static int assign_event_grouping(struct metricgroup__event_info *e,
> + struct list_head *pmu_info_list,
> + struct list_head *groups)
> +{
> + int ret = 0;
> +
> + struct metricgroup__pmu_group_list *g = NULL;
> + struct metricgroup__pmu_group_list *pmu_group_head = NULL;
> +
> + list_for_each_entry(g, groups, nd) {
> + if (!strcasecmp(g->pmu_name, e->pmu_name)) {
> + pr_debug("found group for event %s in pmu %s\n", e->name, g->pmu_name);
> + pmu_group_head = g;
> + break;
> + }
> + }
> + if (!pmu_group_head) {
> + struct metricgroup__pmu_counters *p;
> +
> + pmu_group_head = malloc(sizeof(struct metricgroup__pmu_group_list));
> + if (!pmu_group_head)
> + return -ENOMEM;
> + INIT_LIST_HEAD(&pmu_group_head->group_head);
> + pr_debug("create new group for event %s in pmu %s\n", e->name, e->pmu_name);
> + pmu_group_head->pmu_name = e->pmu_name;
> + list_for_each_entry(p, pmu_info_list, nd) {
> + if (!strcasecmp(p->name, e->pmu_name)) {
> + pmu_group_head->size = p->size;
> + pmu_group_head->fixed_size = p->fixed_size;
> + break;
> + }
> + }
> + list_add_tail(&pmu_group_head->nd, groups);
> + }
> +
> + ret = insert_event_to_group(e, pmu_group_head);
> + return ret;
> +}
> +
> +/**
> + * create_grouping - Create a list of groups and place all the events of
> + * event_info_list into these groups.
> + * @pmu_info_list: the list of PMU units info based on pmu-events data, used for
> + * creating new groups.
> + * @event_info_list: the list of events to be grouped.
> + * @groupings: the list of groups with events placed in.
> + * @modifier: any modifiers added to the events.
> + */
> +static int create_grouping(struct list_head *pmu_info_list,
> + struct list_head *event_info_list,
> + struct list_head *groupings __maybe_unused,
> + const char *modifier __maybe_unused)
> +{
> + int ret = 0;
> + struct metricgroup__event_info *e;
> + LIST_HEAD(groups);
> + char *bit_buf = malloc(NR_COUNTERS);
> +
> + //TODO: for each new core group, we should consider to add events that uses fixed counters
> + list_for_each_entry(e, event_info_list, nd) {
> + bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
> + pr_debug("Event name %s, [pmu]=%s, [counters]=%s\n", e->name,
> + e->pmu_name, bit_buf);
> + ret = assign_event_grouping(e, pmu_info_list, &groups);
> + if (ret)
> + goto out;
> + }
> +out:
> + metricgroup__free_group_list(&groups);
> + return ret;
> +};
> +
> /**
> * hw_aware_build_grouping - Build event groupings by reading counter
> * requirement of the events and counter available on the system from
> @@ -1713,6 +1963,10 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> goto err_out;
> }
> ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
> + if (ret)
> + goto err_out;
> + ret = create_grouping(&pmu_info_list, &event_info_list, groupings,
> + modifier);
>
> err_out:
> metricgroup__free_event_info(&event_info_list);
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index 802ca15e7c6b..51596e4b4341 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -109,6 +109,43 @@ struct metricgroup__pmu_counters {
> size_t fixed_size;
> };
>
Could we narrow the scope of these declarations to metricgroup.c?
> +/**
> + * A list of groups for this pmu.
Groups of what?
Thanks,
Ian
> + * This is updated during the grouping.
> + */
> +struct metricgroup__pmu_group_list {
> + struct list_head nd;
> + /** The name of the pmu(/core) the events collected on. */
> + const char *pmu_name;
> + /** The number of gp counters in the pmu(/core). */
> + size_t size;
> + /** The number of fixed counters in the pmu(/core) if applicable. */
> + size_t fixed_size;
> + /** Head to the list of groups using this pmu(/core)*/
> + struct list_head group_head;
> +};
> +
> +/**
> + * This is one node in the metricgroup__pmu_group_list.
> + * It represents on group.
> + */
> +struct metricgroup__group {
> + struct list_head nd;
> + /** The bitmaps represent availability of the counters.
> + * They are updated once the corresponding counter is used by
> + * an event (event inserted into the group).
> + */
> + DECLARE_BITMAP(gp_counters, NR_COUNTERS);
> + DECLARE_BITMAP(fixed_counters, NR_COUNTERS);
> + /** Head to the list of event names in this group*/
> + struct list_head event_head;
> +};
> +
> +struct metricgroup__group_events {
> + struct list_head nd;
> + const char *event_name;
> +};
> +
> /**
> * Each group is one node in the group string list.
> */
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread* RE: [RFC PATCH v3 09/18] perf stat: Add functions to create new group and assign events into groups for hardware-grouping method
2024-01-24 16:52 ` Ian Rogers
@ 2024-01-24 17:06 ` Wang, Weilin
0 siblings, 0 replies; 34+ messages in thread
From: Wang, Weilin @ 2024-01-24 17:06 UTC (permalink / raw)
To: Ian Rogers
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Hunter, Adrian,
Kan Liang, linux-perf-users@vger.kernel.org,
linux-kernel@vger.kernel.org, Taylor, Perry, Alt, Samantha,
Biggers, Caleb, Mark Rutland, Yang Jihong
> -----Original Message-----
> From: Ian Rogers <irogers@google.com>
> Sent: Wednesday, January 24, 2024 8:52 AM
> To: Wang, Weilin <weilin.wang@intel.com>
> Cc: Peter Zijlstra <peterz@infradead.org>; Ingo Molnar <mingo@redhat.com>;
> Arnaldo Carvalho de Melo <acme@kernel.org>; Alexander Shishkin
> <alexander.shishkin@linux.intel.com>; Jiri Olsa <jolsa@kernel.org>; Namhyung
> Kim <namhyung@kernel.org>; Hunter, Adrian <adrian.hunter@intel.com>;
> Kan Liang <kan.liang@linux.intel.com>; linux-perf-users@vger.kernel.org;
> linux-kernel@vger.kernel.org; Taylor, Perry <perry.taylor@intel.com>; Alt,
> Samantha <samantha.alt@intel.com>; Biggers, Caleb
> <caleb.biggers@intel.com>; Mark Rutland <mark.rutland@arm.com>; Yang
> Jihong <yangjihong1@huawei.com>
> Subject: Re: [RFC PATCH v3 09/18] perf stat: Add functions to create new
> group and assign events into groups for hardware-grouping method
>
> On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
> >
> > From: Weilin Wang <weilin.wang@intel.com>
> >
> > Add struct metricgroup__pmu_group_list to hold the lists of groups from
> > different PMUs. Each PMU has one separate list.
> >
> > Add struct metricgroup__group as one node (one group in the grouping
> > result) of the metricgroup__pmu_group_list. It uses two bitmaps to log
> > counter availabilities(gp counters and fixed counters).
> >
> > Add functions to create group and assign event into the groups based on the
> > event restrictions (struct metricgroup__event_info) and counter
> > availability (pmu_info_list and bitmaps). New group is inserted into the
> > list of groups.
> >
> > Add functions to handle counter bitmaps. Add functions do find and insert
> > operations to handle inserting event into groups.
> >
> > Add function to fill all bits of one counter bitmap. Add functions to
> > create new groups when no counter is available in all the existing groups.
> >
> > Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> > ---
> > tools/lib/bitmap.c | 20 +++
> > tools/perf/util/metricgroup.c | 254
> ++++++++++++++++++++++++++++++++++
> > tools/perf/util/metricgroup.h | 37 +++++
> > 3 files changed, 311 insertions(+)
> >
> > diff --git a/tools/lib/bitmap.c b/tools/lib/bitmap.c
> > index c3e4871967bc..a96dbf001244 100644
> > --- a/tools/lib/bitmap.c
> > +++ b/tools/lib/bitmap.c
> > @@ -100,3 +100,23 @@ bool __bitmap_intersects(const unsigned long
> *bitmap1,
> > return true;
> > return false;
> > }
> > +
> > +void bitmap_clear(unsigned long *map, unsigned int start, int len)
> > +{
> > + unsigned long *p = map + BIT_WORD(start);
> > + const unsigned int size = start + len;
> > + int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG);
> > + unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start);
> > +
> > + while (len - bits_to_clear >= 0) {
> > + *p &= ~mask_to_clear;
> > + len -= bits_to_clear;
> > + bits_to_clear = BITS_PER_LONG;
> > + mask_to_clear = ~0UL;
> > + p++;
> > + }
> > + if (len) {
> > + mask_to_clear &= BITMAP_LAST_WORD_MASK(size);
> > + *p &= ~mask_to_clear;
> > + }
> > +}
>
> This is worth having its own commit. This looks derived from the kernel
> version:
> https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-
> next.git/tree/lib/bitmap.c?h=perf-tools-next#n372
> How can we sync these better? Generally we check things are kept in
> sync as part of the build:
> https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-
> next.git/tree/tools/perf/check-headers.sh?h=perf-tools-next
> https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-
> next.git/tree/tools/perf/Makefile.perf?h=perf-tools-next#n250
>
> > diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> > index a393584c7a73..9d06fe4488dc 100644
> > --- a/tools/perf/util/metricgroup.c
> > +++ b/tools/perf/util/metricgroup.c
> > @@ -1450,6 +1450,27 @@ static int set_counter_bitmap(int pos, unsigned
> long *bitmap)
> > return 0;
> > }
> >
> > +static int find_counter_bitmap(unsigned long *addr1,
> > + unsigned long *addr2,
> > + unsigned long *bit)
>
> Presumably addr1 and addr2 can be const here, could we have more
> intention revealing variable names. A comment like:
> /** Returns 0 on success. finds the first counter that is in use by
> both <better name for addr1> and <better name for addr2>. */
>
> > +{
> > + unsigned long find_bit = find_next_and_bit(addr1, addr2,
> NR_COUNTERS, 0);
>
> Why find_next and not find_first?
You are right, find_first is more appropriate here. I would change this to
find_last instead and remove the whole bit flipping code like I replied in
the other commit.
>
> > +
> > + if (find_bit == NR_COUNTERS)
> > + return -ERANGE;
> > + *bit = find_bit;
> > + return 0;
> > +}
> > +
> > +static int use_counter_bitmap(unsigned long *bitmap,
> > + unsigned long find_bit)
> > +{
> > + if (find_bit >= NR_COUNTERS)
> > + return -EINVAL;
> > + bitmap_clear(bitmap, find_bit, 1);
> > + return 0;
> > +}
> > +
> > static int parse_fixed_counter(const char *counter,
> > unsigned long *bitmap,
> > bool *fixed)
> > @@ -1507,6 +1528,38 @@ static int parse_counter(const char *counter,
> > return 0;
> > }
> >
> > +static void group_event_list_free(struct metricgroup__group *groups)
> > +{
> > + struct metricgroup__group_events *e, *tmp;
> > +
> > + list_for_each_entry_safe(e, tmp, &groups->event_head, nd) {
> > + list_del_init(&e->nd);
> > + free(e);
> > + }
> > +}
> > +
> > +static void group_list_free(struct metricgroup__pmu_group_list *groups)
> > +{
> > + struct metricgroup__group *g, *tmp;
> > +
> > + list_for_each_entry_safe(g, tmp, &groups->group_head, nd) {
> > + list_del_init(&g->nd);
> > + group_event_list_free(g);
> > + free(g);
> > + }
> > +}
> > +
> > +static void metricgroup__free_group_list(struct list_head *groups)
> > +{
> > + struct metricgroup__pmu_group_list *g, *tmp;
> > +
> > + list_for_each_entry_safe(g, tmp, groups, nd) {
> > + list_del_init(&g->nd);
> > + group_list_free(g);
> > + free(g);
> > + }
> > +}
> > +
> > static void metricgroup__free_event_info(struct list_head
> > *event_info_list)
> > {
> > @@ -1682,6 +1735,203 @@ static int get_pmu_counter_layouts(struct
> list_head *pmu_info_list,
> > return ret;
> > }
> >
> > +static int fill_counter_bitmap(unsigned long *bitmap, int start, int size)
> > +{
> > + int ret;
> > +
> > + bitmap_zero(bitmap, NR_COUNTERS);
> > +
> > + for (int pos = start; pos < start + size; pos++) {
> > + ret = set_counter_bitmap(pos, bitmap);
> > + if (ret)
> > + return ret;
> > + }
> > + return 0;
> > +}
> > +
> > +/**
> > + * Find if there is a counter available for event e in current_group. If a
> > + * counter is available, use this counter by fill the bit in the correct counter
>
> nit: s/fill/filling/
>
> > + * bitmap. Otherwise, return error (-ERANGE).
> > + */
> > +static int find_and_set_counters(struct metricgroup__event_info *e,
> > + struct metricgroup__group *current_group)
> > +{
> > + int ret;
> > + unsigned long find_bit = 0;
> > +
> > + if (e->free_counter)
> > + return 0;
> > + if (e->fixed_counter) {
> > + ret = find_counter_bitmap(current_group->fixed_counters, e-
> >counters,
> > + &find_bit);
> > + if (ret)
> > + return ret;
> > + pr_debug("found counter for [event]=%s [e-
> >fixed_counters]=%lu\n",
> > + e->name, *current_group->fixed_counters);
> > + ret = use_counter_bitmap(current_group->fixed_counters,
> find_bit);
> > + } else {
> > + ret = find_counter_bitmap(current_group->gp_counters, e-
> >counters,
> > + &find_bit);
> > + if (ret)
> > + return ret;
> > + pr_debug("found counter for [event]=%s [e->gp_counters]=%lu\n",
> > + e->name, *current_group->gp_counters);
> > + ret = use_counter_bitmap(current_group->gp_counters, find_bit);
> > + }
> > + return ret;
> > +}
> > +
> > +static int _insert_event(struct metricgroup__event_info *e,
> > + struct metricgroup__group *group)
> > +{
> > + struct metricgroup__group_events *event = malloc(sizeof(struct
> metricgroup__group_events));
> > +
> > + if (!event)
> > + return -ENOMEM;
> > + event->event_name = e->name;
> > + if (e->fixed_counter)
> > + list_add(&event->nd, &group->event_head);
> > + else
> > + list_add_tail(&event->nd, &group->event_head);
> > + return 0;
> > +}
> > +
> > +/**
> > + * Insert the new_group node at the end of the group list.
> > + */
> > +static int insert_new_group(struct list_head *head,
> > + struct metricgroup__group *new_group,
> > + size_t size,
> > + size_t fixed_size)
> > +{
> > + INIT_LIST_HEAD(&new_group->event_head);
> > + fill_counter_bitmap(new_group->gp_counters, 0, size);
> > + fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
> > + list_add_tail(&new_group->nd, head);
> > + return 0;
> > +}
> > +
> > +/**
> > + * Insert event e into a group capable to include it
> > + *
> > + */
> > +static int insert_event_to_group(struct metricgroup__event_info *e,
> > + struct metricgroup__pmu_group_list *pmu_group_head)
> > +{
> > + struct metricgroup__group *g;
> > + int ret;
> > + struct list_head *head;
> > +
> > + list_for_each_entry(g, &pmu_group_head->group_head, nd) {
> > + ret = find_and_set_counters(e, g);
> > + if (!ret) { /* return if successfully find and set counter*/
> > + ret = _insert_event(e, g);
> > + return ret;
> > + }
> > + }
> > + /*
> > + * We were not able to find an existing group to insert this event.
> > + * Continue to create a new group and insert the event in it.
> > + */
> > + {
> > + struct metricgroup__group *current_group =
> > + malloc(sizeof(struct metricgroup__group));
> > +
> > + if (!current_group)
> > + return -ENOMEM;
> > + pr_debug("create_new_group for [event] %s\n", e->name);
> > +
> > + head = &pmu_group_head->group_head;
> > + ret = insert_new_group(head, current_group, pmu_group_head-
> >size,
> > + pmu_group_head->fixed_size);
> > + if (ret)
> > + return ret;
> > + ret = find_and_set_counters(e, current_group);
> > + if (ret)
> > + return ret;
> > + ret = _insert_event(e, current_group);
> > + }
> > +
> > + return ret;
> > +}
> > +
> > +/**
> > + * assign_event_grouping - Assign an event into a group. If existing group
> > + * cannot include it, create a new group and insert the event to it.
> > + */
> > +static int assign_event_grouping(struct metricgroup__event_info *e,
> > + struct list_head *pmu_info_list,
> > + struct list_head *groups)
> > +{
> > + int ret = 0;
> > +
> > + struct metricgroup__pmu_group_list *g = NULL;
> > + struct metricgroup__pmu_group_list *pmu_group_head = NULL;
> > +
> > + list_for_each_entry(g, groups, nd) {
> > + if (!strcasecmp(g->pmu_name, e->pmu_name)) {
> > + pr_debug("found group for event %s in pmu %s\n", e->name,
> g->pmu_name);
> > + pmu_group_head = g;
> > + break;
> > + }
> > + }
> > + if (!pmu_group_head) {
> > + struct metricgroup__pmu_counters *p;
> > +
> > + pmu_group_head = malloc(sizeof(struct
> metricgroup__pmu_group_list));
> > + if (!pmu_group_head)
> > + return -ENOMEM;
> > + INIT_LIST_HEAD(&pmu_group_head->group_head);
> > + pr_debug("create new group for event %s in pmu %s\n", e->name,
> e->pmu_name);
> > + pmu_group_head->pmu_name = e->pmu_name;
> > + list_for_each_entry(p, pmu_info_list, nd) {
> > + if (!strcasecmp(p->name, e->pmu_name)) {
> > + pmu_group_head->size = p->size;
> > + pmu_group_head->fixed_size = p->fixed_size;
> > + break;
> > + }
> > + }
> > + list_add_tail(&pmu_group_head->nd, groups);
> > + }
> > +
> > + ret = insert_event_to_group(e, pmu_group_head);
> > + return ret;
> > +}
> > +
> > +/**
> > + * create_grouping - Create a list of groups and place all the events of
> > + * event_info_list into these groups.
> > + * @pmu_info_list: the list of PMU units info based on pmu-events data,
> used for
> > + * creating new groups.
> > + * @event_info_list: the list of events to be grouped.
> > + * @groupings: the list of groups with events placed in.
> > + * @modifier: any modifiers added to the events.
> > + */
> > +static int create_grouping(struct list_head *pmu_info_list,
> > + struct list_head *event_info_list,
> > + struct list_head *groupings __maybe_unused,
> > + const char *modifier __maybe_unused)
> > +{
> > + int ret = 0;
> > + struct metricgroup__event_info *e;
> > + LIST_HEAD(groups);
> > + char *bit_buf = malloc(NR_COUNTERS);
> > +
> > + //TODO: for each new core group, we should consider to add events
> that uses fixed counters
> > + list_for_each_entry(e, event_info_list, nd) {
> > + bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf,
> NR_COUNTERS);
> > + pr_debug("Event name %s, [pmu]=%s, [counters]=%s\n", e->name,
> > + e->pmu_name, bit_buf);
> > + ret = assign_event_grouping(e, pmu_info_list, &groups);
> > + if (ret)
> > + goto out;
> > + }
> > +out:
> > + metricgroup__free_group_list(&groups);
> > + return ret;
> > +};
> > +
> > /**
> > * hw_aware_build_grouping - Build event groupings by reading counter
> > * requirement of the events and counter available on the system from
> > @@ -1713,6 +1963,10 @@ static int hw_aware_build_grouping(struct
> expr_parse_ctx *ctx __maybe_unused,
> > goto err_out;
> > }
> > ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
> > + if (ret)
> > + goto err_out;
> > + ret = create_grouping(&pmu_info_list, &event_info_list, groupings,
> > + modifier);
> >
> > err_out:
> > metricgroup__free_event_info(&event_info_list);
> > diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> > index 802ca15e7c6b..51596e4b4341 100644
> > --- a/tools/perf/util/metricgroup.h
> > +++ b/tools/perf/util/metricgroup.h
> > @@ -109,6 +109,43 @@ struct metricgroup__pmu_counters {
> > size_t fixed_size;
> > };
> >
>
> Could we narrow the scope of these declarations to metricgroup.c?
>
> > +/**
> > + * A list of groups for this pmu.
>
> Groups of what?
>
> Thanks,
> Ian
>
> > + * This is updated during the grouping.
> > + */
> > +struct metricgroup__pmu_group_list {
> > + struct list_head nd;
> > + /** The name of the pmu(/core) the events collected on. */
> > + const char *pmu_name;
> > + /** The number of gp counters in the pmu(/core). */
> > + size_t size;
> > + /** The number of fixed counters in the pmu(/core) if applicable. */
> > + size_t fixed_size;
> > + /** Head to the list of groups using this pmu(/core)*/
> > + struct list_head group_head;
> > +};
> > +
> > +/**
> > + * This is one node in the metricgroup__pmu_group_list.
> > + * It represents on group.
> > + */
> > +struct metricgroup__group {
> > + struct list_head nd;
> > + /** The bitmaps represent availability of the counters.
> > + * They are updated once the corresponding counter is used by
> > + * an event (event inserted into the group).
> > + */
> > + DECLARE_BITMAP(gp_counters, NR_COUNTERS);
> > + DECLARE_BITMAP(fixed_counters, NR_COUNTERS);
> > + /** Head to the list of event names in this group*/
> > + struct list_head event_head;
> > +};
> > +
> > +struct metricgroup__group_events {
> > + struct list_head nd;
> > + const char *event_name;
> > +};
> > +
> > /**
> > * Each group is one node in the group string list.
> > */
> > --
> > 2.39.3
> >
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 10/18] perf stat: Add build string function and topdown events handling in hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (9 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 09/18] perf stat: Add functions to create new group and assign events into groups for hardware-grouping method weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 18:36 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 11/18] perf stat: Add function to handle special events " weilin.wang
` (7 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add the function to generate final grouping strings. This function is
very similar to the existing metricgroup__build_event_string() function.
The difference is that the input data includes a list of grouping lists.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 96 +++++++++++++++++++++++++++++++++--
1 file changed, 93 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 9d06fe4488dc..5d9ed22963be 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1899,6 +1899,96 @@ static int assign_event_grouping(struct metricgroup__event_info *e,
return ret;
}
+static int hw_aware_metricgroup__build_event_string(struct list_head *group_strs,
+ const char *modifier,
+ struct list_head *groups)
+{
+ struct metricgroup__pmu_group_list *p;
+ struct metricgroup__group *g;
+ struct metricgroup__group_events *ge;
+ bool no_group = true;
+ int ret = 0;
+
+#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
+
+ list_for_each_entry(p, groups, nd) {
+ list_for_each_entry(g, &p->group_head, nd) {
+ struct strbuf *events;
+ struct metricgroup__group_strs *new_group_str =
+ malloc(sizeof(struct metricgroup__group_strs));
+
+ if (!new_group_str)
+ return -ENOMEM;
+ strbuf_init(&new_group_str->grouping_str, 0);
+ events = &new_group_str->grouping_str;
+ ret = strbuf_addch(events, '{');
+ RETURN_IF_NON_ZERO(ret);
+ no_group = true;
+ list_for_each_entry(ge, &g->event_head, nd) {
+ const char *sep, *rsep, *id = ge->event_name;
+
+ pr_debug("found event %s\n", id);
+
+ /* Separate events with commas and open the group if necessary. */
+ if (!no_group) {
+ ret = strbuf_addch(events, ',');
+ RETURN_IF_NON_ZERO(ret);
+ }
+ /*
+ * Encode the ID as an event string. Add a qualifier for
+ * metric_id that is the original name except with characters
+ * that parse-events can't parse replaced. For example,
+ * 'msr@tsc@' gets added as msr/tsc,metric-id=msr!3tsc!3/
+ */
+ sep = strchr(id, '@');
+ if (sep) {
+ ret = strbuf_add(events, id, sep - id);
+ RETURN_IF_NON_ZERO(ret);
+ ret = strbuf_addch(events, '/');
+ RETURN_IF_NON_ZERO(ret);
+ rsep = strrchr(sep, '@');
+ ret = strbuf_add(events, sep + 1, rsep - sep - 1);
+ RETURN_IF_NON_ZERO(ret);
+ ret = strbuf_addstr(events, ",metric-id=");
+ RETURN_IF_NON_ZERO(ret);
+ sep = rsep;
+ } else {
+ sep = strchr(id, ':');
+ if (sep) {
+ ret = strbuf_add(events, id, sep - id);
+ RETURN_IF_NON_ZERO(ret);
+ } else {
+ ret = strbuf_addstr(events, id);
+ RETURN_IF_NON_ZERO(ret);
+ }
+ ret = strbuf_addstr(events, "/metric-id=");
+ RETURN_IF_NON_ZERO(ret);
+ }
+ ret = encode_metric_id(events, id);
+ RETURN_IF_NON_ZERO(ret);
+ ret = strbuf_addstr(events, "/");
+ RETURN_IF_NON_ZERO(ret);
+
+ if (sep) {
+ ret = strbuf_addstr(events, sep + 1);
+ RETURN_IF_NON_ZERO(ret);
+ }
+ if (modifier) {
+ ret = strbuf_addstr(events, modifier);
+ RETURN_IF_NON_ZERO(ret);
+ }
+ no_group = false;
+ }
+ ret = strbuf_addf(events, "}:W");
+ RETURN_IF_NON_ZERO(ret);
+ pr_debug("events-buf: %s\n", events->buf);
+ list_add_tail(&new_group_str->nd, group_strs);
+ }
+ }
+ return ret;
+#undef RETURN_IF_NON_ZERO
+}
+
/**
* create_grouping - Create a list of groups and place all the events of
* event_info_list into these groups.
@@ -1910,8 +2000,8 @@ static int assign_event_grouping(struct metricgroup__event_info *e,
*/
static int create_grouping(struct list_head *pmu_info_list,
struct list_head *event_info_list,
- struct list_head *groupings __maybe_unused,
- const char *modifier __maybe_unused)
+ struct list_head *groupings,
+ const char *modifier)
{
int ret = 0;
struct metricgroup__event_info *e;
@@ -1927,6 +2017,7 @@ static int create_grouping(struct list_head *pmu_info_list,
if (ret)
goto out;
}
+ ret = hw_aware_metricgroup__build_event_string(groupings, modifier, &groups);
out:
metricgroup__free_group_list(&groups);
return ret;
@@ -1957,7 +2048,6 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
const char *id = cur->pkey;
pr_debug("found event %s\n", id);
-
ret = get_metricgroup_events(id, etable, &event_info_list);
if (ret)
goto err_out;
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 10/18] perf stat: Add build string function and topdown events handling in hardware-grouping
2023-12-12 23:02 ` [RFC PATCH v3 10/18] perf stat: Add build string function and topdown events handling in hardware-grouping weilin.wang
@ 2024-01-24 18:36 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 18:36 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Add the function to generate final grouping strings. This function is
> very similar to the existing metricgroup__build_event_string() function.
> The difference is that the input data includes a list of grouping lists.
>
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
Reviewed-by: Ian Rogers <irogers@google.com>
> ---
> tools/perf/util/metricgroup.c | 96 +++++++++++++++++++++++++++++++++--
> 1 file changed, 93 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index 9d06fe4488dc..5d9ed22963be 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1899,6 +1899,96 @@ static int assign_event_grouping(struct metricgroup__event_info *e,
> return ret;
> }
>
> +static int hw_aware_metricgroup__build_event_string(struct list_head *group_strs,
> + const char *modifier,
> + struct list_head *groups)
> +{
> + struct metricgroup__pmu_group_list *p;
> + struct metricgroup__group *g;
> + struct metricgroup__group_events *ge;
> + bool no_group = true;
> + int ret = 0;
> +
> +#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
> +
> + list_for_each_entry(p, groups, nd) {
> + list_for_each_entry(g, &p->group_head, nd) {
> + struct strbuf *events;
> + struct metricgroup__group_strs *new_group_str =
> + malloc(sizeof(struct metricgroup__group_strs));
> +
> + if (!new_group_str)
> + return -ENOMEM;
> + strbuf_init(&new_group_str->grouping_str, 0);
> + events = &new_group_str->grouping_str;
> + ret = strbuf_addch(events, '{');
> + RETURN_IF_NON_ZERO(ret);
> + no_group = true;
> + list_for_each_entry(ge, &g->event_head, nd) {
> + const char *sep, *rsep, *id = ge->event_name;
> +
> + pr_debug("found event %s\n", id);
> +
> + /* Separate events with commas and open the group if necessary. */
> + if (!no_group) {
> + ret = strbuf_addch(events, ',');
> + RETURN_IF_NON_ZERO(ret);
> + }
> + /*
> + * Encode the ID as an event string. Add a qualifier for
> + * metric_id that is the original name except with characters
> + * that parse-events can't parse replaced. For example,
> + * 'msr@tsc@' gets added as msr/tsc,metric-id=msr!3tsc!3/
> + */
> + sep = strchr(id, '@');
> + if (sep) {
> + ret = strbuf_add(events, id, sep - id);
> + RETURN_IF_NON_ZERO(ret);
> + ret = strbuf_addch(events, '/');
> + RETURN_IF_NON_ZERO(ret);
> + rsep = strrchr(sep, '@');
> + ret = strbuf_add(events, sep + 1, rsep - sep - 1);
> + RETURN_IF_NON_ZERO(ret);
> + ret = strbuf_addstr(events, ",metric-id=");
> + RETURN_IF_NON_ZERO(ret);
> + sep = rsep;
> + } else {
> + sep = strchr(id, ':');
> + if (sep) {
> + ret = strbuf_add(events, id, sep - id);
> + RETURN_IF_NON_ZERO(ret);
> + } else {
> + ret = strbuf_addstr(events, id);
> + RETURN_IF_NON_ZERO(ret);
> + }
> + ret = strbuf_addstr(events, "/metric-id=");
> + RETURN_IF_NON_ZERO(ret);
> + }
> + ret = encode_metric_id(events, id);
> + RETURN_IF_NON_ZERO(ret);
> + ret = strbuf_addstr(events, "/");
> + RETURN_IF_NON_ZERO(ret);
> +
> + if (sep) {
> + ret = strbuf_addstr(events, sep + 1);
> + RETURN_IF_NON_ZERO(ret);
> + }
> + if (modifier) {
> + ret = strbuf_addstr(events, modifier);
> + RETURN_IF_NON_ZERO(ret);
> + }
> + no_group = false;
> + }
> + ret = strbuf_addf(events, "}:W");
> + RETURN_IF_NON_ZERO(ret);
> + pr_debug("events-buf: %s\n", events->buf);
> + list_add_tail(&new_group_str->nd, group_strs);
> + }
> + }
> + return ret;
> +#undef RETURN_IF_NON_ZERO
> +}
> +
> /**
> * create_grouping - Create a list of groups and place all the events of
> * event_info_list into these groups.
> @@ -1910,8 +2000,8 @@ static int assign_event_grouping(struct metricgroup__event_info *e,
> */
> static int create_grouping(struct list_head *pmu_info_list,
> struct list_head *event_info_list,
> - struct list_head *groupings __maybe_unused,
> - const char *modifier __maybe_unused)
> + struct list_head *groupings,
> + const char *modifier)
> {
> int ret = 0;
> struct metricgroup__event_info *e;
> @@ -1927,6 +2017,7 @@ static int create_grouping(struct list_head *pmu_info_list,
> if (ret)
> goto out;
> }
> + ret = hw_aware_metricgroup__build_event_string(groupings, modifier, &groups);
> out:
> metricgroup__free_group_list(&groups);
> return ret;
> @@ -1957,7 +2048,6 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> const char *id = cur->pkey;
>
> pr_debug("found event %s\n", id);
> -
nit: unnecessary whitespace change for the patch
> ret = get_metricgroup_events(id, etable, &event_info_list);
> if (ret)
> goto err_out;
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 11/18] perf stat: Add function to handle special events in hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (10 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 10/18] perf stat: Add build string function and topdown events handling in hardware-grouping weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-24 18:58 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 12/18] perf stat: Add function to combine metrics for hardware-grouping weilin.wang
` (6 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
There are some special events like topdown events and TSC that are not
decribed in pmu-event JSON files. Add support to handle this type of
events. This should be considered as a temporary solution because including
these events in JSON files would be a better solution.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 25 +++++++++++++++++++++++--
tools/perf/util/metricgroup.h | 15 +++++++++++++++
2 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 5d9ed22963be..03383f820e06 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -2023,6 +2023,15 @@ static int create_grouping(struct list_head *pmu_info_list,
return ret;
};
+static bool is_special_event(const char *id)
+{
+ for (int i = 0; i < SPECIAL_EVENT_MAX; i++) {
+ if (!strncmp(id, special_event_names[i], strlen(special_event_names[i])))
+ return true;
+ }
+ return false;
+}
+
/**
* hw_aware_build_grouping - Build event groupings by reading counter
* requirement of the events and counter available on the system from
@@ -2047,7 +2056,17 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
hashmap__for_each_entry(ctx->ids, cur, bkt) {
const char *id = cur->pkey;
- pr_debug("found event %s\n", id);
+ if (is_special_event(id)) {
+ struct metricgroup__event_info *event;
+
+ event = event_info__new(id, "default_core", "0",
+ /*free_counter=*/true);
+ if (!event)
+ goto err_out;
+
+ list_add(&event->nd, &event_info_list);
+ continue;
+ }
ret = get_metricgroup_events(id, etable, &event_info_list);
if (ret)
goto err_out;
@@ -2519,8 +2538,10 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
ret = hw_aware_parse_groups(perf_evlist, pmu, str,
metric_no_threshold, user_requested_cpu_list, system_wide,
/*fake_pmu=*/NULL, metric_events, table);
- if (!ret)
+ if (!ret) {
+ pr_info("Hardware aware grouping completed\n");
return 0;
+ }
}
return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 51596e4b4341..37fdf8c5ba77 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -79,6 +79,21 @@ struct metric_expr {
#define TRANSFER_FIRST_BYTE(pos) (7 - pos)
#define TRANSFER_SEC_BYTE(pos) (23 - pos)
+/* Special events that are not described in pmu-event JSON files.
+ * topdown-* and TSC use dedicated registers, set as free
+ * counter for grouping purpose
+ */
+enum special_events {
+ TOPDOWN = 0,
+ TSC = 1,
+ SPECIAL_EVENT_MAX,
+};
+
+static const char *const special_event_names[SPECIAL_EVENT_MAX] = {
+ "topdown-",
+ "TSC",
+};
+
/**
* An event used in a metric. This info is for metric grouping.
*/
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 11/18] perf stat: Add function to handle special events in hardware-grouping
2023-12-12 23:02 ` [RFC PATCH v3 11/18] perf stat: Add function to handle special events " weilin.wang
@ 2024-01-24 18:58 ` Ian Rogers
0 siblings, 0 replies; 34+ messages in thread
From: Ian Rogers @ 2024-01-24 18:58 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> There are some special events like topdown events and TSC that are not
> decribed in pmu-event JSON files. Add support to handle this type of
nit: described.
> events. This should be considered as a temporary solution because including
> these events in JSON files would be a better solution.
Agreed on this being temporary. We have a similar hack with
arch_evsel__must_be_in_group, could that be reused here?
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/arch/x86/util/evsel.c?h=perf-tools-next#n41
It doesn't cover TSC but parse-events makes TSC a separate group
during parsing as the PMU (msr) differs from the PMU of the events
(typically cpu). Fixing the metrics and events to be json is very
do-able. I see on Icelake, for example, TOPDOWN.BACKEND_BOUND_SLOTS is
available while frontend isn't.
As an aside, we may want to treat msr as a software pmu:
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/util/pmu.c?h=perf-tools-next#n1761
which may be a metric regression.
Thanks,
Ian
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/perf/util/metricgroup.c | 25 +++++++++++++++++++++++--
> tools/perf/util/metricgroup.h | 15 +++++++++++++++
> 2 files changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index 5d9ed22963be..03383f820e06 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -2023,6 +2023,15 @@ static int create_grouping(struct list_head *pmu_info_list,
> return ret;
> };
>
> +static bool is_special_event(const char *id)
> +{
> + for (int i = 0; i < SPECIAL_EVENT_MAX; i++) {
> + if (!strncmp(id, special_event_names[i], strlen(special_event_names[i])))
> + return true;
> + }
> + return false;
> +}
> +
> /**
> * hw_aware_build_grouping - Build event groupings by reading counter
> * requirement of the events and counter available on the system from
> @@ -2047,7 +2056,17 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> hashmap__for_each_entry(ctx->ids, cur, bkt) {
> const char *id = cur->pkey;
>
> - pr_debug("found event %s\n", id);
> + if (is_special_event(id)) {
> + struct metricgroup__event_info *event;
> +
> + event = event_info__new(id, "default_core", "0",
> + /*free_counter=*/true);
> + if (!event)
> + goto err_out;
> +
> + list_add(&event->nd, &event_info_list);
> + continue;
> + }
> ret = get_metricgroup_events(id, etable, &event_info_list);
> if (ret)
> goto err_out;
> @@ -2519,8 +2538,10 @@ int metricgroup__parse_groups(struct evlist *perf_evlist,
> ret = hw_aware_parse_groups(perf_evlist, pmu, str,
> metric_no_threshold, user_requested_cpu_list, system_wide,
> /*fake_pmu=*/NULL, metric_events, table);
> - if (!ret)
> + if (!ret) {
> + pr_info("Hardware aware grouping completed\n");
> return 0;
> + }
> }
>
> return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_merge,
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index 51596e4b4341..37fdf8c5ba77 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -79,6 +79,21 @@ struct metric_expr {
> #define TRANSFER_FIRST_BYTE(pos) (7 - pos)
> #define TRANSFER_SEC_BYTE(pos) (23 - pos)
>
> +/* Special events that are not described in pmu-event JSON files.
> + * topdown-* and TSC use dedicated registers, set as free
> + * counter for grouping purpose
> + */
> +enum special_events {
> + TOPDOWN = 0,
> + TSC = 1,
> + SPECIAL_EVENT_MAX,
> +};
> +
> +static const char *const special_event_names[SPECIAL_EVENT_MAX] = {
> + "topdown-",
> + "TSC",
> +};
> +
> /**
> * An event used in a metric. This info is for metric grouping.
> */
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 12/18] perf stat: Add function to combine metrics for hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (11 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 11/18] perf stat: Add function to handle special events " weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-grouping weilin.wang
` (5 subsequent siblings)
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
This function is very similar to the existing build_combined_expr_ctx().
Should be able to reuse current function instead of adding a new one. Will
fix this later.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 51 +++++++++++++++++++++++++++++++----
1 file changed, 46 insertions(+), 5 deletions(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 03383f820e06..016ea949ba5d 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1432,10 +1432,50 @@ static int build_combined_expr_ctx(const struct list_head *metric_list,
return ret;
}
+/**
+ * hw_aware_build_combined_expr_ctx - Make an expr_parse_ctx with all !group_events
+ * metric IDs, as the IDs are held in a set,
+ * duplicates will be removed.
+ * @metric_list: List to take metrics from.
+ * @combined: Out argument for result.
+ */
+static int hw_aware_build_combined_expr_ctx(const struct list_head *metric_list,
+ struct expr_parse_ctx **combined)
+{
+ struct hashmap_entry *cur;
+ size_t bkt;
+ struct metric *m;
+ char *dup;
+ int ret;
+
+ *combined = expr__ctx_new();
+ if (!*combined)
+ return -ENOMEM;
+
+ list_for_each_entry(m, metric_list, nd) {
+ hashmap__for_each_entry(m->pctx->ids, cur, bkt) {
+ pr_debug2("metric: %s\n", m->metric_name);
+ dup = strdup(cur->pkey);
+ if (!dup) {
+ ret = -ENOMEM;
+ goto err_out;
+ }
+ ret = expr__add_id(*combined, dup);
+ if (ret)
+ goto err_out;
+ }
+ }
+ return 0;
+err_out:
+ expr__ctx_free(*combined);
+ *combined = NULL;
+ return ret;
+}
+
/**
* set_counter_bitmap - The counter bit mapping: [8-15,0-7], e.g. the GP0 is the
- * 8th bit and GP7 is the 1st bit in this 16-bits bitmap. It is helpful for
- * assigning GP4-7 before GP0-3 because some events can be collected using GP0-3
+ * 8th bit and GP7 is the 1st bit in this 16-bits bitmap. The is helpful to
+ * assign GP4-7 before GP0-3 because some events can be collected using GP0-3
* only on some platforms.
*/
static int set_counter_bitmap(int pos, unsigned long *bitmap)
@@ -1722,8 +1762,7 @@ static int metricgroup__add_pmu_layout_callback(const struct pmu_layout *pl,
* @table: pmu_layouts table that is searched for counter info.
*/
static int get_pmu_counter_layouts(struct list_head *pmu_info_list,
- const struct pmu_layouts_table
- *table)
+ const struct pmu_layouts_table *table)
{
LIST_HEAD(list);
int ret;
@@ -2155,6 +2194,8 @@ static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
*out_evlist = parsed_evlist;
parsed_evlist = NULL;
err_out:
+ parse_events_error__exit(&parse_error);
+ evlist__delete(parsed_evlist);
metricgroup__free_grouping_strs(&groupings);
return ret;
}
@@ -2277,7 +2318,7 @@ static int hw_aware_parse_groups(struct evlist *perf_evlist,
if (!metric_no_merge) {
struct expr_parse_ctx *combined = NULL;
- ret = build_combined_expr_ctx(&metric_list, &combined);
+ ret = hw_aware_build_combined_expr_ctx(&metric_list, &combined);
if (!ret && combined && hashmap__size(combined->ids)) {
ret = hw_aware_parse_ids(fake_pmu, combined,
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (12 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 12/18] perf stat: Add function to combine metrics for hardware-grouping weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2024-01-25 5:02 ` Ian Rogers
2023-12-12 23:02 ` [RFC PATCH v3 14/18] perf stat: Handle NMI " weilin.wang
` (4 subsequent siblings)
18 siblings, 1 reply; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add taken alone into consideration when grouping. Only one taken
alone event is supported per group.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/pmu-events/jevents.py | 7 +++++--
tools/perf/pmu-events/pmu-events.h | 1 +
tools/perf/util/metricgroup.c | 18 +++++++++++++-----
tools/perf/util/metricgroup.h | 2 ++
4 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
index 16f17d335f8e..e5919e5e6d4a 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -55,7 +55,9 @@ _json_event_attributes = [
# Counter this event could use
'counter',
# Longer things (the last won't be iterated over during decompress).
- 'long_desc'
+ 'long_desc',
+ # Taken alone event could not be collected in the same group with other taken alone event
+ 'taken_alone'
]
# Attributes that are in pmu_unit_layout.
@@ -71,7 +73,7 @@ _json_metric_attributes = [
]
# Attributes that are bools or enum int values, encoded as '0', '1',...
_json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg',
- 'size', 'fixed_size'
+ 'size', 'fixed_size', 'taken_alone'
]
def removesuffix(s: str, suffix: str) -> str:
@@ -331,6 +333,7 @@ class JsonEvent:
extra_desc += ' Spec update: ' + jd['Errata']
self.pmu = unit_to_pmu(jd.get('Unit'))
self.counter = jd.get('Counter')
+ self.taken_alone = jd.get('TakenAlone')
self.size = jd.get('Size')
self.fixed_size = jd.get('FixedSize')
filter = jd.get('Filter')
diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h
index 65e0c5dd8bb4..ce10356e9665 100644
--- a/tools/perf/pmu-events/pmu-events.h
+++ b/tools/perf/pmu-events/pmu-events.h
@@ -50,6 +50,7 @@ struct pmu_event {
const char *unit;
bool perpkg;
bool deprecated;
+ bool taken_alone;
};
struct pmu_metric {
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 016ea949ba5d..78e607f3ad56 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1624,6 +1624,7 @@ static void metricgroup__free_pmu_info(struct list_head *pmu_info_list)
static struct metricgroup__event_info *event_info__new(const char *name,
const char *pmu_name,
const char *counter,
+ bool taken_alone,
bool free_counter)
{
int ret = 0;
@@ -1638,6 +1639,7 @@ static struct metricgroup__event_info *event_info__new(const char *name,
pmu_name = "core";
e->name = name;
+ e->taken_alone = taken_alone;
e->free_counter = free_counter;
e->pmu_name = pmu_name;
if (free_counter) {
@@ -1676,7 +1678,8 @@ static int metricgroup__add_metric_event_callback(const struct pmu_event *pe,
if (!strcasecmp(pe->name, d->event_name)) {
if (!pe->counter)
return -EINVAL;
- event = event_info__new(d->event_id, pe->pmu, pe->counter, /*free_counter=*/false);
+ event = event_info__new(d->event_id, pe->pmu, pe->counter,
+ pe->taken_alone, /*free_counter=*/false);
if (!event)
return -ENOMEM;
list_add(&event->nd, d->list);
@@ -1799,6 +1802,8 @@ static int find_and_set_counters(struct metricgroup__event_info *e,
int ret;
unsigned long find_bit = 0;
+ if (e->taken_alone && current_group->taken_alone)
+ return -ENOSPC;
if (e->free_counter)
return 0;
if (e->fixed_counter) {
@@ -1833,11 +1838,13 @@ static int _insert_event(struct metricgroup__event_info *e,
list_add(&event->nd, &group->event_head);
else
list_add_tail(&event->nd, &group->event_head);
+ if (e->taken_alone)
+ group->taken_alone = true;
return 0;
}
/**
- * Insert the new_group node at the end of the group list.
+ * Initialize the new group and insert it to the end of the group list.
*/
static int insert_new_group(struct list_head *head,
struct metricgroup__group *new_group,
@@ -1847,6 +1854,7 @@ static int insert_new_group(struct list_head *head,
INIT_LIST_HEAD(&new_group->event_head);
fill_counter_bitmap(new_group->gp_counters, 0, size);
fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
+ new_group->taken_alone = false;
list_add_tail(&new_group->nd, head);
return 0;
}
@@ -2050,8 +2058,8 @@ static int create_grouping(struct list_head *pmu_info_list,
//TODO: for each new core group, we should consider to add events that uses fixed counters
list_for_each_entry(e, event_info_list, nd) {
bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
- pr_debug("Event name %s, [pmu]=%s, [counters]=%s\n", e->name,
- e->pmu_name, bit_buf);
+ pr_debug("Event name %s, [pmu]=%s, [counters]=%s, [taken_alone]=%d\n",
+ e->name, e->pmu_name, bit_buf, e->taken_alone);
ret = assign_event_grouping(e, pmu_info_list, &groups);
if (ret)
goto out;
@@ -2098,7 +2106,7 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
if (is_special_event(id)) {
struct metricgroup__event_info *event;
- event = event_info__new(id, "default_core", "0",
+ event = event_info__new(id, "default_core", "0", false,
/*free_counter=*/true);
if (!event)
goto err_out;
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 37fdf8c5ba77..8f6a1bb9d1ad 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -105,6 +105,7 @@ struct metricgroup__event_info {
const char *pmu_name;
bool fixed_counter;
bool free_counter;
+ bool taken_alone;
/** The counters the event allowed to be collected on. */
DECLARE_BITMAP(counters, NR_COUNTERS);
};
@@ -154,6 +155,7 @@ struct metricgroup__group {
DECLARE_BITMAP(fixed_counters, NR_COUNTERS);
/** Head to the list of event names in this group*/
struct list_head event_head;
+ bool taken_alone;
};
struct metricgroup__group_events {
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* Re: [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-grouping
2023-12-12 23:02 ` [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-grouping weilin.wang
@ 2024-01-25 5:02 ` Ian Rogers
2024-01-26 18:14 ` Wang, Weilin
0 siblings, 1 reply; 34+ messages in thread
From: Ian Rogers @ 2024-01-25 5:02 UTC (permalink / raw)
To: weilin.wang
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Adrian Hunter,
Kan Liang, linux-perf-users, linux-kernel, Perry Taylor,
Samantha Alt, Caleb Biggers, Mark Rutland, Yang Jihong
On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
>
> From: Weilin Wang <weilin.wang@intel.com>
>
> Add taken alone into consideration when grouping. Only one taken
> alone event is supported per group.
This seems to be a deficiency also in parse_events__sort_events_and_fix_groups:
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/util/parse-events.c?h=perf-tools-next#n2025
Is there an example of events that must be taken alone? Perhaps
because they share a fixed counter?
Thanks,
Ian
> Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> ---
> tools/perf/pmu-events/jevents.py | 7 +++++--
> tools/perf/pmu-events/pmu-events.h | 1 +
> tools/perf/util/metricgroup.c | 18 +++++++++++++-----
> tools/perf/util/metricgroup.h | 2 ++
> 4 files changed, 21 insertions(+), 7 deletions(-)
>
> diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
> index 16f17d335f8e..e5919e5e6d4a 100755
> --- a/tools/perf/pmu-events/jevents.py
> +++ b/tools/perf/pmu-events/jevents.py
> @@ -55,7 +55,9 @@ _json_event_attributes = [
> # Counter this event could use
> 'counter',
> # Longer things (the last won't be iterated over during decompress).
> - 'long_desc'
> + 'long_desc',
> + # Taken alone event could not be collected in the same group with other taken alone event
> + 'taken_alone'
> ]
>
> # Attributes that are in pmu_unit_layout.
> @@ -71,7 +73,7 @@ _json_metric_attributes = [
> ]
> # Attributes that are bools or enum int values, encoded as '0', '1',...
> _json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping', 'perpkg',
> - 'size', 'fixed_size'
> + 'size', 'fixed_size', 'taken_alone'
> ]
>
> def removesuffix(s: str, suffix: str) -> str:
> @@ -331,6 +333,7 @@ class JsonEvent:
> extra_desc += ' Spec update: ' + jd['Errata']
> self.pmu = unit_to_pmu(jd.get('Unit'))
> self.counter = jd.get('Counter')
> + self.taken_alone = jd.get('TakenAlone')
> self.size = jd.get('Size')
> self.fixed_size = jd.get('FixedSize')
> filter = jd.get('Filter')
> diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h
> index 65e0c5dd8bb4..ce10356e9665 100644
> --- a/tools/perf/pmu-events/pmu-events.h
> +++ b/tools/perf/pmu-events/pmu-events.h
> @@ -50,6 +50,7 @@ struct pmu_event {
> const char *unit;
> bool perpkg;
> bool deprecated;
> + bool taken_alone;
> };
>
> struct pmu_metric {
> diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> index 016ea949ba5d..78e607f3ad56 100644
> --- a/tools/perf/util/metricgroup.c
> +++ b/tools/perf/util/metricgroup.c
> @@ -1624,6 +1624,7 @@ static void metricgroup__free_pmu_info(struct list_head *pmu_info_list)
> static struct metricgroup__event_info *event_info__new(const char *name,
> const char *pmu_name,
> const char *counter,
> + bool taken_alone,
> bool free_counter)
> {
> int ret = 0;
> @@ -1638,6 +1639,7 @@ static struct metricgroup__event_info *event_info__new(const char *name,
> pmu_name = "core";
>
> e->name = name;
> + e->taken_alone = taken_alone;
> e->free_counter = free_counter;
> e->pmu_name = pmu_name;
> if (free_counter) {
> @@ -1676,7 +1678,8 @@ static int metricgroup__add_metric_event_callback(const struct pmu_event *pe,
> if (!strcasecmp(pe->name, d->event_name)) {
> if (!pe->counter)
> return -EINVAL;
> - event = event_info__new(d->event_id, pe->pmu, pe->counter, /*free_counter=*/false);
> + event = event_info__new(d->event_id, pe->pmu, pe->counter,
> + pe->taken_alone, /*free_counter=*/false);
> if (!event)
> return -ENOMEM;
> list_add(&event->nd, d->list);
> @@ -1799,6 +1802,8 @@ static int find_and_set_counters(struct metricgroup__event_info *e,
> int ret;
> unsigned long find_bit = 0;
>
> + if (e->taken_alone && current_group->taken_alone)
> + return -ENOSPC;
> if (e->free_counter)
> return 0;
> if (e->fixed_counter) {
> @@ -1833,11 +1838,13 @@ static int _insert_event(struct metricgroup__event_info *e,
> list_add(&event->nd, &group->event_head);
> else
> list_add_tail(&event->nd, &group->event_head);
> + if (e->taken_alone)
> + group->taken_alone = true;
> return 0;
> }
>
> /**
> - * Insert the new_group node at the end of the group list.
> + * Initialize the new group and insert it to the end of the group list.
> */
> static int insert_new_group(struct list_head *head,
> struct metricgroup__group *new_group,
> @@ -1847,6 +1854,7 @@ static int insert_new_group(struct list_head *head,
> INIT_LIST_HEAD(&new_group->event_head);
> fill_counter_bitmap(new_group->gp_counters, 0, size);
> fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
> + new_group->taken_alone = false;
> list_add_tail(&new_group->nd, head);
> return 0;
> }
> @@ -2050,8 +2058,8 @@ static int create_grouping(struct list_head *pmu_info_list,
> //TODO: for each new core group, we should consider to add events that uses fixed counters
> list_for_each_entry(e, event_info_list, nd) {
> bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
> - pr_debug("Event name %s, [pmu]=%s, [counters]=%s\n", e->name,
> - e->pmu_name, bit_buf);
> + pr_debug("Event name %s, [pmu]=%s, [counters]=%s, [taken_alone]=%d\n",
> + e->name, e->pmu_name, bit_buf, e->taken_alone);
> ret = assign_event_grouping(e, pmu_info_list, &groups);
> if (ret)
> goto out;
> @@ -2098,7 +2106,7 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
> if (is_special_event(id)) {
> struct metricgroup__event_info *event;
>
> - event = event_info__new(id, "default_core", "0",
> + event = event_info__new(id, "default_core", "0", false,
> /*free_counter=*/true);
> if (!event)
> goto err_out;
> diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> index 37fdf8c5ba77..8f6a1bb9d1ad 100644
> --- a/tools/perf/util/metricgroup.h
> +++ b/tools/perf/util/metricgroup.h
> @@ -105,6 +105,7 @@ struct metricgroup__event_info {
> const char *pmu_name;
> bool fixed_counter;
> bool free_counter;
> + bool taken_alone;
> /** The counters the event allowed to be collected on. */
> DECLARE_BITMAP(counters, NR_COUNTERS);
> };
> @@ -154,6 +155,7 @@ struct metricgroup__group {
> DECLARE_BITMAP(fixed_counters, NR_COUNTERS);
> /** Head to the list of event names in this group*/
> struct list_head event_head;
> + bool taken_alone;
> };
>
> struct metricgroup__group_events {
> --
> 2.39.3
>
^ permalink raw reply [flat|nested] 34+ messages in thread* RE: [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-grouping
2024-01-25 5:02 ` Ian Rogers
@ 2024-01-26 18:14 ` Wang, Weilin
0 siblings, 0 replies; 34+ messages in thread
From: Wang, Weilin @ 2024-01-26 18:14 UTC (permalink / raw)
To: Ian Rogers
Cc: Peter Zijlstra, Ingo Molnar, Arnaldo Carvalho de Melo,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, Hunter, Adrian,
Kan Liang, linux-perf-users@vger.kernel.org,
linux-kernel@vger.kernel.org, Taylor, Perry, Alt, Samantha,
Biggers, Caleb, Mark Rutland, Yang Jihong
> -----Original Message-----
> From: Ian Rogers <irogers@google.com>
> Sent: Wednesday, January 24, 2024 9:03 PM
> To: Wang, Weilin <weilin.wang@intel.com>
> Cc: Peter Zijlstra <peterz@infradead.org>; Ingo Molnar <mingo@redhat.com>;
> Arnaldo Carvalho de Melo <acme@kernel.org>; Alexander Shishkin
> <alexander.shishkin@linux.intel.com>; Jiri Olsa <jolsa@kernel.org>; Namhyung
> Kim <namhyung@kernel.org>; Hunter, Adrian <adrian.hunter@intel.com>;
> Kan Liang <kan.liang@linux.intel.com>; linux-perf-users@vger.kernel.org;
> linux-kernel@vger.kernel.org; Taylor, Perry <perry.taylor@intel.com>; Alt,
> Samantha <samantha.alt@intel.com>; Biggers, Caleb
> <caleb.biggers@intel.com>; Mark Rutland <mark.rutland@arm.com>; Yang
> Jihong <yangjihong1@huawei.com>
> Subject: Re: [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-
> grouping
>
> On Tue, Dec 12, 2023 at 3:03 PM <weilin.wang@intel.com> wrote:
> >
> > From: Weilin Wang <weilin.wang@intel.com>
> >
> > Add taken alone into consideration when grouping. Only one taken
> > alone event is supported per group.
>
> This seems to be a deficiency also in
> parse_events__sort_events_and_fix_groups:
> https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-
> next.git/tree/tools/perf/util/parse-events.c?h=perf-tools-next#n2025
> Is there an example of events that must be taken alone? Perhaps
> because they share a fixed counter?
Yes, there are a few events must be taken alone. I did a quick search and
found 29 events in SPR that are taken alone. The event
INT_MISC.UNKNOWN_BRANCH_CYCLES is an example. It is used in
tma_unknown_branches. Usually taken alone events do not use fixed
counter. INT_MISC.UNKNOWN_BRANCH_CYCLES could use any of the GP
counters on SPR.
Taken alone events could be grouped with other non-taken alone events.
But two taken alone events cannot be in the same group.
For example, UOPS_RETIRED.MS is another taken alone event in SPR. If we
do "perf stat -e UOPS_RETIRED.MS -e INT_MISC.UNKNOWN_BRANCH_CYCLES",
we will see multiplexing of 50% on each event. If we run "perf stat
-e INT_MISC.CLEAR_RESTEER_CYCLES -e INT_MISC.UNKNOWN_BRANCH_CYCLES",
where INT_MISC.CLEAR_RESTEER_CYCLES is not taken alone, then we don't
have any multiplexing.
>
> Thanks,
> Ian
>
> > Signed-off-by: Weilin Wang <weilin.wang@intel.com>
> > ---
> > tools/perf/pmu-events/jevents.py | 7 +++++--
> > tools/perf/pmu-events/pmu-events.h | 1 +
> > tools/perf/util/metricgroup.c | 18 +++++++++++++-----
> > tools/perf/util/metricgroup.h | 2 ++
> > 4 files changed, 21 insertions(+), 7 deletions(-)
> >
> > diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-
> events/jevents.py
> > index 16f17d335f8e..e5919e5e6d4a 100755
> > --- a/tools/perf/pmu-events/jevents.py
> > +++ b/tools/perf/pmu-events/jevents.py
> > @@ -55,7 +55,9 @@ _json_event_attributes = [
> > # Counter this event could use
> > 'counter',
> > # Longer things (the last won't be iterated over during decompress).
> > - 'long_desc'
> > + 'long_desc',
> > + # Taken alone event could not be collected in the same group with other
> taken alone event
> > + 'taken_alone'
> > ]
> >
> > # Attributes that are in pmu_unit_layout.
> > @@ -71,7 +73,7 @@ _json_metric_attributes = [
> > ]
> > # Attributes that are bools or enum int values, encoded as '0', '1',...
> > _json_enum_attributes = ['aggr_mode', 'deprecated', 'event_grouping',
> 'perpkg',
> > - 'size', 'fixed_size'
> > + 'size', 'fixed_size', 'taken_alone'
> > ]
> >
> > def removesuffix(s: str, suffix: str) -> str:
> > @@ -331,6 +333,7 @@ class JsonEvent:
> > extra_desc += ' Spec update: ' + jd['Errata']
> > self.pmu = unit_to_pmu(jd.get('Unit'))
> > self.counter = jd.get('Counter')
> > + self.taken_alone = jd.get('TakenAlone')
> > self.size = jd.get('Size')
> > self.fixed_size = jd.get('FixedSize')
> > filter = jd.get('Filter')
> > diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-
> events/pmu-events.h
> > index 65e0c5dd8bb4..ce10356e9665 100644
> > --- a/tools/perf/pmu-events/pmu-events.h
> > +++ b/tools/perf/pmu-events/pmu-events.h
> > @@ -50,6 +50,7 @@ struct pmu_event {
> > const char *unit;
> > bool perpkg;
> > bool deprecated;
> > + bool taken_alone;
> > };
> >
> > struct pmu_metric {
> > diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
> > index 016ea949ba5d..78e607f3ad56 100644
> > --- a/tools/perf/util/metricgroup.c
> > +++ b/tools/perf/util/metricgroup.c
> > @@ -1624,6 +1624,7 @@ static void metricgroup__free_pmu_info(struct
> list_head *pmu_info_list)
> > static struct metricgroup__event_info *event_info__new(const char *name,
> > const char *pmu_name,
> > const char *counter,
> > + bool taken_alone,
> > bool free_counter)
> > {
> > int ret = 0;
> > @@ -1638,6 +1639,7 @@ static struct metricgroup__event_info
> *event_info__new(const char *name,
> > pmu_name = "core";
> >
> > e->name = name;
> > + e->taken_alone = taken_alone;
> > e->free_counter = free_counter;
> > e->pmu_name = pmu_name;
> > if (free_counter) {
> > @@ -1676,7 +1678,8 @@ static int
> metricgroup__add_metric_event_callback(const struct pmu_event *pe,
> > if (!strcasecmp(pe->name, d->event_name)) {
> > if (!pe->counter)
> > return -EINVAL;
> > - event = event_info__new(d->event_id, pe->pmu, pe->counter,
> /*free_counter=*/false);
> > + event = event_info__new(d->event_id, pe->pmu, pe->counter,
> > + pe->taken_alone, /*free_counter=*/false);
> > if (!event)
> > return -ENOMEM;
> > list_add(&event->nd, d->list);
> > @@ -1799,6 +1802,8 @@ static int find_and_set_counters(struct
> metricgroup__event_info *e,
> > int ret;
> > unsigned long find_bit = 0;
> >
> > + if (e->taken_alone && current_group->taken_alone)
> > + return -ENOSPC;
> > if (e->free_counter)
> > return 0;
> > if (e->fixed_counter) {
> > @@ -1833,11 +1838,13 @@ static int _insert_event(struct
> metricgroup__event_info *e,
> > list_add(&event->nd, &group->event_head);
> > else
> > list_add_tail(&event->nd, &group->event_head);
> > + if (e->taken_alone)
> > + group->taken_alone = true;
> > return 0;
> > }
> >
> > /**
> > - * Insert the new_group node at the end of the group list.
> > + * Initialize the new group and insert it to the end of the group list.
> > */
> > static int insert_new_group(struct list_head *head,
> > struct metricgroup__group *new_group,
> > @@ -1847,6 +1854,7 @@ static int insert_new_group(struct list_head
> *head,
> > INIT_LIST_HEAD(&new_group->event_head);
> > fill_counter_bitmap(new_group->gp_counters, 0, size);
> > fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
> > + new_group->taken_alone = false;
> > list_add_tail(&new_group->nd, head);
> > return 0;
> > }
> > @@ -2050,8 +2058,8 @@ static int create_grouping(struct list_head
> *pmu_info_list,
> > //TODO: for each new core group, we should consider to add events that
> uses fixed counters
> > list_for_each_entry(e, event_info_list, nd) {
> > bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf,
> NR_COUNTERS);
> > - pr_debug("Event name %s, [pmu]=%s, [counters]=%s\n", e->name,
> > - e->pmu_name, bit_buf);
> > + pr_debug("Event name %s, [pmu]=%s, [counters]=%s,
> [taken_alone]=%d\n",
> > + e->name, e->pmu_name, bit_buf, e->taken_alone);
> > ret = assign_event_grouping(e, pmu_info_list, &groups);
> > if (ret)
> > goto out;
> > @@ -2098,7 +2106,7 @@ static int hw_aware_build_grouping(struct
> expr_parse_ctx *ctx __maybe_unused,
> > if (is_special_event(id)) {
> > struct metricgroup__event_info *event;
> >
> > - event = event_info__new(id, "default_core", "0",
> > + event = event_info__new(id, "default_core", "0", false,
> > /*free_counter=*/true);
> > if (!event)
> > goto err_out;
> > diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
> > index 37fdf8c5ba77..8f6a1bb9d1ad 100644
> > --- a/tools/perf/util/metricgroup.h
> > +++ b/tools/perf/util/metricgroup.h
> > @@ -105,6 +105,7 @@ struct metricgroup__event_info {
> > const char *pmu_name;
> > bool fixed_counter;
> > bool free_counter;
> > + bool taken_alone;
> > /** The counters the event allowed to be collected on. */
> > DECLARE_BITMAP(counters, NR_COUNTERS);
> > };
> > @@ -154,6 +155,7 @@ struct metricgroup__group {
> > DECLARE_BITMAP(fixed_counters, NR_COUNTERS);
> > /** Head to the list of event names in this group*/
> > struct list_head event_head;
> > + bool taken_alone;
> > };
> >
> > struct metricgroup__group_events {
> > --
> > 2.39.3
> >
^ permalink raw reply [flat|nested] 34+ messages in thread
* [RFC PATCH v3 14/18] perf stat: Handle NMI in hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (13 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 13/18] perf stat: Handle taken alone in hardware-grouping weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 15/18] perf stat: Code refactoring " weilin.wang
` (3 subsequent siblings)
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add an easy nmi watchdog support in grouping. When nmi watchdog is enabled,
we reduce the total num of events could be assigned to one group by 1. A
more efficient solution will be added in later.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 78e607f3ad56..4df04d14d602 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1852,6 +1852,10 @@ static int insert_new_group(struct list_head *head,
size_t fixed_size)
{
INIT_LIST_HEAD(&new_group->event_head);
+ if (sysctl__nmi_watchdog_enabled()) {
+ pr_debug("NMI watchdog is enabled\n");
+ size -= 1;
+ }
fill_counter_bitmap(new_group->gp_counters, 0, size);
fill_counter_bitmap(new_group->fixed_counters, 0, fixed_size);
new_group->taken_alone = false;
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 15/18] perf stat: Code refactoring in hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (14 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 14/18] perf stat: Handle NMI " weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 16/18] perf stat: Add tool events support " weilin.wang
` (2 subsequent siblings)
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Decouple the step to generate final grouping strings out from the
build_grouping step so that we could do single metric grouping and then
merge groups if needed later.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 50 +++++++++++++++++------------------
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 4df04d14d602..f0ef0c2ed860 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1801,9 +1801,10 @@ static int find_and_set_counters(struct metricgroup__event_info *e,
{
int ret;
unsigned long find_bit = 0;
-
- if (e->taken_alone && current_group->taken_alone)
+ if (e->taken_alone && current_group->taken_alone) {
+ pr_debug("current group with taken alone event already\n");
return -ENOSPC;
+ }
if (e->free_counter)
return 0;
if (e->fixed_counter) {
@@ -1922,7 +1923,8 @@ static int assign_event_grouping(struct metricgroup__event_info *e,
list_for_each_entry(g, groups, nd) {
if (!strcasecmp(g->pmu_name, e->pmu_name)) {
- pr_debug("found group for event %s in pmu %s\n", e->name, g->pmu_name);
+ pr_debug("found group header for event %s in pmu %s\n",
+ e->name, g->pmu_name);
pmu_group_head = g;
break;
}
@@ -2051,26 +2053,22 @@ static int hw_aware_metricgroup__build_event_string(struct list_head *group_strs
*/
static int create_grouping(struct list_head *pmu_info_list,
struct list_head *event_info_list,
- struct list_head *groupings,
- const char *modifier)
+ struct list_head *grouping)
{
int ret = 0;
struct metricgroup__event_info *e;
- LIST_HEAD(groups);
char *bit_buf = malloc(NR_COUNTERS);
- //TODO: for each new core group, we should consider to add events that uses fixed counters
+ //TODO: for each new core group, we could consider to add events that
+ //uses fixed counters
list_for_each_entry(e, event_info_list, nd) {
bitmap_scnprintf(e->counters, NR_COUNTERS, bit_buf, NR_COUNTERS);
pr_debug("Event name %s, [pmu]=%s, [counters]=%s, [taken_alone]=%d\n",
e->name, e->pmu_name, bit_buf, e->taken_alone);
- ret = assign_event_grouping(e, pmu_info_list, &groups);
+ ret = assign_event_grouping(e, pmu_info_list, grouping);
if (ret)
- goto out;
+ return ret;
}
- ret = hw_aware_metricgroup__build_event_string(groupings, modifier, &groups);
-out:
- metricgroup__free_group_list(&groups);
return ret;
};
@@ -2091,9 +2089,8 @@ static bool is_special_event(const char *id)
* @groupings: header to the list of final event grouping.
* @modifier: any modifiers added to the events.
*/
-static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
- struct list_head *groupings __maybe_unused,
- const char *modifier __maybe_unused)
+static int hw_aware_build_grouping(struct expr_parse_ctx *ctx,
+ struct list_head *grouping)
{
int ret = 0;
struct hashmap_entry *cur;
@@ -2125,8 +2122,7 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx __maybe_unused,
ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
if (ret)
goto err_out;
- ret = create_grouping(&pmu_info_list, &event_info_list, groupings,
- modifier);
+ ret = create_grouping(&pmu_info_list, &event_info_list, grouping);
err_out:
metricgroup__free_event_info(&event_info_list);
@@ -2172,23 +2168,25 @@ static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
{
struct parse_events_error parse_error;
struct evlist *parsed_evlist;
- LIST_HEAD(groupings);
+ LIST_HEAD(grouping_str);
+ LIST_HEAD(grouping);
struct metricgroup__group_strs *group;
int ret;
*out_evlist = NULL;
- ret = hw_aware_build_grouping(ids, &groupings, modifier);
- if (ret) {
- metricgroup__free_grouping_strs(&groupings);
- return ret;
- }
+ ret = hw_aware_build_grouping(ids, &grouping);
+ if (ret)
+ goto out;
+ ret = hw_aware_metricgroup__build_event_string(&grouping_str, modifier, &grouping);
+ if (ret)
+ goto out;
parsed_evlist = evlist__new();
if (!parsed_evlist) {
ret = -ENOMEM;
goto err_out;
}
- list_for_each_entry(group, &groupings, nd) {
+ list_for_each_entry(group, &grouping_str, nd) {
struct strbuf *events = &group->grouping_str;
pr_debug("Parsing metric events '%s'\n", events->buf);
@@ -2208,7 +2206,9 @@ static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
err_out:
parse_events_error__exit(&parse_error);
evlist__delete(parsed_evlist);
- metricgroup__free_grouping_strs(&groupings);
+out:
+ metricgroup__free_group_list(&grouping);
+ metricgroup__free_grouping_strs(&grouping_str);
return ret;
}
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 16/18] perf stat: Add tool events support in hardware-grouping
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (15 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 15/18] perf stat: Code refactoring " weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 17/18] perf pmu-events: Add event counter data for Tigerlake weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 18/18] perf stat: Add hardware-grouping cmd option to perf stat weilin.wang
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add tool events into default_core grouping strings if find tool events so
that metrics use tool events could be correctly calculated. Need this step
to support TopdownL4-L5.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/util/metricgroup.c | 49 ++++++++++++++++++++++++++++++++++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index f0ef0c2ed860..dc21a8255d82 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -1391,6 +1391,35 @@ static void find_tool_events(const struct list_head *metric_list,
}
}
+/**
+ * get_tool_event_str - Generate and return a string with all the used tool
+ * event names.
+ */
+static int get_tool_event_str(struct strbuf *events,
+ const bool tool_events[PERF_TOOL_MAX],
+ bool *has_tool_event)
+{
+ int i = 0;
+ int ret;
+
+ perf_tool_event__for_each_event(i) {
+ if (tool_events[i]) {
+ const char *tmp = strdup(perf_tool_event__to_str(i));
+
+ if (!tmp)
+ return -ENOMEM;
+ *has_tool_event = true;
+ ret = strbuf_addstr(events, ",");
+ if (ret)
+ return ret;
+ ret = strbuf_addstr(events, tmp);
+ if (ret)
+ return ret;
+ }
+ }
+ return 0;
+}
+
/**
* build_combined_expr_ctx - Make an expr_parse_ctx with all !group_events
* metric IDs, as the IDs are held in a set,
@@ -1954,6 +1983,7 @@ static int assign_event_grouping(struct metricgroup__event_info *e,
static int hw_aware_metricgroup__build_event_string(struct list_head *group_strs,
const char *modifier,
+ const bool tool_events[PERF_TOOL_MAX],
struct list_head *groups)
{
struct metricgroup__pmu_group_list *p;
@@ -1961,8 +1991,12 @@ static int hw_aware_metricgroup__build_event_string(struct list_head *group_strs
struct metricgroup__group_events *ge;
bool no_group = true;
int ret = 0;
+ struct strbuf tool_event_str = STRBUF_INIT;
+ bool has_tool_event = false;
#define RETURN_IF_NON_ZERO(x) do { if (x) return x; } while (0)
+ ret = get_tool_event_str(&tool_event_str, tool_events, &has_tool_event);
+ RETURN_IF_NON_ZERO(ret);
list_for_each_entry(p, groups, nd) {
list_for_each_entry(g, &p->group_head, nd) {
@@ -2034,6 +2068,12 @@ static int hw_aware_metricgroup__build_event_string(struct list_head *group_strs
}
ret = strbuf_addf(events, "}:W");
RETURN_IF_NON_ZERO(ret);
+
+ if (!strcmp(p->pmu_name, "default_core") && has_tool_event) {
+ ret = strbuf_addstr(events, tool_event_str.buf);
+ RETURN_IF_NON_ZERO(ret);
+ }
+
pr_debug("events-buf: %s\n", events->buf);
list_add_tail(&new_group_str->nd, group_strs);
}
@@ -2119,6 +2159,7 @@ static int hw_aware_build_grouping(struct expr_parse_ctx *ctx,
if (ret)
goto err_out;
}
+
ret = get_pmu_counter_layouts(&pmu_info_list, ltable);
if (ret)
goto err_out;
@@ -2164,6 +2205,7 @@ static void metricgroup__free_grouping_strs(struct list_head
*/
static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
struct expr_parse_ctx *ids, const char *modifier,
+ const bool tool_events[PERF_TOOL_MAX],
struct evlist **out_evlist)
{
struct parse_events_error parse_error;
@@ -2177,7 +2219,8 @@ static int hw_aware_parse_ids(struct perf_pmu *fake_pmu,
ret = hw_aware_build_grouping(ids, &grouping);
if (ret)
goto out;
- ret = hw_aware_metricgroup__build_event_string(&grouping_str, modifier, &grouping);
+ ret = hw_aware_metricgroup__build_event_string(&grouping_str, modifier,
+ tool_events, &grouping);
if (ret)
goto out;
@@ -2312,6 +2355,7 @@ static int hw_aware_parse_groups(struct evlist *perf_evlist,
struct evlist *combined_evlist = NULL;
LIST_HEAD(metric_list);
struct metric *m;
+ bool tool_events[PERF_TOOL_MAX] = {false};
int ret;
bool metric_no_group = false;
bool metric_no_merge = false;
@@ -2330,11 +2374,14 @@ static int hw_aware_parse_groups(struct evlist *perf_evlist,
if (!metric_no_merge) {
struct expr_parse_ctx *combined = NULL;
+ find_tool_events(&metric_list, tool_events);
+
ret = hw_aware_build_combined_expr_ctx(&metric_list, &combined);
if (!ret && combined && hashmap__size(combined->ids)) {
ret = hw_aware_parse_ids(fake_pmu, combined,
/*modifier=*/NULL,
+ tool_events,
&combined_evlist);
}
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 17/18] perf pmu-events: Add event counter data for Tigerlake
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (16 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 16/18] perf stat: Add tool events support " weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
2023-12-12 23:02 ` [RFC PATCH v3 18/18] perf stat: Add hardware-grouping cmd option to perf stat weilin.wang
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
The added new fields are required in this new grouping method. Currently,
the format of added fields are temporary for experiments.
This platform is not tested yet.
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
.../pmu-events/arch/x86/tigerlake/cache.json | 65 +++++++++++++
.../arch/x86/tigerlake/counter.json | 6 ++
.../arch/x86/tigerlake/floating-point.json | 13 +++
.../arch/x86/tigerlake/frontend.json | 56 +++++++++++
.../pmu-events/arch/x86/tigerlake/memory.json | 31 ++++++
.../pmu-events/arch/x86/tigerlake/other.json | 4 +
.../arch/x86/tigerlake/pipeline.json | 96 +++++++++++++++++++
.../x86/tigerlake/uncore-interconnect.json | 11 +++
.../arch/x86/tigerlake/uncore-memory.json | 6 ++
.../arch/x86/tigerlake/uncore-other.json | 1 +
.../arch/x86/tigerlake/virtual-memory.json | 20 ++++
11 files changed, 309 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/x86/tigerlake/counter.json
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/cache.json b/tools/perf/pmu-events/arch/x86/tigerlake/cache.json
index c54fb65d3259..1b50e92d7bc0 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/cache.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/cache.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts the number of cache lines replaced in L1 data cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x51",
"EventName": "L1D.REPLACEMENT",
"PublicDescription": "Counts L1D data line replacements including opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.FB_FULL",
"PublicDescription": "Counts number of cycles a demand request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Number of phases a demand request has waited due to L1D Fill Buffer (FB) unavailability.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x48",
@@ -27,6 +30,7 @@
},
{
"BriefDescription": "Number of cycles a demand request has waited due to L1D due to lack of L2 resources.",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.L2_STALL",
"PublicDescription": "Counts number of cycles a demand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable/uncacheable demand load, store, lock or SW prefetch accesses.",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Number of L1D misses that are outstanding",
+ "Counter": "0,1,2,3",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING",
"PublicDescription": "Counts number of L1D misses that are outstanding in each cycle, that is each cycle the number of Fill Buffers (FB) outstanding required by Demand Reads. FB either is held by demand loads, or it is held by non-demand loads and gets hit at least once by demand. The valid outstanding interval is defined until the FB deallocation by one of the following ways: from FB allocation, if FB is allocated by demand from the demand Hit FB, if it is allocated by hardware or software prefetch. Note: In the L1D, a Demand Read contains cacheable or noncacheable demand loads, including ones causing cache-line splits and reads due to page walks resulted from any request type.",
@@ -43,6 +48,7 @@
},
{
"BriefDescription": "Cycles with L1D load Misses outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x48",
"EventName": "L1D_PEND_MISS.PENDING_CYCLES",
@@ -52,6 +58,7 @@
},
{
"BriefDescription": "L2 cache lines filling L2",
+ "Counter": "0,1,2,3",
"EventCode": "0xf1",
"EventName": "L2_LINES_IN.ALL",
"PublicDescription": "Counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
@@ -60,6 +67,7 @@
},
{
"BriefDescription": "Modified cache lines that are evicted by L2 cache when triggered by an L2 cache fill.",
+ "Counter": "0,1,2,3",
"EventCode": "0xf2",
"EventName": "L2_LINES_OUT.NON_SILENT",
"PublicDescription": "Counts the number of lines that are evicted by L2 cache when triggered by an L2 cache fill. Those lines are in Modified state. Modified lines are written back to L3",
@@ -68,6 +76,7 @@
},
{
"BriefDescription": "Non-modified cache lines that are silently dropped by L2 cache when triggered by an L2 cache fill.",
+ "Counter": "0,1,2,3",
"EventCode": "0xf2",
"EventName": "L2_LINES_OUT.SILENT",
"PublicDescription": "Counts the number of lines that are silently dropped by L2 cache when triggered by an L2 cache fill. These lines are typically in Shared or Exclusive state. A non-threaded event.",
@@ -76,6 +85,7 @@
},
{
"BriefDescription": "L2 code requests",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_CODE_RD",
"PublicDescription": "Counts the total number of L2 code requests.",
@@ -84,6 +94,7 @@
},
{
"BriefDescription": "Demand Data Read access L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_DEMAND_DATA_RD",
"PublicDescription": "Counts Demand Data Read requests accessing the L2 cache. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing L2 misses. An access is counted once.",
@@ -92,6 +103,7 @@
},
{
"BriefDescription": "RFO requests to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.ALL_RFO",
"PublicDescription": "Counts the total number of RFO (read for ownership) requests to L2 cache. L2 RFO requests include both L1D demand RFO misses as well as L1D RFO prefetches.",
@@ -100,6 +112,7 @@
},
{
"BriefDescription": "L2 cache hits when fetching instructions, code reads.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_HIT",
"PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.",
@@ -108,6 +121,7 @@
},
{
"BriefDescription": "L2 cache misses when fetching instructions",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.CODE_RD_MISS",
"PublicDescription": "Counts L2 cache misses when fetching instructions.",
@@ -116,6 +130,7 @@
},
{
"BriefDescription": "Demand Data Read requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
"PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",
@@ -124,6 +139,7 @@
},
{
"BriefDescription": "Demand Data Read miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.DEMAND_DATA_RD_MISS",
"PublicDescription": "Counts demand Data Read requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing L2 misses. An access is counted once.",
@@ -132,6 +148,7 @@
},
{
"BriefDescription": "Read requests with true-miss in L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.MISS",
"PublicDescription": "Counts read requests of any type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing L2 misses.",
@@ -140,6 +157,7 @@
},
{
"BriefDescription": "All accesses to L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.REFERENCES",
"PublicDescription": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes misses that were merged with ongoing L2 misses.",
@@ -148,6 +166,7 @@
},
{
"BriefDescription": "RFO requests that hit L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_HIT",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that hit L2 cache.",
@@ -156,6 +175,7 @@
},
{
"BriefDescription": "RFO requests that miss L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.RFO_MISS",
"PublicDescription": "Counts the RFO (Read-for-Ownership) requests that miss L2 cache.",
@@ -164,6 +184,7 @@
},
{
"BriefDescription": "SW prefetch requests that hit L2 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.SWPF_HIT",
"PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
@@ -172,6 +193,7 @@
},
{
"BriefDescription": "SW prefetch requests that miss L2 cache.",
+ "Counter": "0,1,2,3",
"EventCode": "0x24",
"EventName": "L2_RQSTS.SWPF_MISS",
"PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
@@ -180,6 +202,7 @@
},
{
"BriefDescription": "L2 writebacks that access L2 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xf0",
"EventName": "L2_TRANS.L2_WB",
"PublicDescription": "Counts L2 writebacks that access L2 cache.",
@@ -188,6 +211,7 @@
},
{
"BriefDescription": "Cycles when L1D is locked",
+ "Counter": "0,1,2,3",
"EventCode": "0x63",
"EventName": "LOCK_CYCLES.CACHE_LOCK_DURATION",
"PublicDescription": "This event counts the number of cycles when the L1D is locked. It is a superset of the 0x1 mask (BUS_LOCK_CLOCKS.BUS_LOCK_DURATION).",
@@ -196,6 +220,7 @@
},
{
"BriefDescription": "Core-originated cacheable requests that missed L3 (Except hardware prefetches to the L3)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x2e",
"EventName": "LONGEST_LAT_CACHE.MISS",
"PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2. It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
@@ -204,6 +229,7 @@
},
{
"BriefDescription": "Retired load instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ALL_LOADS",
@@ -214,6 +240,7 @@
},
{
"BriefDescription": "Retired store instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ALL_STORES",
@@ -224,6 +251,7 @@
},
{
"BriefDescription": "All retired memory instructions.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.ANY",
@@ -234,6 +262,7 @@
},
{
"BriefDescription": "Retired load instructions with locked access.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.LOCK_LOADS",
@@ -244,6 +273,7 @@
},
{
"BriefDescription": "Retired load instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.SPLIT_LOADS",
@@ -254,6 +284,7 @@
},
{
"BriefDescription": "Retired store instructions that split across a cacheline boundary.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.SPLIT_STORES",
@@ -264,6 +295,7 @@
},
{
"BriefDescription": "Retired load instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
@@ -274,6 +306,7 @@
},
{
"BriefDescription": "Retired store instructions that miss the STLB.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd0",
"EventName": "MEM_INST_RETIRED.STLB_MISS_STORES",
@@ -284,6 +317,7 @@
},
{
"BriefDescription": "Snoop hit a modified(HITM) or clean line(HIT_W_FWD) in another on-pkg core which forwarded the data back due to a retired load instruction.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD",
@@ -294,6 +328,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS",
@@ -304,6 +339,7 @@
},
{
"BriefDescription": "Retired load instructions whose data sources were hits in L3 without snoops required",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NONE",
@@ -314,6 +350,7 @@
},
{
"BriefDescription": "Snoop hit without forwarding in another on-pkg core due to a retired load instruction, data was supplied by the L3.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd2",
"EventName": "MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD",
@@ -324,6 +361,7 @@
},
{
"BriefDescription": "Retired instructions with at least 1 uncacheable load or lock.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd4",
"EventName": "MEM_LOAD_MISC_RETIRED.UC",
@@ -334,6 +372,7 @@
},
{
"BriefDescription": "Number of completed demand load requests that missed the L1, but hit the FB(fill buffer), because a preceding miss to the same cacheline initiated the line to be brought into L1, but data is not yet ready in L1.",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.FB_HIT",
@@ -344,6 +383,7 @@
},
{
"BriefDescription": "Retired load instructions with L1 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L1_HIT",
@@ -354,6 +394,7 @@
},
{
"BriefDescription": "Retired load instructions missed L1 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L1_MISS",
@@ -364,6 +405,7 @@
},
{
"BriefDescription": "Retired load instructions with L2 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L2_HIT",
@@ -374,6 +416,7 @@
},
{
"BriefDescription": "Retired load instructions missed L2 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L2_MISS",
@@ -384,6 +427,7 @@
},
{
"BriefDescription": "Retired load instructions with L3 cache hits as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L3_HIT",
@@ -394,6 +438,7 @@
},
{
"BriefDescription": "Retired load instructions missed L3 cache as data sources",
+ "Counter": "0,1,2,3",
"Data_LA": "1",
"EventCode": "0xd1",
"EventName": "MEM_LOAD_RETIRED.L3_MISS",
@@ -404,6 +449,7 @@
},
{
"BriefDescription": "Counts demand data reads that hit a cacheline in the L3 where a snoop hit in another cores caches, data forwarding is required as the data is modified.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -413,6 +459,7 @@
},
{
"BriefDescription": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD",
"MSRIndex": "0x1a6,0x1a7",
@@ -422,6 +469,7 @@
},
{
"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for exclusive ownership (PREFETCHW) that hit a cacheline in the L3 where a snoop hit in another cores caches, data forwarding is required as the data is modified.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM",
"MSRIndex": "0x1a6,0x1a7",
@@ -431,6 +479,7 @@
},
{
"BriefDescription": "Demand and prefetch data reads",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.ALL_DATA_RD",
"PublicDescription": "Counts the demand and prefetch data reads. All Core Data Reads include cacheable 'Demands' and L2 prefetchers (not L3 prefetchers). Counting also covers reads due to page walks resulted from any request type.",
@@ -439,6 +488,7 @@
},
{
"BriefDescription": "Any memory transaction that reached the SQ.",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.ALL_REQUESTS",
"PublicDescription": "Counts memory transactions reached the super queue including requests initiated by the core, all L3 prefetches, page walks, etc..",
@@ -447,6 +497,7 @@
},
{
"BriefDescription": "Demand Data Read requests sent to uncore",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.DEMAND_DATA_RD",
"PublicDescription": "Counts the Demand Data Read requests sent to uncore. Use it in conjunction with OFFCORE_REQUESTS_OUTSTANDING to determine average latency in the uncore.",
@@ -455,6 +506,7 @@
},
{
"BriefDescription": "Demand RFO requests including regular RFOs, locks, ItoM",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.DEMAND_RFO",
"PublicDescription": "Counts the demand RFO (read for ownership) requests including regular RFOs, locks, ItoM.",
@@ -463,6 +515,7 @@
},
{
"BriefDescription": "Offcore outstanding cacheable Core Data Read transactions in SuperQueue (SQ), queue to uncore",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD",
"PublicDescription": "Counts the number of offcore outstanding cacheable Core Data Read transactions in the super queue every cycle. A transaction is considered to be in the Offcore outstanding state between L2 miss and transaction completion sent to requestor (SQ de-allocation). See corresponding Umask under OFFCORE_REQUESTS.",
@@ -471,6 +524,7 @@
},
{
"BriefDescription": "Cycles when offcore outstanding cacheable Core Data Read transactions are present in SuperQueue (SQ), queue to uncore.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
@@ -480,6 +534,7 @@
},
{
"BriefDescription": "Cycles when offcore outstanding Demand Data Read transactions are present in SuperQueue (SQ), queue to uncore",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_DATA_RD",
@@ -489,6 +544,7 @@
},
{
"BriefDescription": "Cycles with offcore outstanding demand rfo reads transactions in SuperQueue (SQ), queue to uncore.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO",
@@ -498,6 +554,7 @@
},
{
"BriefDescription": "Demand Data Read transactions pending for off-core. Highly correlated.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD",
"PublicDescription": "Counts the number of off-core outstanding Demand Data Read transactions every cycle. A transaction is considered to be in the Off-core outstanding state between L2 cache miss and data-return to the core.",
@@ -506,6 +563,7 @@
},
{
"BriefDescription": "Cycles with at least 6 offcore outstanding Demand Data Read transactions in uncore queue.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD_GE_6",
@@ -514,6 +572,7 @@
},
{
"BriefDescription": "Store Read transactions pending for off-core. Highly correlated.",
+ "Counter": "0,1,2,3",
"EventCode": "0x60",
"EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO",
"PublicDescription": "Counts the number of off-core outstanding read-for-ownership (RFO) store transactions every cycle. An RFO transaction is considered to be in the Off-core outstanding state between L2 cache miss and transaction completion.",
@@ -522,6 +581,7 @@
},
{
"BriefDescription": "Counts bus locks, accounts for cache line split locks and UC locks.",
+ "Counter": "0,1,2,3",
"EventCode": "0xf4",
"EventName": "SQ_MISC.BUS_LOCK",
"PublicDescription": "Counts the more expensive bus lock needed to enforce cache coherency for certain memory accesses that need to be done atomically. Can be created by issuing an atomic instruction (via the LOCK prefix) which causes a cache line split or accesses uncacheable memory.",
@@ -530,6 +590,7 @@
},
{
"BriefDescription": "Cycles the superQ cannot take any more entries.",
+ "Counter": "0,1,2,3",
"EventCode": "0xf4",
"EventName": "SQ_MISC.SQ_FULL",
"PublicDescription": "Counts the cycles for which the thread is active and the superQ cannot take any more entries.",
@@ -538,6 +599,7 @@
},
{
"BriefDescription": "Number of PREFETCHNTA instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.NTA",
"PublicDescription": "Counts the number of PREFETCHNTA instructions executed.",
@@ -546,6 +608,7 @@
},
{
"BriefDescription": "Number of PREFETCHW instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.PREFETCHW",
"PublicDescription": "Counts the number of PREFETCHW instructions executed.",
@@ -554,6 +617,7 @@
},
{
"BriefDescription": "Number of PREFETCHT0 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.T0",
"PublicDescription": "Counts the number of PREFETCHT0 instructions executed.",
@@ -562,6 +626,7 @@
},
{
"BriefDescription": "Number of PREFETCHT1 or PREFETCHT2 instructions executed.",
+ "Counter": "0,1,2,3",
"EventCode": "0x32",
"EventName": "SW_PREFETCH_ACCESS.T1_T2",
"PublicDescription": "Counts the number of PREFETCHT1 or PREFETCHT2 instructions executed.",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/counter.json b/tools/perf/pmu-events/arch/x86/tigerlake/counter.json
new file mode 100644
index 000000000000..6588656bbb90
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/counter.json
@@ -0,0 +1,6 @@
+[
+ {
+ "Size": "8",
+ "FixedSize": "4"
+ }
+]
\ No newline at end of file
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json b/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json
index 63b5b56d1ed0..0b04972d0b17 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts all microcode FP assists.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.FP",
"PublicDescription": "Counts all microcode Floating Point assists.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.4_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",
"PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.8_FLOPS",
"PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision and 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision and double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RSQRT14 RCP RCP14 DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "Number of SSE/AVX computational scalar floating-point instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* scalar, double and single precision floating-point: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform multiple calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR",
"PublicDescription": "Number of SSE/AVX computational scalar single precision and double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
"PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -89,6 +100,7 @@
},
{
"BriefDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
"PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
@@ -97,6 +109,7 @@
},
{
"BriefDescription": "Number of any Vector retired FP arithmetic instructions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc7",
"EventName": "FP_ARITH_INST_RETIRED.VECTOR",
"SampleAfterValue": "1000003",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json b/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json
index d7b972452c0e..bba638c5e2e5 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts the total number when the front end is resteered, mainly when the BPU cannot provide a correct prediction and this is corrected by other branch handling mechanisms at the front end.",
+ "Counter": "0,1,2,3",
"EventCode": "0xe6",
"EventName": "BACLEARS.ANY",
"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch instruction in a fetch line. This occurs for the first time a branch instruction is fetched or when the branch is not tracked by the BPU (Branch Prediction Unit) anymore.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction. [This event is alias to ILD_STALL.LCP]",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "DECODE.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. [This event is alias to ILD_STALL.LCP]",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xab",
@@ -27,6 +30,7 @@
},
{
"BriefDescription": "DSB-to-MITE switch true penalty cycles.",
+ "Counter": "0,1,2,3",
"EventCode": "0xab",
"EventName": "DSB2MITE_SWITCHES.PENALTY_CYCLES",
"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previously fetched instructions that were decoded by the legacy x86 decode pipeline (MITE). This event counts fetch penalty cycles when a transition occurs from DSB to MITE.",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Retired Instructions who experienced DSB miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",
"MSRIndex": "0x3F7",
@@ -42,10 +47,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.DSB_MISS",
"MSRIndex": "0x3F7",
@@ -53,10 +60,12 @@
"PEBS": "1",
"PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced iTLB true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.ITLB_MISS",
"MSRIndex": "0x3F7",
@@ -64,10 +73,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced iTLB (Instruction TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L1 Cache true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.L1I_MISS",
"MSRIndex": "0x3F7",
@@ -75,10 +86,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions who experienced Instruction L1 Cache true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced Instruction L2 Cache true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.L2_MISS",
"MSRIndex": "0x3F7",
@@ -86,10 +99,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions who experienced Instruction L2 Cache true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_1",
"MSRIndex": "0x3F7",
@@ -97,10 +112,12 @@
"PEBS": "1",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_128",
"MSRIndex": "0x3F7",
@@ -108,10 +125,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_16",
"MSRIndex": "0x3F7",
@@ -119,10 +138,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2",
"MSRIndex": "0x3F7",
@@ -130,10 +151,12 @@
"PEBS": "1",
"PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_256",
"MSRIndex": "0x3F7",
@@ -141,10 +164,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_2_BUBBLES_GE_1",
"MSRIndex": "0x3F7",
@@ -152,10 +177,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after the front-end had at least 1 bubble-slot for a period of 2 cycles. A bubble-slot is an empty issue-pipeline slot while there was no RAT stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 32 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_32",
"MSRIndex": "0x3F7",
@@ -163,10 +190,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 32 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_4",
"MSRIndex": "0x3F7",
@@ -174,10 +203,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 4 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_512",
"MSRIndex": "0x3F7",
@@ -185,10 +216,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 512 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_64",
"MSRIndex": "0x3F7",
@@ -196,10 +229,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 64 cycles which was not interrupted by a back-end stall.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 8 cycles which was not interrupted by a back-end stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.LATENCY_GE_8",
"MSRIndex": "0x3F7",
@@ -207,10 +242,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 8 cycles. During this period the front-end delivered no uops.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Retired Instructions who experienced STLB (2nd level TLB) true miss.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc6",
"EventName": "FRONTEND_RETIRED.STLB_MISS",
"MSRIndex": "0x3F7",
@@ -218,10 +255,12 @@
"PEBS": "1",
"PublicDescription": "Counts retired Instructions that experienced STLB (2nd level TLB) true miss.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss. [This event is alias to ICACHE_DATA.STALLS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "ICACHE_16B.IFDATA_STALL",
"PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at a 16 Byte granularity. [This event is alias to ICACHE_DATA.STALLS]",
@@ -230,6 +269,7 @@
},
{
"BriefDescription": "Instruction fetch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_HIT",
"PublicDescription": "Counts instruction fetch tag lookups that hit in the instruction cache (L1I). Counts at 64-byte cache-line granularity. Accounts for both cacheable and uncacheable accesses.",
@@ -238,6 +278,7 @@
},
{
"BriefDescription": "Instruction fetch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity.",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_MISS",
"PublicDescription": "Counts instruction fetch tag lookups that miss in the instruction cache (L1I). Counts at 64-byte cache-line granularity. Accounts for both cacheable and uncacheable accesses.",
@@ -246,6 +287,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_TAG.STALLS]",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_64B.IFTAG_STALL",
"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_TAG.STALLS]",
@@ -254,6 +296,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache miss. [This event is alias to ICACHE_16B.IFDATA_STALL]",
+ "Counter": "0,1,2,3",
"EventCode": "0x80",
"EventName": "ICACHE_DATA.STALLS",
"PublicDescription": "Counts cycles where a code line fetch is stalled due to an L1 instruction cache miss. The legacy decode pipeline works at a 16 Byte granularity. [This event is alias to ICACHE_16B.IFDATA_STALL]",
@@ -262,6 +305,7 @@
},
{
"BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_64B.IFTAG_STALL]",
+ "Counter": "0,1,2,3",
"EventCode": "0x83",
"EventName": "ICACHE_TAG.STALLS",
"PublicDescription": "Counts cycles where a code fetch is stalled due to L1 instruction cache tag miss. [This event is alias to ICACHE_64B.IFTAG_STALL]",
@@ -270,6 +314,7 @@
},
{
"BriefDescription": "Cycles Decode Stream Buffer (DSB) is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_ANY",
@@ -279,6 +324,7 @@
},
{
"BriefDescription": "Cycles DSB is delivering optimal number of Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0x79",
"EventName": "IDQ.DSB_CYCLES_OK",
@@ -288,6 +334,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.DSB_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path.",
@@ -296,6 +343,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering any Uop",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES_ANY",
@@ -305,6 +353,7 @@
},
{
"BriefDescription": "Cycles MITE is delivering optimal number of Uops",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0x79",
"EventName": "IDQ.MITE_CYCLES_OK",
@@ -314,6 +363,7 @@
},
{
"BriefDescription": "Uops delivered to Instruction Decode Queue (IDQ) from MITE path",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MITE_UOPS",
"PublicDescription": "Counts the number of uops delivered to Instruction Decode Queue (IDQ) from the MITE path. This also means that uops are not being delivered from the Decode Stream Buffer (DSB).",
@@ -322,6 +372,7 @@
},
{
"BriefDescription": "Cycles when uops are being delivered to IDQ while MS is busy",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x79",
"EventName": "IDQ.MS_CYCLES_ANY",
@@ -331,6 +382,7 @@
},
{
"BriefDescription": "Number of switches from DSB or MITE to the MS",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x79",
@@ -341,6 +393,7 @@
},
{
"BriefDescription": "Uops delivered to IDQ while MS is busy",
+ "Counter": "0,1,2,3",
"EventCode": "0x79",
"EventName": "IDQ.MS_UOPS",
"PublicDescription": "Counts the total number of uops delivered by the Microcode Sequencer (MS). Any instruction over 4 uops will be delivered by the MS. Some instructions such as transcendentals may additionally generate uops from the MS.",
@@ -349,6 +402,7 @@
},
{
"BriefDescription": "Uops not delivered by IDQ when backend of the machine is not stalled",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CORE",
"PublicDescription": "Counts the number of uops not delivered to by the Instruction Decode Queue (IDQ) to the back-end of the pipeline when there was no back-end stalls. This event counts for one SMT thread in a given cycle.",
@@ -357,6 +411,7 @@
},
{
"BriefDescription": "Cycles when no uops are not delivered by the IDQ when backend of the machine is not stalled",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "5",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE",
@@ -366,6 +421,7 @@
},
{
"BriefDescription": "Cycles when optimal number of uops was delivered to the back-end when the back-end is not stalled",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x9c",
"EventName": "IDQ_UOPS_NOT_DELIVERED.CYCLES_FE_WAS_OK",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/memory.json b/tools/perf/pmu-events/arch/x86/tigerlake/memory.json
index 8848fcbcc35c..b8ef8abb3ebc 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/memory.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "6",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L3_MISS",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Number of machine clears due to memory ordering conflicts.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc3",
"EventName": "MACHINE_CLEARS.MEMORY_ORDERING",
"PublicDescription": "Counts the number of Machine Clears detected dye to memory ordering. Memory Ordering Machine Clears may apply when a memory read may not conform to the memory ordering rules of the x86 architecture",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128",
@@ -25,10 +28,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "1009",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16",
@@ -37,10 +42,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "20011",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256",
@@ -49,10 +56,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "503",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32",
@@ -61,10 +70,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100007",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4",
@@ -73,10 +84,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "100003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512",
@@ -85,10 +98,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "101",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64",
@@ -97,10 +112,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "2003",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.",
+ "Counter": "0,1,2,3,4,5,6,7",
"Data_LA": "1",
"EventCode": "0xcd",
"EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8",
@@ -109,10 +126,12 @@
"PEBS": "2",
"PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue": "50021",
+ "TakenAlone": "1",
"UMask": "0x1"
},
{
"BriefDescription": "Demand Data Read requests who miss L3 cache",
+ "Counter": "0,1,2,3",
"EventCode": "0xb0",
"EventName": "OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
"PublicDescription": "Demand Data Read requests who miss L3 cache.",
@@ -121,6 +140,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED",
"PublicDescription": "Counts the number of times RTM abort was triggered.",
@@ -129,6 +149,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_EVENTS",
"PublicDescription": "Counts the number of times an RTM execution aborted due to none of the previous 4 categories (e.g. interrupt).",
@@ -137,6 +158,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_MEM",
"PublicDescription": "Counts the number of times an RTM execution aborted due to various memory events (e.g. read/write capacity and conflicts).",
@@ -145,6 +167,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to incompatible memory type",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_MEMTYPE",
"PublicDescription": "Counts the number of times an RTM execution aborted due to incompatible memory type.",
@@ -153,6 +176,7 @@
},
{
"BriefDescription": "Number of times an RTM execution aborted due to HLE-unfriendly instructions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.ABORTED_UNFRIENDLY",
"PublicDescription": "Counts the number of times an RTM execution aborted due to HLE-unfriendly instructions.",
@@ -161,6 +185,7 @@
},
{
"BriefDescription": "Number of times an RTM execution successfully committed",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.COMMIT",
"PublicDescription": "Counts the number of times RTM commit succeeded.",
@@ -169,6 +194,7 @@
},
{
"BriefDescription": "Number of times an RTM execution started.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc9",
"EventName": "RTM_RETIRED.START",
"PublicDescription": "Counts the number of times we entered an RTM region. Does not count nested transactions.",
@@ -177,6 +203,7 @@
},
{
"BriefDescription": "Counts the number of times a class of instructions that may cause a transactional abort was executed inside a transactional region",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC2",
"PublicDescription": "Counts Unfriendly TSX abort triggered by a vzeroupper instruction.",
@@ -185,6 +212,7 @@
},
{
"BriefDescription": "Number of times an instruction execution caused the transactional nest count supported to be exceeded",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x5d",
"EventName": "TX_EXEC.MISC3",
"PublicDescription": "Counts Unfriendly TSX abort triggered by a nest count that is too deep.",
@@ -193,6 +221,7 @@
},
{
"BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional reads",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY_READ",
"PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional reads",
@@ -201,6 +230,7 @@
},
{
"BriefDescription": "Speculatively counts the number of TSX aborts due to a data capacity limitation for transactional writes.",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CAPACITY_WRITE",
"PublicDescription": "Speculatively counts the number of Transactional Synchronization Extensions (TSX) aborts due to a data capacity limitation for transactional writes.",
@@ -209,6 +239,7 @@
},
{
"BriefDescription": "Number of times a transactional abort was signaled due to a data conflict on a transactionally accessed address",
+ "Counter": "0,1,2,3",
"EventCode": "0x54",
"EventName": "TX_MEM.ABORT_CONFLICT",
"PublicDescription": "Counts the number of times a TSX line had a cache conflict.",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/other.json b/tools/perf/pmu-events/arch/x86/tigerlake/other.json
index 55f3048bcfa6..77ba139cde3f 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/other.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/other.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL0_TURBO_LICENSE",
"PublicDescription": "Counts Core cycles where the core was running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX 128-bit, and low-current AVX 256-bit codes.",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL1_TURBO_LICENSE",
"PublicDescription": "Counts Core cycles where the core was running with power-delivery for license level 1. This includes high current AVX 256-bit instructions as well as low current AVX 512-bit instructions.",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Core cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo schedule.",
+ "Counter": "0,1,2,3",
"EventCode": "0x28",
"EventName": "CORE_POWER.LVL2_TURBO_LICENSE",
"PublicDescription": "Core cycles where the core was running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). This includes high current AVX 512-bit instructions.",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Counts streaming stores that have any type of response.",
+ "Counter": "0,1,2,3",
"EventCode": "0xB7, 0xBB",
"EventName": "OCR.STREAMING_WR.ANY_RESPONSE",
"MSRIndex": "0x1a6,0x1a7",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json b/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json
index 541bf1dd1679..3fd22fc0a593 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Cycles when divide unit is busy executing divide or square root operations.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x14",
"EventName": "ARITH.DIVIDER_ACTIVE",
@@ -10,6 +11,7 @@
},
{
"BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc1",
"EventName": "ASSISTS.ANY",
"PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hardware Examples include AD (page Access Dirty), FP and AVX related assists.",
@@ -18,6 +20,7 @@
},
{
"BriefDescription": "All branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.ALL_BRANCHES",
"PEBS": "1",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND",
"PEBS": "1",
@@ -35,6 +39,7 @@
},
{
"BriefDescription": "Not taken branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_NTAKEN",
"PEBS": "1",
@@ -44,6 +49,7 @@
},
{
"BriefDescription": "Taken conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.COND_TAKEN",
"PEBS": "1",
@@ -53,6 +59,7 @@
},
{
"BriefDescription": "Far branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.FAR_BRANCH",
"PEBS": "1",
@@ -62,6 +69,7 @@
},
{
"BriefDescription": "Indirect near branch instructions retired (excluding returns)",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.INDIRECT",
"PEBS": "1",
@@ -71,6 +79,7 @@
},
{
"BriefDescription": "Direct and indirect near call instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_CALL",
"PEBS": "1",
@@ -80,6 +89,7 @@
},
{
"BriefDescription": "Return instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_RETURN",
"PEBS": "1",
@@ -89,6 +99,7 @@
},
{
"BriefDescription": "Taken branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc4",
"EventName": "BR_INST_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -98,6 +109,7 @@
},
{
"BriefDescription": "All mispredicted branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.ALL_BRANCHES",
"PEBS": "1",
@@ -106,6 +118,7 @@
},
{
"BriefDescription": "Mispredicted conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND",
"PEBS": "1",
@@ -115,6 +128,7 @@
},
{
"BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND_NTAKEN",
"PEBS": "1",
@@ -124,6 +138,7 @@
},
{
"BriefDescription": "number of branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.COND_TAKEN",
"PEBS": "1",
@@ -133,6 +148,7 @@
},
{
"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.INDIRECT",
"PEBS": "1",
@@ -142,6 +158,7 @@
},
{
"BriefDescription": "Mispredicted indirect CALL instructions retired.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.INDIRECT_CALL",
"PEBS": "1",
@@ -151,6 +168,7 @@
},
{
"BriefDescription": "Number of near branch instructions retired that were mispredicted and taken.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.NEAR_TAKEN",
"PEBS": "1",
@@ -160,6 +178,7 @@
},
{
"BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc5",
"EventName": "BR_MISP_RETIRED.RET",
"PEBS": "1",
@@ -169,6 +188,7 @@
},
{
"BriefDescription": "Cycle counts are evenly distributed between active threads in the Core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xec",
"EventName": "CPU_CLK_UNHALTED.DISTRIBUTED",
"PublicDescription": "This event distributes cycle counts between active hyperthreads, i.e., those in C0. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If all other hyperthreads are inactive (or disabled or do not exist), all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
@@ -177,6 +197,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when this thread is unhalted and the other thread is halted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE",
"PublicDescription": "Counts Core crystal clock cycles when current thread is unhalted and the other thread is halted.",
@@ -185,6 +206,7 @@
},
{
"BriefDescription": "Core crystal clock cycles. Cycle counts are evenly distributed between active threads in the Core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.REF_DISTRIBUTED",
"PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
@@ -193,6 +215,7 @@
},
{
"BriefDescription": "Reference cycles when the core is not in halt state.",
+ "Counter": "Fixed counter 2",
"EventName": "CPU_CLK_UNHALTED.REF_TSC",
"PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events. Note: On all current platforms this event stops counting during 'throttling (TM)' states duty off periods the processor is 'halted'. The counter update is done at a lower clock rate then the core clock the overflow status bit for this counter may appear 'sticky'. After the counter has overflowed and software clears the overflow status bit and resets the counter to less than MAX. The reset value to the counter is not clocked immediately so the overflow status bit will flip 'high (1)' and generate another PMI (if enabled) after which the reset value gets clocked into the counter. Therefore, software will get the interrupt, read the overflow status bit '1 for bit 34 while the counter value is less than MAX. Software should ignore this case.",
"SampleAfterValue": "2000003",
@@ -200,6 +223,7 @@
},
{
"BriefDescription": "Core crystal clock cycles when the thread is unhalted.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.REF_XCLK",
"PublicDescription": "Counts core crystal clock cycles when the thread is unhalted.",
@@ -208,6 +232,7 @@
},
{
"BriefDescription": "Core cycles when the thread is not in halt state",
+ "Counter": "Fixed counter 1",
"EventName": "CPU_CLK_UNHALTED.THREAD",
"PublicDescription": "Counts the number of core cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. This event is a component in many key event ratios. The core frequency may change from time to time due to transitions associated with Enhanced Intel SpeedStep Technology or TM2. For this reason this event may have a changing ratio with regards to time. When the core frequency is constant, this event can approximate elapsed time while the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eight programmable counters available for other events.",
"SampleAfterValue": "2000003",
@@ -215,6 +240,7 @@
},
{
"BriefDescription": "Thread cycles when thread is not in halt state",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x3c",
"EventName": "CPU_CLK_UNHALTED.THREAD_P",
"PublicDescription": "This is an architectural event that counts the number of thread cycles while the thread is not in a halt state. The thread enters the halt state when it is running the HLT instruction. The core frequency may change from time to time due to power or thermal throttling. For this reason, this event may have a changing ratio with regards to wall clock time.",
@@ -222,6 +248,7 @@
},
{
"BriefDescription": "Cycles while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "8",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L1D_MISS",
@@ -230,6 +257,7 @@
},
{
"BriefDescription": "Cycles while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.CYCLES_L2_MISS",
@@ -238,6 +266,7 @@
},
{
"BriefDescription": "Cycles while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "16",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.CYCLES_MEM_ANY",
@@ -246,6 +275,7 @@
},
{
"BriefDescription": "Execution stalls while L1 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "12",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L1D_MISS",
@@ -254,6 +284,7 @@
},
{
"BriefDescription": "Execution stalls while L2 cache miss demand load is outstanding.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_L2_MISS",
@@ -262,6 +293,7 @@
},
{
"BriefDescription": "Execution stalls while memory subsystem has an outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "20",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_MEM_ANY",
@@ -270,6 +302,7 @@
},
{
"BriefDescription": "Total execution stalls.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xa3",
"EventName": "CYCLE_ACTIVITY.STALLS_TOTAL",
@@ -278,6 +311,7 @@
},
{
"BriefDescription": "Cycles total of 1 uop is executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.1_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 1 uop was executed on all ports and Reservation Station (RS) was not empty.",
@@ -286,6 +320,7 @@
},
{
"BriefDescription": "Cycles total of 2 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.2_PORTS_UTIL",
"PublicDescription": "Counts cycles during which a total of 2 uops were executed on all ports and Reservation Station (RS) was not empty.",
@@ -294,6 +329,7 @@
},
{
"BriefDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.3_PORTS_UTIL",
"PublicDescription": "Cycles total of 3 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -302,6 +338,7 @@
},
{
"BriefDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station was not empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.4_PORTS_UTIL",
"PublicDescription": "Cycles total of 4 uops are executed on all ports and Reservation Station (RS) was not empty.",
@@ -310,6 +347,7 @@
},
{
"BriefDescription": "Cycles when the memory subsystem has an outstanding load. Increments by 4 for every such cycle.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "5",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.BOUND_ON_LOADS",
@@ -319,6 +357,7 @@
},
{
"BriefDescription": "Cycles where the Store Buffer was full and no loads caused an execution stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.BOUND_ON_STORES",
@@ -328,6 +367,7 @@
},
{
"BriefDescription": "Cycles no uop executed while RS was not empty, the SB was not full and there was no outstanding load.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa6",
"EventName": "EXE_ACTIVITY.EXE_BOUND_0_PORTS",
"PublicDescription": "Number of cycles total of 0 uops executed on all ports, Reservation Station (RS) was not empty, the Store Buffer (SB) was not full and there was no outstanding load.",
@@ -336,6 +376,7 @@
},
{
"BriefDescription": "Stalls caused by changing prefix length of the instruction. [This event is alias to DECODE.LCP]",
+ "Counter": "0,1,2,3",
"EventCode": "0x87",
"EventName": "ILD_STALL.LCP",
"PublicDescription": "Counts cycles that the Instruction Length decoder (ILD) stalls occurred due to dynamically changing prefix length of the decoded instruction (by operand size prefix instruction 0x66, address size prefix instruction 0x67 or REX.W for Intel64). Count is proportional to the number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length changing prefix) in a 16-byte chunk. [This event is alias to DECODE.LCP]",
@@ -344,6 +385,7 @@
},
{
"BriefDescription": "Instruction decoders utilized in a cycle",
+ "Counter": "0,1,2,3",
"EventCode": "0x55",
"EventName": "INST_DECODED.DECODERS",
"PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
@@ -352,6 +394,7 @@
},
{
"BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.ANY",
"PEBS": "1",
"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter.",
@@ -360,6 +403,7 @@
},
{
"BriefDescription": "Number of instructions retired. General Counter - architectural event",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.ANY_P",
"PEBS": "1",
@@ -368,6 +412,7 @@
},
{
"BriefDescription": "Retired NOP instructions.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc0",
"EventName": "INST_RETIRED.NOP",
"PEBS": "1",
@@ -377,6 +422,7 @@
},
{
"BriefDescription": "Precise instruction retired event with a reduced effect of PEBS shadow in IP distribution",
+ "Counter": "Fixed counter 0",
"EventName": "INST_RETIRED.PREC_DIST",
"PEBS": "1",
"PublicDescription": "A version of INST_RETIRED that allows for a more unbiased distribution of samples across instructions retired. It utilizes the Precise Distribution of Instructions Retired (PDIR) feature to mitigate some bias in how retired instructions get sampled. Use on Fixed Counter 0.",
@@ -385,6 +431,7 @@
},
{
"BriefDescription": "Cycles the Backend cluster is recovering after a miss-speculation or a Store Buffer or Load Buffer drain stall.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x0d",
"EventName": "INT_MISC.ALL_RECOVERY_CYCLES",
@@ -394,6 +441,7 @@
},
{
"BriefDescription": "Clears speculative count",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x0d",
@@ -404,6 +452,7 @@
},
{
"BriefDescription": "Counts cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0d",
"EventName": "INT_MISC.CLEAR_RESTEER_CYCLES",
"PublicDescription": "Cycles after recovery from a branch misprediction or machine clear till the first uop is issued from the resteered path.",
@@ -412,6 +461,7 @@
},
{
"BriefDescription": "Core cycles the allocator was stalled due to recovery from earlier clear event for this thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0d",
"EventName": "INT_MISC.RECOVERY_CYCLES",
"PublicDescription": "Counts core cycles when the Resource allocator was stalled due to recovery from an earlier branch misprediction or machine clear event.",
@@ -420,6 +470,7 @@
},
{
"BriefDescription": "TMA slots where uops got dropped",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0d",
"EventName": "INT_MISC.UOP_DROPPING",
"PublicDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped due to non front-end reasons",
@@ -428,6 +479,7 @@
},
{
"BriefDescription": "The number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.NO_SR",
"PublicDescription": "Counts the number of times that split load operations are temporarily blocked because all resources for handling the split accesses are in use.",
@@ -436,6 +488,7 @@
},
{
"BriefDescription": "Loads blocked due to overlapping with a preceding store that cannot be forwarded.",
+ "Counter": "0,1,2,3",
"EventCode": "0x03",
"EventName": "LD_BLOCKS.STORE_FORWARD",
"PublicDescription": "Counts the number of times where store forwarding was prevented for a load operation. The most common case is a load blocked due to the address of memory access (partially) overlapping with a preceding uncompleted store. Note: See the table of not supported store forwards in the Optimization Guide.",
@@ -444,6 +497,7 @@
},
{
"BriefDescription": "False dependencies in MOB due to partial compare on address.",
+ "Counter": "0,1,2,3",
"EventCode": "0x07",
"EventName": "LD_BLOCKS_PARTIAL.ADDRESS_ALIAS",
"PublicDescription": "Counts the number of times a load got blocked due to false dependencies in MOB due to partial compare on address.",
@@ -452,6 +506,7 @@
},
{
"BriefDescription": "Counts the number of demand load dispatches that hit L1D fill buffer (FB) allocated for software prefetch.",
+ "Counter": "0,1,2,3",
"EventCode": "0x4c",
"EventName": "LOAD_HIT_PREFETCH.SWPF",
"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (FB) allocated for the software prefetch. It can also be incremented by some lock instructions. So it should only be used with profiling so that the locks can be excluded by ASM (Assembly File) inspection of the nearby instructions.",
@@ -460,6 +515,7 @@
},
{
"BriefDescription": "Cycles Uops delivered by the LSD, but didn't come from the decoder.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0xa8",
"EventName": "LSD.CYCLES_ACTIVE",
@@ -469,6 +525,7 @@
},
{
"BriefDescription": "Cycles optimal number of Uops delivered by the LSD, but did not come from the decoder.",
+ "Counter": "0,1,2,3",
"CounterMask": "5",
"EventCode": "0xa8",
"EventName": "LSD.CYCLES_OK",
@@ -478,6 +535,7 @@
},
{
"BriefDescription": "Number of Uops delivered by the LSD.",
+ "Counter": "0,1,2,3",
"EventCode": "0xa8",
"EventName": "LSD.UOPS",
"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream Detector).",
@@ -486,6 +544,7 @@
},
{
"BriefDescription": "Number of machine clears (nukes) of any type.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0xc3",
@@ -496,6 +555,7 @@
},
{
"BriefDescription": "Self-modifying code (SMC) detected.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc3",
"EventName": "MACHINE_CLEARS.SMC",
"PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
@@ -504,6 +564,7 @@
},
{
"BriefDescription": "Increments whenever there is an update to the LBR array.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcc",
"EventName": "MISC_RETIRED.LBR_INSERTS",
"PublicDescription": "Increments when an entry is added to the Last Branch Record (LBR) array (or removed from the array in case of RETURNs in call stack mode). The event requires LBR enable via IA32_DEBUGCTL MSR and branch type selection via MSR_LBR_SELECT.",
@@ -512,6 +573,7 @@
},
{
"BriefDescription": "Number of retired PAUSE instructions. This event is not supported on first SKL and KBL products.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xcc",
"EventName": "MISC_RETIRED.PAUSE_INST",
"PublicDescription": "Counts number of retired PAUSE instructions. This event is not supported on first SKL and KBL products.",
@@ -520,6 +582,7 @@
},
{
"BriefDescription": "Cycles stalled due to no store buffers available. (not including draining form sync).",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.SB",
"PublicDescription": "Counts allocation stall cycles caused by the store buffer (SB) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-end.",
@@ -528,6 +591,7 @@
},
{
"BriefDescription": "Counts cycles where the pipeline is stalled due to serializing operations.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa2",
"EventName": "RESOURCE_STALLS.SCOREBOARD",
"SampleAfterValue": "100003",
@@ -535,6 +599,7 @@
},
{
"BriefDescription": "Cycles when Reservation Station (RS) is empty for the thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x5e",
"EventName": "RS_EVENTS.EMPTY_CYCLES",
"PublicDescription": "Counts cycles during which the reservation station (RS) is empty for this logical processor. This is usually caused when the front-end pipeline runs into stravation periods (e.g. branch mispredictions or i-cache misses)",
@@ -543,6 +608,7 @@
},
{
"BriefDescription": "Counts end of periods where the Reservation Station (RS) was empty.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EdgeDetect": "1",
"EventCode": "0x5e",
@@ -554,6 +620,7 @@
},
{
"BriefDescription": "TMA slots where no uops were being issued due to lack of back-end resources.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.BACKEND_BOUND_SLOTS",
"PublicDescription": "Counts the number of Top-down Microarchitecture Analysis (TMA) method's slots where no micro-operations were being issued from front-end to back-end of the machine due to lack of back-end resources.",
@@ -562,6 +629,7 @@
},
{
"BriefDescription": "TMA slots wasted due to incorrect speculation by branch mispredictions",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.BR_MISPREDICT_SLOTS",
"PublicDescription": "Number of TMA slots that were wasted due to incorrect speculation by branch mispredictions. This event estimates number of operations that were issued but not retired from the speculative path as well as the out-of-order engine recovery past a branch misprediction.",
@@ -570,6 +638,7 @@
},
{
"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - architectural event",
+ "Counter": "Fixed counter 3",
"EventName": "TOPDOWN.SLOTS",
"PublicDescription": "Number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TMA). The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core. Software can use this event as the denominator for the top-level metrics of the TMA method. This architectural event is counted on a designated fixed counter (Fixed Counter 3).",
"SampleAfterValue": "10000003",
@@ -577,6 +646,7 @@
},
{
"BriefDescription": "TMA slots available for an unhalted logical processor. General counter - architectural event",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa4",
"EventName": "TOPDOWN.SLOTS_P",
"PublicDescription": "Counts the number of available slots for an unhalted logical processor. The event increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. The count is distributed among unhalted logical processors (hyper-threads) who share the same physical core.",
@@ -585,6 +655,7 @@
},
{
"BriefDescription": "Number of uops decoded out of instructions exclusively fetched by decoder 0",
+ "Counter": "0,1,2,3",
"EventCode": "0x56",
"EventName": "UOPS_DECODED.DEC0",
"PublicDescription": "Uops exclusively fetched by decoder 0",
@@ -593,6 +664,7 @@
},
{
"BriefDescription": "Number of uops executed on port 0",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_0",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 0.",
@@ -601,6 +673,7 @@
},
{
"BriefDescription": "Number of uops executed on port 1",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_1",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 1.",
@@ -609,6 +682,7 @@
},
{
"BriefDescription": "Number of uops executed on port 2 and 3",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_2_3",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to ports 2 and 3.",
@@ -617,6 +691,7 @@
},
{
"BriefDescription": "Number of uops executed on port 4 and 9",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_4_9",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to ports 5 and 9.",
@@ -625,6 +700,7 @@
},
{
"BriefDescription": "Number of uops executed on port 5",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_5",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 5.",
@@ -633,6 +709,7 @@
},
{
"BriefDescription": "Number of uops executed on port 6",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_6",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to port 6.",
@@ -641,6 +718,7 @@
},
{
"BriefDescription": "Number of uops executed on port 7 and 8",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xa1",
"EventName": "UOPS_DISPATCHED.PORT_7_8",
"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dispatched from the Reservation Station (RS) to ports 7 and 8.",
@@ -649,6 +727,7 @@
},
{
"BriefDescription": "Number of uops executed on the core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE",
"PublicDescription": "Counts the number of uops executed from any thread.",
@@ -657,6 +736,7 @@
},
{
"BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_1",
@@ -666,6 +746,7 @@
},
{
"BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_2",
@@ -675,6 +756,7 @@
},
{
"BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "3",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_3",
@@ -684,6 +766,7 @@
},
{
"BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CORE_CYCLES_GE_4",
@@ -693,6 +776,7 @@
},
{
"BriefDescription": "Cycles where at least 1 uop was executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_1",
@@ -702,6 +786,7 @@
},
{
"BriefDescription": "Cycles where at least 2 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "2",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_2",
@@ -711,6 +796,7 @@
},
{
"BriefDescription": "Cycles where at least 3 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "3",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_3",
@@ -720,6 +806,7 @@
},
{
"BriefDescription": "Cycles where at least 4 uops were executed per-thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "4",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.CYCLES_GE_4",
@@ -729,6 +816,7 @@
},
{
"BriefDescription": "Counts number of cycles no uops were dispatched to be executed on this thread.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.STALL_CYCLES",
@@ -739,6 +827,7 @@
},
{
"BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.THREAD",
"SampleAfterValue": "2000003",
@@ -746,6 +835,7 @@
},
{
"BriefDescription": "Counts the number of x87 uops dispatched.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xb1",
"EventName": "UOPS_EXECUTED.X87",
"PublicDescription": "Counts the number of x87 uops executed.",
@@ -754,6 +844,7 @@
},
{
"BriefDescription": "Uops that RAT issues to RS",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0e",
"EventName": "UOPS_ISSUED.ANY",
"PublicDescription": "Counts the number of uops that the Resource Allocation Table (RAT) issues to the Reservation Station (RS).",
@@ -762,6 +853,7 @@
},
{
"BriefDescription": "Cycles when RAT does not issue Uops to RS for the thread",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0x0e",
"EventName": "UOPS_ISSUED.STALL_CYCLES",
@@ -772,6 +864,7 @@
},
{
"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector registers.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0x0e",
"EventName": "UOPS_ISSUED.VECTOR_WIDTH_MISMATCH",
"PublicDescription": "Counts the number of Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order to preserve upper bits of vector registers. Starting with the Skylake microarchitecture, these Blend uops are needed since every Intel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destination register. For more information, refer to Mixing Intel AVX and Intel SSE Code section of the Optimization Guide.",
@@ -780,6 +873,7 @@
},
{
"BriefDescription": "Retirement slots used.",
+ "Counter": "0,1,2,3,4,5,6,7",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.SLOTS",
"PublicDescription": "Counts the retirement slots used each cycle.",
@@ -788,6 +882,7 @@
},
{
"BriefDescription": "Cycles without actually retired uops.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "1",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.STALL_CYCLES",
@@ -798,6 +893,7 @@
},
{
"BriefDescription": "Cycles with less than 10 actually retired uops.",
+ "Counter": "0,1,2,3,4,5,6,7",
"CounterMask": "10",
"EventCode": "0xc2",
"EventName": "UOPS_RETIRED.TOTAL_CYCLES",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.json
index eed1b90a2779..28bb5226830b 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-interconnect.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "UNC_ARB_COH_TRK_REQUESTS.ALL",
+ "Counter": "0,1",
"EventCode": "0x84",
"EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL",
"PerPkg": "1",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Each cycle counts number of any coherent request at memory controller that were issued by any core.",
+ "Counter": "0",
"EventCode": "0x85",
"EventName": "UNC_ARB_DAT_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory controller that were issued by any core.",
+ "Counter": "0",
"EventCode": "0x85",
"EventName": "UNC_ARB_DAT_OCCUPANCY.RD",
"PerPkg": "1",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_ARB_REQ_TRK_REQUEST.DRD",
+ "Counter": "0,1",
"EventCode": "0x81",
"EventName": "UNC_ARB_DAT_REQUESTS.RD",
"PerPkg": "1",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "This event is deprecated. Refer to new event UNC_ARB_DAT_OCCUPANCY.ALL",
+ "Counter": "0",
"EventCode": "0x85",
"EventName": "UNC_ARB_IFA_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is defined as valid when it is allocated till deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_TRK_OCCUPANCY.RD]",
+ "Counter": "0",
"EventCode": "0x80",
"EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD",
"PerPkg": "1",
@@ -49,6 +55,7 @@
},
{
"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This event is alias to UNC_ARB_TRK_REQUESTS.RD]",
+ "Counter": "0,1",
"EventCode": "0x81",
"EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD",
"PerPkg": "1",
@@ -57,6 +64,7 @@
},
{
"BriefDescription": "Each cycle count number of all outgoing valid entries in ReqTrk. Such entry is defined as valid from it's allocation in ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.",
+ "Counter": "0",
"EventCode": "0x80",
"EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",
"PerPkg": "1",
@@ -65,6 +73,7 @@
},
{
"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is defined as valid when it is allocated till deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_OCCUPANCY.DRD]",
+ "Counter": "0",
"EventCode": "0x80",
"EventName": "UNC_ARB_TRK_OCCUPANCY.RD",
"PerPkg": "1",
@@ -73,6 +82,7 @@
},
{
"BriefDescription": "UNC_ARB_TRK_REQUESTS.ALL",
+ "Counter": "0,1",
"EventCode": "0x81",
"EventName": "UNC_ARB_TRK_REQUESTS.ALL",
"PerPkg": "1",
@@ -81,6 +91,7 @@
},
{
"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_REQUEST.DRD]",
+ "Counter": "0,1",
"EventCode": "0x81",
"EventName": "UNC_ARB_TRK_REQUESTS.RD",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-memory.json b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-memory.json
index 99fb5259fd25..ea213045cbca 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-memory.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Counts every read (RdCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data transfers from DRAM.",
+ "Counter": "1",
"EventCode": "0xff",
"EventName": "UNC_MC0_RDCAS_COUNT_FREERUN",
"PerPkg": "1",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Counts every 64B read and write request entering the Memory Controller to DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. However, same cache line write requests (both full and partial) are combined to a single 64 byte data transfer to DRAM.",
+ "Counter": "0",
"EventCode": "0xff",
"EventName": "UNC_MC0_TOTAL_REQCOUNT_FREERUN",
"PerPkg": "1",
@@ -17,6 +19,7 @@
},
{
"BriefDescription": "Counts every write (WrCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data transfers from DRAM.",
+ "Counter": "2",
"EventCode": "0xff",
"EventName": "UNC_MC0_WRCAS_COUNT_FREERUN",
"PerPkg": "1",
@@ -25,6 +28,7 @@
},
{
"BriefDescription": "Counts every read (RdCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data transfers from DRAM.",
+ "Counter": "4",
"EventCode": "0xff",
"EventName": "UNC_MC1_RDCAS_COUNT_FREERUN",
"PerPkg": "1",
@@ -33,6 +37,7 @@
},
{
"BriefDescription": "Counts every 64B read and write request entering the Memory Controller to DRAM (sum of all channels). Each write request counts as a new request incrementing this counter. However, same cache line write requests (both full and partial) are combined to a single 64 byte data transfer to DRAM.",
+ "Counter": "3",
"EventCode": "0xff",
"EventName": "UNC_MC1_TOTAL_REQCOUNT_FREERUN",
"PerPkg": "1",
@@ -41,6 +46,7 @@
},
{
"BriefDescription": "Counts every write (WrCAS) issued by the Memory Controller to DRAM (sum of all channels). All requests result in 64 byte data transfers from DRAM.",
+ "Counter": "5",
"EventCode": "0xff",
"EventName": "UNC_MC1_WRCAS_COUNT_FREERUN",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json
index c6596ba09195..87de3bbc4796 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/uncore-other.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "UNC_CLOCK.SOCKET",
+ "Counter": "Fixed",
"EventCode": "0xff",
"EventName": "UNC_CLOCK.SOCKET",
"PerPkg": "1",
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/virtual-memory.json b/tools/perf/pmu-events/arch/x86/tigerlake/virtual-memory.json
index adb2f6b3e77c..62dc0fc76748 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/virtual-memory.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/virtual-memory.json
@@ -1,6 +1,7 @@
[
{
"BriefDescription": "Loads that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.STLB_HIT",
"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TLB).",
@@ -9,6 +10,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_ACTIVE",
@@ -18,6 +20,7 @@
},
{
"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -26,6 +29,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 2M/4M page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -34,6 +38,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data load to a 4K page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -42,6 +47,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for a demand load in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x08",
"EventName": "DTLB_LOAD_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle.",
@@ -50,6 +56,7 @@
},
{
"BriefDescription": "Stores that miss the DTLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.STLB_HIT",
"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB).",
@@ -58,6 +65,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_ACTIVE",
@@ -67,6 +75,7 @@
},
{
"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
@@ -75,6 +84,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 2M/4M page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 2M/4M pages. The page walks can end with or without a page fault.",
@@ -83,6 +93,7 @@
},
{
"BriefDescription": "Page walks completed due to a demand data store to a 4K page.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts page walks completed due to demand data stores whose address translations missed in the TLB and were mapped to 4K pages. The page walks can end with or without a page fault.",
@@ -91,6 +102,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for a store in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x49",
"EventName": "DTLB_STORE_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle.",
@@ -99,6 +111,7 @@
},
{
"BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.STLB_HIT",
"PublicDescription": "Counts instruction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
@@ -107,6 +120,7 @@
},
{
"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction fetch) request.",
+ "Counter": "0,1,2,3",
"CounterMask": "1",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_ACTIVE",
@@ -116,6 +130,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (All page sizes)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED",
"PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -124,6 +139,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (2M/4M)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_2M_4M",
"PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -132,6 +148,7 @@
},
{
"BriefDescription": "Code miss in all TLB levels causes a page walk that completes. (4K)",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_COMPLETED_4K",
"PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
@@ -140,6 +157,7 @@
},
{
"BriefDescription": "Number of page walks outstanding for an outstanding code request in the PMH each cycle.",
+ "Counter": "0,1,2,3",
"EventCode": "0x85",
"EventName": "ITLB_MISSES.WALK_PENDING",
"PublicDescription": "Counts the number of page walks outstanding for an outstanding code (instruction fetch) request in the PMH (Page Miss Handler) each cycle.",
@@ -148,6 +166,7 @@
},
{
"BriefDescription": "DTLB flush attempts of the thread-specific entries",
+ "Counter": "0,1,2,3",
"EventCode": "0xbd",
"EventName": "TLB_FLUSH.DTLB_THREAD",
"PublicDescription": "Counts the number of DTLB flush attempts of the thread-specific entries.",
@@ -156,6 +175,7 @@
},
{
"BriefDescription": "STLB flush attempts",
+ "Counter": "0,1,2,3",
"EventCode": "0xbd",
"EventName": "TLB_FLUSH.STLB_ANY",
"PublicDescription": "Counts the number of any STLB flush attempts (such as entire, VPID, PCID, InvPage, CR3 write, etc.).",
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread* [RFC PATCH v3 18/18] perf stat: Add hardware-grouping cmd option to perf stat
2023-12-12 23:02 [RFC PATCH v3 00/18] Perf stat metric grouping with hardware information weilin.wang
` (17 preceding siblings ...)
2023-12-12 23:02 ` [RFC PATCH v3 17/18] perf pmu-events: Add event counter data for Tigerlake weilin.wang
@ 2023-12-12 23:02 ` weilin.wang
18 siblings, 0 replies; 34+ messages in thread
From: weilin.wang @ 2023-12-12 23:02 UTC (permalink / raw)
To: weilin.wang, Ian Rogers, Peter Zijlstra, Ingo Molnar,
Arnaldo Carvalho de Melo, Alexander Shishkin, Jiri Olsa,
Namhyung Kim, Adrian Hunter, Kan Liang
Cc: linux-perf-users, linux-kernel, Perry Taylor, Samantha Alt,
Caleb Biggers, Mark Rutland, Yang Jihong
From: Weilin Wang <weilin.wang@intel.com>
Add a cmd option to allow user to choose this new metric grouping method.
$ perf stat -M TopdownL1 -a --hardware-grouping
Signed-off-by: Weilin Wang <weilin.wang@intel.com>
---
tools/perf/builtin-stat.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index a7a8018c3511..2f9fe54248a3 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -1256,6 +1256,8 @@ static struct option stat_options[] = {
"don't try to share events between metrics in a group"),
OPT_BOOLEAN(0, "metric-no-threshold", &stat_config.metric_no_threshold,
"don't try to share events between metrics in a group "),
+ OPT_BOOLEAN(0, "hardware-grouping", &stat_config.hardware_aware_grouping,
+ "Use hardware aware metric grouping method"),
OPT_BOOLEAN(0, "topdown", &topdown_run,
"measure top-down statistics"),
OPT_UINTEGER(0, "td-level", &stat_config.topdown_level,
@@ -2506,9 +2508,6 @@ int cmd_stat(int argc, const char **argv)
(const char **) stat_usage,
PARSE_OPT_STOP_AT_NON_OPTION);
- /* Set hardware_aware_grouping to false on default before completely enable it.*/
- stat_config.hardware_aware_grouping = false;
-
if (stat_config.csv_sep) {
stat_config.csv_output = true;
if (!strcmp(stat_config.csv_sep, "\\t"))
--
2.39.3
^ permalink raw reply related [flat|nested] 34+ messages in thread