From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH v2 02/13] RISC-V: Add SBI STA extension definitions
Date: Thu, 14 Dec 2023 11:15:54 +0100 [thread overview]
Message-ID: <20231214101552.100721-17-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231214101552.100721-15-ajones@ventanamicro.com>
The SBI STA extension enables steal-time accounting. Add the
definitions it specifies.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/include/asm/sbi.h | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 0892f4421bc4..b6f898c56940 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -31,6 +31,7 @@ enum sbi_ext_id {
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
SBI_EXT_DBCN = 0x4442434E,
+ SBI_EXT_STA = 0x535441,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -243,6 +244,22 @@ enum sbi_ext_dbcn_fid {
SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
};
+/* SBI STA (steal-time accounting) extension */
+enum sbi_ext_sta_fid {
+ SBI_EXT_STA_STEAL_TIME_SET_SHMEM = 0,
+};
+
+struct sbi_sta_struct {
+ __le32 sequence;
+ __le32 flags;
+ __le64 steal;
+ u8 preempted;
+ u8 pad[47];
+} __packed;
+
+#define SBI_STA_SHMEM_DISABLE -1
+
+/* SBI spec version fields */
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
--
2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
guoren@kernel.org, conor.dooley@microchip.com
Subject: [PATCH v2 02/13] RISC-V: Add SBI STA extension definitions
Date: Thu, 14 Dec 2023 11:15:54 +0100 [thread overview]
Message-ID: <20231214101552.100721-17-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231214101552.100721-15-ajones@ventanamicro.com>
The SBI STA extension enables steal-time accounting. Add the
definitions it specifies.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/include/asm/sbi.h | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 0892f4421bc4..b6f898c56940 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -31,6 +31,7 @@ enum sbi_ext_id {
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
SBI_EXT_DBCN = 0x4442434E,
+ SBI_EXT_STA = 0x535441,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -243,6 +244,22 @@ enum sbi_ext_dbcn_fid {
SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
};
+/* SBI STA (steal-time accounting) extension */
+enum sbi_ext_sta_fid {
+ SBI_EXT_STA_STEAL_TIME_SET_SHMEM = 0,
+};
+
+struct sbi_sta_struct {
+ __le32 sequence;
+ __le32 flags;
+ __le64 steal;
+ u8 preempted;
+ u8 pad[47];
+} __packed;
+
+#define SBI_STA_SHMEM_DISABLE -1
+
+/* SBI spec version fields */
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
--
2.43.0
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WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
guoren@kernel.org, conor.dooley@microchip.com
Subject: [PATCH v2 02/13] RISC-V: Add SBI STA extension definitions
Date: Thu, 14 Dec 2023 11:15:54 +0100 [thread overview]
Message-ID: <20231214101552.100721-17-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231214101552.100721-15-ajones@ventanamicro.com>
The SBI STA extension enables steal-time accounting. Add the
definitions it specifies.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/include/asm/sbi.h | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 0892f4421bc4..b6f898c56940 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -31,6 +31,7 @@ enum sbi_ext_id {
SBI_EXT_SRST = 0x53525354,
SBI_EXT_PMU = 0x504D55,
SBI_EXT_DBCN = 0x4442434E,
+ SBI_EXT_STA = 0x535441,
/* Experimentals extensions must lie within this range */
SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -243,6 +244,22 @@ enum sbi_ext_dbcn_fid {
SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
};
+/* SBI STA (steal-time accounting) extension */
+enum sbi_ext_sta_fid {
+ SBI_EXT_STA_STEAL_TIME_SET_SHMEM = 0,
+};
+
+struct sbi_sta_struct {
+ __le32 sequence;
+ __le32 flags;
+ __le64 steal;
+ u8 preempted;
+ u8 pad[47];
+} __packed;
+
+#define SBI_STA_SHMEM_DISABLE -1
+
+/* SBI spec version fields */
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
--
2.43.0
next prev parent reply other threads:[~2023-12-14 10:15 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-14 10:15 [PATCH v2 00/13] RISC-V: Add steal-time support Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` [PATCH v2 01/13] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 5:37 ` Anup Patel
2023-12-15 5:37 ` Anup Patel
2023-12-15 5:37 ` Anup Patel
2023-12-14 10:15 ` Andrew Jones [this message]
2023-12-14 10:15 ` [PATCH v2 02/13] RISC-V: Add SBI STA extension definitions Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 5:38 ` Anup Patel
2023-12-15 5:38 ` Anup Patel
2023-12-15 5:38 ` Anup Patel
2023-12-14 10:15 ` [PATCH v2 03/13] RISC-V: paravirt: Implement steal-time support Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 5:54 ` Anup Patel
2023-12-15 5:54 ` Anup Patel
2023-12-15 5:54 ` Anup Patel
2023-12-15 8:19 ` Andrew Jones
2023-12-15 8:19 ` Andrew Jones
2023-12-15 8:19 ` Andrew Jones
2023-12-14 10:15 ` [PATCH v2 04/13] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 6:11 ` Anup Patel
2023-12-15 6:11 ` Anup Patel
2023-12-15 6:11 ` Anup Patel
2023-12-14 10:15 ` [PATCH v2 05/13] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 6:16 ` Anup Patel
2023-12-15 6:16 ` Anup Patel
2023-12-15 6:16 ` Anup Patel
2023-12-14 10:15 ` [PATCH v2 06/13] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 9:07 ` Anup Patel
2023-12-15 9:07 ` Anup Patel
2023-12-15 9:07 ` Anup Patel
2023-12-15 12:52 ` Andrew Jones
2023-12-15 12:52 ` Andrew Jones
2023-12-15 12:52 ` Andrew Jones
2023-12-14 10:15 ` [PATCH v2 07/13] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-14 10:15 ` Andrew Jones
2023-12-15 9:09 ` Anup Patel
2023-12-15 9:09 ` Anup Patel
2023-12-15 9:09 ` Anup Patel
2023-12-14 10:16 ` [PATCH v2 08/13] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-15 9:16 ` Anup Patel
2023-12-15 9:16 ` Anup Patel
2023-12-15 9:16 ` Anup Patel
2023-12-19 20:30 ` Atish Patra
2023-12-19 20:30 ` Atish Patra
2023-12-19 20:30 ` Atish Patra
2023-12-14 10:16 ` [PATCH v2 09/13] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-15 9:18 ` Anup Patel
2023-12-15 9:18 ` Anup Patel
2023-12-15 9:18 ` Anup Patel
2023-12-14 10:16 ` [PATCH v2 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-15 9:20 ` Anup Patel
2023-12-15 9:20 ` Anup Patel
2023-12-15 9:20 ` Anup Patel
2023-12-19 21:53 ` Atish Patra
2023-12-19 21:53 ` Atish Patra
2023-12-19 21:53 ` Atish Patra
2023-12-14 10:16 ` [PATCH v2 11/13] RISC-V: KVM: selftests: Add guest_sbi_probe_extension Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-15 9:21 ` Anup Patel
2023-12-15 9:21 ` Anup Patel
2023-12-15 9:21 ` Anup Patel
2023-12-14 10:16 ` [PATCH v2 12/13] RISC-V: KVM: selftests: Add steal_time test support Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-15 9:24 ` Anup Patel
2023-12-15 9:24 ` Anup Patel
2023-12-15 9:24 ` Anup Patel
2023-12-14 10:16 ` [PATCH v2 13/13] RISC-V: KVM: selftests: Add get-reg-list test for STA registers Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-14 10:16 ` Andrew Jones
2023-12-15 9:27 ` Anup Patel
2023-12-15 9:27 ` Anup Patel
2023-12-15 9:27 ` Anup Patel
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