From: Eric Biggers <ebiggers@kernel.org>
To: Jerry Shih <jerry.shih@sifive.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, herbert@gondor.apana.org.au,
davem@davemloft.net, conor.dooley@microchip.com, ardb@kernel.org,
conor@kernel.org, heiko@sntech.de, phoebe.chen@sifive.com,
hongrong.hsu@sifive.com, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
Andy Chiu <andy.chiu@sifive.com>
Subject: Re: [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions
Date: Thu, 21 Dec 2023 23:48:27 -0600 [thread overview]
Message-ID: <20231222054827.GE52600@quark.localdomain> (raw)
In-Reply-To: <20231205092801.1335-1-jerry.shih@sifive.com>
Hi Jerry,
On Tue, Dec 05, 2023 at 05:27:49PM +0800, Jerry Shih wrote:
> Changelog v2:
> - Turn to use simd skcipher interface for AES-CBC/CTR/ECB/XTS and
> Chacha20.
If I understand correctly, the RISC-V kernel-mode vector support now seems to be
heading down the path of supporting softirq context, as I had suggested
originally. With patches 1-2 of Andy Chiu's latest patchset
"[v7, 00/10] riscv: support kernel-mode Vector"
(https://lore.kernel.org/linux-riscv/20231221134318.28105-1-andy.chiu@sifive.com).
applied, the kernel has basic support for kernel-mode vector, including in
softirq context.
With that being the case, "skcipher" algorithms can just use the RISC-V vector
unit unconditionally, given that skcipher only supports task and softirq
context. Therefore, can you consider undoing your change that added fallbacks
using the simd helper (crypto/simd.c)? Thanks!
- Eric
WARNING: multiple messages have this Message-ID (diff)
From: Eric Biggers <ebiggers@kernel.org>
To: Jerry Shih <jerry.shih@sifive.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, herbert@gondor.apana.org.au,
davem@davemloft.net, conor.dooley@microchip.com, ardb@kernel.org,
conor@kernel.org, heiko@sntech.de, phoebe.chen@sifive.com,
hongrong.hsu@sifive.com, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
Andy Chiu <andy.chiu@sifive.com>
Subject: Re: [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions
Date: Thu, 21 Dec 2023 23:48:27 -0600 [thread overview]
Message-ID: <20231222054827.GE52600@quark.localdomain> (raw)
In-Reply-To: <20231205092801.1335-1-jerry.shih@sifive.com>
Hi Jerry,
On Tue, Dec 05, 2023 at 05:27:49PM +0800, Jerry Shih wrote:
> Changelog v2:
> - Turn to use simd skcipher interface for AES-CBC/CTR/ECB/XTS and
> Chacha20.
If I understand correctly, the RISC-V kernel-mode vector support now seems to be
heading down the path of supporting softirq context, as I had suggested
originally. With patches 1-2 of Andy Chiu's latest patchset
"[v7, 00/10] riscv: support kernel-mode Vector"
(https://lore.kernel.org/linux-riscv/20231221134318.28105-1-andy.chiu@sifive.com).
applied, the kernel has basic support for kernel-mode vector, including in
softirq context.
With that being the case, "skcipher" algorithms can just use the RISC-V vector
unit unconditionally, given that skcipher only supports task and softirq
context. Therefore, can you consider undoing your change that added fallbacks
using the simd helper (crypto/simd.c)? Thanks!
- Eric
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next prev parent reply other threads:[~2023-12-22 5:48 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-05 9:27 [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 01/12] RISC-V: add helper function to read the vector VLEN Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 02/12] RISC-V: hook new crypto subdir into build-system Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 03/12] RISC-V: crypto: add OpenSSL perl module for vector instructions Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 04/12] RISC-V: crypto: add Zvkned accelerated AES implementation Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 05/12] crypto: simd - Update `walksize` in simd skcipher Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 06/12] RISC-V: crypto: add accelerated AES-CBC/CTR/ECB/XTS implementations Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 07/12] RISC-V: crypto: add Zvkg accelerated GCM GHASH implementation Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 08/12] RISC-V: crypto: add Zvknha/b accelerated SHA224/256 implementations Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 09/12] RISC-V: crypto: add Zvknhb accelerated SHA384/512 implementations Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:27 ` [PATCH v3 10/12] RISC-V: crypto: add Zvksed accelerated SM4 implementation Jerry Shih
2023-12-05 9:27 ` Jerry Shih
2023-12-05 9:28 ` [PATCH v3 11/12] RISC-V: crypto: add Zvksh accelerated SM3 implementation Jerry Shih
2023-12-05 9:28 ` Jerry Shih
2023-12-05 9:28 ` [PATCH v3 12/12] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation Jerry Shih
2023-12-05 9:28 ` Jerry Shih
2023-12-06 0:46 ` [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions Eric Biggers
2023-12-06 0:46 ` Eric Biggers
2023-12-06 7:02 ` Jerry Shih
2023-12-06 7:02 ` Jerry Shih
2023-12-06 7:41 ` Eric Biggers
2023-12-06 7:41 ` Eric Biggers
2023-12-06 17:07 ` Palmer Dabbelt
2023-12-06 17:07 ` Palmer Dabbelt
2023-12-07 15:31 ` Andy Chiu
2023-12-07 15:31 ` Andy Chiu
2023-12-22 5:48 ` Eric Biggers [this message]
2023-12-22 5:48 ` Eric Biggers
2023-12-30 3:51 ` Eric Biggers
2023-12-30 3:51 ` Eric Biggers
2024-01-02 5:16 ` Jerry Shih
2024-01-02 5:16 ` Jerry Shih
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