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From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
To: <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: aou@eecs.berkeley.edu, jeeheng.sia@starfivetech.com,
	rafael.j.wysocki@intel.com, conor.dooley@microchip.com,
	palmer@dabbelt.com, paul.walmsley@sifive.com,
	ajones@ventanamicro.com
Subject: [RFC v1 0/1] Enable SPCR table for console output on RISC-V
Date: Fri, 29 Dec 2023 14:54:04 +0800	[thread overview]
Message-ID: <20231229065405.235625-1-jeeheng.sia@starfivetech.com> (raw)

This patch will enable the SPCR table for RISC-V.

Vendor will enable/disable the SPCR table in the firmware based on the
platform design. However, in cases where the SPCR table is not usable,
a kernel parameter could be used to specify the preferred console.

This patch depends on Sunil's patch series, as indicated in [1] and
the corresponding Qemu patch can be found at [2].

[1] https://lore.kernel.org/lkml/20231219174526.2235150-1-sunilvl@ventanamicro.com/
[2] https://lore.kernel.org/qemu-devel/20231228080616.158822-1-jeeheng.sia@starfivetech.com/

Sia Jee Heng (1):
  RISC-V: ACPI: Enable SPCR table for console output on RISC-V

 arch/riscv/kernel/acpi.c | 4 ++++
 1 file changed, 4 insertions(+)

-- 
2.34.1


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WARNING: multiple messages have this Message-ID (diff)
From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
To: <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: <rafael.j.wysocki@intel.com>, <ajones@ventanamicro.com>,
	<conor.dooley@microchip.com>, <sunilvl@ventanamicro.com>,
	<jeeheng.sia@starfivetech.com>, <aou@eecs.berkeley.edu>,
	<palmer@dabbelt.com>, <paul.walmsley@sifive.com>
Subject: [RFC v1 0/1] Enable SPCR table for console output on RISC-V
Date: Fri, 29 Dec 2023 14:54:04 +0800	[thread overview]
Message-ID: <20231229065405.235625-1-jeeheng.sia@starfivetech.com> (raw)

This patch will enable the SPCR table for RISC-V.

Vendor will enable/disable the SPCR table in the firmware based on the
platform design. However, in cases where the SPCR table is not usable,
a kernel parameter could be used to specify the preferred console.

This patch depends on Sunil's patch series, as indicated in [1] and
the corresponding Qemu patch can be found at [2].

[1] https://lore.kernel.org/lkml/20231219174526.2235150-1-sunilvl@ventanamicro.com/
[2] https://lore.kernel.org/qemu-devel/20231228080616.158822-1-jeeheng.sia@starfivetech.com/

Sia Jee Heng (1):
  RISC-V: ACPI: Enable SPCR table for console output on RISC-V

 arch/riscv/kernel/acpi.c | 4 ++++
 1 file changed, 4 insertions(+)

-- 
2.34.1


             reply	other threads:[~2023-12-29  6:55 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-29  6:54 Sia Jee Heng [this message]
2023-12-29  6:54 ` [RFC v1 0/1] Enable SPCR table for console output on RISC-V Sia Jee Heng
2023-12-29  6:54 ` [RFC v1 1/1] RISC-V: ACPI: " Sia Jee Heng
2023-12-29  6:54   ` Sia Jee Heng
2024-01-02 15:39   ` Andrew Jones
2024-01-02 15:39     ` Andrew Jones
2024-01-05 12:12     ` JeeHeng Sia
2024-01-05 12:12       ` JeeHeng Sia

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