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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: fan <nifan.cxl@gmail.com>
Cc: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org,
	"Fan Ni" <fan.ni@samsung.com>, "Michael Tsirkin" <mst@redhat.com>,
	"Ira Weiny" <ira.weiny@intel.com>,
	"Huai-Cheng Kuo" <hchkuo@avery-design.com.tw>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Davidlohr Bueso" <dave@stgolabs.net>,
	"Hyeonggon Yoo" <42.hyeyoo@gmail.com>,
	"Li Zhijian" <lizhijian@fujitsu.com>,
	"Stefan Hajnoczi" <stefanha@gmail.com>,
	linuxarm@huawei.com, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 09/12] hw/mem/cxl_type3: Fix potential divide by zero reported by coverity
Date: Fri, 26 Jan 2024 11:57:50 +0000	[thread overview]
Message-ID: <20240126115750.000027e6@Huawei.com> (raw)
In-Reply-To: <ZbGjFiKKPhC_uiOF@debian>

On Wed, 24 Jan 2024 15:53:58 -0800
fan <nifan.cxl@gmail.com> wrote:

> On Wed, Jan 24, 2024 at 12:40:57PM +0000, Jonathan Cameron wrote:
> > Fixes Coverity ID 1522368.
> > 
> > Currently error_fatal is set if interleave_ways_dec() is going to return 0
> > but we should handle that zero return explicitly.
> > 
> > Reported-by: Stefan Hajnoczi <stefanha@gmail.com>
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >   
> 
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> 
> > ---
> > Note this is a stop gap until a more complex HDM decoder verification series.
> > ---
> >  hw/mem/cxl_type3.c | 8 ++++++--
> >  1 file changed, 6 insertions(+), 2 deletions(-)
> > 
> > diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> > index 1b92a065a3..24211703c6 100644
> > --- a/hw/mem/cxl_type3.c
> > +++ b/hw/mem/cxl_type3.c
> > @@ -794,8 +794,12 @@ static bool cxl_type3_dpa(CXLType3Dev *ct3d, hwaddr host_addr, uint64_t *dpa)
> >          }
> >          if (((uint64_t)host_addr < decoder_base) ||
> >              (hpa_offset >= decoder_size)) {
> > -            dpa_base += decoder_size /
> > -                cxl_interleave_ways_dec(iw, &error_fatal);
> > +            int decoded_iw = cxl_interleave_ways_dec(iw, &error_fatal);
> > +
> > +            if (decoded_iw == 0)
> > +                return false;
I've obviously been lax in running checkpatch.
Brackets needed for qemu style here. I'll add them for v2

Jonathan

> > +
> > +            dpa_base += decoder_size / decoded_iw;
> >              continue;
> >          }
> >  
> > -- 
> > 2.39.2
> >   


WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: fan <nifan.cxl@gmail.com>
Cc: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org,
	"Fan Ni" <fan.ni@samsung.com>, "Michael Tsirkin" <mst@redhat.com>,
	"Ira Weiny" <ira.weiny@intel.com>,
	"Huai-Cheng Kuo" <hchkuo@avery-design.com.tw>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Davidlohr Bueso" <dave@stgolabs.net>,
	"Hyeonggon Yoo" <42.hyeyoo@gmail.com>,
	"Li Zhijian" <lizhijian@fujitsu.com>,
	"Stefan Hajnoczi" <stefanha@gmail.com>,
	linuxarm@huawei.com, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 09/12] hw/mem/cxl_type3: Fix potential divide by zero reported by coverity
Date: Fri, 26 Jan 2024 11:57:50 +0000	[thread overview]
Message-ID: <20240126115750.000027e6@Huawei.com> (raw)
In-Reply-To: <ZbGjFiKKPhC_uiOF@debian>

On Wed, 24 Jan 2024 15:53:58 -0800
fan <nifan.cxl@gmail.com> wrote:

> On Wed, Jan 24, 2024 at 12:40:57PM +0000, Jonathan Cameron wrote:
> > Fixes Coverity ID 1522368.
> > 
> > Currently error_fatal is set if interleave_ways_dec() is going to return 0
> > but we should handle that zero return explicitly.
> > 
> > Reported-by: Stefan Hajnoczi <stefanha@gmail.com>
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >   
> 
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> 
> > ---
> > Note this is a stop gap until a more complex HDM decoder verification series.
> > ---
> >  hw/mem/cxl_type3.c | 8 ++++++--
> >  1 file changed, 6 insertions(+), 2 deletions(-)
> > 
> > diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> > index 1b92a065a3..24211703c6 100644
> > --- a/hw/mem/cxl_type3.c
> > +++ b/hw/mem/cxl_type3.c
> > @@ -794,8 +794,12 @@ static bool cxl_type3_dpa(CXLType3Dev *ct3d, hwaddr host_addr, uint64_t *dpa)
> >          }
> >          if (((uint64_t)host_addr < decoder_base) ||
> >              (hpa_offset >= decoder_size)) {
> > -            dpa_base += decoder_size /
> > -                cxl_interleave_ways_dec(iw, &error_fatal);
> > +            int decoded_iw = cxl_interleave_ways_dec(iw, &error_fatal);
> > +
> > +            if (decoded_iw == 0)
> > +                return false;
I've obviously been lax in running checkpatch.
Brackets needed for qemu style here. I'll add them for v2

Jonathan

> > +
> > +            dpa_base += decoder_size / decoded_iw;
> >              continue;
> >          }
> >  
> > -- 
> > 2.39.2
> >   



  reply	other threads:[~2024-01-26 11:57 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-24 12:40 [PATCH 00/12 qemu] CXL emulation fixes and minor cleanup Jonathan Cameron
2024-01-24 12:40 ` Jonathan Cameron via
2024-01-24 12:40 ` [PATCH 01/12] cxl/cdat: Handle cdat table build errors Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 21:04   ` fan
2024-01-24 12:40 ` [PATCH 02/12] hw/mem/cxl_type3: Drop handling of failure of g_malloc0() Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 21:10   ` fan
2024-01-24 12:40 ` [PATCH 03/12] hw/pci-bridge/cxl_upstream: Drop g_malloc0() failure handling Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 21:11   ` fan
2024-01-24 12:40 ` [PATCH 04/12] cxl/cdat: Fix header sum value in CDAT checksum Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 12:40 ` [PATCH 05/12] hw/cxl/mbox: Remove dead code Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 23:41   ` fan
2024-01-24 12:40 ` [PATCH 06/12] hw/cxl/device: read from register values in mdev_reg_read() Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 12:40 ` [PATCH 07/12] hw/cxl: Pass CXLComponentState to cache_mem_ops Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 23:46   ` fan
2024-01-24 12:40 ` [PATCH 08/12] hw/cxl: Pass NULL for a NULL MemoryRegionOps Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 23:51   ` fan
2024-01-24 12:40 ` [PATCH 09/12] hw/mem/cxl_type3: Fix potential divide by zero reported by coverity Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 23:53   ` fan
2024-01-26 11:57     ` Jonathan Cameron [this message]
2024-01-26 11:57       ` Jonathan Cameron via
2024-01-24 12:40 ` [PATCH 10/12] tests/acpi: Allow update of DSDT.cxl Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 12:40 ` [PATCH 11/12] hw/i386: Fix _STA return value for ACPI0017 Jonathan Cameron
2024-01-24 12:40   ` Jonathan Cameron via
2024-01-24 12:41 ` [PATCH 12/12] tests/acpi: Update DSDT.cxl to reflect change _STA return value Jonathan Cameron
2024-01-24 12:41   ` Jonathan Cameron via

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