* [PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
This series extends the KVM RISC-V ONE_REG interface to report few more
ISA extensions namely: Ztso and Zacas. These extensions are already
supported by the HWPROBE interface in Linux-6.8 kernel.
To test these patches, use KVMTOOL from the riscv_more_exts_round2_v1
branch at: https://github.com/avpatel/kvmtool.git
These patches can also be found in the riscv_kvm_more_exts_round2_v1
branch at: https://github.com/avpatel/linux.git
Anup Patel (5):
RISC-V: KVM: Forward SEED CSR access to user space
RISC-V: KVM: Allow Ztso extension for Guest/VM
KVM: riscv: selftests: Add Ztso extension to get-reg-list test
RISC-V: KVM: Allow Zacas extension for Guest/VM
KVM: riscv: selftests: Add Zacas extension to get-reg-list test
arch/riscv/include/uapi/asm/kvm.h | 2 ++
arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
arch/riscv/kvm/vcpu_onereg.c | 4 ++++
tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 ++++++++
4 files changed, 27 insertions(+)
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
This series extends the KVM RISC-V ONE_REG interface to report few more
ISA extensions namely: Ztso and Zacas. These extensions are already
supported by the HWPROBE interface in Linux-6.8 kernel.
To test these patches, use KVMTOOL from the riscv_more_exts_round2_v1
branch at: https://github.com/avpatel/kvmtool.git
These patches can also be found in the riscv_kvm_more_exts_round2_v1
branch at: https://github.com/avpatel/linux.git
Anup Patel (5):
RISC-V: KVM: Forward SEED CSR access to user space
RISC-V: KVM: Allow Ztso extension for Guest/VM
KVM: riscv: selftests: Add Ztso extension to get-reg-list test
RISC-V: KVM: Allow Zacas extension for Guest/VM
KVM: riscv: selftests: Add Zacas extension to get-reg-list test
arch/riscv/include/uapi/asm/kvm.h | 2 ++
arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
arch/riscv/kvm/vcpu_onereg.c | 4 ++++
tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 ++++++++
4 files changed, 27 insertions(+)
--
2.34.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-14 12:37 ` Anup Patel
-1 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: kvm-riscv
The SEED CSR access from VS/VU mode (guest) will always trap to
HS-mode (KVM) when Zkr extension is available to the Guest/VM.
We must forward this CSR access to KVM user space so that it
can be emulated based on the method chosen by VMM.
Fixes: f370b4e668f0 ("RISC-V: KVM: Allow scalar crypto extensions for Guest/VM")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
index 7a6abed41bc1..ee7215f4071f 100644
--- a/arch/riscv/kvm/vcpu_insn.c
+++ b/arch/riscv/kvm/vcpu_insn.c
@@ -7,6 +7,8 @@
#include <linux/bitops.h>
#include <linux/kvm_host.h>
+#include <asm/cpufeature.h>
+
#define INSN_OPCODE_MASK 0x007c
#define INSN_OPCODE_SHIFT 2
#define INSN_OPCODE_SYSTEM 28
@@ -213,9 +215,20 @@ struct csr_func {
unsigned long wr_mask);
};
+static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num,
+ unsigned long *val, unsigned long new_val,
+ unsigned long wr_mask)
+{
+ if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR))
+ return KVM_INSN_ILLEGAL_TRAP;
+
+ return KVM_INSN_EXIT_TO_USER_SPACE;
+}
+
static const struct csr_func csr_funcs[] = {
KVM_RISCV_VCPU_AIA_CSR_FUNCS
KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS
+ { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw },
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
The SEED CSR access from VS/VU mode (guest) will always trap to
HS-mode (KVM) when Zkr extension is available to the Guest/VM.
We must forward this CSR access to KVM user space so that it
can be emulated based on the method chosen by VMM.
Fixes: f370b4e668f0 ("RISC-V: KVM: Allow scalar crypto extensions for Guest/VM")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
index 7a6abed41bc1..ee7215f4071f 100644
--- a/arch/riscv/kvm/vcpu_insn.c
+++ b/arch/riscv/kvm/vcpu_insn.c
@@ -7,6 +7,8 @@
#include <linux/bitops.h>
#include <linux/kvm_host.h>
+#include <asm/cpufeature.h>
+
#define INSN_OPCODE_MASK 0x007c
#define INSN_OPCODE_SHIFT 2
#define INSN_OPCODE_SYSTEM 28
@@ -213,9 +215,20 @@ struct csr_func {
unsigned long wr_mask);
};
+static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num,
+ unsigned long *val, unsigned long new_val,
+ unsigned long wr_mask)
+{
+ if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR))
+ return KVM_INSN_ILLEGAL_TRAP;
+
+ return KVM_INSN_EXIT_TO_USER_SPACE;
+}
+
static const struct csr_func csr_funcs[] = {
KVM_RISCV_VCPU_AIA_CSR_FUNCS
KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS
+ { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw },
};
/**
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
The SEED CSR access from VS/VU mode (guest) will always trap to
HS-mode (KVM) when Zkr extension is available to the Guest/VM.
We must forward this CSR access to KVM user space so that it
can be emulated based on the method chosen by VMM.
Fixes: f370b4e668f0 ("RISC-V: KVM: Allow scalar crypto extensions for Guest/VM")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
index 7a6abed41bc1..ee7215f4071f 100644
--- a/arch/riscv/kvm/vcpu_insn.c
+++ b/arch/riscv/kvm/vcpu_insn.c
@@ -7,6 +7,8 @@
#include <linux/bitops.h>
#include <linux/kvm_host.h>
+#include <asm/cpufeature.h>
+
#define INSN_OPCODE_MASK 0x007c
#define INSN_OPCODE_SHIFT 2
#define INSN_OPCODE_SYSTEM 28
@@ -213,9 +215,20 @@ struct csr_func {
unsigned long wr_mask);
};
+static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num,
+ unsigned long *val, unsigned long new_val,
+ unsigned long wr_mask)
+{
+ if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR))
+ return KVM_INSN_ILLEGAL_TRAP;
+
+ return KVM_INSN_EXIT_TO_USER_SPACE;
+}
+
static const struct csr_func csr_funcs[] = {
KVM_RISCV_VCPU_AIA_CSR_FUNCS
KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS
+ { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw },
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-28 13:03 ` Andrew Jones
-1 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:03 UTC (permalink / raw)
To: kvm-riscv
On Wed, Feb 14, 2024 at 06:07:53PM +0530, Anup Patel wrote:
> The SEED CSR access from VS/VU mode (guest) will always trap to
> HS-mode (KVM) when Zkr extension is available to the Guest/VM.
>
> We must forward this CSR access to KVM user space so that it
> can be emulated based on the method chosen by VMM.
>
> Fixes: f370b4e668f0 ("RISC-V: KVM: Allow scalar crypto extensions for Guest/VM")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
> index 7a6abed41bc1..ee7215f4071f 100644
> --- a/arch/riscv/kvm/vcpu_insn.c
> +++ b/arch/riscv/kvm/vcpu_insn.c
> @@ -7,6 +7,8 @@
> #include <linux/bitops.h>
> #include <linux/kvm_host.h>
>
> +#include <asm/cpufeature.h>
> +
> #define INSN_OPCODE_MASK 0x007c
> #define INSN_OPCODE_SHIFT 2
> #define INSN_OPCODE_SYSTEM 28
> @@ -213,9 +215,20 @@ struct csr_func {
> unsigned long wr_mask);
> };
>
> +static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num,
> + unsigned long *val, unsigned long new_val,
> + unsigned long wr_mask)
> +{
> + if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR))
> + return KVM_INSN_ILLEGAL_TRAP;
> +
> + return KVM_INSN_EXIT_TO_USER_SPACE;
> +}
> +
> static const struct csr_func csr_funcs[] = {
> KVM_RISCV_VCPU_AIA_CSR_FUNCS
> KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS
> + { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw },
> };
>
> /**
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space
@ 2024-02-28 13:03 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:03 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:53PM +0530, Anup Patel wrote:
> The SEED CSR access from VS/VU mode (guest) will always trap to
> HS-mode (KVM) when Zkr extension is available to the Guest/VM.
>
> We must forward this CSR access to KVM user space so that it
> can be emulated based on the method chosen by VMM.
>
> Fixes: f370b4e668f0 ("RISC-V: KVM: Allow scalar crypto extensions for Guest/VM")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
> index 7a6abed41bc1..ee7215f4071f 100644
> --- a/arch/riscv/kvm/vcpu_insn.c
> +++ b/arch/riscv/kvm/vcpu_insn.c
> @@ -7,6 +7,8 @@
> #include <linux/bitops.h>
> #include <linux/kvm_host.h>
>
> +#include <asm/cpufeature.h>
> +
> #define INSN_OPCODE_MASK 0x007c
> #define INSN_OPCODE_SHIFT 2
> #define INSN_OPCODE_SYSTEM 28
> @@ -213,9 +215,20 @@ struct csr_func {
> unsigned long wr_mask);
> };
>
> +static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num,
> + unsigned long *val, unsigned long new_val,
> + unsigned long wr_mask)
> +{
> + if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR))
> + return KVM_INSN_ILLEGAL_TRAP;
> +
> + return KVM_INSN_EXIT_TO_USER_SPACE;
> +}
> +
> static const struct csr_func csr_funcs[] = {
> KVM_RISCV_VCPU_AIA_CSR_FUNCS
> KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS
> + { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw },
> };
>
> /**
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space
@ 2024-02-28 13:03 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:03 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:53PM +0530, Anup Patel wrote:
> The SEED CSR access from VS/VU mode (guest) will always trap to
> HS-mode (KVM) when Zkr extension is available to the Guest/VM.
>
> We must forward this CSR access to KVM user space so that it
> can be emulated based on the method chosen by VMM.
>
> Fixes: f370b4e668f0 ("RISC-V: KVM: Allow scalar crypto extensions for Guest/VM")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c
> index 7a6abed41bc1..ee7215f4071f 100644
> --- a/arch/riscv/kvm/vcpu_insn.c
> +++ b/arch/riscv/kvm/vcpu_insn.c
> @@ -7,6 +7,8 @@
> #include <linux/bitops.h>
> #include <linux/kvm_host.h>
>
> +#include <asm/cpufeature.h>
> +
> #define INSN_OPCODE_MASK 0x007c
> #define INSN_OPCODE_SHIFT 2
> #define INSN_OPCODE_SYSTEM 28
> @@ -213,9 +215,20 @@ struct csr_func {
> unsigned long wr_mask);
> };
>
> +static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num,
> + unsigned long *val, unsigned long new_val,
> + unsigned long wr_mask)
> +{
> + if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR))
> + return KVM_INSN_ILLEGAL_TRAP;
> +
> + return KVM_INSN_EXIT_TO_USER_SPACE;
> +}
> +
> static const struct csr_func csr_funcs[] = {
> KVM_RISCV_VCPU_AIA_CSR_FUNCS
> KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS
> + { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw },
> };
>
> /**
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-14 12:37 ` Anup Patel
-1 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: kvm-riscv
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Ztso extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index 7499e88a947c..f8aa9f2ace95 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -166,6 +166,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFH,
KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA,
+ KVM_RISCV_ISA_EXT_ZTSO,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 5f7355e96008..38f5cf286087 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -66,6 +66,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZKSED),
KVM_ISA_EXT_ARR(ZKSH),
KVM_ISA_EXT_ARR(ZKT),
+ KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
KVM_ISA_EXT_ARR(ZVFH),
@@ -141,6 +142,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_ZKSED:
case KVM_RISCV_ISA_EXT_ZKSH:
case KVM_RISCV_ISA_EXT_ZKT:
+ case KVM_RISCV_ISA_EXT_ZTSO:
case KVM_RISCV_ISA_EXT_ZVBB:
case KVM_RISCV_ISA_EXT_ZVBC:
case KVM_RISCV_ISA_EXT_ZVFH:
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Ztso extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index 7499e88a947c..f8aa9f2ace95 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -166,6 +166,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFH,
KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA,
+ KVM_RISCV_ISA_EXT_ZTSO,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 5f7355e96008..38f5cf286087 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -66,6 +66,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZKSED),
KVM_ISA_EXT_ARR(ZKSH),
KVM_ISA_EXT_ARR(ZKT),
+ KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
KVM_ISA_EXT_ARR(ZVFH),
@@ -141,6 +142,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_ZKSED:
case KVM_RISCV_ISA_EXT_ZKSH:
case KVM_RISCV_ISA_EXT_ZKT:
+ case KVM_RISCV_ISA_EXT_ZTSO:
case KVM_RISCV_ISA_EXT_ZVBB:
case KVM_RISCV_ISA_EXT_ZVBC:
case KVM_RISCV_ISA_EXT_ZVFH:
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Ztso extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index 7499e88a947c..f8aa9f2ace95 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -166,6 +166,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFH,
KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA,
+ KVM_RISCV_ISA_EXT_ZTSO,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 5f7355e96008..38f5cf286087 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -66,6 +66,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(ZKSED),
KVM_ISA_EXT_ARR(ZKSH),
KVM_ISA_EXT_ARR(ZKT),
+ KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
KVM_ISA_EXT_ARR(ZVFH),
@@ -141,6 +142,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_ZKSED:
case KVM_RISCV_ISA_EXT_ZKSH:
case KVM_RISCV_ISA_EXT_ZKT:
+ case KVM_RISCV_ISA_EXT_ZTSO:
case KVM_RISCV_ISA_EXT_ZVBB:
case KVM_RISCV_ISA_EXT_ZVBC:
case KVM_RISCV_ISA_EXT_ZVFH:
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-28 13:05 ` Andrew Jones
-1 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:05 UTC (permalink / raw)
To: kvm-riscv
On Wed, Feb 14, 2024 at 06:07:54PM +0530, Anup Patel wrote:
> We extend the KVM ISA extension ONE_REG interface to allow KVM
> user space to detect and enable Ztso extension for Guest/VM.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 7499e88a947c..f8aa9f2ace95 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -166,6 +166,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZVFH,
> KVM_RISCV_ISA_EXT_ZVFHMIN,
> KVM_RISCV_ISA_EXT_ZFA,
> + KVM_RISCV_ISA_EXT_ZTSO,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 5f7355e96008..38f5cf286087 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -66,6 +66,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(ZKSED),
> KVM_ISA_EXT_ARR(ZKSH),
> KVM_ISA_EXT_ARR(ZKT),
> + KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> KVM_ISA_EXT_ARR(ZVFH),
> @@ -141,6 +142,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_ZKSED:
> case KVM_RISCV_ISA_EXT_ZKSH:
> case KVM_RISCV_ISA_EXT_ZKT:
> + case KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_RISCV_ISA_EXT_ZVBC:
> case KVM_RISCV_ISA_EXT_ZVFH:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
@ 2024-02-28 13:05 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:05 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:54PM +0530, Anup Patel wrote:
> We extend the KVM ISA extension ONE_REG interface to allow KVM
> user space to detect and enable Ztso extension for Guest/VM.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 7499e88a947c..f8aa9f2ace95 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -166,6 +166,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZVFH,
> KVM_RISCV_ISA_EXT_ZVFHMIN,
> KVM_RISCV_ISA_EXT_ZFA,
> + KVM_RISCV_ISA_EXT_ZTSO,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 5f7355e96008..38f5cf286087 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -66,6 +66,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(ZKSED),
> KVM_ISA_EXT_ARR(ZKSH),
> KVM_ISA_EXT_ARR(ZKT),
> + KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> KVM_ISA_EXT_ARR(ZVFH),
> @@ -141,6 +142,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_ZKSED:
> case KVM_RISCV_ISA_EXT_ZKSH:
> case KVM_RISCV_ISA_EXT_ZKT:
> + case KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_RISCV_ISA_EXT_ZVBC:
> case KVM_RISCV_ISA_EXT_ZVFH:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
@ 2024-02-28 13:05 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:05 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:54PM +0530, Anup Patel wrote:
> We extend the KVM ISA extension ONE_REG interface to allow KVM
> user space to detect and enable Ztso extension for Guest/VM.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 7499e88a947c..f8aa9f2ace95 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -166,6 +166,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZVFH,
> KVM_RISCV_ISA_EXT_ZVFHMIN,
> KVM_RISCV_ISA_EXT_ZFA,
> + KVM_RISCV_ISA_EXT_ZTSO,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 5f7355e96008..38f5cf286087 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -66,6 +66,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(ZKSED),
> KVM_ISA_EXT_ARR(ZKSH),
> KVM_ISA_EXT_ARR(ZKT),
> + KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> KVM_ISA_EXT_ARR(ZVFH),
> @@ -141,6 +142,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_ZKSED:
> case KVM_RISCV_ISA_EXT_ZKSH:
> case KVM_RISCV_ISA_EXT_ZKT:
> + case KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_RISCV_ISA_EXT_ZVBC:
> case KVM_RISCV_ISA_EXT_ZVFH:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-14 12:37 ` Anup Patel
-1 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: kvm-riscv
The KVM RISC-V allows Ztso extension for Guest/VM so let us
add this extension to get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 9d9c50b68207..5429453561d7 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -73,6 +73,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
@@ -436,6 +437,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZKSED),
KVM_ISA_EXT_ARR(ZKSH),
KVM_ISA_EXT_ARR(ZKT),
+ KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
KVM_ISA_EXT_ARR(ZVFH),
@@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
+KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
@@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_zksed,
&config_zksh,
&config_zkt,
+ &config_ztso,
&config_zvbb,
&config_zvbc,
&config_zvfh,
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
The KVM RISC-V allows Ztso extension for Guest/VM so let us
add this extension to get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 9d9c50b68207..5429453561d7 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -73,6 +73,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
@@ -436,6 +437,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZKSED),
KVM_ISA_EXT_ARR(ZKSH),
KVM_ISA_EXT_ARR(ZKT),
+ KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
KVM_ISA_EXT_ARR(ZVFH),
@@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
+KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
@@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_zksed,
&config_zksh,
&config_zkt,
+ &config_ztso,
&config_zvbb,
&config_zvbc,
&config_zvfh,
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
The KVM RISC-V allows Ztso extension for Guest/VM so let us
add this extension to get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 9d9c50b68207..5429453561d7 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -73,6 +73,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
@@ -436,6 +437,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(ZKSED),
KVM_ISA_EXT_ARR(ZKSH),
KVM_ISA_EXT_ARR(ZKT),
+ KVM_ISA_EXT_ARR(ZTSO),
KVM_ISA_EXT_ARR(ZVBB),
KVM_ISA_EXT_ARR(ZVBC),
KVM_ISA_EXT_ARR(ZVFH),
@@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
+KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
@@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_zksed,
&config_zksh,
&config_zkt,
+ &config_ztso,
&config_zvbb,
&config_zvbc,
&config_zvfh,
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-28 13:07 ` Andrew Jones
-1 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:07 UTC (permalink / raw)
To: kvm-riscv
On Wed, Feb 14, 2024 at 06:07:55PM +0530, Anup Patel wrote:
> The KVM RISC-V allows Ztso extension for Guest/VM so let us
> add this extension to get-reg-list test.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index 9d9c50b68207..5429453561d7 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -73,6 +73,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
> @@ -436,6 +437,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(ZKSED),
> KVM_ISA_EXT_ARR(ZKSH),
> KVM_ISA_EXT_ARR(ZKT),
> + KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> KVM_ISA_EXT_ARR(ZVFH),
> @@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
> KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
> KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
> KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
> +KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
> @@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_zksed,
> &config_zksh,
> &config_zkt,
> + &config_ztso,
> &config_zvbb,
> &config_zvbc,
> &config_zvfh,
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
@ 2024-02-28 13:07 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:07 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:55PM +0530, Anup Patel wrote:
> The KVM RISC-V allows Ztso extension for Guest/VM so let us
> add this extension to get-reg-list test.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index 9d9c50b68207..5429453561d7 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -73,6 +73,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
> @@ -436,6 +437,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(ZKSED),
> KVM_ISA_EXT_ARR(ZKSH),
> KVM_ISA_EXT_ARR(ZKT),
> + KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> KVM_ISA_EXT_ARR(ZVFH),
> @@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
> KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
> KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
> KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
> +KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
> @@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_zksed,
> &config_zksh,
> &config_zkt,
> + &config_ztso,
> &config_zvbb,
> &config_zvbc,
> &config_zvfh,
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
@ 2024-02-28 13:07 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:07 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:55PM +0530, Anup Patel wrote:
> The KVM RISC-V allows Ztso extension for Guest/VM so let us
> add this extension to get-reg-list test.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index 9d9c50b68207..5429453561d7 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -73,6 +73,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSED:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKSH:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZKT:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZTSO:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVBC:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZVFH:
> @@ -436,6 +437,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(ZKSED),
> KVM_ISA_EXT_ARR(ZKSH),
> KVM_ISA_EXT_ARR(ZKT),
> + KVM_ISA_EXT_ARR(ZTSO),
> KVM_ISA_EXT_ARR(ZVBB),
> KVM_ISA_EXT_ARR(ZVBC),
> KVM_ISA_EXT_ARR(ZVFH),
> @@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
> KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
> KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
> KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
> +KVM_ISA_EXT_SIMPLE_CONFIG(ztso, ZTSO);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
> KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
> @@ -1010,6 +1013,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_zksed,
> &config_zksh,
> &config_zkt,
> + &config_ztso,
> &config_zvbb,
> &config_zvbc,
> &config_zvfh,
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-14 12:37 ` Anup Patel
-1 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: kvm-riscv
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zacas extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index f8aa9f2ace95..37fb0f70b3e5 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA,
KVM_RISCV_ISA_EXT_ZTSO,
+ KVM_RISCV_ISA_EXT_ZACAS,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 38f5cf286087..f4a6124d25c9 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZACAS),
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBC),
@@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SSTC:
case KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_RISCV_ISA_EXT_SVNAPOT:
+ case KVM_RISCV_ISA_EXT_ZACAS:
case KVM_RISCV_ISA_EXT_ZBA:
case KVM_RISCV_ISA_EXT_ZBB:
case KVM_RISCV_ISA_EXT_ZBC:
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zacas extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index f8aa9f2ace95..37fb0f70b3e5 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA,
KVM_RISCV_ISA_EXT_ZTSO,
+ KVM_RISCV_ISA_EXT_ZACAS,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 38f5cf286087..f4a6124d25c9 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZACAS),
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBC),
@@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SSTC:
case KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_RISCV_ISA_EXT_SVNAPOT:
+ case KVM_RISCV_ISA_EXT_ZACAS:
case KVM_RISCV_ISA_EXT_ZBA:
case KVM_RISCV_ISA_EXT_ZBB:
case KVM_RISCV_ISA_EXT_ZBC:
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zacas extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
index f8aa9f2ace95..37fb0f70b3e5 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA,
KVM_RISCV_ISA_EXT_ZTSO,
+ KVM_RISCV_ISA_EXT_ZACAS,
KVM_RISCV_ISA_EXT_MAX,
};
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 38f5cf286087..f4a6124d25c9 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZACAS),
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBC),
@@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
case KVM_RISCV_ISA_EXT_SSTC:
case KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_RISCV_ISA_EXT_SVNAPOT:
+ case KVM_RISCV_ISA_EXT_ZACAS:
case KVM_RISCV_ISA_EXT_ZBA:
case KVM_RISCV_ISA_EXT_ZBB:
case KVM_RISCV_ISA_EXT_ZBC:
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-28 13:10 ` Andrew Jones
-1 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:10 UTC (permalink / raw)
To: kvm-riscv
On Wed, Feb 14, 2024 at 06:07:56PM +0530, Anup Patel wrote:
> We extend the KVM ISA extension ONE_REG interface to allow KVM
> user space to detect and enable Zacas extension for Guest/VM.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index f8aa9f2ace95..37fb0f70b3e5 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZVFHMIN,
> KVM_RISCV_ISA_EXT_ZFA,
> KVM_RISCV_ISA_EXT_ZTSO,
> + KVM_RISCV_ISA_EXT_ZACAS,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 38f5cf286087..f4a6124d25c9 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(SVINVAL),
> KVM_ISA_EXT_ARR(SVNAPOT),
> KVM_ISA_EXT_ARR(SVPBMT),
> + KVM_ISA_EXT_ARR(ZACAS),
> KVM_ISA_EXT_ARR(ZBA),
> KVM_ISA_EXT_ARR(ZBB),
> KVM_ISA_EXT_ARR(ZBC),
> @@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_SSTC:
> case KVM_RISCV_ISA_EXT_SVINVAL:
> case KVM_RISCV_ISA_EXT_SVNAPOT:
> + case KVM_RISCV_ISA_EXT_ZACAS:
> case KVM_RISCV_ISA_EXT_ZBA:
> case KVM_RISCV_ISA_EXT_ZBB:
> case KVM_RISCV_ISA_EXT_ZBC:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
@ 2024-02-28 13:10 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:10 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:56PM +0530, Anup Patel wrote:
> We extend the KVM ISA extension ONE_REG interface to allow KVM
> user space to detect and enable Zacas extension for Guest/VM.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index f8aa9f2ace95..37fb0f70b3e5 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZVFHMIN,
> KVM_RISCV_ISA_EXT_ZFA,
> KVM_RISCV_ISA_EXT_ZTSO,
> + KVM_RISCV_ISA_EXT_ZACAS,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 38f5cf286087..f4a6124d25c9 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(SVINVAL),
> KVM_ISA_EXT_ARR(SVNAPOT),
> KVM_ISA_EXT_ARR(SVPBMT),
> + KVM_ISA_EXT_ARR(ZACAS),
> KVM_ISA_EXT_ARR(ZBA),
> KVM_ISA_EXT_ARR(ZBB),
> KVM_ISA_EXT_ARR(ZBC),
> @@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_SSTC:
> case KVM_RISCV_ISA_EXT_SVINVAL:
> case KVM_RISCV_ISA_EXT_SVNAPOT:
> + case KVM_RISCV_ISA_EXT_ZACAS:
> case KVM_RISCV_ISA_EXT_ZBA:
> case KVM_RISCV_ISA_EXT_ZBB:
> case KVM_RISCV_ISA_EXT_ZBC:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
@ 2024-02-28 13:10 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:10 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:56PM +0530, Anup Patel wrote:
> We extend the KVM ISA extension ONE_REG interface to allow KVM
> user space to detect and enable Zacas extension for Guest/VM.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> arch/riscv/include/uapi/asm/kvm.h | 1 +
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index f8aa9f2ace95..37fb0f70b3e5 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -167,6 +167,7 @@ enum KVM_RISCV_ISA_EXT_ID {
> KVM_RISCV_ISA_EXT_ZVFHMIN,
> KVM_RISCV_ISA_EXT_ZFA,
> KVM_RISCV_ISA_EXT_ZTSO,
> + KVM_RISCV_ISA_EXT_ZACAS,
> KVM_RISCV_ISA_EXT_MAX,
> };
>
> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
> index 38f5cf286087..f4a6124d25c9 100644
> --- a/arch/riscv/kvm/vcpu_onereg.c
> +++ b/arch/riscv/kvm/vcpu_onereg.c
> @@ -40,6 +40,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
> KVM_ISA_EXT_ARR(SVINVAL),
> KVM_ISA_EXT_ARR(SVNAPOT),
> KVM_ISA_EXT_ARR(SVPBMT),
> + KVM_ISA_EXT_ARR(ZACAS),
> KVM_ISA_EXT_ARR(ZBA),
> KVM_ISA_EXT_ARR(ZBB),
> KVM_ISA_EXT_ARR(ZBC),
> @@ -118,6 +119,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
> case KVM_RISCV_ISA_EXT_SSTC:
> case KVM_RISCV_ISA_EXT_SVINVAL:
> case KVM_RISCV_ISA_EXT_SVNAPOT:
> + case KVM_RISCV_ISA_EXT_ZACAS:
> case KVM_RISCV_ISA_EXT_ZBA:
> case KVM_RISCV_ISA_EXT_ZBB:
> case KVM_RISCV_ISA_EXT_ZBC:
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-14 12:37 ` Anup Patel
-1 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: kvm-riscv
The KVM RISC-V allows Zacas extension for Guest/VM so let us
add this extension to get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 5429453561d7..d334c4c9765f 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -47,6 +47,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
@@ -411,6 +412,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZACAS),
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBC),
@@ -933,6 +935,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(sstc, SSTC);
KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
+KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
@@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_svinval,
&config_svnapot,
&config_svpbmt,
+ &config_zacas,
&config_zba,
&config_zbb,
&config_zbc,
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
The KVM RISC-V allows Zacas extension for Guest/VM so let us
add this extension to get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 5429453561d7..d334c4c9765f 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -47,6 +47,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
@@ -411,6 +412,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZACAS),
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBC),
@@ -933,6 +935,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(sstc, SSTC);
KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
+KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
@@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_svinval,
&config_svnapot,
&config_svpbmt,
+ &config_zacas,
&config_zba,
&config_zbb,
&config_zbc,
--
2.34.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
@ 2024-02-14 12:37 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-02-14 12:37 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra, Shuah Khan
Cc: Palmer Dabbelt, Paul Walmsley, Andrew Jones, Anup Patel, kvm,
kvm-riscv, linux-riscv, linux-kernel, linux-kselftest, Anup Patel
The KVM RISC-V allows Zacas extension for Guest/VM so let us
add this extension to get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
index 5429453561d7..d334c4c9765f 100644
--- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
+++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
@@ -47,6 +47,7 @@ bool filter_reg(__u64 reg)
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVINVAL:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
+ case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
@@ -411,6 +412,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
KVM_ISA_EXT_ARR(SVINVAL),
KVM_ISA_EXT_ARR(SVNAPOT),
KVM_ISA_EXT_ARR(SVPBMT),
+ KVM_ISA_EXT_ARR(ZACAS),
KVM_ISA_EXT_ARR(ZBA),
KVM_ISA_EXT_ARR(ZBB),
KVM_ISA_EXT_ARR(ZBC),
@@ -933,6 +935,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(sstc, SSTC);
KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
+KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
@@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
&config_svinval,
&config_svnapot,
&config_svpbmt,
+ &config_zacas,
&config_zba,
&config_zbb,
&config_zbc,
--
2.34.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-02-28 13:10 ` Andrew Jones
-1 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:10 UTC (permalink / raw)
To: kvm-riscv
On Wed, Feb 14, 2024 at 06:07:57PM +0530, Anup Patel wrote:
> The KVM RISC-V allows Zacas extension for Guest/VM so let us
> add this extension to get-reg-list test.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index 5429453561d7..d334c4c9765f 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -47,6 +47,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVINVAL:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
> @@ -411,6 +412,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(SVINVAL),
> KVM_ISA_EXT_ARR(SVNAPOT),
> KVM_ISA_EXT_ARR(SVPBMT),
> + KVM_ISA_EXT_ARR(ZACAS),
> KVM_ISA_EXT_ARR(ZBA),
> KVM_ISA_EXT_ARR(ZBB),
> KVM_ISA_EXT_ARR(ZBC),
> @@ -933,6 +935,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(sstc, SSTC);
> KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
> KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
> KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
> +KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
> KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
> KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
> @@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_svinval,
> &config_svnapot,
> &config_svpbmt,
> + &config_zacas,
> &config_zba,
> &config_zbb,
> &config_zbc,
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
@ 2024-02-28 13:10 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:10 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:57PM +0530, Anup Patel wrote:
> The KVM RISC-V allows Zacas extension for Guest/VM so let us
> add this extension to get-reg-list test.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index 5429453561d7..d334c4c9765f 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -47,6 +47,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVINVAL:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
> @@ -411,6 +412,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(SVINVAL),
> KVM_ISA_EXT_ARR(SVNAPOT),
> KVM_ISA_EXT_ARR(SVPBMT),
> + KVM_ISA_EXT_ARR(ZACAS),
> KVM_ISA_EXT_ARR(ZBA),
> KVM_ISA_EXT_ARR(ZBB),
> KVM_ISA_EXT_ARR(ZBC),
> @@ -933,6 +935,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(sstc, SSTC);
> KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
> KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
> KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
> +KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
> KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
> KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
> @@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_svinval,
> &config_svnapot,
> &config_svpbmt,
> + &config_zacas,
> &config_zba,
> &config_zbb,
> &config_zbc,
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread* Re: [PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
@ 2024-02-28 13:10 ` Andrew Jones
0 siblings, 0 replies; 36+ messages in thread
From: Andrew Jones @ 2024-02-28 13:10 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Anup Patel, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 06:07:57PM +0530, Anup Patel wrote:
> The KVM RISC-V allows Zacas extension for Guest/VM so let us
> add this extension to get-reg-list test.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> index 5429453561d7..d334c4c9765f 100644
> --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c
> +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c
> @@ -47,6 +47,7 @@ bool filter_reg(__u64 reg)
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVINVAL:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVNAPOT:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_SVPBMT:
> + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZACAS:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBA:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBB:
> case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBC:
> @@ -411,6 +412,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off)
> KVM_ISA_EXT_ARR(SVINVAL),
> KVM_ISA_EXT_ARR(SVNAPOT),
> KVM_ISA_EXT_ARR(SVPBMT),
> + KVM_ISA_EXT_ARR(ZACAS),
> KVM_ISA_EXT_ARR(ZBA),
> KVM_ISA_EXT_ARR(ZBB),
> KVM_ISA_EXT_ARR(ZBC),
> @@ -933,6 +935,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(sstc, SSTC);
> KVM_ISA_EXT_SIMPLE_CONFIG(svinval, SVINVAL);
> KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT);
> KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
> +KVM_ISA_EXT_SIMPLE_CONFIG(zacas, ZACAS);
> KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
> KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
> KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
> @@ -987,6 +990,7 @@ struct vcpu_reg_list *vcpu_configs[] = {
> &config_svinval,
> &config_svnapot,
> &config_svpbmt,
> + &config_zacas,
> &config_zba,
> &config_zbb,
> &config_zbc,
> --
> 2.34.1
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG
2024-02-14 12:37 ` Anup Patel
(?)
@ 2024-03-01 16:40 ` Anup Patel
-1 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-03-01 16:40 UTC (permalink / raw)
To: kvm-riscv
On Wed, Feb 14, 2024 at 6:08?PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> This series extends the KVM RISC-V ONE_REG interface to report few more
> ISA extensions namely: Ztso and Zacas. These extensions are already
> supported by the HWPROBE interface in Linux-6.8 kernel.
>
> To test these patches, use KVMTOOL from the riscv_more_exts_round2_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> These patches can also be found in the riscv_kvm_more_exts_round2_v1
> branch at: https://github.com/avpatel/linux.git
>
> Anup Patel (5):
> RISC-V: KVM: Forward SEED CSR access to user space
> RISC-V: KVM: Allow Ztso extension for Guest/VM
> KVM: riscv: selftests: Add Ztso extension to get-reg-list test
> RISC-V: KVM: Allow Zacas extension for Guest/VM
> KVM: riscv: selftests: Add Zacas extension to get-reg-list test
Queued this series for Linux-6.9
Thanks,
Anup
>
> arch/riscv/include/uapi/asm/kvm.h | 2 ++
> arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
> arch/riscv/kvm/vcpu_onereg.c | 4 ++++
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 ++++++++
> 4 files changed, 27 insertions(+)
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG
@ 2024-03-01 16:40 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-03-01 16:40 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Andrew Jones, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 6:08 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> This series extends the KVM RISC-V ONE_REG interface to report few more
> ISA extensions namely: Ztso and Zacas. These extensions are already
> supported by the HWPROBE interface in Linux-6.8 kernel.
>
> To test these patches, use KVMTOOL from the riscv_more_exts_round2_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> These patches can also be found in the riscv_kvm_more_exts_round2_v1
> branch at: https://github.com/avpatel/linux.git
>
> Anup Patel (5):
> RISC-V: KVM: Forward SEED CSR access to user space
> RISC-V: KVM: Allow Ztso extension for Guest/VM
> KVM: riscv: selftests: Add Ztso extension to get-reg-list test
> RISC-V: KVM: Allow Zacas extension for Guest/VM
> KVM: riscv: selftests: Add Zacas extension to get-reg-list test
Queued this series for Linux-6.9
Thanks,
Anup
>
> arch/riscv/include/uapi/asm/kvm.h | 2 ++
> arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
> arch/riscv/kvm/vcpu_onereg.c | 4 ++++
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 ++++++++
> 4 files changed, 27 insertions(+)
>
> --
> 2.34.1
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG
@ 2024-03-01 16:40 ` Anup Patel
0 siblings, 0 replies; 36+ messages in thread
From: Anup Patel @ 2024-03-01 16:40 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Shuah Khan, Palmer Dabbelt,
Paul Walmsley, Andrew Jones, kvm, kvm-riscv, linux-riscv,
linux-kernel, linux-kselftest
On Wed, Feb 14, 2024 at 6:08 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> This series extends the KVM RISC-V ONE_REG interface to report few more
> ISA extensions namely: Ztso and Zacas. These extensions are already
> supported by the HWPROBE interface in Linux-6.8 kernel.
>
> To test these patches, use KVMTOOL from the riscv_more_exts_round2_v1
> branch at: https://github.com/avpatel/kvmtool.git
>
> These patches can also be found in the riscv_kvm_more_exts_round2_v1
> branch at: https://github.com/avpatel/linux.git
>
> Anup Patel (5):
> RISC-V: KVM: Forward SEED CSR access to user space
> RISC-V: KVM: Allow Ztso extension for Guest/VM
> KVM: riscv: selftests: Add Ztso extension to get-reg-list test
> RISC-V: KVM: Allow Zacas extension for Guest/VM
> KVM: riscv: selftests: Add Zacas extension to get-reg-list test
Queued this series for Linux-6.9
Thanks,
Anup
>
> arch/riscv/include/uapi/asm/kvm.h | 2 ++
> arch/riscv/kvm/vcpu_insn.c | 13 +++++++++++++
> arch/riscv/kvm/vcpu_onereg.c | 4 ++++
> tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 ++++++++
> 4 files changed, 27 insertions(+)
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 36+ messages in thread