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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
	qemu-devel@nongnu.org,
	Daniel Henrique Barboza <danielhb413@gmail.com>,
	David Gibson <david@gibson.dropbear.id.au>,
	Harsh Prateek Bora <harshpb@linux.ibm.com>
Subject: [PATCH v2 04/10] ppc/spapr: Remove copy-paste from pa-features
Date: Tue, 12 Mar 2024 23:14:13 +1000	[thread overview]
Message-ID: <20240312131419.2196845-5-npiggin@gmail.com> (raw)
In-Reply-To: <20240312131419.2196845-1-npiggin@gmail.com>

TCG does not support copy/paste instructions. Remove it from
ibm,pa-features. This has never been implemented under TCG or
practically usable under KVM, so it won't be missed.

Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 hw/ppc/spapr.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 3108d7c532..4192cd8d6c 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -237,6 +237,10 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr,
      * SSO (SAO) ordering is supported on KVM and thread=single hosts,
      * but not MTTCG, so disable it. To advertise it, a cap would have
      * to be added, or support implemented for MTTCG.
+     *
+     * Copy/paste is not supported by TCG, so it is not advertised. KVM
+     * can execute them but it has no accelerator drivers which are usable,
+     * so there isn't much need for it anyway.
      */
 
     uint8_t pa_features_206[] = { 6, 0,
@@ -260,8 +264,8 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr,
         0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
         /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
         0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
-        /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
-        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
+        /* 36: SPR SO, 40: Radix MMU */
+        0x80, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */
         /* 42: PM, 44: PC RA, 46: SC vec'd */
         0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
         /* 48: SIMD, 50: QP BFP, 52: String */
-- 
2.42.0



  parent reply	other threads:[~2024-03-12 13:16 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-12 13:14 [PATCH v2 00/10] misc ppc patches Nicholas Piggin
2024-03-12 13:14 ` [PATCH v2 01/10] ppc: Drop support for POWER9 and POWER10 DD1 chips Nicholas Piggin
2024-03-12 13:14 ` [PATCH v2 02/10] target/ppc: POWER10 does not have transactional memory Nicholas Piggin
2024-03-12 13:14 ` [PATCH v2 03/10] ppc/spapr|pnv: Remove SAO from pa-features Nicholas Piggin
2024-03-14  2:34   ` David Gibson
2024-03-14  4:49     ` Nicholas Piggin
2024-03-12 13:14 ` Nicholas Piggin [this message]
2024-03-14  2:35   ` [PATCH v2 04/10] ppc/spapr: Remove copy-paste " David Gibson
2024-03-12 13:14 ` [PATCH v2 05/10] ppc/spapr: Adjust ibm,pa-features for POWER9 Nicholas Piggin
2024-03-12 13:14 ` [PATCH v2 06/10] ppc/spapr: Add pa-features for POWER10 machines Nicholas Piggin
2024-03-12 13:14 ` [PATCH v2 07/10] ppc/pnv: Permit ibm, pa-features set per machine variant Nicholas Piggin
2024-03-12 13:39   ` Harsh Prateek Bora
2024-03-12 13:14 ` [PATCH v2 08/10] ppc/pnv: Set POWER9, POWER10 ibm,pa-features bits Nicholas Piggin
2024-03-12 13:44   ` Harsh Prateek Bora
2024-03-12 13:14 ` [PATCH v2 09/10] target/ppc: Prevent supervisor from modifying MSR[ME] Nicholas Piggin
2024-03-12 13:14 ` [PATCH v2 10/10] spapr: set MSR[ME] and MSR[FP] on client entry Nicholas Piggin

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