From: Rob Herring <robh@kernel.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Abel Vesa <abelvesa@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
linux-clk@vger.kernel.org, imx@lists.linux.dev,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH v4 4/6] dt-bindindgs: clock: nxp: support i.MX95 LVDS CSR module
Date: Fri, 15 Mar 2024 11:27:52 -0600 [thread overview]
Message-ID: <20240315172752.GC1506658-robh@kernel.org> (raw)
In-Reply-To: <20240314-imx95-blk-ctl-v4-4-d23de23b6ff2@nxp.com>
On Thu, Mar 14, 2024 at 09:25:13PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX95 LVDS_CSR provides clock gate controls for the LVDS units, LVDS
> PHY and Pixel Mapper blocks. Add dt-binding for it.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> .../bindings/clock/nxp,imx95-lvds-csr.yaml | 50 ++++++++++++++++++++++
> include/dt-bindings/clock/nxp,imx95-clock.h | 7 +++
> 2 files changed, 57 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml
> new file mode 100644
> index 000000000000..e04f0ca4f588
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nxp,imx95-lvds-csr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX95 Display LVDS Block Control
> +
> +maintainers:
> + - Peng Fan <peng.fan@nxp.com>
> +
> +properties:
> + compatible:
> + items:
> + - const: nxp,imx95-lvds-csr
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> + description:
> + The clock consumer should specify the desired clock by having the clock
> + ID in its "clocks" phandle cell. See
> + include/dt-bindings/clock/nxp,imx95-clock.h
> +
> +required:
> + - compatible
> + - reg
> + - '#clock-cells'
How are clocks and power-domains optional?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@4c410000 {
> + compatible = "nxp,imx95-lvds-csr", "syscon";
> + reg = <0x4c410000 0x10000>;
> + #clock-cells = <1>;
> + clocks = <&scmi_clk 75>;
> + power-domains = <&scmi_devpd 13>;
> + };
> +...
> diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h
> index c671c4dbb4d5..e642a54c81a0 100644
> --- a/include/dt-bindings/clock/nxp,imx95-clock.h
> +++ b/include/dt-bindings/clock/nxp,imx95-clock.h
> @@ -18,4 +18,11 @@
> #define IMX95_CLK_CAMBLK_ISP 4
> #define IMX95_CLK_CAMBLK_END 5
>
> +#define IMX95_CLK_DISPMIX_LVDS_PHY_DIV 0
> +#define IMX95_CLK_DISPMIX_LVDS_CH0_GATE 1
> +#define IMX95_CLK_DISPMIX_LVDS_CH1_GATE 2
> +#define IMX95_CLK_DISPMIX_PIX_DI0_GATE 3
> +#define IMX95_CLK_DISPMIX_PIX_DI1_GATE 4
> +#define IMX95_CLK_DISPMIX_LVDS_CSR_END 5
Same issue here.
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Abel Vesa <abelvesa@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
linux-clk@vger.kernel.org, imx@lists.linux.dev,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH v4 4/6] dt-bindindgs: clock: nxp: support i.MX95 LVDS CSR module
Date: Fri, 15 Mar 2024 11:27:52 -0600 [thread overview]
Message-ID: <20240315172752.GC1506658-robh@kernel.org> (raw)
In-Reply-To: <20240314-imx95-blk-ctl-v4-4-d23de23b6ff2@nxp.com>
On Thu, Mar 14, 2024 at 09:25:13PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> The i.MX95 LVDS_CSR provides clock gate controls for the LVDS units, LVDS
> PHY and Pixel Mapper blocks. Add dt-binding for it.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> .../bindings/clock/nxp,imx95-lvds-csr.yaml | 50 ++++++++++++++++++++++
> include/dt-bindings/clock/nxp,imx95-clock.h | 7 +++
> 2 files changed, 57 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml
> new file mode 100644
> index 000000000000..e04f0ca4f588
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nxp,imx95-lvds-csr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX95 Display LVDS Block Control
> +
> +maintainers:
> + - Peng Fan <peng.fan@nxp.com>
> +
> +properties:
> + compatible:
> + items:
> + - const: nxp,imx95-lvds-csr
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> + description:
> + The clock consumer should specify the desired clock by having the clock
> + ID in its "clocks" phandle cell. See
> + include/dt-bindings/clock/nxp,imx95-clock.h
> +
> +required:
> + - compatible
> + - reg
> + - '#clock-cells'
How are clocks and power-domains optional?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@4c410000 {
> + compatible = "nxp,imx95-lvds-csr", "syscon";
> + reg = <0x4c410000 0x10000>;
> + #clock-cells = <1>;
> + clocks = <&scmi_clk 75>;
> + power-domains = <&scmi_devpd 13>;
> + };
> +...
> diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h
> index c671c4dbb4d5..e642a54c81a0 100644
> --- a/include/dt-bindings/clock/nxp,imx95-clock.h
> +++ b/include/dt-bindings/clock/nxp,imx95-clock.h
> @@ -18,4 +18,11 @@
> #define IMX95_CLK_CAMBLK_ISP 4
> #define IMX95_CLK_CAMBLK_END 5
>
> +#define IMX95_CLK_DISPMIX_LVDS_PHY_DIV 0
> +#define IMX95_CLK_DISPMIX_LVDS_CH0_GATE 1
> +#define IMX95_CLK_DISPMIX_LVDS_CH1_GATE 2
> +#define IMX95_CLK_DISPMIX_PIX_DI0_GATE 3
> +#define IMX95_CLK_DISPMIX_PIX_DI1_GATE 4
> +#define IMX95_CLK_DISPMIX_LVDS_CSR_END 5
Same issue here.
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next prev parent reply other threads:[~2024-03-15 17:27 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-14 13:25 [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock features Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-14 13:25 ` [PATCH v4 1/6] dt-bindindgs: clock: nxp: support i.MX95 VPU CSR module Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-15 16:54 ` Rob Herring
2024-03-15 16:54 ` Rob Herring
2024-03-15 20:47 ` Krzysztof Kozlowski
2024-03-15 20:47 ` Krzysztof Kozlowski
2024-03-18 7:15 ` Peng Fan
2024-03-18 7:15 ` Peng Fan
2024-03-14 13:25 ` [PATCH v4 2/6] dt-bindindgs: clock: nxp: support i.MX95 Camera " Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-15 17:24 ` Rob Herring
2024-03-15 17:24 ` Rob Herring
2024-03-14 13:25 ` [PATCH v4 3/6] dt-bindindgs: clock: nxp: support i.MX95 Display Master " Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-15 17:26 ` Rob Herring
2024-03-15 17:26 ` Rob Herring
2024-03-14 13:25 ` [PATCH v4 4/6] dt-bindindgs: clock: nxp: support i.MX95 LVDS " Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-15 17:27 ` Rob Herring [this message]
2024-03-15 17:27 ` Rob Herring
2024-03-14 13:25 ` [PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display " Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-15 20:49 ` Krzysztof Kozlowski
2024-03-15 20:49 ` Krzysztof Kozlowski
2024-03-18 12:37 ` Peng Fan
2024-03-18 12:37 ` Peng Fan
2024-03-18 15:44 ` Krzysztof Kozlowski
2024-03-18 15:44 ` Krzysztof Kozlowski
2024-03-14 13:25 ` [PATCH v4 6/6] clk: imx: add i.MX95 BLK CTL clk driver Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-17 15:59 ` [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock features Marco Felsch
2024-03-17 15:59 ` Marco Felsch
2024-03-18 1:22 ` Peng Fan
2024-03-18 1:22 ` Peng Fan
2024-03-18 9:59 ` Marco Felsch
2024-03-18 9:59 ` Marco Felsch
2024-03-18 11:01 ` Peng Fan
2024-03-18 11:01 ` Peng Fan
2024-03-18 14:07 ` Marco Felsch
2024-03-18 14:07 ` Marco Felsch
2024-03-18 23:11 ` Peng Fan
2024-03-18 23:11 ` Peng Fan
2024-03-19 7:17 ` Marco Felsch
2024-03-19 7:17 ` Marco Felsch
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