From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [CI 1/8] drm/xe: Make TLB invalidation fences unordered
Date: Wed, 20 Mar 2024 14:43:49 +0100 [thread overview]
Message-ID: <20240320134356.73655-1-thomas.hellstrom@linux.intel.com> (raw)
They can actually complete out-of-order, so allocate a unique
fence context for each fence.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 1 -
drivers/gpu/drm/xe/xe_gt_types.h | 7 -------
drivers/gpu/drm/xe/xe_pt.c | 3 +--
3 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
index a3c4ffba679d..787cba5e49a1 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
@@ -63,7 +63,6 @@ int xe_gt_tlb_invalidation_init(struct xe_gt *gt)
INIT_LIST_HEAD(>->tlb_invalidation.pending_fences);
spin_lock_init(>->tlb_invalidation.pending_lock);
spin_lock_init(>->tlb_invalidation.lock);
- gt->tlb_invalidation.fence_context = dma_fence_context_alloc(1);
INIT_DELAYED_WORK(>->tlb_invalidation.fence_tdr,
xe_gt_tlb_fence_timeout);
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index f6da2ad9719f..2143dffcaf11 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -179,13 +179,6 @@ struct xe_gt {
* xe_gt_tlb_fence_timeout after the timeut interval is over.
*/
struct delayed_work fence_tdr;
- /** @tlb_invalidation.fence_context: context for TLB invalidation fences */
- u64 fence_context;
- /**
- * @tlb_invalidation.fence_seqno: seqno to TLB invalidation fences, protected by
- * tlb_invalidation.lock
- */
- u32 fence_seqno;
/** @tlb_invalidation.lock: protects TLB invalidation fences */
spinlock_t lock;
} tlb_invalidation;
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 8d3922d2206e..a5bb8d20f815 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -1135,8 +1135,7 @@ static int invalidation_fence_init(struct xe_gt *gt,
spin_lock_irq(>->tlb_invalidation.lock);
dma_fence_init(&ifence->base.base, &invalidation_fence_ops,
>->tlb_invalidation.lock,
- gt->tlb_invalidation.fence_context,
- ++gt->tlb_invalidation.fence_seqno);
+ dma_fence_context_alloc(1), 1);
spin_unlock_irq(>->tlb_invalidation.lock);
INIT_LIST_HEAD(&ifence->base.link);
--
2.44.0
next reply other threads:[~2024-03-20 13:44 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-20 13:43 Thomas Hellström [this message]
2024-03-20 13:43 ` [CI 2/8] drm/xe: Use ring ops TLB invalidation for rebinds Thomas Hellström
2024-03-20 13:43 ` [CI 3/8] drm/xe: Reserve fences where needed Thomas Hellström
2024-03-20 13:43 ` [CI 4/8] drm/xe: Rework rebinding Thomas Hellström
2024-03-20 13:43 ` [CI 5/8] drm/xe: Move vma rebinding to the drm_exec locking loop Thomas Hellström
2024-03-20 13:43 ` [CI 6/8] drm/xe/bo: Forward the decision to evict local objects during validation Thomas Hellström
2024-03-20 13:43 ` [CI 7/8] drm/xe/bo: Allow eviction of unbound local bos Thomas Hellström
2024-03-20 13:43 ` [CI 8/8] drm/xe/bo: Allow migrating local bos to TT to make room in VRAM Thomas Hellström
2024-03-20 13:48 ` ✓ CI.Patch_applied: success for series starting with [CI,1/8] drm/xe: Make TLB invalidation fences unordered Patchwork
2024-03-20 13:49 ` ✓ CI.checkpatch: " Patchwork
2024-03-20 13:50 ` ✓ CI.KUnit: " Patchwork
2024-03-20 14:00 ` ✓ CI.Build: " Patchwork
2024-03-20 14:03 ` ✓ CI.Hooks: " Patchwork
2024-03-20 14:04 ` ✓ CI.checksparse: " Patchwork
2024-03-20 14:36 ` ✗ CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-03-20 10:10 [CI 1/8] " Thomas Hellström
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