From: Sven Schnelle <svens@stackframe.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, Helge Deller <deller@gmx.de>,
Sven Schnelle <svens@stackframe.org>
Subject: [PATCH 1/3] target/hppa: use gva_offset_mask() everywhere
Date: Sun, 24 Mar 2024 09:09:43 +0100 [thread overview]
Message-ID: <20240324080945.991100-2-svens@stackframe.org> (raw)
In-Reply-To: <20240324080945.991100-1-svens@stackframe.org>
move it to cpu.h, so it can also be used in hppa_form_gva_psw()
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
target/hppa/cpu.h | 10 ++++++++--
target/hppa/translate.c | 12 +++---------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index a92dc352cb..a072d0bb63 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -285,14 +285,20 @@ void hppa_translate_init(void);
#define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
+static inline uint64_t gva_offset_mask(target_ulong psw)
+{
+ return (psw & PSW_W
+ ? MAKE_64BIT_MASK(0, 62)
+ : MAKE_64BIT_MASK(0, 32));
+}
+
static inline target_ulong hppa_form_gva_psw(target_ulong psw, uint64_t spc,
target_ulong off)
{
#ifdef CONFIG_USER_ONLY
return off;
#else
- off &= psw & PSW_W ? MAKE_64BIT_MASK(0, 62) : MAKE_64BIT_MASK(0, 32);
- return spc | off;
+ return spc | (off & gva_offset_mask(psw));
#endif
}
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 19594f917e..0af125ed74 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -586,17 +586,10 @@ static bool nullify_end(DisasContext *ctx)
return true;
}
-static uint64_t gva_offset_mask(DisasContext *ctx)
-{
- return (ctx->tb_flags & PSW_W
- ? MAKE_64BIT_MASK(0, 62)
- : MAKE_64BIT_MASK(0, 32));
-}
-
static void copy_iaoq_entry(DisasContext *ctx, TCGv_i64 dest,
uint64_t ival, TCGv_i64 vval)
{
- uint64_t mask = gva_offset_mask(ctx);
+ uint64_t mask = gva_offset_mask(ctx->tb_flags);
if (ival != -1) {
tcg_gen_movi_i64(dest, ival & mask);
@@ -1403,7 +1396,8 @@ static void form_gva(DisasContext *ctx, TCGv_i64 *pgva, TCGv_i64 *pofs,
*pofs = ofs;
*pgva = addr = tcg_temp_new_i64();
- tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base, gva_offset_mask(ctx));
+ tcg_gen_andi_i64(addr, modify <= 0 ? ofs : base,
+ gva_offset_mask(ctx->tb_flags));
#ifndef CONFIG_USER_ONLY
if (!is_phys) {
tcg_gen_or_i64(addr, addr, space_select(ctx, sp, base));
--
2.43.2
next prev parent reply other threads:[~2024-03-24 8:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-24 8:09 [PATCH 0/3] few hppa fixes for 64bit mode Sven Schnelle
2024-03-24 8:09 ` Sven Schnelle [this message]
2024-03-24 16:13 ` [PATCH 1/3] target/hppa: use gva_offset_mask() everywhere Helge Deller
2024-03-24 17:20 ` Richard Henderson
2024-03-24 8:09 ` [PATCH 2/3] target/hppa: mask offset bits in gva Sven Schnelle
2024-03-24 16:24 ` Helge Deller
2024-03-24 18:13 ` Richard Henderson
2024-03-24 18:41 ` Sven Schnelle
2024-03-24 23:14 ` Richard Henderson
2024-03-25 6:27 ` Sven Schnelle
2024-03-28 21:03 ` Sven Schnelle
2024-04-02 6:01 ` Sven Schnelle
2024-04-02 6:08 ` Richard Henderson
2024-04-02 6:29 ` Sven Schnelle
2024-04-02 22:18 ` Helge Deller
2024-03-24 8:09 ` [PATCH 3/3] target/hppa: fix building gva for wide mode Sven Schnelle
2024-03-24 16:28 ` Helge Deller
2024-03-24 17:20 ` Richard Henderson
2024-03-24 21:39 ` Richard Henderson
2024-03-24 23:38 ` Richard Henderson
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